JP2007183879A - Information processing device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an information processing device capable of selecting a further appropriate operation mode. <P>SOLUTION: The information processing device comprises a card slot into which a card type medium is inserted, a first communication speed acquiring means for acquiring a first communication speed, namely communication speed taken when data is communicated with the card type medium in a first operation mode, a second communication speed acquiring means for acquiring a second communication speed, namely communication speed taken when data is communicated with the card type medium in a second operation mode, a determining means for determining which of the first communication speed and the second communication speed is faster, and a data communication means for communicating data with the card type medium in the operation mode of the communication speed determined to be faster by the determining means, of the first operation mode and the second operation mode. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to an information processing apparatus, and more particularly, to an information processing apparatus capable of appropriately selecting a communication speed for exchanging data with a card-type medium.

  A CF (Compact Flash (registered trademark)) card is known as a card-type medium for storing data or performing data communication with an information processing apparatus such as a personal computer. An information processing apparatus corresponding to the CF card is provided with a card slot for the CF card, and the information processing apparatus can access the CF card when the user inserts the CF card into the card slot. become.

  There are two types of CF cards, a memory card and an IO card. When an information processing apparatus exchanges data with a CF card, which is a memory card inserted into a card slot, there are two types of memory mode and TrueIDE mode. Must be done in one of the operating modes. Which operation mode is used to exchange data with the CF card is arbitrary, but since the communication speed is often faster when accessed in the TrueIDE mode, an information processing device has been inserted so far. The corresponding operation mode of the CF card is checked, a CF card that supports the TrueIDE mode is accessed in the TrueIDE mode, and a CF card that does not support the TrueIDE mode is accessed in the memory mode (for example, a special feature). No. 2004-355476).

However, in some CF cards, the communication speed in the memory mode may be faster than the communication speed in the TrueIDE mode. In such a case, the person who exchanges data with the CF car data in the memory mode. However, the data transfer time can be shortened.
JP 2004-355476 A

  Therefore, the present invention has been made in view of the above problems, and an object thereof is to provide an information processing apparatus capable of selecting a more appropriate operation mode.

In order to solve the above problems, an information processing apparatus according to the present invention provides:
A card slot into which a card-type medium is inserted;
First communication speed acquisition means for acquiring a first communication speed, which is a communication speed when data is exchanged with the card-type medium in the first operation mode;
Second communication speed acquisition means for acquiring a second communication speed, which is a communication speed when data is exchanged with the card-type medium in the second operation mode;
Determining means for determining which one of the first communication speed and the second communication speed is faster;
A data communication means for exchanging data with the card-type medium in an operation mode at a communication speed determined to be fast by the determination means among the first operation mode and the second operation mode;
It is characterized by providing.

In this case, the first communication speed acquisition means acquires the first communication speed by accessing the card-type medium in the first operation mode,
The second communication speed acquisition unit may also acquire the second communication speed by accessing the card-type medium in the first operation mode.

Alternatively, the first communication speed acquisition means acquires the first communication speed by accessing the card-type medium in the first operation mode,
The second communication speed acquisition unit may acquire the second communication speed by accessing the card-type medium in the second operation mode.

Further, the first communication speed acquisition means acquires the first communication speed when a new card-type medium is detected in the card slot,
The second communication speed acquisition means also acquires the second communication speed when a new card-type medium is detected in the card slot,
The determination means may also determine which of the first communication speed and the second communication speed is faster when a new card-type medium is detected in the card slot.

Alternatively, the first communication speed acquisition means acquires the first communication speed when a request for exchanging data with the card-type medium occurs,
The second communication speed acquisition means also acquires the second communication speed when a request for exchanging data with the card-type medium occurs,
The determination means may also determine which of the first communication speed and the second communication speed is faster when a request for exchanging data with the card-type medium is generated.

  The card-type medium may be a compact flash card.

In this case, the first operation mode is a memory mode,
The second operation mode may be a TrueIDE mode.

An information processing apparatus control method according to the present invention includes:
A method for controlling an information processing apparatus having a card slot into which a card-type medium is inserted,
Obtaining a first communication speed which is a communication speed when data is exchanged with the card-type medium in a first operation mode;
Obtaining a second communication speed which is a communication speed when data is exchanged with the card-type medium in a second operation mode;
Determining which of the first communication speed and the second communication speed is faster;
Exchanging data with the card-type medium in the operation mode of the communication speed which is determined to be fast among the first operation mode and the second operation mode;
It is characterized by providing.

The program according to the present invention is:
A program for controlling an information processing apparatus having a card slot into which a card-type medium is inserted,
Obtaining a first communication speed which is a communication speed when data is exchanged with the card-type medium in a first operation mode;
Obtaining a second communication speed which is a communication speed when data is exchanged with the card-type medium in a second operation mode;
Determining which of the first communication speed and the second communication speed is faster;
Exchanging data with the card-type medium in the operation mode of the communication speed which is determined to be fast among the first operation mode and the second operation mode;
This is characterized in that the information processing apparatus is executed.

The recording medium according to the present invention is
A recording medium on which a program for controlling an information processing apparatus having a card slot into which a card-type medium is inserted is recorded,
Obtaining a first communication speed which is a communication speed when data is exchanged with the card-type medium in a first operation mode;
Obtaining a second communication speed which is a communication speed when data is exchanged with the card-type medium in a second operation mode;
Determining which of the first communication speed and the second communication speed is faster;
Exchanging data with the card-type medium in the operation mode of the communication speed which is determined to be fast among the first operation mode and the second operation mode;
Is recorded in the information processing apparatus.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. Note that the embodiments described below do not limit the technical scope of the present invention.

[First Embodiment]
FIG. 1 is a block diagram illustrating an example of the internal configuration of the information processing apparatus 10 according to the present embodiment. The information processing apparatus 10 is a variety of information processing apparatuses including a card slot, and includes, for example, a small portable information terminal, a digital camera, and a notebook or desktop computer.

  As shown in FIG. 1, the information processing apparatus 10 according to the present embodiment includes a CPU (Central Processing Unit) 20, a RAM (Random Access Memory) 22, a ROM (Read Only Memory) 24, a hard disk drive 26, and the like. A user interface 30, a video decoder 32, and a display screen 34 are provided.

  The CPU 20, RAM 22, ROM 24, and hard disk drive 26 are connected to each other via an internal bus. Therefore, the CPU 20 can arbitrarily access the RAM 22, ROM 24, and hard disk drive 26 via the internal bus.

  Image data is output from the CPU 20 to the video decoder 32, and the image data is decoded by the video decoder 32 and displayed on the display screen 34. The display screen 34 is configured by an LCD (Liquid Crystal Display), a CRT (Cathode Ray Tube), or the like.

  Various user operation instructions are input to the CPU 20 from the user interface 30. The user interface 30 can be composed of, for example, one or a plurality of buttons, a keyboard, a pointing device, and the like, or can be composed of a combination thereof. In the example of FIG. 1, the user interface 30 is provided in the information processing apparatus 10 itself, but the user interface 30 may be provided outside the information processing apparatus 10. The CPU 20 executes various processes based on operation instructions from the user interface 30.

  The information processing apparatus 10 according to the present embodiment is provided with a card slot 40. In the present embodiment, the CF card 50 is inserted into the card slot 40 by the user. Accordingly, various types of CF cards 50 are inserted into the card slot 40 by the user, and CF cards 50 corresponding to various modes are inserted.

  In particular, in the present embodiment, the CF card 50 inserted into the card slot 40 is assumed to be a memory card that can operate in both the memory mode and the TrueIDE mode. In this embodiment, an error occurs when an I / O card operable in the card I / O mode is inserted into the card slot 40. Of course, if a standard other than this is newly established, a CF card of a new standard may be inserted into the information processing apparatus 10.

  Control of the CF card 50 inserted into the card slot 40 is performed from the CPU 20 via the card controller 60. That is, the CPU 20 determines whether or not the CF card 50 is inserted into the card slot 40 based on the card detection signal output from the card slot 40. When the CF card 50 is inserted, the CPU 20 outputs a mode switching signal to the card controller 60 and switches between accessing in the memory mode and accessing in the TrueIDE mode. When the information processing apparatus 10 supports the card I / O mode, the mode switching signal is used to switch to the card I / O mode.

  The card controller 60 and the card slot 40 are connected by a card bus, and data is exchanged between the CPU 20 and the CF card 50 inserted in the card slot 40 via the card controller 60. Is called.

  The card power is supplied to the CF card 50 inserted into the card slot 40 from the card power control circuit 62 via the power wiring. Whether or not the card power control circuit 62 supplies card power is controlled based on a card power control signal output from the CPU 20. That is, when the CPU 20 detects that the CF card 50 is inserted, or when the CPU 20 is trying to access the CF card 50, the CPU 20 sends a card power control signal for supplying card power to the card power control circuit 62. Output. On the contrary, when the CPU 20 detects that the CF card 50 has been removed, or when the CPU 20 exits from the card access state, the CPU 20 stops the card power supply to the card power control circuit 62. Output power control signal. For example, in this embodiment, the card power control signal when the card power is supplied is at a high level, and the card power control signal when the card power is not supplied is at a low level.

  In the present embodiment, the card power control signal output from the CPU 20 is also supplied to the card power discharge circuit 64. The card power discharge circuit 64 is configured to turn on / off the operation based on the card power control signal. That is, in the case of a card power control signal that does not supply card power, the card power discharge circuit 64 enters an operating state and connects the power supply wiring that supplies card power to the ground via a resistor. For this reason, when the card power supply is switched from on to off, the power supply wiring of the card power supply is forcibly discharged by the discharge circuit 64, and the card power supply is rapidly lowered to the ground level. Conversely, if the card power supply control signal supplies card power, the card power discharge circuit 64 is inactive and the power supply wiring of the card power is not connected to the ground. For this reason, it is possible to avoid a wasteful current from flowing from the power supply wiring to the ground while the card power is supplied. However, in the present embodiment, the card discharge circuit 64 is not necessarily a necessary circuit and can be omitted.

  The conditions under which the card power is turned on and the conditions under which the card power is turned off are variously set according to the specifications of the information processing apparatus 10 and the CF card 50.

  FIG. 2 is a diagram illustrating an example of a circuit configuration of the card power discharge circuit 64 according to the present embodiment. As shown in FIG. 2, the card power discharge circuit 64 includes a P channel MOS transistor Q1, an N channel MOS transistor Q2, resistors R1 to R4, diodes D1 to D4, and a card power on / off circuit 70. It is prepared for.

  A P-channel MOS transistor Q1 and a resistor R1 are connected in series between the power supply and the ground. A diode D4 is connected in parallel with the P-channel MOS transistor Q1. A resistor R3 is connected between the node A connected to the input terminal to which the card power supply control signal is input and the gate G of the P-channel MOS transistor Q1.

  A resistor R2 and an N-channel MOS transistor Q2 are connected between a node C connected to a power supply wiring for supplying card power to the CF card 50 and the ground. A diode D3 is connected in parallel with the N-channel MOS transistor Q2. A resistor R4 is connected between a node B between the P-channel MOS transistor Q1 and the resistor R1 and a gate G of the N-channel MOS transistor Q2. A diode D2 is connected in parallel with the resistor R4.

  A card power on / off circuit 70 is connected between the power supply and the card power. A card power control signal is input from the node A to the card power on / off circuit 70. The card power on / off circuit 70 supplies the power from the power supply to the node C as the card power when the card power control signal is at the high level, and the node C when the card power control signal is at the low level. This is a circuit that does not supply power.

  Next, the operation of the card power discharge circuit 64 will be described. First, the operation when the card power control signal is at a high level, that is, when the card power is supplied will be described. When the card power control signal is at a high level, the card power on / off circuit 70 supplies the power supplied from the power supply to the node C. Further, the node A becomes high level, and the P-channel MOS transistor Q1 is turned off. Further, the node B is connected to the ground via the resistor R1, and thus becomes low level, and the N-channel MOS transistor Q2 is also turned off. For this reason, the power wiring is disconnected from the ground, and the power output from the card power on / off circuit 70 is supplied as the card power via the power wiring.

  Next, when the card power control signal becomes low level, that is, when supply of card power is stopped, the node A becomes low level. Therefore, the card power on / off circuit 70 stops supplying power from the power supply to the node C. Further, since the node A is at the low level, the P-channel MOS transistor Q1 is turned on, and the node B is driven to the high level by the supply power. When the node B becomes high level, the N-channel MOS transistor Q2 is also turned on, and the power supply wiring for supplying card power is connected to the ground via the resistor R2. For this reason, the power supply wiring of the card power supply is forcibly discharged and falls in a short time. As the resistance value of the resistor R2 is decreased, the power supply wiring is rapidly discharged, and the fall time of the card power supply is shortened.

  3 is a diagram showing a card power control signal and an operation waveform of the card power supply in the case of an information processing apparatus without the card power discharge circuit 64. FIG. 4 is a diagram of the information processing apparatus 10 with the card power discharge circuit 64. It is a figure which shows the operation | movement waveform of a card power supply control signal and a card power supply.

  As shown in FIG. 3, when the CF card 50 is inserted, the CPU 20 sets the card power control signal to high level at time T1 to access the CF card 50 in the memory mode, and supplies the card power to the CF card 50. To do. Then, CIS information is read from the CF card 50 in the memory mode. Subsequently, in order to switch the CF card 50 from the memory mode to the TrueIDE mode, the card power control signal is set to low level at time T2 to stop supplying the card power to the CF card 50. After this time T2, since there is no card power supply discharge circuit 64, the card power supply falls over a long time. Then, after the card power supply falls, the supply of the card power supply can be resumed at time T3, and the CF card 50 can be started up in the TrueIDE mode.

  On the other hand, when the card power discharge circuit 64 is present, as shown in FIG. 4, when the card power control signal is set to low level at time T2, the card power discharge circuit 64 forcibly discharges the power wiring of the card power. So the card power will fall in a short time.

  Next, a card access pre-process that is regularly executed by the information processing apparatus 10 will be described with reference to FIGS. 5, 6A, and 6B. This card access pre-processing is a process realized by the CPU 20 reading and executing a card access pre-processing program stored in the ROM 24 or the hard disk drive 26. Further, this card access pre-processing is processing that is automatically started when the information processing apparatus 10 is powered on.

  As shown in FIG. 5, the information processing apparatus 10 determines whether a new CF card 50 is detected in the card slot 40 (step S10). In the present embodiment, it is determined whether a new CF card 50 has been inserted into the card slot 40 based on the card detection signal output from the card slot 40 described above. More specifically, the information processing apparatus 10 determines that a new CF card 50 is inserted into the card slot 40 when both the CD1 signal and the CD2 signal in the card slot 40 change from a high level to a low level. to decide. Further, in the present embodiment, the information processing apparatus 10 checks the CD1 signal and the CD2 signal in the card slot 40 when the power supply of the information processing apparatus 10 is turned on, and the CD1 signal and the CD2 signal turn on the power. Even if it is at the low level when turned on, it is determined that a new CF card 50 has been inserted into the card slot 40 because the CF card 50 has already been inserted into the card slot 40. That is, in the present embodiment, the CD1 signal and the CD2 signal are at a low level while the CF card 50 is inserted, and the CD1 signal and the CD2 signal are at a high level while the CF card 50 is not inserted. become.

  If it is determined in step S10 that a new CF card 50 is not detected (step S10: NO), this step S10 is repeated until the new CF card 50 is detected in the card slot 40.

  On the other hand, if it is determined in step S10 that a new CF card 50 has been detected in the card slot 40 (step S10: YES), the information processing apparatus 10 initializes the card controller 60 (step S12).

  Next, the information processing apparatus 10 asserts the RESET signal of the CF card 50 (step S14). Subsequently, the information processing apparatus 10 changes the card power control signal from the low level to the high level and starts up the card power (step S16). At this time, the CF card 50 is started in the memory mode.

  Next, after waiting for the card power supply to stabilize, the information processing apparatus 10 switches the card-side interface of the card controller 60 from the high impedance state to the output enabled state (step S18). Subsequently, the information processing apparatus 10 negates the RESET signal (step S20).

  Next, as illustrated in FIG. 6A, the information processing apparatus 10 reads CIS information that is card attribute information in the memory mode (step S30).

  Next, the information processing apparatus 10 examines and acquires the cycle time in the memory mode of the inserted CF card 50 based on the read CIS information (step S32).

  FIG. 7 is a diagram showing a list of cycle times that the CF card 50 may support in the memory mode. As shown in FIG. 7, in this embodiment, the CF card 50 operates in any cycle time of 250 ns, 150 ns, 120 ns, 100 ns, and 80 ns. Which cycle time the CF card supports can be determined by looking at bit 2 to bit 0 of the device ID in byte 2 in the CISTPL_DEVICE tuple in the CIS information. Therefore, in step S32, it is specified in which cycle time the inserted CF card 50 operates based on the read CIS information, and the communication speed in the memory mode is specified based on this cycle time. Here, since the cycle time is a time of one cycle of the basic operation clock, it means that the shorter the cycle time, the faster the basic operation.

  The cycle time of 150 ns is not supported by the CF + and Compact Flash Specification Revision 3.0 standard, but some cards with specifications that operate with a normal CF card 50 or a microdrive with a built-in hard disk drive and a cycle time of 150 ns. Exists. For this reason, the information processing apparatus 10 according to the present embodiment can be adapted to the CF card 50 and the microdrive that operate with a cycle time of 150 ns.

  Next, the information processing apparatus 10 executes the IdentifyDevice command (step S34) and acquires the cycle time of the TrueIDE mode (step S36). That is, even in the TrueIDE mode, the transfer mode that can be handled differs depending on the type of the CF card 50, and the communication speed, that is, the cycle time differs depending on the transfer mode that can be handled. For this reason, the information processing apparatus 10 needs to check a transfer mode that can be handled.

  In general, there are three transfer modes of the TrueIDE mode: a PIO mode, a Multiword DMA mode, and an Ultra DMA mode. In these three transfer modes, several modes are prepared for each corresponding speed. It is assumed that the information processing apparatus 10 according to the present embodiment supports only the PIO mode among these three transfer modes.

  Furthermore, it is assumed that the information processing apparatus 10 according to the present embodiment supports the latest revision revision 3.0 (CF + and Compact Flash Specification Revision 3.0) in the PIO mode. In the PIO mode of Revision 3.0, since PIO mode 0 to PIO mode 6 are defined, it is determined which CF card 50 inserted in which PIO mode corresponds.

  FIG. 8 is a diagram showing a list of cycle times of mode 0 to mode 6 defined in the PIO mode. As shown in FIG. 8, in the PIO mode, the communication speed is the slowest in the PIO mode 0 and the cycle time is 600 ns, and the communication speed increases as the PIO mode 6 is reached. In the PIO mode 6, the cycle time is 80 ns. is there.

  FIG. 9 is a flowchart illustrating the contents of the mode determination process for determining the corresponding mode in the PIO mode of the TrueIDE mode according to the present embodiment. This mode determination process is a process realized by the CPU 20 reading and executing a mode determination program stored in the ROM 24 or the hard disk drive 26.

  As shown in FIG. 9, first, the information processing apparatus 10 executes the Identify Device command and reads Identify information (step S100). Then, the information processing apparatus 10 determines whether or not bit 1 of Word 53 of this Identify information is “0” (step S102, step S104). If this bit 1 is “0” (step S104: YES) ) Determines the mode based on the value of Word 51 (step S106). That is, if the value of Word 51 is “0”, it is determined that the PIO mode 0 is supported, if “1”, it is determined that the PIO mode 1 is supported, and if “2”, the PIO mode is determined. 2, it is determined that it corresponds to PIO mode 3 if it is “3”, and it is determined that it corresponds to PIO mode 4 if it is “4”. When the value of Word 51 is “5” or more, it is determined that the card is not applicable.

  On the other hand, when bit 1 of Word 53 is not “0” (step S104: NO), bit 1 of Word 64 is confirmed (step S108), and when bit 1 is “1” (step S110: YES). Is determined to be compatible with PIO mode 4 (step S112), bit 1 is not “1” (step S110: NO), and bit 0 of Word64 is “1” (step S114, step S112). In step S116, it is determined that the PIO mode 3 is supported (step S118). However, in step S112 and step S118, Word 163 is confirmed (step S120), and if bit 0 of Word 163 is “1”, it is determined that the PIO mode 5 is supported (step S122). If bit 1 of Word 163 is “1”, it is determined that the PIO mode 6 is supported (step S124). On the other hand, when bit 0 to bit 2 of Word 163 are 0, PIO mode 3 or PIO mode 4 determined based on Word 64 becomes the corresponding mode (step S126).

  When bit 1 of Word 64 is not “1” (step S110: NO) and bit 0 of Word 64 is not “1” (step S116: NO), it is determined that the card is not applicable (step S128). . As described above, in the present embodiment, the mode determination process as shown in FIG. 9 determines the transfer mode supported by the PIO mode of the TrueIDE mode, and acquires the communication speed of the TrueIDE mode.

  The IdentifyDevice command may be executed in the memory mode or in the TrueIDE mode. When executing the IdentifyDevice command in the memory mode, the IdentifyDevice command may be executed as it is after Step S30. On the other hand, when the Identify Device command is executed in the TrueIDE mode, as shown in FIG. 4, the supply of the card power to the CF card 50 is once stopped, and after the card power is sufficiently lowered, the OE signal Is fixed at the ground level and the card power supply is started again, so that it is necessary to execute the IdentifyDevice command after the CF card 50 is restarted in the TrueIDE mode.

  Next, as illustrated in FIG. 6A, the information processing apparatus 10 refers to the mode selection table TB10 and selects a mode to be used for data transfer (step S38). FIG. 10 is a diagram showing an example of the configuration of the mode selection table TB10 according to the present embodiment. In the present embodiment, the mode selection table TB10 is stored in advance in the ROM 24 or the hard disk drive 26.

  As can be seen from FIG. 10, in the mode selection table TB10, the comparison between the cycle time corresponding to the memory mode and the PIO mode corresponding to the TrueIDE mode indicates that the communication speed is high in the memory mode. It is a list which shows which is in TrueIDE mode. Therefore, the information processing apparatus 10 selects the operation mode with the higher transfer speed among the operation modes supported by the newly detected CF card 50 based on the mode selection table TB10. For example, when the memory mode corresponds to a cycle time of 250 ns and the TrueIDE mode corresponds to the PIO mode 1 of 283 ns, the memory mode is selected as the operation mode. When the memory mode corresponds to a cycle time of 250 ns and the True IDE mode corresponds to the PIO mode 3 of 180 ns, the True IDE mode is selected as the operation mode.

  However, since the memory mode and the TrueIDE mode are different operation modes, when the transfer speed is compared between the two, the transfer speed is not necessarily higher when the cycle time is shorter. Therefore, in this embodiment, instead of simply determining the operation mode based on the cycle time, the transfer speed in the memory mode and the TrueIDE mode is checked in advance, and the operation mode with the higher transfer speed is selected. As described above, the mode selection table TB10 is prepared.

  Next, as illustrated in FIG. 6A, the information processing apparatus 10 sets the card controller 60 (step S39). That is, the setting for adapting the card controller 60 to the operation mode selected in step 38 is performed.

  Next, as illustrated in FIG. 6B, the information processing apparatus 10 asserts the RESET signal of the CF card 50 (step S40). Subsequently, the information processing apparatus 10 switches the card-side interface of the card controller 60 from the output enabled state to the high impedance state (step S42).

  Next, the information processing apparatus 10 changes the card power control signal from the high level to the low level to turn off the card power (step S44). In this embodiment, since it is unclear when a data read / write request to the CF card 50 actually occurs, the supply of card power to the CF card 50 is temporarily stopped in order to reduce power consumption. It is said. Then, it waits in a state where the supply of card power is stopped, and waits for an actual data read / write operation to occur on the CF card 50.

  However, the timing of stopping the power supply to the card power supply is arbitrary, and the supply of the card power supply may be stopped immediately after the end of step S38, or a predetermined time (for example, after the end of step S38) The supply of card power may be stopped after 10 seconds). In particular, when the CF card 50 is newly inserted into the card slot 40, if the user can consider that data is read / written from / to the CF card 50 in a short time thereafter, after the end of step S38, The supply of card power may be stopped after a predetermined time has elapsed. Further, when it is considered that the power consumed by the card power supply is not so large, steps S40 to S44 can be omitted. In this case, the card power is continuously supplied to the CF card 50.

  Next, the information processing apparatus 10 determines whether an instruction to actually write data to the CF card 50 or to read data from the CF card 50 has been issued (step S46). When an instruction to actually write data to the CF card 50 or to read data from the CF card 50 is generated (step S46: YES), the operation mode selected in step S38 is used for the CF card 50. Data reading / writing is executed (step S48). When the supply of card power is temporarily stopped, it is necessary to start supplying the card power again when the data read / write operation to the CF card 50 occurs. Then, after the data read / write operation is completed, the process returns to step S46.

  On the other hand, if it is determined in step S46 that an instruction to read / write data has not occurred (step S46: NO), the information processing apparatus 10 determines whether the CF card 50 has been removed from the card slot 40 ( Step S50). Specifically, the information processing apparatus 10 determines whether one or both of the CD1 signal and the CD2 signal in the card slot 40 has changed from a low level to a high level, thereby determining the CF card 50. Determine if has been removed. That is, in the present embodiment, the determination in step S10 as to whether or not the CF card 50 has been inserted into the card slot 40 indicates that the CF card 50 has been inserted when both the CD1 signal and the CD2 signal are at a low level. In the determination in step S50 whether or not the CF card 50 has been removed from the card slot 40, it is determined that the CF card 50 has been removed when either the CD1 signal or the CD2 signal is at a high level. to decide. If the CF card 50 has not been removed (step S46: NO), the process returns to step S46 described above.

  On the other hand, if it is determined that the CF card 50 has been removed (step S50: YES), the process returns to step S10 in FIG. 5 described above and waits until the next new CF card 50 is detected.

  As described above, according to the information processing apparatus 10 according to the present embodiment, the communication speed supported in the memory mode and the communication speed supported in the TrueIDE mode are checked, and the operation mode with the higher communication speed is determined. Thus, the user waiting time required for exchanging data with the CF card 50 can be shortened as much as possible. In particular, for the CF card 50 in which the memory mode has a faster cycle time than the TrueIDE mode, the faster memory mode can be selected accurately by applying this embodiment.

  Further, when the CF card 50 is inserted into the card slot 40, it is determined in which operation mode the data transfer should be performed. Therefore, when a request for data transfer with the CF card 50 is actually generated, , Promptly enter the data transfer process. For this reason, the waiting time of the user during data transfer can be shortened accordingly.

  Furthermore, according to the information processing apparatus 10 according to the present embodiment, the card power discharge circuit 64 is provided, and when the card power is on, the power wiring of the card power is disconnected from the ground, but the card power is off. In this case, the power supply wiring of the card power supply is connected to the ground. For this reason, when switching the card power supply from on to off, the card power supply can be brought down in a short time. In particular, when executing the Identify Device command in the TrueIDE mode in step S34, it is necessary to turn off the card power and then restart the CF card 50. This card power discharge circuit 64 is provided. Thus, the CF card 50 can be switched to the TrueIDE mode in a short time.

  Further, when the user removes the CF card 50 from the card slot 40, the card power supplied to the CF card 50 needs to be automatically turned off. Since the card power supply can be turned off in a short time, even if the user quickly removes the CF card 50, the CF card 50 can be prevented from being damaged.

  Furthermore, according to the present embodiment, while the card power is being supplied to the CF card 50, the power wiring of the card power is disconnected from the ground, so that unnecessary consumption of the card power can be suppressed. . In other words, a method of always connecting the power supply wiring of the card power supply simply to the ground via a resistor is conceivable, but in this case, the card power supply is constantly connected to the ground via a resistor while the card power supply is on. Current flows and wasteful power consumption occurs. On the other hand, in the present embodiment, while the card power supply is on, the power supply wiring of the card power supply is disconnected from the ground, so that such wasteful power consumption can be avoided. In particular, suppressing wasteful power consumption is important in information processing apparatuses such as digital cameras and portable information terminals that want to extend the continuous operation time of a battery as much as possible.

[Second Embodiment]
In the first embodiment described above, when the CF card 50 is inserted into the card slot 40, the communication speed with the CF card 50 is determined. In the second embodiment, the CF card 50 and the CF card 50 are actually used. The speed at which communication with the CF card 50 is possible is determined when a request for data exchange occurs. Hereinafter, a different part from 1st Embodiment mentioned above is demonstrated.

  FIG. 11 to FIG. 13 are flowcharts for explaining card access processing according to the second embodiment. This card access process is started when the information processing apparatus 10 needs to actually exchange data with the CF card 50. That is, this process is activated when it is necessary to write data to the CF card 50 or read data from the CF card 50. The card access process is a process realized by the CPU 20 reading and executing a card access program stored in the ROM 24 or the hard disk drive 26. In the present embodiment, when the CF card 50 is inserted into the card slot 40, the card access pre-processing in the first embodiment described above is not activated.

  First, as illustrated in FIG. 11, the information processing apparatus 10 initializes the card controller 60 (step S200).

  Next, the information processing apparatus 10 asserts the RESET signal of the CF card 50 (step S202). Subsequently, the information processing apparatus 10 changes the card power control signal from the low level to the high level and starts up the card power (step S204). At this time, the CF card 50 is started in the memory mode.

  Next, after waiting for the card power supply to stabilize, the information processing apparatus 10 switches the card-side interface of the card controller 60 from the high impedance state to the output enabled state (step S206). Subsequently, the information processing apparatus 10 negates the RESET signal (step S208).

  Next, as illustrated in FIG. 12, the information processing apparatus 10 reads CIS information that is card attribute information in the memory mode (step S220).

  Next, the information processing apparatus 10 checks and acquires the cycle time in the memory mode of the inserted CF card 50 based on the read CIS information (step S222). A specific method for determining the cycle time is the same as step S32 in the first embodiment described above.

  Next, the information processing apparatus 10 executes the IdentifyDevice command (step S224), and acquires the cycle time of the TrueIDE mode (step S226). A specific method for determining the cycle time is the same as step S36 in the first embodiment described above. Also, the IdentifyDevice command may be executed in either the memory mode or the TrueIDE mode, as in the first embodiment described above.

  Next, the information processing apparatus 10 refers to the mode selection table TB10 in FIG. 10 and selects an operation mode to be used for data transfer (step S228). That is, the operation mode with the higher communication speed is selected using the mode selection table TB10 of FIG. 10 of the first embodiment described above.

  Next, the information processing apparatus 10 sets the card controller 60 (step S229). That is, the setting for adapting the card controller 60 to the operation mode selected in step 228 is performed.

  Next, as illustrated in FIG. 13, the information processing apparatus 10 performs actual data transfer using the mode selected in Step S288 (Step S230). That is, if the access request to the CF card 50 is a data write to the CF card 50, the data is written in the operation mode selected in step S228, and the access request to the CF card 50 is the data from the CF card 50. Is read, the data is read in the operation mode selected in step S228. The communication speed at this time is the communication speed based on the cycle time specified in step S222 or the communication speed based on the cycle time specified in step S226.

  When the data transfer with the CF card 50 is completed, the information processing apparatus 10 determines whether a predetermined time (for example, 60 seconds) has elapsed since the last access to the CF card 50 (step S232). If the predetermined time has not elapsed (step S232: NO), the process of step S232 is repeated. When access to the CF card 50 occurs again, data transfer is performed in the operation mode selected in step S228.

  On the other hand, when a predetermined time has elapsed since the last access to the CF card 50 (step S232: YES), the information processing apparatus 10 asserts the RESET signal of the CF card 50 (step S234). Subsequently, the information processing apparatus 10 switches the card-side interface of the card controller 60 from the output enabled state to the high impedance state (step S236).

  Next, the information processing apparatus 10 changes the card power control signal from the high level to the low level to turn off the card power (step S238). In this embodiment, since it is unclear when a request to exchange data by accessing the next CF card 50 is made, supply of card power to the CF card 50 is performed in order to reduce power consumption. It is supposed to stop once. Thereby, the card access processing according to the present embodiment is completed.

  As described above, also by the information processing apparatus 10 according to the present embodiment, the communication speed supported in the memory mode and the communication speed supported in the TrueIDE mode are checked, and the operation mode with the higher communication speed is used. Since data is exchanged, the waiting time of the user required to exchange data with the CF card 50 can be shortened as much as possible.

  In addition, this invention is not limited to the said embodiment, A various deformation | transformation is possible. For example, in the above-described embodiment, a CF card (compact flash (registered trademark) card) is described as an example of a card-type medium. However, the present invention can be applied to other types of card-type media as well. it can. That is, the present invention can be applied to an information processing apparatus that requires pre-processing before reading / writing data from / to a card-type medium. More specifically, the present invention can be applied when data is exchanged with a card-type medium having two or more different operation modes and different communication speeds in these operation modes.

  The present invention can also be applied to various operation modes other than the above-described memory mode, TrueIDE mode, and card I / O mode. That is, since various operation modes are prepared according to the type of card type medium, the present invention can be applied according to the prepared operation mode.

In the embodiment described above, based on the mode selection table TB10 of FIG. 10, it is determined which of the communication speed in the memory mode and the communication speed in the TrueIDE mode is faster, and the operation mode for exchanging data is set. Although it is selected, an operation mode for exchanging data may be selected based on each acquired cycle time. That is, as described above, between the memory mode and the TrueIDE mode, the communication speed is not necessarily faster when the cycle time is shorter, but in general, the communication speed may be higher when the cycle time is shorter. Since the cycle time in the memory mode is shorter, the memory mode is selected as the operation mode for exchanging data. When the cycle time in the TrueIDE mode is shorter, the TrueIDE mode is selected as the operation mode for exchanging data. You may make it select. By doing so, the capacity in the ROM 24 or the hard disk drive 26 where the mode selection table TB10 should be stored can be reduced. Therefore, it can be said that the method for determining which communication speed is faster can be arbitrarily changed. Further, for the card access pre-processing and the card access processing described in the above-described embodiment, this card access pre-processing. Alternatively, a program for executing card access processing can be recorded on a recording medium such as a flexible disk, a CD-ROM (Compact Disc-Read Only Memory), a ROM, or a memory card, and distributed in the form of the recording medium. is there. In this case, the above-described embodiment can be realized by causing the information processing apparatus 10 to read and execute the program recorded on the recording medium.

  Further, the information processing apparatus 10 may include other programs such as an operating system and another application program. In this case, in order to utilize another program included in the information processing apparatus 10, a program including an instruction for calling a program that realizes processing equivalent to the above-described embodiment from among the programs included in the information processing apparatus 10 May be recorded on a recording medium.

  Furthermore, such a program can be distributed not as a recording medium but as a carrier wave through a network. The program transmitted in the form of a carrier wave on the network is taken into the information processing apparatus 10, and the above-described embodiment can be realized by executing this program.

  Also, when a program is recorded on a recording medium or transmitted as a carrier wave on a network, the program may be encrypted or compressed. In this case, the information processing apparatus 10 that has read the program from the recording medium or the carrier wave needs to execute the program after decoding or decompressing the program.

  Furthermore, in the above-described embodiment, the card access pre-processing is realized by software, but may be realized by hardware such as ASIC (Application Specific IC).

It is a block diagram for demonstrating the internal structure of the information processing apparatus which concerns on 1st Embodiment and 2nd Embodiment of this invention. It is a figure which shows an example of the circuit structure of the card power supply discharge circuit with which the information processing apparatus of FIG. 1 is provided. It is a figure which shows an example of the operation | movement waveform of the card power supply and card power supply control in an information processing apparatus without a card power supply discharge circuit. It is a figure which shows an example of the operation | movement waveform of the card power supply and card power supply control in information processing apparatus with a card power supply discharge circuit. FIG. 7 is a diagram illustrating a flowchart for explaining an example of card access pre-processing according to the first embodiment executed by the information processing apparatus illustrated in FIG. 1 (part 1); FIG. 8 is a diagram illustrating a flowchart for explaining an example of card access pre-processing according to the first embodiment executed by the information processing apparatus illustrated in FIG. 1 (part 2); FIG. 9 is a diagram illustrating a flowchart for explaining an example of card access pre-processing according to the first embodiment executed by the information processing apparatus illustrated in FIG. 1 (part 3); It is a figure which shows the list of the cycle time corresponding in memory mode. It is a figure which shows the list of the cycle time corresponding by the PIO mode of TrueIDE mode. It is a figure for demonstrating an example of the mode determination process for determining the communication speed (PIO mode) with which the inserted CF card respond | corresponds by the PIO mode of TrueIDE mode. The figure which shows an example of the mode selection table for judging which of the communication speed in memory mode and the communication speed in TrueIDE mode is faster. FIG. 10 is a flowchart for explaining an example of card access processing according to the second embodiment executed by the information processing apparatus shown in FIG. 1 (part 1); FIG. 10 is a diagram illustrating a flowchart for explaining an example of card access processing according to the second embodiment executed by the information processing apparatus illustrated in FIG. 1 (part 2); FIG. 10 is a view illustrating a flowchart for explaining an example of card access processing according to the second embodiment executed by the information processing apparatus illustrated in FIG. 1 (part 3);

Explanation of symbols

10 Information processing device 20 CPU
22 RAM
24 ROM
26 Hard Disk Drive 30 User Interface 32 Video Decoder 34 Display Screen 40 Card Slot 50 CF Card 60 Card Controller 62 Card Power Supply Control Circuit 64 Card Power Supply Discharge Circuit

Claims (10)

A card slot into which a card-type medium is inserted;
First communication speed acquisition means for acquiring a first communication speed, which is a communication speed when data is exchanged with the card-type medium in the first operation mode;
Second communication speed acquisition means for acquiring a second communication speed, which is a communication speed when data is exchanged with the card-type medium in the second operation mode;
Determining means for determining which one of the first communication speed and the second communication speed is faster;
A data communication means for exchanging data with the card-type medium in an operation mode at a communication speed determined to be fast by the determination means among the first operation mode and the second operation mode;
An information processing apparatus comprising: The first communication speed acquisition means acquires the first communication speed by accessing the card-type medium in the first operation mode,
The second communication speed acquisition means also acquires the second communication speed by accessing the card-type medium in the first operation mode.
The information processing apparatus according to claim 1. The first communication speed acquisition means acquires the first communication speed by accessing the card-type medium in the first operation mode,
The second communication speed acquisition means acquires the second communication speed by accessing the card-type medium in the second operation mode.
The information processing apparatus according to claim 1. The first communication speed acquisition means acquires the first communication speed when a new card-type medium is detected in the card slot,
The second communication speed acquisition means also acquires the second communication speed when a new card-type medium is detected in the card slot,
The determination means also determines which of the first communication speed and the second communication speed is faster when a new card-type medium is detected in the card slot.
The information processing apparatus according to any one of claims 1 to 3. The first communication speed acquisition means acquires the first communication speed when a request for exchanging data with the card-type medium occurs,
The second communication speed acquisition means also acquires the second communication speed when a request for exchanging data with the card-type medium occurs,
The determination means also determines which one of the first communication speed and the second communication speed is faster when a request for exchanging data with the card type medium occurs.
The information processing apparatus according to any one of claims 1 to 3.   6. The information processing apparatus according to claim 1, wherein the card-type medium is a compact flash card. The first operation mode is a memory mode;
The second operation mode is a TrueIDE mode.
The information processing apparatus according to claim 6. A method for controlling an information processing apparatus having a card slot into which a card-type medium is inserted,
Obtaining a first communication speed which is a communication speed when data is exchanged with the card-type medium in a first operation mode;
Obtaining a second communication speed which is a communication speed when data is exchanged with the card-type medium in a second operation mode;
Determining which of the first communication speed and the second communication speed is faster;
Exchanging data with the card-type medium in the operation mode of the communication speed which is determined to be fast among the first operation mode and the second operation mode;
An information processing apparatus control method comprising: A program for controlling an information processing apparatus having a card slot into which a card-type medium is inserted,
Obtaining a first communication speed which is a communication speed when data is exchanged with the card-type medium in a first operation mode;
Obtaining a second communication speed which is a communication speed when data is exchanged with the card-type medium in a second operation mode;
Determining which of the first communication speed and the second communication speed is faster;
Exchanging data with the card-type medium in the operation mode of the communication speed which is determined to be fast among the first operation mode and the second operation mode;
For causing the information processing apparatus to execute the program. A recording medium on which a program for controlling an information processing apparatus having a card slot into which a card-type medium is inserted is recorded,
Obtaining a first communication speed which is a communication speed when data is exchanged with the card-type medium in a first operation mode;
Obtaining a second communication speed which is a communication speed when data is exchanged with the card-type medium in a second operation mode;
Determining which of the first communication speed and the second communication speed is faster;
Exchanging data with the card-type medium in the operation mode of the communication speed which is determined to be fast among the first operation mode and the second operation mode;
A recording medium on which a program for causing the information processing apparatus to execute is recorded.

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