JP2007123861A - Semiconductor device and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device which can suppress a cost increase without complicating a manufacturing process when forming a thin-film transistor using an oxide semiconductor film represented by a zinc oxide, and to provide its manufacturing method. <P>SOLUTION: In the semiconductor device in which a gate electrode is formed on a substrate, a gate insulating film is formed to cover the gate electrode, an oxide semiconductor film is formed on the gate insulating film, and a first conductive film and a second conductive film are formed on the oxide semiconductor film. The oxide semiconductor film has at least a region crystallized in a channel forming region. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a semiconductor device and a manufacturing method thereof. In particular, the present invention relates to a semiconductor device using an oxide semiconductor. The present invention also relates to an electronic device including the semiconductor device.

A flat panel display (FPD) typified by a liquid crystal display (LCD) or an EL display has attracted attention as a display device that replaces a conventional CRT. In particular, the development of large-screen liquid crystal televisions equipped with large liquid crystal panels driven by an active matrix has become an important issue for LCD panel manufacturers to focus on. Large screen EL televisions are also being developed.

  In a conventional liquid crystal device or electroluminescence display device (hereinafter referred to as a light emitting display device or an EL display device), a thin film transistor (hereinafter referred to as a TFT) using crystalline silicon or amorphous silicon as a semiconductor element for driving each pixel. Is used).

  A TFT using a crystalline silicon film has a mobility two or more digits higher than that of a TFT using an amorphous silicon film, and a scanning line driving circuit for selecting a pixel of a light emitting display device or a selected pixel. High-speed operation can be expected when used in a signal line driving circuit for supplying a video signal. However, compared with the case where amorphous silicon is used for the semiconductor film, the process is complicated for crystallization of the semiconductor film, so that there is a problem that the yield is reduced and the cost is increased accordingly. Further, the heating temperature for the crystallization is 550 ° C. or more, and it is difficult to use a substrate such as a resin or plastic having a low melting point.

On the other hand, a TFT using amorphous silicon as a semiconductor film can be manufactured at low cost because a high temperature heating is not performed and a resin or plastic substrate can be used. However, the mobility of a TFT in which a channel formation region is formed using an amorphous silicon semiconductor film can be only about 0.2 to 1.0 cm ² / V · s, and power consumption is high.

  When an amorphous silicon film is formed on a substrate, a plasma CVD method is usually used. The plasma CVD method requires heating under high vacuum at the time of film formation, and may damage the plastic substrate and the organic resin film on the substrate. In addition to forming an amorphous silicon film using the plasma CVD method, when the amorphous silicon film is exposed to the atmosphere after the film formation, also when the film is formed using the sputtering method, A thin insulating film may be formed on the surface.

In recent years, reports have been made on the formation of TFTs using an oxide semiconductor such as zinc oxide in a channel formation region as a material replacing such a semiconductor made of silicon (see, for example, Patent Document 1 and Non-Patent Document 1). ). Since an oxide semiconductor has mobility equal to or higher than that of a TFT formed using a semiconductor made of amorphous silicon, further improvement in characteristics is required.
JP 2000-150900 A Elvira M.M. C. Fortunato and 6 others Applied Physics Letters Vol. 85, no. 13, P2541 (2004)

  In view of the above problems, an object of the present invention is to provide a semiconductor device having a semiconductor element with improved characteristics and a manufacturing method thereof.

  On the other hand, in order to manufacture a large area device by a cheaper process like a liquid crystal television, the size of the substrate is increasing. However, there is a problem that an increase in the size of the substrate tends to be affected by bending and distortion. Further, when the substrate is heated to a high temperature in the heat treatment process, there is a problem that the dimensions of the substrate are out of order due to distortion or shrinkage, and the accuracy of the photolithography process is deteriorated.

  In view of the above, an object of the present invention is to provide a technique capable of manufacturing a semiconductor device with a high yield even on a large substrate having a side exceeding 1 meter in a crystallization process of a semiconductor element used in the semiconductor device.

  As described above, an object of the present invention is to provide a semiconductor device having a semiconductor element that can be manufactured with lower cost and higher productivity than the conventional one, and further improved in characteristics, and a method for manufacturing the semiconductor device.

In the present invention, a compound semiconductor, more preferably an oxide semiconductor is used as a semiconductor. As an oxide semiconductor, for example, zinc oxide (ZnO), InGaO ₃ (ZnO) ₅ , magnesium zinc oxide (Mg _x Zn _1-x O), cadmium zinc oxide (Cd _x Zn _1-x O), cadmium oxide (CdO) ) Or an In—Ga—Zn—O-based amorphous oxide semiconductor (a-IGZO) or the like is used. Then, the gate electrode adjacent to the compound semiconductor is heated by lamp rapid thermal annealing (also referred to as lamp rapid thermal annealing (LRTA)), thereby selectively promoting the crystallization of the compound semiconductor. The gist is to manufacture a TFT using a compound semiconductor having at least a promoted region in a channel formation region.

  Another embodiment of the present invention includes a gate electrode formed over a substrate, an insulating film formed so as to cover the gate electrode, and an oxide semiconductor film formed over the insulating film. Has a first oxide semiconductor region and a second oxide semiconductor region, and the first oxide semiconductor region formed in a position overlapping with the gate electrode has higher crystallinity than the second oxide semiconductor region. It is characterized by being expensive. Note that crystallinity represents the degree of regularity of atomic arrangement in a crystal, and the crystallinity is good (also referred to as high crystallinity or improved crystallinity). When a TFT is manufactured using, its electrical characteristics are good.

  According to one embodiment of the present invention, a gate electrode and an oxide semiconductor film are provided over a substrate, and the oxide semiconductor film includes a partially crystallized region in a region overlapping with the gate electrode with an insulating film interposed therebetween. Features.

  Another embodiment of the present invention includes a gate electrode, an oxide semiconductor film, and a conductive film over a substrate, the conductive film is provided in contact with the oxide semiconductor film, and the oxide semiconductor film includes an insulating film. And a region that is partially crystallized in a region overlapping with the gate electrode.

  Another embodiment of the present invention includes a gate electrode formed over a substrate, an insulating film formed so as to cover the gate electrode, and an oxide semiconductor film formed over the insulating film. Is characterized in that it is crystallized at least in a region overlapping with the gate electrode. Crystallization means that crystal nuclei are generated from an amorphous state or crystal grains are grown from a state in which crystal nuclei are generated.

  Another aspect of the present invention is a gate electrode formed over a substrate, an insulating film formed to cover the gate electrode, a conductive film formed over the insulating film, and an insulating film and the conductive film. The oxide semiconductor film is crystallized at least in a region overlapping with the gate electrode.

  Another aspect of the present invention is a gate electrode formed over a substrate, an insulating film formed to cover the gate electrode, a conductive film formed over the insulating film, and an insulating film and the conductive film. The gate electrode is characterized by having a lower reflectance with respect to the light source used for crystallization than the conductive film. Note that the comparison of reflectance is used when the conductive film is a metal film having a light shielding property or the like.

  Another aspect of the present invention is a gate electrode formed over a substrate, an insulating film formed to cover the gate electrode, a conductive film formed over the insulating film, and an insulating film and the conductive film. The gate electrode has a higher heat absorption rate than the conductive film.

  Further, according to one embodiment of the present invention, a gate electrode is formed over a substrate, an insulating film is formed over the gate electrode, an oxide semiconductor film is formed over the insulating film, and the gate electrode is subjected to LRTA. Part of the overlapping oxide semiconductor film is crystallized.

  According to another embodiment of the present invention, a gate electrode is formed over a substrate, an insulating film is formed to cover the gate electrode, an oxide semiconductor film is formed over the insulating film, and the gate electrode is subjected to LRTA. A first oxide semiconductor region and a second oxide semiconductor region are formed in the semiconductor film, and the first oxide semiconductor region formed at a position overlapping with the gate electrode is formed from the second oxide semiconductor region. Is characterized by high crystallinity.

  In one embodiment of the present invention, a gate electrode is formed over a substrate, an insulating film is formed over the gate electrode, a conductive film is formed over the insulating film, and an oxide semiconductor film is formed over the insulating film and the conductive film. Then, by performing LRTA on the gate electrode, part of the oxide semiconductor film is selectively crystallized.

  In one embodiment of the present invention, a gate electrode is formed over a substrate, an insulating film is formed to cover the gate electrode, an oxide semiconductor film is formed over the insulating film, and a conductive film is formed over the oxide semiconductor film In addition, a part of the oxide semiconductor film is selectively crystallized by LRTA of the gate electrode.

  In one embodiment of the present invention, a gate electrode is formed over a substrate, an insulating film is formed to cover the gate electrode, a conductive film is formed over the insulating film, and an oxide semiconductor film is formed over the insulating film and the conductive film. The first oxide semiconductor region and the second oxide semiconductor region are formed in the oxide semiconductor film by forming and subjecting the gate electrode to LRTA. At this time, the first oxide semiconductor region formed in a position overlapping with the gate electrode has higher crystallinity than the second oxide semiconductor region.

  In one embodiment of the present invention, a gate electrode is formed over a substrate, an insulating film is formed to cover the gate electrode, an oxide semiconductor film is formed over the insulating film, and a conductive film is formed over the oxide semiconductor film Then, the first oxide semiconductor region and the second oxide semiconductor region are formed in the oxide semiconductor film by lamp heating the gate electrode. At this time, the first oxide semiconductor region formed in a position overlapping with the gate electrode has higher crystallinity than the second oxide semiconductor region.

  Note that the conductive film is formed of one or more elements selected from Al, Ti, Cu, Au, Ag, Mo, Ni, Ta, Zr, and Co.

Note that the oxide semiconductor film preferably contains at least zinc oxide (ZnO). For example, InGaO ₃ (ZnO) ₅ , Mg _x Zn _1-x O, or Cd _x Zn _1-x O.

  Note that the substrate is any one selected from an organic resin substrate, an inorganic resin substrate, a plastic substrate, and a glass substrate.

  Note that the oxide semiconductor film is formed by a sputtering method.

  Note that nitrogen may be added to the oxide semiconductor film. In the case where the oxide semiconductor film exhibits n-type semiconductor properties by adding nitrogen, nitrogen serves as an acceptor impurity. Therefore, the threshold voltage of a transistor manufactured using an oxide semiconductor film to which nitrogen is added can be controlled.

  According to one aspect of the present invention, an element selected from tantalum (Ta), tungsten (W), titanium (Ti), molybdenum (Mo), chromium (Cr), niobium (Nb), or the like is used as a gate electrode. An alloy material or a compound material as a main component can be used.

  One feature of the present invention is that the oxide semiconductor film is crystallized by irradiation with lamp light of a halogen lamp.

  In the present invention, light having a wavelength region of 800 nm to 2400 nm is used as lamp light. Further, the wavelength in the visible light region or the infrared light region is used.

  Note that one embodiment of the present invention is a liquid crystal television or an EL television including the semiconductor device.

In the present invention, heat treatment may be performed by irradiating laser light instead of LRTA. For example, selective oxidation is performed by irradiating an infrared laser, a visible laser, an ultraviolet laser, or the like as a laser beam. The crystallinity of the physical semiconductor film may be improved. Alternatively, the crystallinity of the oxide semiconductor film may be selectively improved by irradiation with laser light while performing lamp heating. In the case of using laser irradiation, a continuous wave laser beam (CW laser beam) or a pulsed laser beam (pulse laser beam) can be used. The laser beam that can be used here is a gas laser such as an Ar laser, a Kr laser, or an excimer laser, single crystal YAG, YVO ₄ , forsterite (Mg ₂ SiO ₄ ), YAlO ₃ , GdVO ₄ , or polycrystalline ( (Ceramics) YAG, Y ₂ O ₃ , YVO ₄ , YAlO ₃ , GdVO ₄ with one or more of Nd, Yb, Cr, Ti, Ho, Er, Tm, Ta added as dopants A laser oscillated from one or more of laser, glass laser, ruby laser, alexandrite laser, Ti: sapphire laser, copper vapor laser, or gold vapor laser as a medium can be used. By irradiating the fundamental wave of such a laser beam and the second to fourth harmonics of these fundamental waves, the crystallinity can be improved. Note that it is preferable to use laser light having energy larger than the band gap of the oxide semiconductor film. For example, laser light emitted from an excimer laser oscillator of KrF, ArF, XeCl, or XeF may be used.

  In the present invention, a semiconductor device refers to a device having a circuit including a semiconductor element (a transistor, a diode, or the like). Can be mentioned. Typical examples of the display device include a liquid crystal display device, a light emitting device, DMD (Digital Micromirror Device), PDP (Plasma Display Panel), FED (Field Emission Display), Examples thereof include display devices such as electrophoretic display devices (electronic paper).

In the present invention, the display device refers to a device using a display element, that is, an image display device. In addition, a connector, for example, a module in which a flexible printed wiring (FPC), TAB (Tape Automated Bonding) tape or TCP (Tape Carrier Package) is attached to the display panel, and a printed wiring board is attached to the end of the TAB tape or TCP. It is assumed that the display device includes all provided modules or modules in which an IC (Integrated Circuit) or a CPU is directly mounted on a display element by a COG (Chip On Glass) method.

  Note that in the present invention, the oxide semiconductor film only needs to be crystallized at least in the channel formation region, or crystallinity may be improved. Further, it is not necessary to crystallize the entire channel formation region, and it is sufficient that at least a portion on the gate electrode side is crystallized.

  Note that as the compound semiconductor, a nitride semiconductor or a carbide semiconductor may be used in addition to the oxide semiconductor. Further, a semiconductor having a light-transmitting property with respect to visible light can be used.

  In the present invention, the crystallinity in the channel formation region of the oxide semiconductor film is improved by heating the gate electrode with LRTA. As a result, since the oxide semiconductor film is only heated locally, most of the substrate is not heated, and the crystallization process can be performed while suppressing shrinkage or deflection of the substrate. Therefore, a semiconductor device including a semiconductor element with improved mobility characteristics can be manufactured while simplifying the process.

  In addition, a gate electrode is formed on the substrate, an insulating film functioning as a gate insulating film is formed on the gate electrode, and a wiring having a higher reflectance with respect to the light source of the LRTA than the gate electrode is formed on the insulating film. In the case where LRTA is performed on the front surface or the back surface of the substrate after the oxide semiconductor film is formed, the wiring has a higher reflectivity with respect to the light source of the LRTA than the gate electrode, so that the wiring is not heated more than the gate electrode. Therefore, a conductive film having a relatively low melting point such as copper, aluminum, or silver having low resistance can be used for the wiring. As a result, an inexpensive semiconductor device can be provided.

  In addition, even when an oxide semiconductor film is exposed to an atmosphere containing oxygen, an insulating film is not formed on the surface by oxidation like an amorphous silicon film. Therefore, there is little change in the film even if it is exposed to the air after film formation.

In the case of using ZnO as the oxide semiconductor film, the heat treatment temperature in the crystallization process of the oxide semiconductor film can be set to about 350 ° C. or lower. This is because ZnO sufficiently promotes crystallization even at a heat treatment temperature of about 350 ° C. or lower. As a result, even when a resin substrate is used, shrinkage of the substrate can be suppressed.
Further, since lamp heating is performed on the gate electrode using a material having low reflectance with respect to light emitted from the lamp from the source wiring and the drain wiring, the crystallinity of at least the channel formation region of ZnO is improved by the heat conducted from the gate electrode. On the other hand, since the source wiring and the drain wiring are hardly heated, a material having a relatively low melting point can be used for the source wiring and the drain wiring. For example, when Al is used for the source wiring and the drain wiring, the heat treatment temperature may be 350 ° C. or less, so that diffusion of Al into the semiconductor layer can be suppressed.

  As described above, since a semiconductor device can be manufactured by low-temperature heat treatment (about 350 ° C. or less), the process is inexpensive.

Further, since an oxide semiconductor has a light-transmitting property, a source electrode, a drain electrode, and the like are formed using a light-transmitting conductive film, and a pixel electrode is formed thereover, whereby the aperture ratio of the pixel portion is increased. Can do. When zinc oxide is used as an oxide semiconductor, zinc oxide is richer in resources than indium tin oxide (ITO) and has a lower resistance, so that zinc oxide is used instead of ITO as a pixel electrode. By using it, a cheaper semiconductor device can be obtained.
In the case where silicon is used for the semiconductor film, it is necessary to provide a light-shielding film so as to overlap the channel formation region in order to prevent the channel formation region from being irradiated with light. As a result, the aperture ratio is inevitably lowered in the pixel portion. On the other hand, when zinc oxide is used for the oxide semiconductor film, zinc is relatively abundant and zinc oxide has a light-transmitting property. Therefore, the source electrode, the drain electrode, and the pixel electrode are all light-transmitting. Display using a transparent conductive material containing indium tin oxide (ITO), indium tin oxide containing silicon oxide (ITSO), organic indium, organic tin, zinc oxide, titanium nitride, or the like In the panel, a large display with a high aperture ratio can be made. In addition, power can be saved by effectively using the backlight. For example, a head-up display that directly displays images and text information can be realized by pasting a display panel on a windshield of a building window, a car, a train, an airplane, or the like.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. However, the present invention can be implemented in many different modes, and those skilled in the art can easily understand that the modes and details can be variously changed without departing from the spirit and scope of the present invention. Is done. For example, the present invention can be implemented by appropriately combining each of the present embodiment and this example. Therefore, the present invention is not construed as being limited to the description of this embodiment mode.

(Embodiment 1)
In this embodiment, a manufacturing process of a TFT in which a region where the crystallinity of part of an oxide semiconductor film is improved by LRTA is used for a channel formation region will be described with reference to FIGS.

  First, the base film 102 is formed on the substrate 101. For the substrate 101, plastic (synthetic resin) such as polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyethersulfone (PES), acrylic, polyimide, or glass can be used.

As the base film 102, an insulating film such as a silicon oxide film, a silicon nitride film, a silicon oxynitride film (SiO _x N _y ) (x> y), a silicon nitride oxide film (SiN _x O _y ) (x> y), or the like is used. A single layer or a stacked layer is used. Note that the base film 102 may be formed by a sputtering method, a CVD method, or the like. Note that the base film 102 is not necessarily provided, but is preferably formed in the present invention. By forming the base film 102, heat generated from an electrode, a wiring, or the like formed over the base film 102 can be suppressed from being conducted to the substrate 101. As the base film 102, for example, a silicon nitride oxide film with a thickness of 10 to 400 nm can be used. Next, the gate electrode 103 is formed over the base film 102.

  The gate electrode 103 may be formed to a thickness of 100 to 200 nm by a sputtering method. The gate electrode 103 includes an element selected from tantalum (Ta), tungsten (W), titanium (Ti), molybdenum (Mo), chromium (Cr), niobium (Nb), and the like, or these elements as a main component. It can be formed using an alloy material or a compound material. Alternatively, a semiconductor material typified by polycrystalline silicon doped with an impurity element such as phosphorus can be used.

Next, a gate insulating film 104 covering the gate electrode 103 is formed to a thickness of about 50 to 500 nm. The gate insulating film 104 is formed as a single layer or a stack of films containing silicon oxide or silicon nitride by various CVD methods such as a sputtering method and a plasma CVD method. Specifically, a film containing silicon oxide (SiO _x ), a film containing silicon oxynitride (SiO _x N _y ), a film containing silicon nitride oxide (SiN _x O _y ) is formed as a single layer structure, These films are stacked as appropriate. Alternatively, the gate electrode 103 may be oxidized or nitrided to form a gate insulating film by performing high-density plasma treatment on the gate electrode 103 in an atmosphere containing oxygen, nitrogen, or oxygen and nitrogen. . A gate insulating film formed by high-density plasma treatment has excellent uniformity in film thickness, film quality, and the like, and can form a dense film. As an atmosphere containing oxygen, oxygen (O ₂ ), nitrogen dioxide (NO ₂ ), a mixed gas of dinitrogen monoxide (N ₂ O) and a rare gas, or oxygen (O ₂ ) and nitrogen dioxide ( A mixed gas of NO ₂ ) or dinitrogen monoxide (N ₂ O), a rare gas, and hydrogen (H ₂ ) can be used. As the atmosphere containing nitrogen, nitrogen _{(N 2)} or ammonia (NH _3), a mixed gas of a rare gas or a nitrogen _{(N 2)} or ammonia (NH _3), and a rare gas, hydrogen ( A mixed gas with H ₂ ) can be used. The surface of the gate electrode 103 can be oxidized or nitrided by oxygen radicals (which may include OH radicals) or nitrogen radicals (which may include NH radicals) generated by high-density plasma.

  In the case where the gate insulating film 104 is formed by performing high-density plasma treatment, an insulating film with a thickness of 1 to 20 nm, typically 5 to 10 nm, is formed so as to cover the gate electrode 103. Since the reaction in this case is a solid-phase reaction, the interface state density between the gate insulating film 104 and the gate electrode 103 can be extremely low. Further, since the gate electrode 103 is directly oxidized or nitrided, the thickness of the formed gate insulating film 104 can be made uniform. That is, an insulating film with good uniformity and low interface state density can be formed by subjecting the electrode surface to solid phase oxidation by the high-density plasma treatment shown here. Here, an element selected from tantalum (Ta), tungsten (W), titanium (Ti), molybdenum (Mo), chromium (Cr), niobium (Nb), or the like, or an alloy material containing these elements as a main component or The oxide of the compound material functions as the gate insulating film 104.

  Note that the gate insulating film 104 may be formed using only an insulating film formed by high-density plasma treatment. In addition, silicon oxide, silicon nitride containing oxygen, or nitrogen may be formed by a CVD method using plasma or thermal reaction. An insulating film such as silicon oxide may be deposited and at least one of them may be stacked. In any case, the transistor whose insulating film formed by high-density plasma is part or all of the gate insulating film can reduce variation in characteristics.

The gate insulating film 104 is formed of alumina (Al ₂ O ₃ ), aluminum nitride (AlN), titanium oxide (TiO ₂ ), zirconia (ZrO ₂ ), lithium oxide (Li ₂ O), potassium oxide (K ₂ O), sodium oxide (Na ₂ O), indium oxide (In ₂ O ₃ ), yttrium oxide (Y ₂ O ₃ ), calcium zirconate (CaZrO ₃ ), or at least two of these A material including two layers may be used, or a single layer or two or more layers may be stacked.

Next, the wiring 105 is formed over the gate insulating film 104 so as to have a thickness of 50 to 200 nm. As the wiring material, silver (Ag), aluminum (Al), gold (Au), copper (Cu), and alloys thereof are used. Any wiring material may be used as long as it has a higher reflectance than the material used for the gate electrode 103, and is used in appropriate combination in consideration of the relationship with the gate electrode 103. Note that the wiring may be formed by stacking, for example, a stacked wiring of aluminum and titanium from the substrate side. Titanium is effective in improving electrical contact characteristics between the oxide semiconductor film and aluminum. In addition, it plays a role of suppressing diffusion of aluminum into the oxide semiconductor film. The wiring is a transparent conductive film, for example, indium tin oxide (ITO), indium tin oxide containing silicon oxide (ITSO), indium zinc oxide (IZO), indium oxide (In ₂ O ₃ ), tin oxide (SnO ₂ ), zinc oxide (ZnO), zinc oxide added with aluminum (AlZnO), zinc oxide added with gallium (GaZnO), zinc oxide (ZnO), and the like. . Note that the wiring 105 may have a higher reflectance or a higher transmittance (or lower heat absorption rate) than the gate electrode 103 with respect to lamp light.

Next, the oxide semiconductor film 106 is formed over the gate insulating film 104 and the wiring 105. The oxide semiconductor film 106 includes a group 1 element (for example, lithium (Li), sodium (Na), potassium (K), rubidium (Rb), cesium (Cs)), a group 13 element (for example, boron (B), Gallium (Ga), indium (In), thallium (Tl)), group 14 elements (for example, carbon (C), silicon (Si), germanium (Ge), tin (Sn), lead (Pb)), group 15 Element (eg, nitrogen (N), phosphorus (P), arsenic (As), antimony (Sb), bismuth (Bi)) or group 17 element (eg, fluorine (F), chlorine (Cl), bromine (Br)) Zinc oxide (ZnO) to which one or more impurity elements such as iodine (I)) are added is mixed in an amorphous state, a polycrystalline state, or an amorphous state and a polycrystalline state. Microcrystal Also called barrel.) Those states, or nothing can be used without added impurity element. InGaO ₃ (ZnO) ₅ , magnesium zinc oxide (Mg _x Zn _1-x O) or cadmium zinc oxide (Cd _x Zn _1-x O), cadmium oxide (CdO), In—Ga—Zn—O-based Any of amorphous oxide semiconductors (a-IGZO) can be used. The oxide semiconductor film 106 is formed by a sputtering method with a thickness of 25 to 200 nm (preferably 30 to 150 nm) and a pressure of 0.4 Pa and a flow rate of Ar: O ₂ = 50: 5 sccm. Thereafter, a desired shape is formed by etching using hydrofluoric acid diluted to 0.05%. The oxide semiconductor film 106 is less expensive as a process than the semiconductor film using an amorphous silicon film because there is no risk of oxidation and the oxide semiconductor film 106 can be formed without a high vacuum. Note that an oxide semiconductor film containing zinc oxide is resistant to plasma, and may be formed by a plasma CVD (also referred to as PCVD or PECVD) method. The plasma CVD method is particularly simple in the CVD method and has good productivity.

Next, LRTA is performed on the back surface of the substrate 101 (FIG. 1A). LRTA is performed at 250 to 570 ° C. (preferably 300 ° C. to 400 ° C., more preferably 300 to 350 ° C.) for 1 minute to 1 hour, preferably 10 minutes to 30 minutes. The LRTA is performed by radiation from one or more kinds selected from a halogen lamp, a metal halide lamp, a xenon arc lamp, a carbon arc lamp, a high pressure sodium lamp, and a high pressure mercury lamp. Since the LRTA method can perform heat treatment in a short time, a material having a relatively low melting point can be used as long as the reflectance or transmittance of the wiring 105 is higher than that of the gate electrode 103. In the LRTA method, light having a wavelength such as an infrared light region, a visible light region, or an ultraviolet light region can be used. Note that heat treatment may be performed by irradiating laser light instead of LRTA. For example, an infrared laser, a visible light laser, an ultraviolet laser, or the like can be used as the laser light. Alternatively, the crystallinity of the oxide semiconductor film may be selectively improved by combining LRTA and laser light irradiation. In the case of using laser irradiation, a continuous wave laser beam (CW laser beam) or a pulsed laser beam (pulse laser beam) can be used. The laser beam that can be used here is a gas laser such as an Ar laser, a Kr laser, or an excimer laser, single crystal YAG, YVO ₄ , forsterite (Mg ₂ SiO ₄ ), YAlO ₃ , GdVO ₄ , or polycrystalline ( (Ceramics) YAG, Y ₂ O ₃ , YVO ₄ , YAlO ₃ , GdVO ₄ with one or more of Nd, Yb, Cr, Ti, Ho, Er, Tm, Ta added as dopants A laser oscillated from one or more of laser, glass laser, ruby laser, alexandrite laser, Ti: sapphire laser, copper vapor laser, or gold vapor laser as a medium can be used. By irradiating the fundamental wave of such a laser beam and the second to fourth harmonics of these fundamental waves, the crystallinity can be improved. Note that it is preferable to use laser light having energy larger than the band gap of the oxide semiconductor film. For example, laser light emitted from an excimer laser oscillator of KrF, ArF, XeCl, or XeF may be used.

At this time, the gate electrode 103 is heated to a temperature higher than that of the wiring 105 because the reflectance to the lamp light is lower than that of the wiring 105 and a material that absorbs heat is used. Therefore, the oxide semiconductor film 106 around the gate electrode 103 is heated, and the first oxide semiconductor region has a second oxide semiconductor region 108 and a region having better crystallinity than the second oxide semiconductor region 108. 107 is formed (see FIG. 1B). Here, the gate electrode 103 is irradiated with lamp light using a halogen lamp and heated to about 300 ° C., and the oxide semiconductor film 106 is crystallized by the heat to improve crystallinity. At this time, since the wiring 105 has higher reflectance or transmittance with respect to lamp light than the gate electrode 103, the temperature of the wiring 105 is 300 ° C. or lower even if the oxide semiconductor film 106 is crystallized.

Here, FIG. 2 shows the heat treatment temperature dependence of the crystallinity of ZnO used as the oxide semiconductor film. FIG. 2 shows that a film-forming gas having a flow rate of Ar: O ₂ = 50: 5 (sccm) was heated for 1 hour at a temperature of 200 ° C., 300 ° C., and 350 ° C. in a sprayed state (as-depo). The result of having measured the X-ray intensity of (002) plane at the time is shown. As the heat treatment temperature increases, the intensity peak on the (002) plane increases. Therefore, at least up to 350 ° C., the higher the heat treatment temperature, the higher the crystallinity of ZnO. In general, as the crystallization progresses, the mobility increases. Therefore, it is desirable to perform the heat treatment at around 350 ° C. Note that heat treatment may be performed so that ZnO is heated to around 400 ° C. if there is no problem such as shrinkage on the substrate.

  On the other hand, in the region where the gate electrode 103 and the wiring 105 are not formed in FIG. 1A, that is, in the region where the substrate 101, the base film 102, the gate insulating film 104, and the oxide semiconductor film 106 are stacked, the wiring 105 Alternatively, since lamp light is transmitted as compared with a region where the gate electrode 103 is formed, heat is hardly absorbed and the heating temperature is lower than that of the wiring 105. Therefore, since the substrate 101 has a temperature of 350 ° C. or lower in most regions, shrinkage is less likely to occur. Note that as the region where the gate electrode 103 is not formed is larger, the shrinkage of the substrate 101 is suppressed.

  Next, a semiconductor device is manufactured by forming structures such as an interlayer insulating film, a source electrode, a drain electrode, a pixel electrode, and a light-emitting element over the oxide semiconductor film 106.

  In the present invention, when ZnO is used as a semiconductor, the crystallinity of the ZnO layer is improved at a heat treatment temperature of about 300 ° C. Therefore, the heat treatment temperature can be suppressed as compared with the case where a crystalline silicon film is used for a semiconductor film. In addition, since the gate electrode is selectively heated by LRTA using a highly light-transmitting oxide semiconductor film, most of the substrate is not heated and shrinkage of the substrate can be suppressed. In addition, since a material having higher reflectance with respect to lamp light than the gate electrode is used for the wiring, the crystallinity of the oxide semiconductor film can be improved even when the temperature at which the wiring is heated is suppressed to about 350 ° C. Therefore, an Al wiring having a low melting point can be used. In addition, oxygen in the oxide semiconductor film can be prevented from diffusing into Al to form an insulating film. Since the Al wiring is inexpensive and has low resistance, a semiconductor device with good performance can be manufactured at low cost with high productivity.

(Embodiment 2)
In this embodiment, a structure different from that in Embodiment 1 will be described with reference to FIGS. Note that the processes until the base film 302, the gate electrode 303, and the gate insulating film 304 are formed over the substrate 301 are performed until the base film 102, the gate electrode 103, and the gate insulating film 104 are formed over the substrate 101 of Embodiment 1. Please refer to the process.

A first oxide semiconductor film 305 is formed over the gate insulating film 304. The oxide semiconductor film 305 is an amorphous (amorphous) material of zinc oxide (ZnO) to which one or a plurality of impurity elements of Group 1 element, Group 13 element, Group 14 element, Group 15 element, or Group 17 element are added. ) State, a polycrystalline state, a microcrystalline state (also called a microcrystal) in which an amorphous state and a polycrystalline state are mixed, or a state in which no impurity element is added. InGaO ₃ (ZnO) ₅ , magnesium zinc oxide (Mg _x Zn _1-x O) or cadmium zinc oxide (Cd _x Zn _1-x O), cadmium oxide (CdO), In—Ga—Zn—O-based Any of amorphous oxide semiconductors (a-IGZO) can be used. Here, the first oxide semiconductor film 305 is formed by sputtering using zinc oxide with a thickness of 50 to 200 nm (preferably 100 to 150 nm).

  Next, LRTA is performed from the substrate surface in order to improve the crystallinity (FIG. 3A). LRTA is 250 to 570 ° C. (preferably 300 to 400 ° C., more preferably 300 to 350 ° C.) for 1 minute to It may be performed for 1 hour, preferably 10 minutes to 30 minutes, and is performed by radiation from one or more kinds selected from a halogen lamp, a metal halide lamp, a xenon arc lamp, a carbon arc lamp, a high pressure sodium lamp, and a high pressure mercury lamp. In the embodiment, the region of the first oxide semiconductor film 305 which overlaps with the gate electrode 303 with the gate insulating film 304 interposed therebetween is subjected to lamp heating for 30 minutes so that the gate electrode 303 becomes approximately 300 ° C. in an oxygen atmosphere. The first oxide semiconductor film 305 has a light-transmitting property, so that the gate electrode 303 is superior. 3B, the crystallinity of the first oxide semiconductor film 305 increases from the periphery of the gate electrode 303 toward the outside, and the second oxide semiconductor region is formed as shown in FIG. 309 and a second oxide semiconductor film having a first oxide semiconductor region 308 with better crystallinity than the second oxide semiconductor region 309. Note that in FIG 3A, the substrate Although the lamp is heated to the front surface 301, LRTA may be applied to the rear surface of the substrate, and since the oxide semiconductor film 305 has a light-transmitting property, most regions of the substrate are hardly heated even by LRTA. Even when a resin having a low melting point is used, deformation due to shrinkage of the substrate can be suppressed, etc. Note that by increasing the output of the LRTA and performing lamp heating from the substrate surface, the vicinity of the surface of the oxide semiconductor film can be directly increased. Crystallinity In addition, the lamp light reflected by the gate electrode is oxidized when the lamp is heated from the substrate surface by adjusting the wavelength of the lamp light, the reflectance of the gate electrode, and the thickness of the oxide semiconductor film. The oxide semiconductor film which is absorbed in the vicinity of the surface of the oxide semiconductor film on the gate insulating film 304 side of the oxide semiconductor film may be preferentially crystallized on the substrate. When a glass substrate is used, the lamp light uses visible to infrared light, and light in this wavelength region is not easily absorbed by the glass substrate, so that the glass substrate can be kept from being heated to a minimum. Note that the lamp heating may be performed a plurality of times, whereby the gate electrode heating time can be increased while suppressing an increase in the substrate temperature.

Note that the crystallinity of the oxide semiconductor film may be selectively improved by irradiation with laser light or ultraviolet light instead of LRTA, or a combination thereof. In the case of using laser irradiation, a continuous wave laser beam (CW laser beam) or a pulsed laser beam (pulse laser beam) can be used. The laser beam that can be used here is a gas laser such as an Ar laser, a Kr laser, or an excimer laser, single crystal YAG, YVO ₄ , forsterite (Mg ₂ SiO ₄ ), YAlO ₃ , GdVO ₄ , or polycrystalline ( (Ceramics) YAG, Y ₂ O ₃ , YVO ₄ , YAlO ₃ , GdVO ₄ with one or more of Nd, Yb, Cr, Ti, Ho, Er, Tm, Ta added as dopants A laser oscillated from one or more of laser, glass laser, ruby laser, alexandrite laser, Ti: sapphire laser, copper vapor laser, or gold vapor laser as a medium can be used. By irradiating the fundamental wave of such a laser beam and the second to fourth harmonics of these fundamental waves, the crystallinity can be improved. Note that it is preferable to use laser light having energy larger than the band gap of the oxide semiconductor film. For example, laser light emitted from an excimer laser oscillator of KrF, ArF, XeCl, or XeF may be used.

Next, Ti and Al are sequentially deposited over the first oxide semiconductor region 308 and the second oxide semiconductor region 309 by a sputtering method to form a Ti layer and an Al layer. After that, the Ti and Al layers are dry-etched using photolithography and Cl ₂ gas to form wirings 306 and wirings 307 to be source wirings and drain wirings (FIG. 3C). The wirings 306 and 307 are formed with a film thickness of 10 to 200 nm using an acceleration voltage of 1.5 kw, a pressure of 0.4 Pa, and Ar (flow rate of 30 sccm). Note that although the wirings 306 and 307 are stacked, the wiring 306 and the wiring 307 may be a single layer as long as a material having good consistency with the oxide semiconductor film 305 is used. Note that as the wirings 306 and 307, aluminum (Al), tungsten (W), molybdenum (Mo), zirconium (Zr), hafnium (Hf), vanadium (V), niobium (Nb), tantalum (Ta), chromium ( Cr), cobalt (Co), nickel (Ni), platinum (Pt), titanium (Ti), neodymium (Nd) and other metals or alloys thereof, or metal nitrides thereof, indium tin oxide (ITO), indium Zinc oxide (IZO), indium tin oxide containing silicon oxide (ITSO), indium oxide (In ₂ O ₃ ), tin oxide (SnO ₂ ), zinc oxide (ZnO), zinc oxide with added aluminum (AlZnO) Alternatively, a light-transmitting material such as zinc oxide added with gallium (GaZnO) can be used as appropriate.

  After that, a semiconductor device is manufactured by forming structures such as an interlayer insulating film, a wiring, a pixel electrode, and a light-emitting element over the oxide semiconductor film 305, the wiring 306, and the wiring 307.

  In this embodiment, the wiring is formed after LRTA is performed on the oxide semiconductor film 305 to improve crystallinity. Therefore, the wiring 306 may be formed using a material whose reflectance with respect to the lamp light is lower than that of the gate electrode 303. The material of the wiring is described in Embodiment 1 as long as it has good consistency with the oxide semiconductor film 305. Not limited to materials.

  Note that heating by LRTA may be performed after the oxide semiconductor film 305 is formed and before or after being processed into a desired shape.

  In the present invention, when zinc oxide is used as the semiconductor film, the crystallinity of the semiconductor film is improved at a heat treatment temperature of about 300 ° C., so that the heat treatment temperature can be suppressed as compared with the case where a crystalline silicon film is used for the semiconductor film. The crystallization process can be performed at low cost. In addition, since the gate electrode is selectively heated by LRTA using a highly light-transmitting oxide semiconductor film, most of the substrate is not heated and shrinkage of the substrate can be suppressed.

(Embodiment 3)
An embodiment of the present invention will be described with reference to FIGS. This embodiment is an example of a semiconductor device including a channel protective thin film transistor.

  As the substrate 400, a glass substrate made of barium borosilicate glass, alumino borosilicate glass, or the like, a silicon substrate, a heat-resistant plastic substrate, or a resin substrate is used. As the plastic substrate or the resin substrate, polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyethersulfone (PES), acrylic, polyimide, or the like can be used. Further, polishing may be performed by a CMP method or the like so that the surface of the substrate 400 is planarized. Note that an insulating layer may be formed over the substrate 400. The insulating layer is formed by a known method such as a CVD method, a plasma CVD method, a sputtering method, a spin coating method, or the like, using at least one of an oxide material and a nitride material containing silicon, and is formed as a single layer or a stacked layer. . This insulating layer does not need to be formed, but has an effect of blocking contaminants from the substrate 400 and an effect of suppressing heat transfer to the substrate.

  A conductive film 401 is formed over the substrate 400. The conductive film 401 is processed into a desired shape to be a gate electrode. The conductive film 401 may be formed using a material having a low reflectance with respect to the wavelength of the light source used for LRTA heating (e.g., easy to absorb heat, that is, easily heated) by a printing method, an electroplating method, an evaporation method, or the like. preferable. By using a material having a low reflectance, a subsequent heating step can be performed. As the conductive film 401, tungsten (W), molybdenum (Mo), zirconium (Zr), hafnium (Hf), vanadium (V), niobium (Nb), tantalum (Ta), chromium (Cr), cobalt (Co) A metal such as nickel (Ni), platinum (Pt), titanium (Ti), neodymium (Nd), or an alloy thereof, or a metal nitride thereof can be used as appropriate. Further, a plurality of these layers may be stacked. Typically, a tantalum nitride film may be stacked on the substrate surface, and a tungsten film may be stacked thereon. Alternatively, a material in which an impurity element imparting one conductivity type is added to silicon may be used. For example, an n-type silicon film in which an amorphous silicon film contains an impurity element imparting n-type such as phosphorus (P) can be used. The conductive film 401 is formed with a thickness of 10 nm to 200 nm.

  In this embodiment, the conductive film 401 with a thickness of 150 nm is formed using tungsten (W) by a sputtering method.

  A resist mask is formed over the conductive film 401 using a photolithography process, and the conductive film 401 is processed into a desired shape using the mask to form the gate electrode 402 (see FIG. 4B).

Next, a gate insulating film 403a and a gate insulating film 403b are formed over the gate electrode 402 to have a two-layer structure. The insulating films to be stacked are preferably formed continuously while switching the reaction gas at the same temperature without breaking the vacuum in the same chamber. If formed continuously without breaking the vacuum, it is possible to prevent the interface between the stacked films from being contaminated.

The gate insulating film 403a and the gate insulating film 403b are formed using silicon oxide (SiO _x ), silicon nitride (SiN _x ), silicon oxynitride (SiO _x N _y ) (x> y), silicon nitride oxide (SiN _x O _y ) ( x> y) and the like can be used as appropriate. Further, the gate electrode 402 may be oxidized to form an oxide film instead of the gate insulating film 403a. Note that the gate insulating film 403a is preferably formed using silicon nitride (SiN _x ), silicon nitride oxide (SiN _x O _y ) (x> y), or the like in order to prevent diffusion of impurities and the like from the substrate. . The gate insulating film 403b is preferably formed using silicon oxide (SiO _x ), silicon oxynitride (SiO _x N _y ) (x> y), or the like. Note that in order to form a dense insulating film with low gate leakage current at a low deposition temperature, a rare gas element such as argon is preferably contained in a reaction gas and mixed into the formed insulating film. In this embodiment, a gate insulating film 403a is formed using a silicon nitride film having a thickness of 50 nm to 140 nm formed using SiH ₄ and NH ₃ as a reaction gas, and SiH ₄ and N ₂ O are formed as a reaction gas. A gate insulating film 403b is stacked using a silicon oxide film having a thickness of 100 nm. Note that the thickness of the gate insulating film 403a and the gate insulating film 403b is preferably set to 50 nm to 100 nm, respectively.

Alternatively, the gate insulating film 403b may be formed using alumina (Al ₂ O ₃ ) or aluminum nitride (AlN) which has good matching with an oxide semiconductor film to be formed later. In this case, silicon oxide, silicon nitride, silicon oxynitride, silicon nitride oxide, or the like with high insulating properties is used for the gate insulating film 403a, and alumina or aluminum nitride having good interface characteristics with the oxide semiconductor film is used for the gate insulating film 403b. Thus, a highly reliable gate insulating film can be formed. Note that the gate insulating film may have three layers, and the third layer may be a gate insulating film using alumina or aluminum nitride.

Next, the oxide semiconductor film 404 is formed over the gate insulating film 403b. The oxide semiconductor film 404 is formed by a sputtering method with a flow rate of Ar: O ₂ = 50: 5 sccm, a pressure of 0.4 Pa, and a thickness of 100 nm.

The oxide semiconductor film 404 is an amorphous state of ZnO to which one or more impurity elements of Group 1 element, Group 13 element, Group 14 element, Group 15 element, Group 17 element, and the like are added. Alternatively, a microcrystalline state or a microcrystalline state (also referred to as a microcrystal) in which an amorphous state and a polycrystalline state are mixed, or a material to which no impurity element is added can be used. InGaO ₃ (ZnO) ₅ , magnesium zinc oxide (Mg _x Zn _1-x O) or cadmium zinc oxide (Cd _x Zn _1-x O), cadmium oxide (CdO), In—Ga—Zn—O-based Any of amorphous oxide semiconductors (a-IGZO) can be used.

  Note that in the case where ZnO is used for the oxide semiconductor film 404, nitrogen is preferably added (doped). ZnO inherently exhibits the properties of an n-type semiconductor. Since nitrogen acts as an acceptor impurity with respect to ZnO by adding nitrogen, the threshold voltage can be controlled as a result.

  Next, the oxide semiconductor film 404 is heated from the front surface or the back surface of the substrate 400 by an LRTA method (FIG. 4D). The LRTA is performed by radiation from one or more kinds selected from a halogen lamp, a metal halide lamp, a xenon arc lamp, a carbon arc lamp, a high pressure sodium lamp, and a high pressure mercury lamp. LRTA is performed at 250 to 570 ° C. (preferably 300 ° C. to 400 ° C., more preferably 300 to 350 ° C.) for 1 minute to 1 hour, preferably 10 minutes to 30 minutes. In the present embodiment, lamp heating is performed in an oxygen atmosphere at 300 ° C. for 30 minutes using a halogen lamp as a light source.

  By performing LRTA, the gate electrode 402 is selectively heated in a short time, and the first oxide semiconductor whose crystallinity is improved in a region 434 indicated by a dotted line formed around the gate electrode 402 by the heated heat A region is formed. On the other hand, in the region 424 other than the region 434 indicated by the dotted line, the absorption of the lamp light is small, so that heating is hardly performed, and a second oxide semiconductor region having crystallinity different from that of the first oxide semiconductor region is formed. (FIG. 4E). Accordingly, only the region where the gate electrode 402 is formed is selectively heated, and the other regions are not heated. Therefore, shrinkage and bending of the substrate 400 can be suppressed. Note that the crystallinity in the vicinity of the surface of the oxide semiconductor film may be directly improved by increasing the output of the LRTA and performing lamp heating from the substrate surface. Further, by adjusting the wavelength of the lamp light, the reflectance of the gate electrode, and the thickness of the oxide semiconductor film, the lamp light reflected by the gate electrode is insulated from the gate of the oxide semiconductor film when the lamp is heated from the substrate surface. The oxide semiconductor film that is absorbed in the vicinity of the surface on the film 403b side and overlaps with the gate electrode may be preferentially crystallized in the vicinity of the surface on the gate insulating film 403b side. When a glass substrate is used as the substrate, the lamp light uses a visible light to infrared light region. Since light in this wavelength region is hardly absorbed by the glass substrate, it is possible to minimize the heating of the glass substrate. The lamp heating may be performed a plurality of times. By performing it a plurality of times, it is possible to increase the heating time of the gate electrode while suppressing an increase in the substrate temperature.

Note that the crystallinity of the oxide semiconductor film may be selectively improved by irradiation with laser light or ultraviolet light instead of LRTA, or a combination thereof. In the case of using laser irradiation, a continuous wave laser beam (CW laser beam) or a pulsed laser beam (pulse laser beam) can be used. The laser beam that can be used here is a gas laser such as an Ar laser, a Kr laser, or an excimer laser, single crystal YAG, YVO ₄ , forsterite (Mg ₂ SiO ₄ ), YAlO ₃ , GdVO ₄ , or polycrystalline ( (Ceramics) YAG, Y ₂ O ₃ , YVO ₄ , YAlO ₃ , GdVO ₄ with one or more of Nd, Yb, Cr, Ti, Ho, Er, Tm, Ta added as dopants A laser oscillated from one or more of laser, glass laser, ruby laser, alexandrite laser, Ti: sapphire laser, copper vapor laser, or gold vapor laser as a medium can be used. By irradiating the fundamental wave of such a laser beam and the second to fourth harmonics of these fundamental waves, the crystallinity can be improved. Note that it is preferable to use laser light having energy larger than the band gap of the oxide semiconductor film. For example, laser light emitted from an excimer laser oscillator of KrF, ArF, XeCl, or XeF may be used.

Next, a protective film 405 is formed over the oxide semiconductor film 404, and a resist 406 is formed over the protective film 405 (see FIG. 4F). Using the resist 406 as a mask, the protective film 405 is processed into a desired shape by a photolithography process to form a channel protective film 407. For the channel protective film, silicon oxide (SiOx), silicon nitride (SiN _x ), silicon oxynitride (SiO _x N _y ) (x> y), silicon nitride oxide (SiN _x O _y ) (x> y), etc. It can be used as appropriate. By forming the channel protective film 407, the semiconductor layer in the channel portion can be prevented from being etched when the source electrode layer and the drain electrode layer are formed. In this embodiment, silicon nitride is formed as the protective film 405 to form the channel protective film 407 (see FIG. 4G).

  Next, a mask 408 is formed from a resist by using a photolithography process for the oxide semiconductor film 404 (FIG. 4H), and etching is performed using the mask 408 so that the oxide semiconductor film is processed into a desired shape. 409 (also referred to as an island-shaped oxide semiconductor film) is formed (FIG. 5A). Note that diluted hydrofluoric acid is used for etching. After that, a first conductive film 411 and a second conductive film 412 are formed over the oxide semiconductor film 409, and a resist mask 413 is formed using a photolithography process (FIG. 5B). The first conductive film 411 and the second conductive film 412 are processed into desired shapes using the mask 413, and the first conductive films 414a and 414b functioning as the source electrode or the drain electrode, the second conductive film 415a, 415b is formed (FIG. 5C).

For the mask, a commercially available resist material containing a photosensitizer may be used. For example, a novolak resin that is a typical positive resist and a naphthoquinonediazide compound that is a photosensitizer, a base resin that is a negative resist, diphenylsilanediol In addition, an acid generator or the like may be used. Whichever material is used, the surface tension and viscosity are appropriately adjusted by adjusting the concentration of the solvent or adding a surfactant or the like. Further, when a conductive material containing a photosensitive substance having photosensitivity is used for the conductive film, the conductive film is directly irradiated with laser light without forming a resist mask, and exposure and removal by an etchant are performed. It can be processed into a desired shape. In this case, there is an advantage that the process is simplified because it is not necessary to form a mask.

  The conductive material containing a photosensitive substance is composed of a metal or alloy such as Ag, Au, Cu, Ni, Al, Pt, and an organic polymer resin, a photopolymerization initiator, a photopolymerization monomer, or a solvent. What contains the photosensitive resin may be used. As the organic polymer resin, a novolak resin, an acrylic copolymer, a methacrylic copolymer, a cellulose derivative, a cyclized rubber resin, or the like is used.

  Note that before the first conductive film 411 is formed, as an n-type oxide semiconductor, for example, zinc oxide added with aluminum (AlZnO) or zinc oxide added with gallium (GaZnO) is formed over the oxide semiconductor film 404. A further conductive film may be provided. By forming a conductive film made of AlZnO or GaZnO, the first conductive film 411 and the oxide semiconductor film 409 can be matched to reduce contact resistance between the source electrode and the drain electrode. Further, for example, Ti may be formed on GaZnO or a stacked structure in which GaZnO is formed on Ti.

  In addition, as the first conductive films 414a and 414b and the second conductive films 415a and 415b, aluminum (Al), tungsten (W), molybdenum (Mo), zirconium (Zr), hafnium (Hf), and vanadium (V) are used. , Metal such as niobium (Nb), tantalum (Ta), copper (Cu), chromium (Cr), cobalt (Co), nickel (Ni), platinum (Pt), titanium (Ti), neodymium (Nd) or the like An alloy or a metal nitride thereof can be used as appropriate. For example, the first conductive film is Ti, the second conductive film is Al, the first conductive film is Ta, the second conductive film is W, the first conductive film is TaN, and the second conductive film is Al, A combination is also conceivable in which the first conductive film is TaN, the second conductive film is Cu, the first conductive film is Ti, the second conductive film is Al, and Ti is used as the third conductive film. Further, an AgPdCu alloy may be used for either the first layer or the second layer. A three-layer structure in which W, an alloy of Al and Si (Al-Si), and TiN are sequentially stacked may be employed. Tungsten nitride may be used instead of W, an alloy film of Al and Ti (Al—Ti) may be used instead of an alloy of Al and Si (Al—Si), and Ti may be used instead of TiN. It may be used. Aluminum may be added with 0.5 to 5 atomic% of elements such as titanium, silicon, scandium, neodymium, and copper in order to improve heat resistance.

In addition, as a conductive material for forming the first conductive film 411 and the second conductive film 412, indium tin oxide (ITO), indium zinc oxide (IZO), and indium tin oxide containing silicon oxide (ITSO) are used. Alternatively, a light-transmitting material such as indium oxide (In ₂ O ₃ ), tin oxide (SnO ₂ ), zinc oxide (ZnO), titanium nitride, and the like may be combined as appropriate.

  Note that in this embodiment, the first conductive film 411 and the second conductive film 412 are formed after LRTA is performed on the oxide semiconductor film 305 to improve crystallinity. Therefore, the first conductive film 411 and the second conductive film 412 may be made of a material having a lower reflectance with respect to lamp light than the gate electrode 402, and a conductive material used as a wiring or an electrode is an oxide semiconductor. The material is not limited to that described in Embodiment 1 as long as it has good consistency with the film 305.

In this embodiment, plasma etching (dry etching) or wet etching may be employed for the etching process, but plasma etching is suitable for processing a large area substrate. As an etching gas, a fluorine-based gas such as CF ₄ , NF ₃ , SF ₆ , or CHF ₃ , a chlorine-based gas typified by Cl ₂ , BCl ₃ , SiCl _4, CCl _4, or the like, or an O ₂ gas is used. An inert gas such as Ar or Ar may be added as appropriate. Further, if an atmospheric pressure discharge etching process is applied, a local electric discharge process is also possible, and it is not necessary to form a mask layer on the entire surface of the substrate.

  Note that in the photolithography process of this embodiment, an insulating film with a thickness of about several nanometers may be formed on the surface of the oxide semiconductor film before applying the resist. Through this step, it is possible to avoid direct contact between the oxide semiconductor film and the resist, and impurities contained in the resist can be prevented from entering the oxide semiconductor film.

  Through the above process, a bottom-gate (also referred to as an inverted staggered) thin film transistor in which the semiconductor layer in the channel portion is not etched can be manufactured. Note that, in this embodiment, a bottom-gate TFT is manufactured. However, at least an oxide semiconductor is formed by heating a gate electrode formed on a substrate provided on a substrate with a gate insulating film interposed therebetween by LRTA. A top gate TFT may be used as long as the crystallinity of the channel formation region of the film can be improved.

This embodiment can be combined with Embodiments 1 and 2 as appropriate.
(Embodiment 4)
An embodiment of the present invention will be described with reference to FIG. This embodiment is an example of a semiconductor device having a channel-etched thin film transistor in Embodiment 3. Therefore, repetitive description of the same portion or a portion having a similar function is omitted.

  A gate electrode layer 602 is formed over the substrate 600, and a gate insulating film 603a and a gate insulating film 603b are formed so as to cover the gate electrode layer 602 (see FIG. 6A). An oxide semiconductor film is formed over the gate insulating film 603b, LRTA is performed from the substrate surface, and a first oxide semiconductor region 604 whose crystallinity is improved in a region indicated by a dotted line, and the first oxide semiconductor region 604 An oxide semiconductor film including the second oxide semiconductor region 605 in which crystallization has not progressed further is formed (see FIG. 6B). A mask 608 is provided over the oxide semiconductor film (FIG. 6C), and the oxide semiconductor film is processed into a desired shape using a photolithography step, so that the oxide semiconductor film 609 is formed (FIG. 6D). ).

Next, a first conductive film 611 and a second conductive film 612 are formed. Then, a resist mask 613 is formed. (See FIG. 6E). In this embodiment, conductive films containing titanium and aluminum are formed by a sputtering method as the first conductive film 611 and the second conductive film 612, respectively.

After that, the first conductive films 615a and 615b and the second conductive films 616a and 616b functioning as a source electrode or a drain electrode are formed by using a mask 613 through a photolithography process (FIG. 6 ( F)).

  Through the above process, a thin film transistor in which part of a channel portion in a semiconductor layer is etched can be manufactured.

  Note that in this embodiment, as an n-type oxide semiconductor between the oxide semiconductor film and the first conductive film 611, for example, zinc oxide (AlZnO) to which aluminum is added or zinc oxide (GaZnO) to which gallium is added is used. A further conductive film may be provided. Further, for example, Ti may be formed on GaZnO or a stacked structure in which GaZnO is formed on Ti. By forming the n-type oxide semiconductor film, the connection between the first conductive film 611 serving as the source electrode and the drain electrode and the oxide semiconductor film can be improved, and the contact resistance can be reduced.

This embodiment can be combined with Embodiments 1 and 2 as appropriate.
(Embodiment 5)

  In this embodiment, a light-emitting device in which the bottom-gate thin film transistor formed in Embodiment 3 or Embodiment 4 and a pixel electrode are connected is described with reference to FIGS. Note that the thin film transistor of this embodiment is a channel etch type.

  FIG. 7 shows a cross-sectional view of a TFT used in a driver circuit and a cross-sectional view of a TFT used in a pixel portion. Reference numeral 701 corresponds to a cross-sectional view of a TFT used in a driver circuit, 702 corresponds to a cross-sectional view of a TFT used in a pixel portion, and 703 corresponds to a cross-sectional view of a light-emitting element to which current is supplied by the TFT 702. The TFTs 701 and 702 are bottom gate types.

  The TFT 701 of the driver circuit includes a gate electrode 710 formed over the substrate 700, a gate insulating film 711 covering the gate electrode 710, and a zinc oxide overlapping the gate electrode 710 with the gate insulating film 711 interposed therebetween. An oxide semiconductor film 712 including Further, the TFT 701 includes a first conductive film 713 that functions as a source electrode or a drain electrode, and a second conductive film 714. Note that the first conductive film 713 and the second conductive film 714 also function as wiring layers.

  In FIG. 7, the gate insulating film 711 is formed of two layers of insulating films, but the present invention is not limited to this structure. The gate insulating film 711 may be formed of a single layer or three or more layers of insulating films.

  The second conductive film 714 is formed of aluminum or an alloy containing aluminum. The pair of second conductive films 714 face each other with the channel formation region of the oxide semiconductor film 712 interposed therebetween.

  The first conductive film 713 is formed of titanium. Although the first conductive film 713 is not necessarily provided, electrical contact characteristics between the oxide semiconductor film 712 and the second conductive film 714 are favorable. In addition, the oxide semiconductor film 712 also functions as a barrier layer that prevents diffusion of oxygen into the second conductive film. As a result, the reliability of the TFT can be improved. Note that it is known that an oxide semiconductor film exhibits n-type without any particular action. Therefore, an impurity imparting p-type conductivity is added to the first oxide semiconductor film in which a channel is formed, and the conductivity type is controlled so as to be as close to the I-type (intrinsic semiconductor) as possible. Also good.

  The TFT 702 in the pixel portion includes a gate electrode 720 formed over the substrate 700, a gate insulating film 711 covering the gate electrode 720, and an oxide overlapping with the gate electrode 720 with the gate insulating film 711 interposed therebetween. A semiconductor film 722. Further, the TFT 702 includes a pair of first conductive films 723 that function as a source electrode or a drain electrode and a second conductive film 724.

  The second conductive film 724 is formed using aluminum or an alloy containing aluminum. The pair of second conductive films 724 face each other with the region where the channel of the oxide semiconductor film 722 is formed therebetween.

  The first conductive film 723 is made of titanium. Although the first conductive film 723 is not necessarily provided, electrical contact characteristics with the oxide semiconductor film 722 are favorable. In addition, the oxide semiconductor film 722 functions as a barrier layer which prevents diffusion of oxygen into the second conductive film 724. As a result, the reliability of the TFT can be improved. Note that the oxide semiconductor film 722 is known to exhibit n-type without any particular action. Therefore, an impurity imparting p-type conductivity may be added to the first oxide semiconductor film in which a channel is formed, and the conductivity type may be controlled so as to be as close to the I-type as possible.

  In addition, a first passivation film 740 and a second passivation film 741 made of an insulating film are formed so as to cover the TFTs 701 and 702. The first passivation film 740 and the second passivation film 741 are formed using a thin film formation method such as a plasma CVD method or a sputtering method, using silicon nitride, silicon oxide, silicon nitride oxide, silicon oxynitride, aluminum oxynitride, or aluminum oxide Diamond-like carbon (DLC), nitrogen-containing carbon (CN), and other insulating materials can be used. The passivation film that covers the TFTs 701 and 702 is not limited to two layers, but may be a single layer or three or more layers. For example, the first passivation film 740 can be formed using silicon nitride, and the second passivation film 741 can be formed using silicon oxide. By forming the passivation film using silicon nitride or silicon nitride oxide, impurities from the outside can be prevented from entering the semiconductor element, and the TFTs 701 and 702 can be prevented from being deteriorated by the influence of moisture or the like. In this embodiment mode, the first passivation film 740 and the second passivation film 741 are continuously formed by gas switching in the same chamber.

  Next, one of the second conductive films 724 is connected to the pixel electrode 730 of the light-emitting element 703.

  Next, an insulating layer 729 (also referred to as a partition wall, a bank, or a bank layer) is selectively formed. The insulating layer 729 is formed over the pixel electrode 730 so as to have an opening, and is formed so as to cover the second passivation film 741. In this embodiment, the insulating layer 729 is formed so as to cover the entire surface, and is etched using a mask such as a resist.

  The insulating layer 729 is formed using silicon, oxygen, hydrogen, and a silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, aluminum nitride, aluminum oxynitride, or other inorganic insulating material, or a siloxane-based material. Among them, an inorganic siloxane insulating material containing a Si—O—Si bond, or an organic siloxane insulating material in which hydrogen bonded to silicon is substituted with an organic group such as methyl or phenyl can be used. You may form using photosensitive and non-photosensitive materials, such as an acrylic resin and a polyimide resin. The insulating layer 729 preferably has a shape in which the radius of curvature continuously changes, and the coverage of the electroluminescent layer 731 and the counter electrode 732 formed thereon is improved.

  Next, an electroluminescent layer 731 is formed so as to be in contact with the pixel electrode 730. As the electroluminescent layer 731, materials that emit red (R), green (G), and blue (B) light are selectively formed by an evaporation method using an evaporation mask or the like. A material that emits red (R), green (G), and blue (B) light can be formed by a droplet discharge method (such as a low-molecular or high-molecular material) in the same manner as a color filter. In this case, a mask is not used. Both are preferable because RGB can be separately applied. In addition to the combination of three colors of RGB, four colors including emerald green may be used. In addition, vermilion may be added. A pixel including an EL element that emits white light may be combined.

  A counter electrode 732 is formed in contact with the electroluminescent layer 731. Note that although the light-emitting element 703 has an anode and a cathode, either one is used as a pixel electrode and the other is used as a counter electrode. Thus, a light-emitting device having a display function using the light-emitting element is completed.

  In the present invention, since the channel formation region of the oxide semiconductor film includes at least a crystallized region, a TFT with higher mobility than a TFT using an amorphous silicon film can be obtained. In addition, since the crystallization process can be performed at a lower temperature than a TFT using a crystalline silicon film, the process is inexpensive.

This embodiment can be appropriately combined with the first to fourth embodiments.
(Embodiment 6)

  In this embodiment, a liquid crystal display device in which a semiconductor element formed using a bottom-gate thin film transistor to which the present invention is applied and a pixel electrode are connected will be described with reference to FIGS. Note that the fifth embodiment can be referred to for the formation up to the second passivation film 741, and therefore, the same reference numerals as those in FIG.

  As shown in FIG. 13A, after the second passivation film 741 is formed, an insulating layer 1329 is formed to cover the second passivation film 741.

  Next, wirings 1371, 1372, 1373, and 1374 that are connected to the second conductive films 714 and 724 through the contact holes, respectively, are formed. The second conductive film 724 is electrically connected to the pixel electrode 1330 of the liquid crystal element 1303 through the wiring 1374. In the case of manufacturing a transmissive liquid crystal display panel, the pixel electrode 1330 includes indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, and indium tin oxide containing titanium oxide. Things can be used. Needless to say, indium tin oxide (ITO), indium zinc oxide (IZO), indium tin oxide added with silicon oxide (ITSO), or the like can also be used. In the case of manufacturing a reflective display panel, a conductive metal film made of titanium, tungsten, nickel, gold, platinum, silver, aluminum, magnesium, calcium, lithium, or an alloy thereof is used as a reflective metal thin film. Etc. can be used. The pixel electrode 1330 can be formed by an evaporation method, a sputtering method, a CVD method, a printing method, a droplet discharge method, or the like.

  An alignment film 1331 is formed so as to be in contact with the pixel electrode 1330. On the other hand, a counter electrode 1341 and an alignment film 1342 are sequentially stacked below the second substrate 1340 facing the first substrate 700 with the pixel electrode 1330 interposed therebetween. A liquid crystal 1343 is provided between the pixel electrode 1330 and the alignment film 1331 and the counter electrode 1341 and the alignment film 1342, and a portion where the pixel electrode 1330, the liquid crystal 1343, and the counter electrode 1341 overlap is a liquid crystal element 1303. It corresponds to. Note that the pixel electrode 1330 may be formed to extend over the TFT 702 as shown in FIG. Since the oxide semiconductor film has a light-transmitting property with respect to visible light, the first conductive films 713 and 723 and the second conductive films 714 and 724 have light-transmitting indium tin oxide (ITO) and silicon oxide. When a transparent conductive film containing indium tin oxide (ITSO) containing, organic indium, organic tin, zinc oxide, titanium nitride, or the like is used, the aperture ratio of the pixel portion can be increased.

  Note that the distance (cell gap) between the pixel electrode 1330 and the counter electrode 1341 is controlled by a spacer 1361. In FIG. 13A, the spacer 1361 is formed by processing the insulating film provided on the first substrate 700 side into a desired shape; however, a separately prepared spherical spacer is formed over the alignment film 1331. The cell gap may be controlled by being distributed. 1362 corresponds to a sealant, and the sealant 1362 can seal the liquid crystal 1343 between the first substrate 700 and the second substrate 1340.

  A polarizing plate 1350 is provided on the surface of the first substrate 700 where the TFT 701 and the TFT 702 are not formed. A polarizing plate 1351 is provided on the surface of the second substrate 1340 opposite to the surface on which the counter electrode 1341 is formed. Note that the liquid crystal display device of the present invention is not limited to the structure shown in FIG.

  In the present invention, since the crystallinity at least in the channel formation region of the oxide semiconductor film is improved, a TFT having higher mobility than a TFT using an amorphous silicon film can be obtained. In addition, since the crystallization process can be performed at a lower temperature than a TFT using a crystalline silicon film, the process is inexpensive. Further, since the crystallinity of the oxide semiconductor film is selectively increased by lamp heating, the time required for crystallization can be shortened as compared to crystallization of the entire oxide semiconductor film. Therefore, the yield can be increased. In addition, since the crystallization is performed selectively and in a short time, the substrate is unlikely to shrink, and a substrate having a relatively low melting point such as a resin substrate can be used. Therefore, a TFT can be manufactured at low cost.

  In addition, since the channel formation region does not absorb visible light, unnecessary optical carriers are not generated. Therefore, a TFT with excellent light resistance can be formed.

  Next, another structure of the pixel included in the liquid crystal display device of the present invention will be described. FIG. 14A illustrates one mode of a pixel circuit diagram, and FIG. 14B illustrates one mode of a cross-sectional structure of a pixel corresponding to FIG.

  14A and 14B, reference numeral 1501 corresponds to a switching TFT for controlling input of a video signal to a pixel, and 1502 corresponds to a liquid crystal element. Specifically, the potential of the video signal input to the pixel through the switching TFT 1501 is supplied to the pixel electrode of the liquid crystal element 1502. Note that a capacitor 1503 corresponds to a capacitor for holding a voltage between the pixel electrode and the counter electrode of the liquid crystal element 1502 when the switching TFT 1501 is off.

  Specifically, the switching TFT 1501 has a gate electrode connected to the scanning line G, a source region and a drain region, one connected to the signal line S, and the other connected to the pixel electrode 1504 of the liquid crystal element 1502. . One of two electrodes of the capacitor 1503 is connected to the pixel electrode 1504 of the liquid crystal element 1502, and a constant potential, preferably the same height as the counter electrode, is supplied to the other.

  14A and 14B, a structure in which a switching TFT 1501 is connected in series and a plurality of TFTs to which a gate electrode 1510 is connected shares an oxide semiconductor film 1512. It has a multi-gate structure. With the multi-gate structure, the off-state current of the switching TFT 1501 can be reduced. Specifically, in FIGS. 14A and 14B, the switching TFT 1501 has a configuration in which two TFTs are connected in series, but three or more TFTs are connected in series, and A multi-gate structure in which gate electrodes are connected may be used. Further, the switching TFT does not necessarily have a multi-gate structure, and may be a normal single-gate TFT having one gate electrode and one channel formation region.

  Next, a mode different from those in FIGS. 13 and 14 of the TFT included in the liquid crystal display device of the present invention will be described. FIG. 15 shows a cross-sectional view of a TFT used in a driver circuit and a cross-sectional view of a TFT used in a pixel portion. 2301 corresponds to a cross-sectional view of a TFT used in a driver circuit, 2302 corresponds to a cross-sectional view of a switching TFT used in a pixel portion, and 2303 corresponds to a cross-sectional view of a liquid crystal element.

  The driver circuit TFT 2301 and the pixel portion TFT 2302 are formed of a gate electrode 2310, 2320 formed on the substrate 2300, a gate insulating film 2311 covering the gate electrode 2310, 2320, and a gate insulating film 2311 sandwiched therebetween. Oxide semiconductor films 2312 and 2322 which overlap with the electrodes 2310 and 2320 and have at least a crystallized region in a channel formation region are provided. Then, channel protective films 2390 and 2391 formed of an insulating film are formed so as to cover the channel formation regions of the oxide semiconductor films 2312 and 2322. The channel protective films 2390 and 2391 are provided to prevent the channel formation regions of the oxide semiconductor films 2312 and 2322 from being etched in the manufacturing process of the TFTs 2301 and 2302. Further, the TFTs 2301 and 2302 have a pair of first conductive films 2313 and 2323 that function as a source electrode or a drain electrode, and second conductive films 2314 and 2324. Note that the first conductive films 2313 and 2323 and the second conductive films 2314 and 2324 also function as wiring layers.

  In FIG. 15, the gate insulating film 2311 is formed of two layers of insulating films; however, the present invention is not limited to this structure. The gate insulating film 2311 may be formed of a single layer or three or more layers of insulating films.

  The second conductive films 2314 and 2324 are formed of aluminum or an alloy containing aluminum. The pair of second conductive films 2314 and 2324 face each other with a region where the channel of the oxide semiconductor film 2322 is formed therebetween.

  The first conductive films 2313 and 2323 are formed of titanium. The first conductive films 2313 and 2323 are not necessarily provided, but electrical contact characteristics with the oxide semiconductor films 2312 and 2322 are favorable. In addition, the oxide semiconductor films 2312 and 2322 also function as a barrier layer that prevents diffusion of oxygen into the second conductive films 2314 and 2324. As a result, the reliability of the TFT can be improved. Note that the oxide semiconductor films 2312 and 2322 are known to exhibit n-type without any particular action. Therefore, an impurity imparting p-type conductivity may be added to the oxide semiconductor film in which a channel is formed, and the conductivity type may be controlled so as to be as close to the I-type as possible.

  Further, a first passivation film 2380 and a second passivation film 2381 made of an insulating film are formed so as to cover the TFTs 2301 and 2302. The first passivation film 2380 and the second passivation film 2381 are formed using a thin film formation method such as a plasma CVD method or a sputtering method, using silicon nitride, silicon oxide, silicon nitride oxide, silicon oxynitride, aluminum oxynitride, or aluminum oxide Diamond-like carbon (DLC), nitrogen-containing carbon (CN), and other insulating materials can be used. The passivation film that covers the TFTs 2301 and 2302 is not limited to two layers, and may be a single layer or three or more layers. For example, the first passivation film 2380 can be formed using silicon nitride, and the second passivation film 2381 can be formed using silicon oxide. By forming the passivation film using silicon nitride or silicon nitride oxide, impurities from the outside can be prevented from entering the semiconductor element, and the TFTs 2301 and 2302 can be prevented from being deteriorated due to the influence of moisture or the like. In this embodiment mode, the first passivation film 2380 and the second passivation film 2381 are continuously formed by gas switching in the same chamber.

  Next, an insulating layer 2329 is formed so as to cover the second passivation film 2381. Then, wirings 2371, 2372, 2373, and 2374 that are connected to the second conductive films 2314 and 2324 through the contact holes are formed. The second conductive film 2324 is electrically connected to the pixel electrode 2330 of the liquid crystal element 2303 through the wiring 2374.

  An alignment film 2331 is formed so as to be in contact with the pixel electrode 2330. On the other hand, a counter electrode 2341 and an alignment film 2342 are sequentially stacked over a second substrate 2340 facing the first substrate 2300 with the pixel electrode 2330 interposed therebetween. A liquid crystal 2343 is provided between the pixel electrode 2330 and the alignment film 2331 and the counter electrode 2341 and the alignment film 2342, and a portion where the pixel electrode 2330, the liquid crystal 2343, and the counter electrode 2341 overlap is a liquid crystal element 2303. It corresponds to. Note that the pixel electrode may be formed extending over the TFT. A light-transmitting indium tin oxide (ITO), indium tin oxide containing silicon oxide (ITSO), organic indium, organic tin, zinc oxide, titanium nitride, or the like is used for the first conductive film and the second conductive film. In the case of using a transparent conductive film that includes the pixel area, the aperture ratio of the pixel portion can be increased.

  Note that a distance (cell gap) between the pixel electrode 2330 and the counter electrode 2341 is controlled by a spacer 2361. In FIG. 15, the spacer 2361 is formed by processing the insulating film into a desired shape, but a separately prepared spherical spacer is dispersed on the alignment film 2331 to control the cell gap. Also good. 2362 corresponds to a sealing material, and the liquid crystal 2343 can be sealed between the first substrate 2300 and the second substrate 2340 by the sealing material 2362.

  A polarizing plate 2350 is provided on the surface of the first substrate 2300 opposite to the surface on which the TFTs 2301 and 2302 are formed. A polarizing plate 2351 is provided on a surface of the second substrate 2340 opposite to the surface on which the counter electrode 2341 is formed. Note that the liquid crystal display device of the present invention is not limited to the configuration shown in FIG.

  Next, the structure of the element substrate used for the liquid crystal display device of the present invention is shown.

  FIG. 16 illustrates a mode of an element substrate in which only the signal line driver circuit 6013 is separately formed and connected to the pixel portion 6012 formed over the first substrate 6011. The pixel portion 6012 and the scan line driver circuit 6014 are formed using a TFT including an oxide semiconductor film including a crystallized region at least in a channel formation region. By forming the signal line driver circuit with a transistor that can obtain higher mobility than a TFT using an amorphous silicon film, the operation of the signal line driver circuit that requires a higher driving frequency than the scanning line driver circuit is stabilized. be able to. Note that the signal line driver circuit 6013 may be a transistor using a single crystal silicon semiconductor, a TFT using a polycrystalline semiconductor, or a transistor using SOI. The pixel portion 6012, the signal line driver circuit 6013, and the scan line driver circuit 6014 are supplied with a potential of a power source, various signals, and the like through the FPC 6015, respectively.

  Note that both the signal line driver circuit and the scan line driver circuit may be formed over the same substrate as the pixel portion.

  In the case where the driver circuit is separately formed, the substrate on which the driver circuit is formed is not necessarily attached to the substrate on which the pixel portion is formed, and may be attached to, for example, an FPC. FIG. 17A illustrates a mode of an element substrate in which only the signal line driver circuit 6023 is separately formed and connected to the pixel portion 6022 and the scan line driver circuit 6024 which are formed over the first substrate 6021. The pixel portion 6022 and the scan line driver circuit 6024 are formed using a TFT including an oxide semiconductor film including a crystallized region at least in a channel formation region. The signal line driver circuit 6023 is connected to the pixel portion 6022 through the FPC 6025. The pixel portion 6022, the signal line driver circuit 6023, and the scan line driver circuit 6024 are supplied with power supply potential, various signals, and the like through the FPC 6025.

  In addition, only part of the signal line driver circuit or part of the scan line driver circuit is formed over the same substrate as the pixel portion by using a TFT having an oxide semiconductor film including a region crystallized at least in a channel formation region. It may be formed, and the rest may be separately formed and electrically connected to the pixel portion. In FIG. 17B, an analog switch 6033a included in the signal line driver circuit is formed over the same first substrate 6031 as the pixel portion 6032 and the scan line driver circuit 6034, and a shift register 6033b included in the signal line driver circuit is separately provided. FIG. 17B shows a mode of an element substrate which is formed over a different substrate and bonded to the substrate 6031. FIG. The pixel portion 6032 and the scan line driver circuit 6034 are formed using a TFT including an oxide semiconductor film including a crystallized region at least in a channel formation region. A shift register 6033 b included in the signal line driver circuit is connected to the pixel portion 6032 through the FPC 6035. The pixel portion 6032, the analog switch 6033 a included in the signal line driver circuit, the shift register 6033 b, and the scan line driver circuit 6034 are supplied with power supply potential, various signals, and the like through the FPC 6035, respectively.

  As shown in FIGS. 16 and 17, the liquid crystal display device of the present invention includes an oxide semiconductor in which part or all of a driver circuit includes a region crystallized at least in a channel formation region over the same substrate as a pixel portion. It can be formed using a TFT having a film.

  Note that a method for connecting a separately formed substrate is not particularly limited, and a COG (Chip On Glass) method, a wire bonding method, a TAB (Tape Automated Bonding) method, or the like can be used. The connection position is not limited to the position illustrated in FIG. 18 as long as electrical connection is possible. In addition, a controller, a CPU, a memory, and the like may be separately formed and connected.

  Note that the signal line driver circuit used in the present invention is not limited to a mode having only a shift register and an analog switch. In addition to the shift register and the analog switch, other circuits such as a buffer, a level shifter, and a source follower may be included. The shift register and the analog switch are not necessarily provided. For example, another circuit that can select a signal line such as a decoder circuit may be used instead of the shift register, or a latch or the like may be used instead of the analog switch. May be.

  FIG. 18A shows a block diagram of a liquid crystal display device to which the present invention is applied. A liquid crystal display device illustrated in FIG. 18A controls a pixel portion 801 including a plurality of pixels each including a liquid crystal element, a scan line driver circuit 802 that selects each pixel, and input of a video signal to the selected pixel. And a signal line driver circuit 803.

  In FIG. 18A, the signal line driver circuit 803 includes a shift register 804 and an analog switch 805. A clock signal (CLK) and a start pulse signal (SP) are input to the shift register 804. When the clock signal (CLK) and the start pulse signal (SP) are input, a timing signal is generated in the shift register 804 and input to the analog switch 805.

  A video signal (video signal) is supplied to the analog switch 805. The analog switch 805 samples the video signal in accordance with the input timing signal and supplies it to the subsequent signal line.

  Next, the configuration of the scan line driver circuit 802 is described. The scan line driver circuit 802 includes a shift register 806 and a buffer 807. In some cases, a level shifter may be provided. In the scan line driver circuit 802, the selection signal is generated by inputting the clock signal (CLK) and the start pulse signal (SP) to the shift register 806. The generated selection signal is buffered and amplified in the buffer 807 and supplied to the corresponding scanning line. The gate of the transistor of the pixel for one line is connected to the scanning line. Since the transistors of the pixels for one line must be turned on all at once, a buffer 807 that can flow a large current is used.

  In a full color liquid crystal display device, when video signals corresponding to R (red), G (green), and B (blue) are sequentially sampled and supplied to corresponding signal lines, a shift register 804 and an analog switch 805 are provided. And the number of terminals for connecting the analog switch 805 and the signal line of the pixel portion 801 corresponds to about ３. Therefore, by forming the analog switch 805 over the same substrate as the pixel portion 801, the number of terminals used for connecting a separately formed substrate can be reduced as compared with the case where the analog switch 805 is formed over a different substrate from the pixel portion 801. Thus, the probability of occurrence of connection failure can be suppressed, and the yield can be increased.

  FIG. 18B is a block diagram of a liquid crystal display device according to the present invention, which is different from FIG. In FIG. 18B, the signal line driver circuit 813 includes a shift register 814, a latch A 815, a latch B 816, and a D / A conversion circuit (hereinafter referred to as a DAC 817). The scan line driver circuit 812 has the same structure as that in the case of FIG.

  A clock signal (CLK) and a start pulse signal (SP) are input to the shift register 814. When the clock signal (CLK) and the start pulse signal (SP) are input, a timing signal is generated in the shift register 814 and sequentially input to the first-stage latch A815. When a timing signal is input to the latch A815, video signals are sequentially written and held in the latch A815 in synchronization with the timing signal. Note that in FIG. 18B, it is assumed that video signals are sequentially written in the latch A 815, but the present invention is not limited to this structure. A plurality of stages of latches A815 may be divided into several groups, and so-called divided driving may be performed in which video signals are input in parallel for each group. Note that the number of groups at this time is called the number of divisions. For example, when the latches are divided into groups for every four stages, it is said that the driving is divided into four.

  The time until video signal writing to all the latches of the latch A 815 is completed is called a line period. Actually, the line period may include a period in which a horizontal blanking period is added to the line period.

  When one line period ends, a latch signal (Latch Signal) is supplied to the second-stage latch B816, and the video signal held in the latch A815 in synchronization with the latch signal is written to the latch B816 all at once, Retained. In the latch A 815 that has finished sending the video signal to the latch B 816, the next video signal is sequentially written in synchronization with the timing signal from the shift register 814 again. During the second line 1-line period, the video signal written and held in the latch B 816 is input to the DAC 817.

  The DAC 817 converts the input video signal from digital to analog and supplies it to the corresponding signal line.

  Note that the structures illustrated in FIGS. 18A and 18B are one embodiment of the liquid crystal display device according to this embodiment, and the structures of the signal line driver circuit and the scan line driver circuit are not limited thereto.

  16 to 18 are not limited to the liquid crystal display device according to the present embodiment, but can be used for a light emitting device and other display devices.

  In addition, this embodiment can be combined with Embodiments 1-4 suitably.

  In this example, a mode of a light-emitting element used for the light-emitting device described in Embodiment Mode 5 will be described with reference to FIGS.

  In FIG. 8A, the first pixel electrode 11 is formed using a light-transmitting conductive film having a high work function, and the second pixel electrode 17 is formed using a conductive film having a low work function. It is an example. The first pixel electrode 11 is formed of a light-transmitting oxide conductive material, and is typically formed of an oxide conductive material containing silicon oxide at a concentration of 1 to 15 atomic%. A layer 16 containing a light emitting material in which a hole injection layer or hole transport layer 41, a light emitting layer 42, an electron transport layer or an electron injection layer 43 are stacked is provided thereon. The second pixel electrode 17 is formed of a first electrode layer 33 containing a simple substance, compound or alloy of alkali metal or alkaline earth metal such as LiF or MgAg and a second electrode layer 34 formed of a metal material such as aluminum. is doing. A pixel having this structure can emit light from the first pixel electrode 11 side as indicated by an arrow in the figure.

  In FIG. 8B, the first pixel electrode 11 is formed using a conductive film having a high work function, and the second pixel electrode 17 is formed using a light-transmitting conductive film having a low work function. It is an example. The first pixel electrode 11 includes a first electrode layer 35 formed of a metal material such as aluminum or titanium, or a metal material containing nitrogen at a concentration equal to or lower than the stoichiometric composition ratio of the metal, and silicon oxide 1-15. It is formed in a stacked structure with the second electrode layer 32 formed of an oxide conductive material containing at a concentration of atomic%. A layer 16 containing a light emitting material in which a hole injection layer or hole transport layer 41, a light emitting layer 42, an electron transport layer or an electron injection layer 43 are stacked is provided thereon. The second pixel electrode 17 includes a third electrode layer 33 containing a simple substance, compound or alloy of alkali metal or alkaline earth metal such as LiF or CaF, and a fourth electrode layer 34 formed of a metal material such as aluminum. Form. By setting any layer of the second electrode to a thickness of 100 nm or less so that light can be transmitted, it is possible to emit light from the second pixel electrode 17 as indicated by an arrow in the figure. It becomes.

  FIG. 8E illustrates an example in which light is emitted from both directions, that is, from the first electrode and the second electrode. A conductive film having a light-transmitting property and a large work function is formed on the first pixel electrode 11. In addition, a conductive film having translucency and a small work function is used for the second pixel electrode 17. Typically, the first pixel electrode 11 is formed of an oxide conductive material containing silicon oxide at a concentration of 1 to 15 atomic%, and the second pixel electrode 17 is formed of LiF having a thickness of 100 nm or less. And the third electrode layer 33 containing a simple substance, compound or alloy of an alkali metal or alkaline earth metal such as CaF, and the fourth electrode layer 34 formed of a metal material such as aluminum. As shown in FIG. 5, light can be emitted from both sides of the first pixel electrode 11 and the second pixel electrode 17.

  In FIG. 8C, the first pixel electrode 11 is formed using a light-transmitting conductive film having a low work function, and the second pixel electrode 17 is formed using a conductive film having a high work function. It is an example. A structure in which a layer containing a light emitting substance is laminated in the order of an electron transport layer or electron injection layer 43, a light emitting layer 42, a hole injection layer or a hole transport layer 41 is shown. The second pixel electrode 17 includes a second electrode layer 32 formed of an oxide conductive material containing silicon oxide at a concentration of 1 to 15 atomic% from the side of the layer 16 containing a light emitting substance, a metal such as aluminum or titanium, Alternatively, the first electrode layer 35 is formed using a stacked structure of a metal material containing nitrogen at a concentration equal to or less than the stoichiometric composition ratio to the metal. The first pixel electrode 11 includes a third electrode layer 33 containing a simple substance, compound or alloy of an alkali metal or alkaline earth metal such as LiF or CaF, and a fourth electrode layer 34 formed of a metal material such as aluminum. Although each layer is formed to have a thickness of 100 nm or less so that light can be transmitted, light can be emitted from the first pixel electrode 11 as indicated by an arrow in the figure. .

  8D, the first pixel electrode 11 is formed using a conductive film having a low work function, and the second pixel electrode 17 is formed using a light-transmitting conductive film having a high work function. It is an example. A structure in which a layer containing a light emitting substance is laminated in the order of an electron transport layer or electron injection layer 43, a light emitting layer 42, a hole injection layer or a hole transport layer 41 is shown. The first pixel electrode 11 has the same structure as that in FIG. 8A and is formed to have a thickness enough to reflect light emitted from a layer containing a light-emitting substance. The second pixel electrode 17 is made of an oxide conductive material containing silicon oxide at a concentration of 1 to 15 atomic%. In this structure, by forming the hole injection layer with an inorganic metal oxide (typically molybdenum oxide or vanadium oxide), oxygen introduced when forming the second electrode layer 32 is supplied. Thus, the hole injecting property is improved and the driving voltage can be lowered. In addition, by forming the second pixel electrode 17 with a light-transmitting conductive film, it is possible to emit light from both sides of the second pixel electrode 17 as indicated by arrows in the drawing. Become.

  FIG. 8F illustrates an example in which light is emitted from both directions, that is, from the first pixel electrode and the second pixel electrode. The first pixel electrode 11 has a light-transmitting property and has a small work function. A film is used, and a conductive film having translucency and a large work function is used for the second pixel electrode 17. Typically, the first pixel electrode 11 includes a third electrode layer 33 containing a simple substance, compound or alloy of an alkali metal or alkaline earth metal such as LiF or CaF having a thickness of 100 nm or less, and aluminum. The fourth electrode layer 34 is formed using a metal material, and the second pixel electrode 17 may be formed using an oxide conductive material containing silicon oxide at a concentration of 1 to 15 atomic%.

  Note that, as described above, the layer 16 containing a light emitting substance is formed of a charge injecting and transporting substance containing an organic compound or an inorganic compound and a light emitting material, and low molecular organic compounds and medium molecular organic compounds ( An organic compound having no sublimation property and having a chain molecule length of 10 μm or less, typically a dendrimer, an oligomer, etc.), one or a plurality of layers selected from high molecular organic compounds Further, it may be combined with an inorganic compound having an electron injecting / transporting property or a hole injecting / transporting property.

Among the charge injecting and transporting substances, substances having a particularly high electron transporting property include, for example, tris (8-quinolinolato) aluminum (abbreviation: Alq ₃ ), tris (4-methyl-8-quinolinolato) aluminum (abbreviation: Almq ₃ ), Bis (10-hydroxybenzo [h] -quinolinato) beryllium (abbreviation: BeBq ₂ ), bis (2-methyl-8-quinolinolato) -4-phenylphenolato-aluminum (abbreviation: BAlq), quinoline skeleton or benzoquinoline Examples thereof include metal complexes having a skeleton.

As a substance having a high hole-transport property, for example, 4,4′-bis [N- (1-naphthyl) -N-phenyl-amino] -biphenyl (abbreviation: α-NPD) or 4,4′-bis [N- (3-methylphenyl) -N-phenyl-amino] -biphenyl (abbreviation: TPD) or 4,4 ′, 4 ″ -tris (N, N-diphenyl-amino) -triphenylamine (abbreviation: Aromatic amine systems such as TDATA), 4,4 ′, 4 ″ -tris [N- (3-methylphenyl) -N-phenyl-amino] -triphenylamine (abbreviation: MTDATA) (ie, benzene ring— Compound having a nitrogen bond).

Among the charge injecting and transporting materials, materials having particularly high electron injecting properties include alkali metals or alkaline earths such as lithium fluoride (LiF), cesium fluoride (CsF), calcium fluoride (CaF ₂ ) and the like. Metal compounds can be mentioned. In addition, a mixture of a substance having a high electron transport property such as Alq3 and an alkaline earth metal such as magnesium (Mg) may be used.

Among the charge injection / transport materials, examples of the material having a high hole injection property include molybdenum oxide (MoO _x ), vanadium oxide (VO _x ), ruthenium oxide (RuO _x ), and tungsten oxide (WO _x ). And metal oxides such as manganese oxide (MnO _x ). In addition, phthalocyanine compounds such as phthalocyanine (abbreviation: H ₂ Pc) and copper phthalocyanine (CuPc) can be given.

  The light emitting layer 42 may be configured to perform color display by forming light emitting layers having different emission wavelength bands for each pixel. Typically, a light emitting layer corresponding to each color of R (red), G (green), and B (blue) is formed. In this case as well, by providing a filter (colored layer) that transmits light in the emission wavelength band on the light emission side of the pixel, the color purity is improved and the pixel portion is mirrored (reflected). Prevention can be achieved. By providing the filter (colored layer), it is possible to omit a circularly polarized plate that has been considered necessary in the past, and it is possible to eliminate the loss of light emitted from the light emitting layer. Furthermore, a change in color tone that occurs when the pixel portion (display screen) is viewed obliquely can be reduced.

There are various light emitting materials for forming the light emitting layer 42. In a low molecular weight organic light emitting material, 4- (dicyanomethylene) -2-methyl-6- [2- (1,1,7,7-tetramethyljulolidin-9-yl) ethenyl] -4H-pyran (abbreviation) : DCJT), 4-dicyanomethylene-2-t-butyl-6- [2- (1,1,7,7-tetramethyljulolidyl-9-yl) ethenyl] -4H-pyran (abbreviation: DCJTB) , Periflanthene, 2,5-dicyano-1,4-bis [2- (10-methoxy-1,1,7,7-tetramethyljulolidin-9-yl) ethenyl] benzene, N, N′-dimethylquinacridone (Abbreviation: DMQd), coumarin 6, coumarin 545T, tris (8-quinolinolato) aluminum (abbreviation: Alq ₃ ), 9,9′-bianthryl, 9,10-diphenylanthracene (abbreviation: DP) A), 9,10-bis (2-naphthyl) anthracene (abbreviation: DNA), and the like can be used. Other substances may also be used.

On the other hand, the high molecular organic light emitting material has higher physical strength than the low molecular weight material, and the durability of the device is high. In addition, since the film can be formed by coating, the device can be manufactured relatively easily. The structure of a light emitting element using a polymer organic light emitting material is basically the same as that of using a low molecular weight organic light emitting material, and is a structure in which a cathode, a layer containing a light emitting substance, and an anode are laminated in this order. . However, when forming a layer containing a light emitting material using a high molecular weight organic light emitting material, it is difficult to form a layered structure as in the case of using a low molecular weight organic light emitting material, and in many cases two layers are formed. It becomes a structure. Specifically, it is a structure in which a cathode, a light emitting layer, a hole transport layer, and an anode are laminated in this order.

  Since the light emission color is determined by the material for forming the light emitting layer, a light emitting element exhibiting desired light emission can be formed by selecting these materials. Examples of the polymer light emitting material that can be used for forming the light emitting layer include polyparaphenylene vinylene, polyparaphenylene, polythiophene, and polyfluorene.

  Examples of the polyparaphenylene vinylene include poly (paraphenylene vinylene) [PPV] derivatives, poly (2,5-dialkoxy-1,4-phenylene vinylene) [RO-PPV], poly (2- (2′- Ethyl-hexoxy) -5-methoxy-1,4-phenylenevinylene) [MEH-PPV], poly (2- (dialkoxyphenyl) -1,4-phenylenevinylene) [ROPh-PPV] and the like. Examples of polyparaphenylene include derivatives of polyparaphenylene [PPP], poly (2,5-dialkoxy-1,4-phenylene) [RO-PPP], poly (2,5-dihexoxy-1,4-phenylene). ) And the like. The polythiophene series includes polythiophene [PT] derivatives, poly (3-alkylthiophene) [PAT], poly (3-hexylthiophene) [PHT], poly (3-cyclohexylthiophene) [PCHT], poly (3-cyclohexyl). -4-methylthiophene) [PCHMT], poly (3,4-dicyclohexylthiophene) [PDCHT], poly [3- (4-octylphenyl) -thiophene] [POPT], poly [3- (4-octylphenyl) -2,2 bithiophene] [PTOPT] and the like. Examples of the polyfluorene series include polyfluorene [PF] derivatives, poly (9,9-dialkylfluorene) [PDAF], poly (9,9-dioctylfluorene) [PDOF], and the like.

  Note that when a hole-transporting polymer-based organic light-emitting material is sandwiched between an anode and a light-emitting polymer-based organic light-emitting material, hole injection properties from the anode can be improved. In general, an acceptor material dissolved in water is applied by spin coating or the like. In addition, since it is insoluble in an organic solvent, it can be stacked with the above-described light-emitting material. Examples of the hole-transporting polymer organic light-emitting material include a mixture of PEDOT and camphor sulfonic acid (CSA) as an acceptor material, a mixture of polyaniline [PANI] and polystyrene sulfonic acid [PSS] as an acceptor material, and the like. .

  The light emitting layer 42 can be configured to emit monochromatic or white light. In the case of using a white light emitting material, color display can be made possible by providing a filter (colored layer) that transmits light of a specific wavelength on the light emission side of the pixel.

To form a light emitting layer that emits white light, for _{example, Alq 3, Alq 3, Alq} 3 added with Nile Red which is partly red light emitting pigment, p-EtTAZ, by TPD (aromatic diamine) evaporation A white color can be obtained by sequentially laminating. Moreover, when forming a light emitting layer by the apply | coating method using spin coating, after apply | coating, it is preferable to bake by vacuum heating. For example, a poly (ethylenedioxythiophene) / poly (styrenesulfonic acid) aqueous solution (PEDOT / PSS) that acts as a hole injection layer is applied and baked on the entire surface, and then a luminescent center dye (1, 1,4,4-tetraphenyl-1,3-butadiene (TPB), 4-dicyanomethylene-2-methyl-6- (p-dimethylamino-styryl) -4H-pyran (DCM1), Nile Red, Coumarin 6 Etc.) may be applied and fired over the entire surface.

  The light emitting layer can also be formed as a single layer, and an electron transporting 1,3,4-oxadiazole derivative (PBD) may be dispersed in hole transporting polyvinyl carbazole (PVK). Further, white light emission can be obtained by dispersing 30 wt% PBD as an electron transporting agent and dispersing an appropriate amount of four kinds of dyes (TPB, coumarin 6, DCM1, Nile red). In addition to the light-emitting element that can emit white light as shown here, a light-emitting element that can obtain red light emission, green light emission, or blue light emission can be manufactured by appropriately selecting the material of the light-emitting layer.

  Note that when a hole-transporting polymer-based organic light-emitting material is sandwiched between an anode and a light-emitting polymer-based organic light-emitting material, hole injection properties from the anode can be improved. In general, an acceptor material dissolved in water is applied by spin coating or the like. In addition, since it is insoluble in an organic solvent, it can be stacked with the above-described light-emitting organic light-emitting material. Examples of the hole-transporting polymer organic light-emitting material include a mixture of PEDOT and camphor sulfonic acid (CSA) as an acceptor material, a mixture of polyaniline [PANI] and polystyrene sulfonic acid [PSS] as an acceptor material, and the like. .

  Further, for the light emitting layer 42, a triplet excitation material including a metal complex or the like may be used in addition to the singlet excitation light emitting material. For example, among red light emitting pixels, green light emitting pixels, and blue light emitting pixels, a red light emitting pixel having a relatively short luminance half time is formed of a triplet excitation light emitting material, and the other A singlet excited luminescent material is used. The triplet excited luminescent material has a feature that the light emission efficiency is good, so that less power is required to obtain the same luminance. That is, when applied to a red pixel, the amount of current flowing through the light emitting element can be reduced, so that reliability can be improved. As a reduction in power consumption, a red light-emitting pixel and a green light-emitting pixel may be formed using a triplet excitation light-emitting material, and a blue light-emitting pixel may be formed using a singlet excitation light-emitting material. By forming a green light-emitting element having high human visibility with a triplet excited light-emitting material, power consumption can be further reduced.

  Examples of triplet excited luminescent materials include those using a metal complex as a dopant, and metal complexes having a third transition series element platinum as the central metal and metal complexes having iridium as the central metal are known. Yes. The triplet excited light-emitting material is not limited to these compounds, and a compound having the above structure and having an element belonging to group 8 to 10 in the periodic table as a central metal can also be used.

  The substances forming the layer containing the light-emitting substance listed above are examples, and examples thereof include a hole injection transport layer, a hole transport layer, an electron injection transport layer, an electron transport layer, a light emission layer, an electron block layer, and a hole block layer. A light-emitting element can be formed by appropriately stacking functional layers. Moreover, you may form the mixed layer or mixed junction which combined these each layer. The layer structure of the light-emitting layer can be changed, and instead of having a specific electron injection region or light-emitting region, it is possible to provide a modification with an electrode for this purpose or a dispersed light-emitting material. Can be permitted without departing from the spirit of the present invention.

  In this embodiment, a pixel circuit of a display panel of a light-emitting device according to the present invention and an operation configuration thereof will be described with reference to FIGS. There are two types of operation configurations of the display panel, in which a video signal input to a pixel is defined by voltage and a current is defined by current in a display device in which a video signal is digital. There are two types of video signals defined by voltage, one having a constant voltage applied to the light emitting element (CVCV) and one having a constant current applied to the light emitting element (CVCC). In addition, a video signal is defined by current, there are a constant voltage applied to the light emitting element (CCCV) and a constant current applied to the light emitting element (CCCC). In this embodiment, a pixel that performs a CVCV operation will be described with reference to FIGS. A pixel that performs the CVCC operation will be described with reference to FIGS.

In the pixel shown in FIGS. 9A and 9B, a signal line 3710 and a power supply line 3711 are arranged in the column direction, and a scanning line 3714 is arranged in the row direction. In addition, the pixel includes a switching TFT 3701, a driving TFT 3703, a capacitor element 3702, and a light emitting element 3705.

Note that the switching TFT 3701 and the driving TFT 3703 operate in a linear region when turned on. The driving TFT 3703 has a role of controlling whether or not a voltage is applied to the light emitting element 3705. Both TFTs preferably have the same conductivity type in terms of manufacturing process. In this embodiment, the switching TFT 3701 is an n-channel TFT and the driving TFT 3703 is a p-channel TFT. The driving TFT 3703 may be a depletion type TFT as well as an enhancement type. The ratio (W / L) of the channel width W to the channel length L (W / L) of the driving TFT 3703 is preferably 1 to 1000 depending on the mobility of the TFT. The larger the W / L, the better the electrical characteristics of the TFT.

In the pixel shown in FIGS. 9A and 9B, the switching TFT 3701 controls input of a video signal to the pixel. When the switching TFT 3701 is turned on, the video signal is input into the pixel. Then, the voltage of the video signal is held in the capacitor 3702.

  9A, in the case where the power supply line 3711 is Vss and the counter electrode of the light emitting element 3705 is Vdd, that is, in FIGS. 8C and 8D, the counter electrode of the light emitting element is an anode, and the driving TFT 3703 The electrode connected to is a cathode. In this case, luminance unevenness due to characteristic variations of the driving TFT 3703 can be suppressed.

  9A, in the case where the power supply line 3711 is Vdd and the counter electrode of the light emitting element 3705 is Vss, that is, in FIGS. 8A and 8B, the counter electrode of the light emitting element is a cathode, and the driving TFT 3703 The electrode connected to is the anode. In this case, when a video signal having a voltage higher than Vdd is input to the signal line 3710, the voltage of the video signal is held in the capacitor 3702, and the driving TFT 3703 operates in a linear region. It is possible to improve.

The pixel shown in FIG. 9B has the same pixel structure as that shown in FIG. 9A except that a TFT 3706 and a scanning line 3715 are added.

The TFT 3706 is controlled to be turned on or off by a newly arranged scanning line 3715. When the TFT 3706 is turned on, the charge held in the capacitor 3702 is discharged, and the driving TFT 3703 is turned off. That is, the arrangement of the TFT 3706 can forcibly create a state in which no current flows through the light emitting element 3705. Therefore, the TFT 3706 can be called an erasing TFT. Accordingly, the structure in FIG. 9B can improve the light emission duty ratio because the lighting period can be started simultaneously with or immediately after the start of the writing period without waiting for signal writing to all the pixels. Is possible.

In the pixel having the above operation configuration, the current value of the light-emitting element 3705 can be determined by the driving TFT 3703 that operates in a linear region. With the above structure, variation in TFT characteristics can be suppressed, and luminance unevenness of a light-emitting element due to variation in TFT characteristics can be improved, so that a display device with improved image quality can be provided.

Next, a pixel that performs the CVCC operation will be described with reference to FIGS. In the pixel illustrated in FIG. 9C, a power supply line 3712 and a current control TFT 3704 are provided in the pixel configuration illustrated in FIG.

The pixel shown in FIG. 9E is the same as the pixel shown in FIG. 9C except that the gate electrode of the driving TFT 3703 is connected to the power supply line 3712 arranged in the row direction. It is a configuration. That is, both pixels shown in FIGS. 9C and 9E show the same equivalent circuit diagram. However, in the case where the power supply line 3712 is arranged in the row direction (FIG. 9C) and in the case where the power supply line 3712 is arranged in the column direction (FIG. 9E), each power supply line is in a different layer. It is formed with the formed conductive film. Here, attention is paid to the wiring to which the gate electrode of the driving TFT 3703 is connected, and FIGS.

Note that the switching TFT 3701 operates in a linear region, and the driving TFT 3703 operates in a saturation region. The driving TFT 3703 has a role of controlling a current value flowing through the light emitting element 3705, and the current controlling TFT 3704 has a role of operating in a saturation region and controlling supply of current to the light emitting element 3705.

9D and 9F are the same as those shown in FIGS. 9C and 9E, respectively, except that an erasing TFT 3706 and a scanning line 3715 are added to the pixels shown in FIGS. 9C and 9E. The pixel configuration is the same as shown in (E).

Note that the CVCC operation can also be performed in the pixels shown in FIGS. 9A and 9B. In addition, in the pixel having the operation configuration shown in FIGS. 9C to 9F, Vdd and Vss are appropriately changed depending on the direction of current flow of the light-emitting element, as in FIGS. 9A and 9B. Is possible.

In the pixel having the above structure, since the current control TFT 3704 operates in a linear region, a slight change in Vgs of the current control TFT 3704 does not affect the current value of the light emitting element 3705. That is, the current value of the light emitting element 3705 can be determined by the driving TFT 3703 operating in the saturation region. With the above structure, it is possible to provide a display device in which luminance unevenness of a light-emitting element due to variation in TFT characteristics is improved and image quality is improved.

Note that although a structure including the capacitor 3702 is shown, the present invention is not limited to this, and the capacitor 3702 is not provided in the case where the capacity for holding a video signal can be covered by a gate capacitor or the like. May be.

Such an active matrix display device is considered to be advantageous when the pixel density increases, because each pixel is provided with a TFT and can be driven at a low voltage.

In the display device according to the present invention, the screen display driving method is not particularly limited. For example, a dot sequential driving method, a line sequential driving method, a surface sequential driving method, or the like may be used. Typically, a line sequential driving method is used, and a time-division gray scale driving method or an area gray scale driving method may be used as appropriate. The video signal input to the source line of the display device may be an analog signal or a digital signal, and a drive circuit or the like may be designed in accordance with the video signal as appropriate.

In this embodiment, mounting of a driving circuit according to the present invention will be described with reference to FIG.

As shown in FIG. 10A, a signal line driver circuit 1402 and scan line driver circuits 1403a and 1403b are mounted around the pixel portion 1401. In FIG. 10A, as a signal line driver circuit 1402 and scanning line driver circuits 1403a and 1403b, a mounting method using a known anisotropic conductive adhesive and an anisotropic conductive film, a COG method, wire bonding The IC chip 1405 is mounted on the substrate 1400 by a method, a reflow process using a solder bump, or the like. Here, the COG method is used. Then, an IC chip and an external circuit are connected via an FPC (flexible printed circuit) 1406.

10B, in the case where a semiconductor element typified by a TFT is formed using an oxide semiconductor, the pixel portion 1401, the scan line driver circuits 1403a and 1403b, and the like are formed over the substrate, and signal lines are formed. The driver circuit 1402 and the like may be separately mounted as an IC chip. In FIG. 10B, an IC chip 1405 is mounted on a substrate 1400 as a signal line driver circuit 1402 by a COG method. Then, the IC chip and an external circuit are connected through the FPC 1406.

Further, as shown in FIG. 10C, the signal line driver circuit 1402 and the like may be mounted by a TAB method instead of the COG method. Then, the IC chip and an external circuit are connected through the FPC 1406. In FIG. 10C, the signal line driver circuit is mounted by a TAB method; however, the scan line driver circuit may be mounted by a TAB method.

  When the IC chip is mounted by the TAB method, a pixel portion can be provided larger than the substrate, and a narrow frame can be achieved.

  The IC chip is formed using a silicon wafer, but an IC (hereinafter referred to as a driver IC) in which an IC is formed on a glass substrate may be provided instead of the IC chip. Since an IC chip is taken out from a circular silicon wafer, the shape of the base substrate is limited. On the other hand, the driver IC has a mother substrate made of glass and has no restriction in shape, so that productivity can be improved. Therefore, the shape of the driver IC can be set freely. For example, when the length of the long side of the driver IC is 15 to 80 mm, the required number can be reduced as compared with the case where the IC chip is mounted. As a result, the number of connection terminals can be reduced, and the manufacturing yield can be improved.

  The driver IC can be formed using a crystalline semiconductor formed over a substrate, and the crystalline semiconductor is preferably formed by irradiation with continuous wave laser light. A semiconductor film obtained by irradiation with continuous wave laser light has few crystal defects and large crystal grains. As a result, a transistor having such a semiconductor film has favorable mobility and response speed, can be driven at high speed, and is suitable for a driver IC. The driver IC may be formed using an oxide semiconductor film in which the crystallinity of at least the channel formation region of the present invention is improved.

  In this embodiment, a display module according to the present invention will be described. Here, a liquid crystal module is shown as an example of a display module with reference to FIG.

A substrate 1601 and a counter substrate 1602 are fixed to each other with a sealant 1600, and a pixel portion 1603 and a liquid crystal layer 1604 are provided therebetween to form a display region.

  The colored layer 1605 is necessary when performing color display. In the case of the RGB method, a colored layer corresponding to each color of red, green, and blue is provided corresponding to each pixel. Polarizers 1606 and 1607 are provided outside the substrate 1601 and the counter substrate 1602. In addition, a protective film 1616 is formed on the surface of the polarizing plate 1606 to reduce external impact.

  A wiring substrate 1610 is connected to a connection terminal 1608 provided on the substrate 1601 through an FPC 1609. The wiring board 1610 incorporates a pixel drive circuit (IC chip, driver IC, etc.), an external circuit 1612 such as a control circuit and a power supply circuit.

  The cold cathode tube 1613, the reflecting plate 1614, and the optical film 1615 are backlight units, which serve as light sources and project light onto the liquid crystal display panel. A liquid crystal panel, a light source, a wiring board, an FPC, and the like are held and protected by a bezel 1617.

In this embodiment, as an electronic apparatus according to the present invention, a television device (also simply referred to as a television or a television receiver), a digital camera, a digital video camera, a mobile phone device (also simply referred to as a mobile phone or a mobile phone), A portable information terminal such as a PDA, a portable game machine, a computer monitor, a computer, an audio reproduction device such as a car audio, and an image reproduction device including a recording medium such as a home game machine will be described with reference to the drawings. .

A portable information terminal illustrated in FIG. 12A includes a main body 9201, a display portion 9202, and the like. By using the display device which is one embodiment of the present invention, a portable information terminal can be provided at low cost.

A digital video camera shown in FIG. 12B includes a display portion 9701, a display portion 9702, and the like. By using the display device which is one embodiment of the present invention, a digital video camera can be provided at low cost.

A portable terminal illustrated in FIG. 12C includes a main body 9101, a display portion 9102, and the like. As the display portion 9102, the display modes in Embodiment Modes 1 to 5 and Examples 1 to 4 can be applied. By using the display device which is one embodiment of the present invention, a portable terminal can be provided at low cost.

A portable television device shown in FIG. 12D includes a main body 9301, a display portion 9302, and the like. By using the display device which is one embodiment of the present invention, a portable television device can be provided at low cost. Such a television device can be widely applied from a small one mounted on a portable terminal such as a cellular phone to a medium-sized one that can be carried and a large one (for example, 40 inches or more). .

A portable computer shown in FIG. 12E includes a main body 9401, a display portion 9402, and the like. By using the display device which is one embodiment of the present invention, a portable computer can be provided at low cost.

A television device illustrated in FIG. 12F includes a main body 9501, a display portion 9502, and the like. By using the display device which is one embodiment of the present invention, a television device can be provided at low cost.

Among the electronic devices listed above, those using a secondary battery can extend the usage time of the electronic device as much as power consumption is reduced, and can save the trouble of charging the secondary battery.

  In this embodiment, the configuration of the LRTA apparatus used in the present invention will be described with reference to FIG.

  In FIG. 19A, a gate electrode 1922, gate insulating films 1923a and 1923b, and an oxide semiconductor film 1902 are formed over a glass substrate 1901. Further, an infrared light lamp 1903 is provided on the lower surface side of the substrate, and an ultraviolet light lamp 1904 is provided on the upper surface side of the substrate. A first infrared light auxiliary lamp 1905 and a second infrared light auxiliary lamp 1906 are arranged in parallel with the ultraviolet light lamp 1904. Note that the first infrared light auxiliary lamp 1905 and the second infrared light auxiliary lamp 1906 are not necessarily provided.

  In this embodiment, the first infrared light auxiliary lamp 1905 and the second infrared light auxiliary light lamp 1906 are arranged in front of and behind the ultraviolet light lamp 1904 (relative to the moving direction of the substrate). However, it can also be set as the structure arrange | positioned only to one side.

  In the configuration as described above, each lamp (infrared light lamp 1903 to second auxiliary infrared light lamp 1906) moves in the direction of the arrow in the drawing to scan linear light. In the structure of this embodiment, first, infrared light is emitted from the first infrared light auxiliary lamp 1905 to a region 1908 indicated by a dotted line of the oxide semiconductor film 1902 which overlaps with the gate electrode 1922 through the gate insulating films 1923a and 1923b. Irradiated and heated. As the substrate moves, it moves forward. Each lamp is moved when the substrate is irradiated with the lamp. However, the glass substrate 1901 may be moved, or both the lamp and the substrate may be moved.

  After irradiation with the first auxiliary infrared light lamp 1905, ultraviolet light from the ultraviolet light lamp 1904 is irradiated from the upper surface side of the substrate, and infrared light from the infrared light lamp 1903 is irradiated from the lower surface side of the substrate. A region 1908 of the oxide semiconductor film 1902 which overlaps with the 1922 is heated. In this embodiment, this region 1908 is preferentially crystallized in the oxide semiconductor film 1902.

  A region 1908 heated by irradiation from the ultraviolet lamp 1904 and the infrared lamp 1903 is heated by infrared light from the second infrared auxiliary lamp 1906 disposed behind the ultraviolet lamp 1904. Irradiation of infrared light from the second infrared light auxiliary lamp 1906 is provided to further heat the region 1908 where crystallization is promoted.

  As described above, the region 1908 that overlaps with the gate electrode 1922 in the oxide semiconductor film 1902 (a region that becomes a crystalline oxide semiconductor film from the middle) 1908 apparently moves forward as the substrate moves.

  Here, FIG. 19B illustrates the relationship between time (Time) and temperature (Temp.) In the region 1908 of the oxide semiconductor film 1902. As shown in FIG. 19B, first, the preheated (preheated) state is entered with the passage of time, followed by the main heated (mainheated) state and the postheated (postheated) state.

  As is clear from FIG. 19B, the temperature is increased to some extent in the preheating state, and plays a role of relaxing the temperature gradient with the next main heating state. This is a contrivance for preventing accumulation of strain energy or the like in the oxide semiconductor film due to rapid heating in the main heat state.

  Therefore, it is desirable to set the output energy of the first infrared light auxiliary lamp 1905 to be smaller than the output energy of the infrared light lamp 1903. At this time, the practitioner may appropriately determine what temperature gradient is adjusted to form.

  Next, when the preheat state is passed, infrared light is irradiated from the lower surface side of the substrate, and the film surface temperature is increased to 250 to 570 ° C. to become a main heat state. In this state, the region 1908 in the oxide semiconductor film 1902 has favorable crystallinity. In addition, since the ultraviolet light irradiated simultaneously contributes to electronic excitation, it does not bring about a thermal change.

  The region 1908 having improved crystallinity obtained in the main heat state is heated by the second infrared light auxiliary lamp 1906 disposed behind the ultraviolet light lamp 1904. This post-heat state serves to prevent crystallization from ending in a state in which thermal equilibrium is lost due to rapid cooling in the main heat state. This is a contrivance for obtaining the most stable bonding state by allowing a sufficient time for crystallization.

  Accordingly, the second auxiliary infrared light lamp 1906 can also be adjusted so as to form a temperature gradient in which the output energy is set smaller than the infrared light lamp 1903 disposed on the lower surface of the substrate and the temperature gradually decreases. desirable.

  With such a structure, a part of the oxide semiconductor film overlapping with the gate electrode is heated, so that shrinkage of the substrate can be suppressed. Further, throughput can be increased by performing the crystallization process while moving each lamp or substrate. In addition, an oxide semiconductor having a region 1908 with excellent crystallinity is obtained by suppressing generation of crystal defects such as stress strain and dangling bonds that can be generated by rapid heating of the oxide semiconductor film and rapid cooling of the crystalline oxide semiconductor film. A membrane can be obtained.

  In addition, heat applied to the substrate may be suppressed by performing irradiation heating without providing the first infrared light auxiliary lamp 1905 and the second infrared light auxiliary lamp 1906.

  In this embodiment, the configuration of the LRTA apparatus using a linear lamp has been described, but the crystallization process may be performed using a planar lamp.

  In this embodiment, an example in which a semiconductor device according to the present invention is applied to an electrophoretic display device will be described with reference to FIG.

The electrophoretic display device illustrated in FIG. 20 includes a main body 2010, a pixel portion 2011 that displays an image, a driver IC 2012, a receiving device 2013, a film battery 2014, and the like. The driver IC 2012, the receiving device 2013, and the like may be mounted using semiconductor components. The semiconductor device of the present invention can be used for the pixel portion 2011 and the driver IC 2012. Note that the pixel portion 2011 has a structure in which a display layer in which microcapsules, gyricon beads, and the like are arranged and a driver layer that controls the display layer are stacked. The display layer and the driver layer are sandwiched between two plastic films.

  Such an electrophoretic display device is also referred to as electronic paper, and is extremely light and flexible. Therefore, the electrophoretic display device can be rolled into a cylindrical shape, which is very advantageous for carrying. Accordingly, a large-screen display medium can be carried freely. In addition, since the semiconductor device of the present invention is used for the pixel portion 2011 and the like, an inexpensive display device can be provided.

  Although various forms can be considered as the electrophoretic display device of this embodiment, a plurality of microcapsules including first particles having a positive charge and second particles having a negative charge are dispersed in a solvent or a solute. By applying an electric field to the microcapsule, the particles in the microcapsule are moved in opposite directions to display only the color of the particles assembled on one side. Note that the first particle or the second particle contains a dye and does not move in the absence of an electric field. In addition, the color of the first particles and the color of the second particles are different (including colorless). A solution in which microcapsules are dispersed in a solvent is referred to as electronic ink. This electronic ink can be printed on a surface of glass, plastic, cloth, paper, or the like.

  In addition, the semiconductor device of the present invention includes an indium tin oxide (ITO) that is transparent to visible light in a source electrode, a drain electrode, and the like in addition to an oxide semiconductor film that is transparent to visible light. ), A transparent conductive film containing indium tin oxide containing silicon oxide (ITSO), organic indium, organic tin, zinc oxide, titanium nitride, or the like can be used. If conventional amorphous silicon or polysilicon is used for the TFT used for the driver layer, it is necessary to provide a light-shielding film over the channel formation region so that the channel formation region is not irradiated with light. However, as in the present invention, a double-sided electrophoretic display device can be obtained by forming a driver layer using an oxide semiconductor film that is transparent to visible light, a source electrode, and a drain electrode. it can.

  Note that the semiconductor device of the present invention is used in navigation systems, sound reproduction devices (car audio, audio components, etc.), personal computers, game machines, and portable information terminals (mobile computers, mobile phones, portable game machines, electronic books, etc.). In addition, the main products range from home appliances such as refrigerators, washing machines, rice cookers, landline telephones, vacuum cleaners, thermometers, and large-area information displays such as hanging advertisements in trains and arrival / departure guides at railway stations and airports. It can be used as a means for displaying still images.

  In this embodiment, a digital audio player according to the present invention will be described with reference to FIG.

  A digital audio player shown in FIG. 21 includes a main body 2110, a display portion 2111, a memory portion 2112, an operation portion 2113, an earphone 2114, and the like. Note that headphones or wireless earphones can be used instead of the earphones 2114. As the display portion 2111, liquid crystal, organic EL, or the like can be used. By using a flash memory having a recording capacity of 20 megabytes (MB) to 200 gigabytes (GB) as the memory unit 2112, video and audio (music) can be recorded and reproduced by operating the operation unit 2113.

  Since the channel formation region of the oxide semiconductor film of the TFT included in the semiconductor device of the present invention includes at least a crystallized region, a low-cost and high-performance digital audio player can be obtained by providing the semiconductor device of the present invention in the display portion 2111. Can be provided. Further, since the channel formation region of the oxide semiconductor film is transparent and does not absorb visible light, unnecessary optical carriers are not generated. Therefore, characteristic deterioration due to light irradiation does not occur in the channel formation region, so that a highly reliable digital audio player can be provided.

  This example can be appropriately combined with Embodiments 1 to 6 and Examples 1 to 4.

8A and 8B are cross-sectional views illustrating a manufacturing process of a semiconductor device according to the invention. 4A and 4B illustrate temperature dependency of crystallization of an oxide semiconductor film of the present invention. 8A and 8B are cross-sectional views illustrating a manufacturing process of a semiconductor device according to the invention. 8A and 8B are cross-sectional views illustrating a manufacturing process of a semiconductor device according to the invention. 8A and 8B are cross-sectional views illustrating a manufacturing process of a semiconductor device according to the invention. 8A and 8B are cross-sectional views illustrating a manufacturing process of a semiconductor device according to the invention. 1 is a cross-sectional view of a semiconductor device according to the present invention. FIG. 9 illustrates a mode of a light-emitting element according to the present invention. 4A and 4B illustrate a pixel circuit and an operation structure of a display panel according to the present invention. The figure explaining mounting of the drive circuit which concerns on this invention. FIG. 6 illustrates a display module according to the present invention. 10A and 10B each illustrate an example of an electronic device. 1 is a cross-sectional view of a semiconductor device according to the present invention. 6A and 6B are a circuit diagram and a cross-sectional view of a pixel in a semiconductor device of the present invention. 1 is a cross-sectional view of a semiconductor device according to the present invention. FIG. 6 is a diagram showing one embodiment of an element substrate in a semiconductor device of the present invention. FIG. 6 is a diagram showing one embodiment of an element substrate in a semiconductor device of the present invention. 1 is a block diagram illustrating a configuration of a semiconductor device of the present invention. The figure which shows the structure of the LRTA apparatus which concerns on this invention. 8A and 8B each illustrate an example of an electronic device according to the invention. 8A and 8B each illustrate an example of an electronic device according to the invention.

Explanation of symbols

101 Substrate 102 Base film 103 Gate electrode 104 Gate insulating film 105 Wiring 106 Oxide semiconductor film 107 First oxide semiconductor region 108 Second oxide semiconductor region 301 Substrate 302 Base film 303 Gate electrode 304 Gate insulating film 305 Oxide Semiconductor film 306 Wiring 307 Wiring 308 First oxide semiconductor region 309 Second oxide semiconductor region 400 Substrate 401 Conductive film 402 Gate electrode 403a Gate insulating film 403b Gate insulating film 404 Oxide semiconductor film 405 Protective film 406 Resist 407 Channel Protective film 408 Mask 409 Oxide semiconductor film 411 First conductive film 412 Second conductive film 413 Mask 414a First conductive film 414b First conductive film 415a Second conductive film 415b Second conductive film 424 Region 434 region

Claims (19)

A gate electrode, an insulating film, and an oxide semiconductor film on the substrate;
The semiconductor device characterized in that the oxide semiconductor film has a partially crystallized region in a region overlapping with the gate electrode with the insulating film interposed therebetween. A gate electrode, an insulating film, an oxide semiconductor film, and a conductive film on the substrate;
The conductive film is provided in contact with the oxide semiconductor film;
The semiconductor device characterized in that the oxide semiconductor film has a partially crystallized region in a region overlapping with the gate electrode with the insulating film interposed therebetween.   3. The semiconductor device according to claim 2, wherein the gate electrode has a lower reflectivity with respect to a light source used for crystallization of the oxide semiconductor film than the conductive film.   The semiconductor device according to claim 2, wherein the gate electrode has a higher heat absorption rate with respect to a light source used for crystallization of the oxide semiconductor film than the conductive film.   3. The semiconductor device according to claim 2, wherein the conductive film includes one or more selected from Al, Ti, Cu, Au, Ag, Mo, Ni, Ta, Zr, Cr, Co, and W. 6. The oxide semiconductor film according to claim 1, wherein the oxide semiconductor film includes zinc oxide, titanium oxide, magnesium zinc oxide, cadmium zinc oxide, cadmium oxide, InGaO ₃ (ZnO) _5, and In—Ga—Zn—. A semiconductor device selected from an O-based amorphous oxide semiconductor.   7. The semiconductor device according to claim 1, wherein the oxide semiconductor film is formed by a sputtering method.   An electronic apparatus comprising the semiconductor device according to claim 1. Forming a gate electrode on the substrate;
Forming an insulating film covering the gate electrode;
Forming an oxide semiconductor film on the insulating film;
A method for manufacturing a semiconductor device, characterized in that a part of the oxide semiconductor film overlapping with the gate electrode is crystallized by lamp-heating the gate electrode. Forming a gate electrode on the substrate;
Forming an insulating film covering the gate electrode;
Forming an oxide semiconductor film on the insulating film;
Forming a first oxide semiconductor region and a second oxide semiconductor region in the oxide semiconductor film by lamp heating the gate electrode;
The method for manufacturing a semiconductor device, wherein the first oxide semiconductor region formed in a position overlapping with the gate electrode has higher crystallinity than the second oxide semiconductor region. Forming a gate electrode on the substrate;
Forming an insulating film covering the gate electrode;
Forming a conductive film on the insulating film;
Forming an oxide semiconductor film over the insulating film and the conductive film;
A method for manufacturing a semiconductor device, wherein a portion of the oxide semiconductor film is selectively crystallized by lamp-heating the gate electrode. Forming a gate electrode on the substrate;
Forming an insulating film covering the gate electrode;
Forming an oxide semiconductor film on the insulating film;
Forming a conductive film on the oxide semiconductor film;
A method for manufacturing a semiconductor device, wherein a portion of the oxide semiconductor film is selectively crystallized by lamp-heating the gate electrode. Forming a gate electrode on the substrate;
Forming an insulating film covering the gate electrode;
Forming a conductive film on the insulating film;
Forming an oxide semiconductor film over the insulating film and the conductive film;
Forming a first oxide semiconductor region and a second oxide semiconductor region in the oxide semiconductor film by lamp heating the gate electrode;
The method for manufacturing a semiconductor device, wherein the first oxide semiconductor region formed in a position overlapping with the gate electrode has higher crystallinity than the second oxide semiconductor region. Forming a gate electrode on the substrate;
Forming an insulating film covering the gate electrode;
Forming an oxide semiconductor film on the insulating film;
Forming a conductive film on the oxide semiconductor film;
Forming a first oxide semiconductor region and a second oxide semiconductor region in the oxide semiconductor film by lamp heating the gate electrode;
The method for manufacturing a semiconductor device, wherein the first oxide semiconductor region formed in a position overlapping with the gate electrode has higher crystallinity than the second oxide semiconductor region.   15. The method for manufacturing a semiconductor device according to claim 11, wherein the gate electrode has a lower reflectance with respect to light emitted from the lamp than the conductive film.   15. The method for manufacturing a semiconductor device according to claim 11, wherein the gate electrode has a higher heat absorption rate than the conductive film.   17. The conductive film according to claim 11, wherein the conductive film uses one or more selected from Al, Ti, Cu, Au, Ag, Mo, Ni, Ta, Zr, Cr, Co, and W. A method for manufacturing a semiconductor device. 18. The oxide semiconductor film according to claim 9, wherein the oxide semiconductor film includes zinc oxide, titanium oxide, magnesium zinc oxide, cadmium zinc oxide, cadmium oxide, InGaO ₃ (ZnO) _5, and In—Ga—Zn—. A method for manufacturing a semiconductor device, which is any one selected from O-based amorphous oxide semiconductors.   The method for manufacturing a semiconductor device according to claim 9, wherein the oxide semiconductor film is formed by a sputtering method.

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