JP2007123369A - Semiconductor device and its manufacturing method - Google Patents

Semiconductor device and its manufacturing method Download PDF

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JP2007123369A
JP2007123369A JP2005310627A JP2005310627A JP2007123369A JP 2007123369 A JP2007123369 A JP 2007123369A JP 2005310627 A JP2005310627 A JP 2005310627A JP 2005310627 A JP2005310627 A JP 2005310627A JP 2007123369 A JP2007123369 A JP 2007123369A
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bumps
resin
bump
semiconductor device
semiconductor chip
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JP4697789B2 (en
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Masahide Watanabe
将英 渡辺
Takeshi Miura
剛 三浦
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Citizen Electronics Co Ltd
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Abstract

<P>PROBLEM TO BE SOLVED: To parallel semiconductor chips easily even with few bumps or at a random location of bump arrangement, and to reduce the variation in adhesive strength and in height of the semiconductor chip, in a semiconductor device and its manufacturing method. <P>SOLUTION: The semiconductor device comprises a substrate 10, a plurality of bumps 3 formed on the substrate 10, a resin 11 which is poured and solidified around the bumps 3 in such a state that the tops of the bumps 3 are exposed through it, and the semiconductor chip 12 which is placed on the resin portion 11 and is joined to the bumps 3 while smashing the tops thereof. Due to this structure, grinding the face of the semiconductor chip 12 can be done easily even with few bumps or at a random location of bump arrangement, since the bottom face of the semiconductor chip 12 is positioned by the top face of the resin portion 11 for paralleling. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

本発明は、例えばＬＥＤチップのフリップチップ実装に好適な半導体装置及びその製造方法に関する。   The present invention relates to a semiconductor device suitable for flip chip mounting of an LED chip, for example, and a manufacturing method thereof.

近年、ＩＣチップやＬＥＤ（Light Emitting Diode：発光ダイオード）チップ等の半導体ベアチップを直接フェイスダウンで基板上に実装するフリップチップボンディング技術は、パッケージの小型化や高密度化に適しているため、種々の開発が行われている。
従来、フリップチップ実装は、図６に示すように、有機回路基板１上に半導体チップ２が電極面を下面にして半田やＡｕ（金）のバンプ３を介して実装されている。この際、リフローや超音波によってバンプ３に半導体チップ２が接合され、電気的接続と固定とが行われる。そして、半導体チップ２と有機回路基板１との間には、アンダーフィル等の樹脂（図示略）が充填・固着される。 In recent years, flip chip bonding technology in which a semiconductor bare chip such as an IC chip or LED (Light Emitting Diode) chip is directly mounted face-down on a substrate is suitable for downsizing and high density of packages. Development is underway.
Conventionally, in flip chip mounting, as shown in FIG. 6, a semiconductor chip 2 is mounted on an organic circuit substrate 1 via solder or Au (gold) bumps 3 with the electrode surface facing down. At this time, the semiconductor chip 2 is bonded to the bump 3 by reflow or ultrasonic waves, and electrical connection and fixation are performed. A resin (not shown) such as underfill is filled and fixed between the semiconductor chip 2 and the organic circuit board 1.

また、より改良されたフリップチップ実装としては、例えば、特許文献１において、有機回路基板上のＩＣチップ実装領域で、ＩＣチップの半田付け部の開口部を除きソルダーレジスト膜で全面を被覆してＩＣチップをフリップチップ実装した構造が提案されている。
また、特許文献２においては、ＩＣチップと有機回路基板との間に、ＩＣチップを所定の高さに支持するドライフィルムの支柱を設けたフリップチップ実装構造が提案されている。 Further, as an improved flip chip mounting, for example, in Patent Document 1, an entire surface is covered with a solder resist film except for an opening of a soldered portion of an IC chip in an IC chip mounting region on an organic circuit board. A structure in which an IC chip is flip-chip mounted has been proposed.
Further, Patent Document 2 proposes a flip chip mounting structure in which a dry film column supporting an IC chip at a predetermined height is provided between the IC chip and the organic circuit board.

特開２００１−６８５８４号公報（特許請求の範囲、図１）JP 2001-65884 A (Claims, FIG. 1) 特開２００１−６８５０５号公報（特許請求の範囲、図１）JP 2001-68505 A (Claims, FIG. 1)

しかしながら、上記従来の半導体チップの実装技術には、以下の課題が残されている。すなわち、上記バンプ３によるフリップチップ実装では、バンプ３の数が少ないＬＥＤチップやバンプ３が不均一に配置されたランダムロケーションの場合においては、実装時に半導体チップ２が傾き易く、半導体チップ２の平行出しが難しいという不都合があった。このため、電気的接続に寄与しない余分なバンプ３を設けて半導体チップ２の支持を行う場合があった。また、半導体チップ２の平行出しが困難なため、バンプ３の接着面積にばらつきが生じ易く、接着強度にばらつきが生じてしまうという不都合があった。
さらに、バンプ３の高さにもばらつきがあるため、半導体チップ２と有機回路基板１との間のクリアランス、すなわち接着した半導体チップ２の高さにも半導体チップ２毎にばらつきが生じてしまう。
また、半導体チップ２と有機回路基板１との隙間に樹脂を充填する際に、樹脂（アンダーフィル等）が入り難く、気泡を巻き込み易いという問題もある。気泡を巻き込むと、吸湿の影響を受け易く、耐リフロー性が悪くなるために、脱泡処理を施さなければならないという不都合があった。上記特許文献１では、ソルダーレジスト膜をＩＣチップと有機回路基板との間に配設し、上記特許文献２では、ドライフィルムの支柱をＩＣチップと有機回路基板との間に配設することにより、気泡の巻き込みを低減することができるが、いずれもチップと基板との間に樹脂を充填する工程を有するために、気泡を巻き込む可能性がまだ残っている。 However, the following problems remain in the conventional semiconductor chip mounting technology. That is, in the flip chip mounting using the bump 3, the LED chip having a small number of bumps 3 or a random location where the bumps 3 are non-uniformly arranged, the semiconductor chip 2 is inclined easily during mounting, and the semiconductor chip 2 is parallel. There was an inconvenience that it was difficult to put out. For this reason, the semiconductor chip 2 may be supported by providing an extra bump 3 that does not contribute to the electrical connection. In addition, since it is difficult to parallel the semiconductor chips 2, there is a disadvantage that the bonding area of the bumps 3 is likely to vary, and the bonding strength varies.
Furthermore, since the height of the bump 3 also varies, the clearance between the semiconductor chip 2 and the organic circuit substrate 1, that is, the height of the bonded semiconductor chip 2 also varies for each semiconductor chip 2.
In addition, when the resin is filled in the gap between the semiconductor chip 2 and the organic circuit board 1, there is a problem that the resin (underfill or the like) is difficult to enter and bubbles are easily involved. When bubbles are involved, there is an inconvenience that defoaming treatment has to be performed because it is easily affected by moisture absorption and the reflow resistance deteriorates. In Patent Document 1, a solder resist film is disposed between the IC chip and the organic circuit board. In Patent Document 2, a support of a dry film is disposed between the IC chip and the organic circuit board. Although entrainment of bubbles can be reduced, since both have a step of filling a resin between the chip and the substrate, there is still a possibility of entrapment of bubbles.

本発明は、前述の課題に鑑みてなされたもので、少ないバンプ数やランダムロケーションのバンプ配置でも半導体チップの平行出しが容易であると共に、接着強度や半導体チップの高さのばらつきを低減することができる半導体装置及びその製造方法を提供することを目的とする。   The present invention has been made in view of the above-described problems, and it is easy to parallelize semiconductor chips even with a small number of bumps and bump arrangements at random locations, and to reduce variations in adhesive strength and semiconductor chip height. It is an object of the present invention to provide a semiconductor device that can perform the same and a manufacturing method thereof.

本発明は、前記課題を解決するために以下の構成を採用した。すなわち、本発明の半導体装置は、基板と、前記基板上に形成された１つ又は複数のバンプと、前記バンプの上部が露出した状態で前記バンプの周囲に充填固化された樹脂部と、前記樹脂部上に載置され前記バンプの上部を潰した状態で前記バンプと接合された半導体チップと、を備えていることを特徴とする。   The present invention employs the following configuration in order to solve the above problems. That is, the semiconductor device of the present invention includes a substrate, one or a plurality of bumps formed on the substrate, a resin portion filled and solidified around the bumps with an upper portion of the bumps exposed, And a semiconductor chip mounted on the resin portion and bonded to the bump in a state where the upper portion of the bump is crushed.

また、本発明の半導体装置の製造方法は、基板上に１つ又は複数のバンプを形成する工程と、前記バンプの上部が露出した状態で前記バンプの周囲に樹脂を充填固化して樹脂部を形成する工程と、前記樹脂部上に半導体チップを載置すると共に荷重を掛けて前記バンプの上部を押し潰して前記バンプに半導体チップを接合させる工程と、を備えていることを特徴とする。   The method for manufacturing a semiconductor device of the present invention includes a step of forming one or a plurality of bumps on a substrate, and a resin portion is formed by filling and solidifying resin around the bumps with the upper portions of the bumps exposed. And a step of placing the semiconductor chip on the resin portion and applying a load to crush the upper portion of the bump to bond the semiconductor chip to the bump.

これらの半導体装置及びその製造方法では、バンプの周囲に充填固化された樹脂部上に半導体チップを載置し、露出しているバンプの上部を押し潰して接合しているので、少ないバンプ数やランダムロケーションのバンプ配置の場合でも、半導体チップの下面が樹脂部上面で位置決めされて平行出しがなされる。また、樹脂部の厚さで半導体チップの高さが規定されるため、半導体チップの高さばらつきが抑制されると共に、バンプを樹脂部上面の高さまで押し潰して接合するため、バンプ高さのばらつきが無くなり接着強度のばらつきも抑制することができる。さらに、半導体チップを実装する前に樹脂をバンプの周囲に充填固化させるため、気泡の巻き込みも無くすことができる。   In these semiconductor devices and manufacturing methods thereof, the semiconductor chip is placed on the resin portion filled and solidified around the bumps, and the upper portions of the exposed bumps are crushed and joined. Even in the case of bump placement at random locations, the lower surface of the semiconductor chip is positioned on the upper surface of the resin portion and parallelized. In addition, since the height of the semiconductor chip is defined by the thickness of the resin portion, variation in the height of the semiconductor chip is suppressed, and the bumps are crushed to the height of the upper surface of the resin portion and bonded. Variations are eliminated and variations in adhesive strength can be suppressed. Further, since the resin is filled and solidified around the bumps before the semiconductor chip is mounted, the entrainment of bubbles can be eliminated.

本発明の半導体装置では、前記半導体チップが、ＬＥＤチップであることを特徴とする。
また、本発明の半導体装置の製造方法では、前記半導体チップが、ＬＥＤチップであることを特徴とする。
すなわち、これらの半導体装置及びその製造方法では、半導体チップが、ＬＥＤチップであるので、発光方向、発光分布及び半値幅等のばらつきが低減された高品質のＬＥＤ装置を得ることができる。 In the semiconductor device of the present invention, the semiconductor chip is an LED chip.
In the method for manufacturing a semiconductor device according to the present invention, the semiconductor chip is an LED chip.
That is, in these semiconductor devices and manufacturing methods thereof, since the semiconductor chip is an LED chip, it is possible to obtain a high-quality LED device in which variations in the light emission direction, light emission distribution, half width, and the like are reduced.

本発明の半導体装置では、前記基板上に形成され前記バンプよりも低いと共に前記バンプを囲って配された囲い部を備え、前記樹脂部が前記囲い部内に充填固化されて形成されていることを特徴とする。
また、本発明の半導体装置の製造方法は、前記基板上に前記バンプよりも低いと共に前記バンプを囲った囲い部を形成する工程を有し、前記樹脂部を形成する工程が、前記囲い部内に樹脂を充填固化することを特徴とする。
これらの半導体装置及びその製造方法では、バンプよりも低い囲い部内に樹脂部が充填固化されるので、樹脂部の高さが囲い部の高さで規定され、高さ寸法精度の高い樹脂部を容易に形成することができ、バンプの露出量を高精度に得ることができる。 In the semiconductor device of the present invention, an enclosure is formed on the substrate that is lower than the bumps and is disposed surrounding the bumps, and the resin part is formed by being filled and solidified in the enclosure. Features.
Further, the method for manufacturing a semiconductor device of the present invention includes a step of forming an enclosure that is lower than the bump and surrounds the bump on the substrate, and the step of forming the resin portion is included in the enclosure. The resin is filled and solidified.
In these semiconductor devices and the manufacturing method thereof, the resin portion is filled and solidified in the enclosure portion lower than the bump. Therefore, the height of the resin portion is defined by the height of the enclosure portion, and the resin portion having high dimensional accuracy is provided. It can be formed easily, and the exposed amount of the bump can be obtained with high accuracy.

さらに、本発明の半導体装置の製造方法は、前記囲い部を、レジスト又はドライフィルムで形成することを特徴とする。すなわち、この半導体装置の製造方法では、囲い部をレジスト又はドライフィルムで形成するので、高精度な囲い部の高さを得ることができ、樹脂部の高さをより正確に設定することが可能になる。   Furthermore, the method for manufacturing a semiconductor device according to the present invention is characterized in that the enclosure is formed of a resist or a dry film. That is, in this semiconductor device manufacturing method, since the enclosure is formed of a resist or a dry film, it is possible to obtain a highly accurate enclosure height and to set the height of the resin portion more accurately. become.

本発明によれば、以下の効果を奏する。
すなわち、本発明に係る半導体装置及びその製造方法によれば、バンプの周囲に充填固化された樹脂部上に半導体チップを載置し、露出しているバンプの上部を押し潰して半導体チップを接合しているので、半導体チップの平行出しが容易であると共に、半導体チップの高さばらつき及び接着強度のばらつきを低減でき、さらには気泡の巻き込みも無くすことができる。したがって、少ないバンプ数やランダムロケーションのバンプ配置の場合でも、良好なフリップチップ実装構造を得ることができる。特に、発光方向、発光分布及び半値幅等のばらつきを低減できるため、ＬＥＤチップをフリップチップ実装したＬＥＤ装置に好適である。 The present invention has the following effects.
That is, according to the semiconductor device and the manufacturing method thereof according to the present invention, the semiconductor chip is mounted on the resin portion filled and solidified around the bump, and the exposed upper portion of the bump is crushed to join the semiconductor chip. Therefore, the semiconductor chips can be easily placed in parallel, the semiconductor chip height variation and the adhesive strength variation can be reduced, and further, the bubble entrainment can be eliminated. Therefore, a good flip chip mounting structure can be obtained even in the case of a small number of bumps or a bump arrangement with random locations. In particular, since variations in light emission direction, light emission distribution, half width, and the like can be reduced, it is suitable for an LED device in which an LED chip is flip-chip mounted.

以下、本発明に係る半導体装置及びその製造方法の一実施形態を、図１から図５に基づいて説明する。   Hereinafter, an embodiment of a semiconductor device and a method for manufacturing the same according to the present invention will be described with reference to FIGS.

本実施形態における半導体装置は、携帯電話やＰＤＡ（Personal Digital Assistant：携帯情報端末機）等の携帯電子機器の液晶用バックライトや照明用等として用いる白色ＬＥＤ装置であって、図１に示すように、基板１０と、基板１０上に形成された複数のバンプ３（本実施形態では２つのバンプ）と、バンプ３の上部が露出した状態でバンプ３の周囲に充填固化された樹脂部１１と、樹脂部１１上に載置されバンプ３の上部を潰した状態でバンプ３と接合された半導体チップ１２と、基板１０上で半導体チップ１２を覆う樹脂封止部１３と、を備えている。   The semiconductor device according to the present embodiment is a white LED device used as a backlight for liquid crystal or illumination of a portable electronic device such as a mobile phone or a PDA (Personal Digital Assistant), as shown in FIG. In addition, a substrate 10, a plurality of bumps 3 (two bumps in the present embodiment) formed on the substrate 10, and a resin portion 11 filled and solidified around the bump 3 with the upper portion of the bump 3 exposed. The semiconductor chip 12 mounted on the resin part 11 and bonded to the bump 3 in a state where the upper part of the bump 3 is crushed, and the resin sealing part 13 covering the semiconductor chip 12 on the substrate 10 are provided.

また、本実施形態の半導体装置は、基板１０上に矩形枠状に形成されバンプ３よりも低いと共にバンプ３を囲って配された囲い部１４を備えている。そして、上記樹脂部１１は、囲い部１４内に充填固化されて形成されている。
上記基板１０は、例えば略直方体形状のガラスエポキシ基板、ＢＴレジン基板、セラミックス基板やメタルコア基板等の絶縁性基板であり、バンプ３との接合及び外部との接続のための電極パターン（図示略）が表面に形成されている。 In addition, the semiconductor device of the present embodiment includes a surrounding portion 14 that is formed in a rectangular frame shape on the substrate 10 and that is lower than the bump 3 and is disposed surrounding the bump 3. The resin portion 11 is formed by being filled and solidified in the enclosure portion 14.
The substrate 10 is an insulating substrate such as a substantially rectangular parallelepiped glass epoxy substrate, a BT resin substrate, a ceramic substrate, or a metal core substrate, and an electrode pattern (not shown) for bonding to the bumps 3 and connection to the outside. Is formed on the surface.

上記半導体チップ１２は、ＬＥＤチップであって、例えば発光波長帯域が４７０〜４９０ｎｍであるＩｎＧａＮ系化合物半導体を用いた高効率の青色発光ダイオード素子や発光波長帯域が４７０ｎｍ未満の紫外域の発光ダイオード素子である。
この半導体チップ１２では、一対の電極（ｐ側電極及びｎ側電極：図示略）が下面に設けられ直接フェイスダウンで２つのバンプ３を介してフリップチップ実装されている。 The semiconductor chip 12 is an LED chip, for example, a high-efficiency blue light-emitting diode element using an InGaN-based compound semiconductor having an emission wavelength band of 470 to 490 nm, or an ultraviolet light-emitting diode element having an emission wavelength band of less than 470 nm. It is.
In this semiconductor chip 12, a pair of electrodes (p-side electrode and n-side electrode: not shown) are provided on the lower surface, and are flip-chip mounted via two bumps 3 directly face-down.

なお、上記バンプ３は、ハンダバンプやＡｕバンプ等が用いられる。また、上記囲い部１４は、矩形枠状に形成したレジストやドライフィルムで構成されている。また、樹脂部１１は、粘度の低い透明樹脂が固化したものである。
上記樹脂封止部１３は、ＹＡＧ蛍光体入り樹脂であり、青色発光ダイオード素子又は紫外域発光ダイオード素子である半導体チップ１２からの青色光又は紫外光をＹＡＧ蛍光体により白色光に変換させるものである。 The bump 3 is a solder bump, an Au bump, or the like. The surrounding portion 14 is made of a resist or dry film formed in a rectangular frame shape. The resin part 11 is a solidified transparent resin having a low viscosity.
The resin sealing portion 13 is a resin containing a YAG phosphor, and converts blue light or ultraviolet light from the semiconductor chip 12 which is a blue light emitting diode element or an ultraviolet light emitting diode element into white light by the YAG phosphor. is there.

次に、本実施形態の半導体装置の製造方法を、図２から図６を参照して説明する。   Next, a method for manufacturing the semiconductor device of this embodiment will be described with reference to FIGS.

まず、図２に示すように、基板１０の電極パターン上にバンプ３を形成する。なお、より高いバンプ３を得るために、バンプ３を２段重ねにしても構わない。次に、図３に示すように、バンプ３を囲むように囲い部１４をレジスト又はドライフォルムで形成する。レジストで囲い部１４を形成する場合は、フォトリソグラフィ技術により所定の矩形枠形状にレジストをパターン形成する。また、ドライフィルムで囲い部１４を形成する場合は、予め所定の矩形枠形状に形成したドライフィルムを基板１０上に貼り付けて囲い部１４を形成する。   First, as shown in FIG. 2, bumps 3 are formed on the electrode pattern of the substrate 10. In order to obtain a higher bump 3, the bump 3 may be stacked in two stages. Next, as shown in FIG. 3, a surrounding portion 14 is formed of a resist or a dry form so as to surround the bump 3. When the enclosing portion 14 is formed with a resist, the resist is patterned into a predetermined rectangular frame shape by a photolithography technique. Further, when forming the enclosure part 14 with a dry film, the enclosure part 14 is formed by attaching a dry film formed in a predetermined rectangular frame shape on the substrate 10 in advance.

なお、上記囲い部１４の高さは、バンプ３よりも低く設定しておく。さらに、図４に示すように、囲い部１４内に樹脂を流し込み、固化させて樹脂部１１を形成する。この際、バンプ３の上部が若干突出して露出するように樹脂の充填量をコントロールする。
本実施形態では、囲い部１４の高さをバンプ３よりも低く設定しているので、樹脂を多めに充填しても樹脂部１１が囲い部１４と面一になり、バンプ３上部を覆わずに、バンプ３上部の露出量を精度良く設定することができる。また、囲い部１４内に流し込む樹脂は、できるだけ粘度の低いものを採用することにより、流れ込み易く、固化時の良好な表面平坦度を得ることができる。 The height of the enclosure 14 is set lower than that of the bump 3. Further, as shown in FIG. 4, resin is poured into the enclosure portion 14 and solidified to form the resin portion 11. At this time, the filling amount of the resin is controlled so that the upper part of the bump 3 is slightly protruded and exposed.
In the present embodiment, since the height of the enclosure portion 14 is set lower than that of the bump 3, the resin portion 11 is flush with the enclosure portion 14 even when a large amount of resin is filled, and the upper portion of the bump 3 is not covered. In addition, the amount of exposure at the top of the bump 3 can be set with high accuracy. Moreover, the resin poured into the enclosure part 14 can be easily poured by adopting a resin having a viscosity as low as possible, and good surface flatness at the time of solidification can be obtained.

次に、樹脂部１１が固化した後、図５に示すように、半導体チップ１２を電極面を下にしてバンプ３上に載置すると共に荷重を掛ける。このとき、荷重によりバンプ３が変形して押し潰されるが、半導体チップ１２の下面が樹脂部１１の上面に当接することで、位置決めされる。さらに、この状態で、リフロー又は超音波によってバンプ３と半導体チップ１２との接合を行い、電気的接続と固定とを行う。そして、最後に基板１０上に半導体チップ１２をＹＡＧ蛍光体入り樹脂で覆って樹脂封止部１３を形成することで、本実施形態の半導体装置が作製される。   Next, after the resin part 11 is solidified, as shown in FIG. 5, the semiconductor chip 12 is placed on the bump 3 with the electrode surface facing down and a load is applied. At this time, the bump 3 is deformed and crushed by the load, but is positioned by the lower surface of the semiconductor chip 12 coming into contact with the upper surface of the resin portion 11. Further, in this state, the bump 3 and the semiconductor chip 12 are joined by reflow or ultrasonic wave, and electrical connection and fixation are performed. Finally, the semiconductor chip 12 is formed by covering the semiconductor chip 12 on the substrate 10 with a resin containing YAG phosphor to form the resin sealing portion 13.

このように本実施形態では、バンプ３の周囲に充填固化された樹脂部１１上に半導体チップ１２を載置し、この半導体チップ１２でバンプ３の上部を押し潰して接合を行っているので、半導体チップ１２の下面が樹脂部１１上面で位置決めされて平行出しがなされる。特に、本実施形態のように少ないバンプ数やランダムロケーションのバンプ配置の場合でも、容易に平行出しを行うことができる。したがって、平行出しだけのために、電気的接続以外の余計なバンプ３を設ける必要がない。
このように高精度に平行出しがなされたフリップチップ実装構造により、発光方向、発光分布及び半値幅等のばらつきが低減された良好なＬＥＤ装置を得ることができる。 As described above, in this embodiment, the semiconductor chip 12 is placed on the resin portion 11 filled and solidified around the bump 3, and the upper portion of the bump 3 is crushed and bonded by the semiconductor chip 12. The lower surface of the semiconductor chip 12 is positioned on the upper surface of the resin portion 11 and parallelized. In particular, parallelism can be easily performed even in the case of a small number of bumps or random location bump arrangement as in this embodiment. Therefore, it is not necessary to provide an extra bump 3 other than the electrical connection just for parallelism.
Thus, with the flip chip mounting structure in which parallelism is performed with high accuracy, it is possible to obtain a good LED device in which variations in the light emission direction, the light emission distribution, the half width, and the like are reduced.

また、樹脂部１１の厚さで半導体チップ１２の高さが規定されるため、半導体チップ１２の高さばらつきが抑制されると共に、バンプ３を樹脂部１１上面の高さまで押し潰して接合するため、バンプ高さのばらつきが無くなり接着強度のばらつきも抑制することができる。
さらに、半導体チップ１２を実装する前に樹脂をバンプ３の周囲に充填固化させるため、樹脂部１１内の気泡の巻き込みも無くすことができる。
また、囲い部１４をレジスト又はドライフィルムで形成するので、囲い部１４の高さを高精度に得ることができ、樹脂部１１の高さをより正確に設定することが可能になる。 In addition, since the height of the semiconductor chip 12 is defined by the thickness of the resin portion 11, variations in the height of the semiconductor chip 12 are suppressed, and the bumps 3 are crushed and joined to the height of the upper surface of the resin portion 11. The variation in the bump height is eliminated, and the variation in the adhesive strength can be suppressed.
Furthermore, since the resin is filled and solidified around the bumps 3 before the semiconductor chip 12 is mounted, the entrapment of bubbles in the resin portion 11 can be eliminated.
Moreover, since the enclosure part 14 is formed with a resist or a dry film, the height of the enclosure part 14 can be obtained with high accuracy, and the height of the resin part 11 can be set more accurately.

なお、本発明は上記実施形態に限定されるものではなく、本発明の趣旨を逸脱しない範囲において種々の変更を加えることができる。   In addition, this invention is not limited to the said embodiment, A various change can be added in the range which does not deviate from the meaning of this invention.

上記実施形態では、青色又は紫外光の発光ダイオード素子を半導体チップ１２として実装しているが、赤外光、赤色、緑色等の他の発光波長帯域の発光ダイオード素子を半導体チップ１２として採用しても構わない。すなわち、一面に一対の電極が形成され、基材に透光性があると共に電極面を下にして実装する素子ならば、青色以外の種々の発光ダイオード素子を採用してもよい。また、樹脂封止部１３においても、上述したように、白色光への変換が不要な場合、通常の発光ダイオード素子の封止に使用する樹脂であれば、特に蛍光剤入りでなくても構わない。例えば、半導体チップ１２として緑色ＬＥＤを採用し、透明樹脂の樹脂封止部１３で封止を行ったものでも構わない。
また、上記実施形態では良好な平行出しが可能なため、上述したようにＬＥＤチップを半導体チップ１２とする場合に好適だが、他の半導体チップとして、例えばＩＣチップ等を実装してもよい。 In the above embodiment, a blue or ultraviolet light emitting diode element is mounted as the semiconductor chip 12, but a light emitting diode element of another light emission wavelength band such as infrared light, red, or green is adopted as the semiconductor chip 12. It doesn't matter. That is, various light-emitting diode elements other than blue may be employed as long as a pair of electrodes are formed on one surface, the base material is translucent and mounted with the electrode surface facing down. Also, as described above, the resin sealing portion 13 does not need to contain a fluorescent agent as long as it is a resin used for sealing a normal light emitting diode element when conversion to white light is unnecessary. Absent. For example, a green LED may be employed as the semiconductor chip 12 and sealing may be performed with a resin sealing portion 13 made of a transparent resin.
Further, in the above-described embodiment, since it is possible to achieve good parallelism, the LED chip is suitable as the semiconductor chip 12 as described above. However, for example, an IC chip or the like may be mounted as another semiconductor chip.

また、上記実施形態では、２つのバンプ３により半導体チップ１２との接合を行っているが、２以外のバンプ数で接合を行っても構わない。特に、本実施形態では、１つのバンプ３だけでも、実装時に半導体チップ１２が樹脂部１１に支持されて安定するので、半導体バンプ３の平行出しが容易である。   In the above embodiment, the bonding to the semiconductor chip 12 is performed by the two bumps 3. However, the bonding may be performed by using the number of bumps other than two. In particular, in the present embodiment, even if only one bump 3 is used, the semiconductor chip 12 is supported by the resin portion 11 and stabilized at the time of mounting.

また、上記実施形態では、上述したようにレジストやドライフィルムによって囲い部１４を形成することが寸法精度等の点で好ましいが、基板１０自体を予め加工して囲い部１４を形成しておいても構わない。
また、上記実施形態では、樹脂部１１と樹脂封止部１３とが異なる樹脂で形成されているが、両者を同じ樹脂で形成しても構わない。なお、本実施形態では、上述したように、樹脂部１１と樹脂封止部１３とでそれぞれ特性の異なる樹脂を使用することができる利点がある。 In the above embodiment, as described above, it is preferable to form the surrounding portion 14 with a resist or a dry film in terms of dimensional accuracy, but the substrate 10 itself is processed in advance to form the surrounding portion 14. It doesn't matter.
Moreover, in the said embodiment, although the resin part 11 and the resin sealing part 13 are formed with different resin, you may form both with the same resin. In addition, in this embodiment, there exists an advantage which can use resin from which a characteristic differs by the resin part 11 and the resin sealing part 13, as mentioned above.

本発明に係る一実施形態の半導体装置を示す断面図である。It is sectional drawing which shows the semiconductor device of one Embodiment which concerns on this invention. 本実施形態の半導体装置の製造方法について、バンプ形成工程を示す平面図及び断面図である。It is the top view and sectional drawing which show a bump formation process about the manufacturing method of the semiconductor device of this embodiment. 本実施形態の半導体装置の製造方法について、囲い部形成工程を示す平面図及び断面図である。It is the top view and sectional drawing which show the enclosure formation process about the manufacturing method of the semiconductor device of this embodiment. 本実施形態の半導体装置の製造方法について、樹脂部の充填固化工程を示す平面図及び断面図である。It is the top view and sectional drawing which show the filling solidification process of the resin part about the manufacturing method of the semiconductor device of this embodiment. 本実施形態の半導体装置の製造方法について、半導体チップ実装工程を示す平面図及び断面図である。It is the top view and sectional drawing which show a semiconductor chip mounting process about the manufacturing method of the semiconductor device of this embodiment. 本発明に係る従来例の半導体装置を示す断面図である。It is sectional drawing which shows the semiconductor device of the prior art example which concerns on this invention.

符号の説明Explanation of symbols

３…バンプ、１０…基板、１１…樹脂部、１２…半導体チップ、１３…樹脂封止部、１４…囲い部
DESCRIPTION OF SYMBOLS 3 ... Bump, 10 ... Board | substrate, 11 ... Resin part, 12 ... Semiconductor chip, 13 ... Resin sealing part, 14 ... Enclosure part

Claims (7)

基板と、
前記基板上に形成された１つ又は複数のバンプと、
前記バンプの上部が露出した状態で前記バンプの周囲に充填固化された樹脂部と、
前記樹脂部上に載置され前記バンプの上部を潰した状態で前記バンプと接合された半導体チップと、を備えていることを特徴とする半導体装置。 A substrate,
One or more bumps formed on the substrate;
A resin part filled and solidified around the bumps with the upper part of the bumps exposed;
A semiconductor device, comprising: a semiconductor chip mounted on the resin portion and bonded to the bump in a state in which an upper portion of the bump is crushed. 請求項１に記載の半導体装置において、
前記半導体チップが、ＬＥＤチップであることを特徴とする半導体装置。 The semiconductor device according to claim 1,
A semiconductor device, wherein the semiconductor chip is an LED chip. 請求項１又は２に記載の半導体装置において、
前記基板上に形成され前記バンプよりも低いと共に前記バンプを囲って配された囲い部を備え、
前記樹脂部が前記囲い部内に充填固化されて形成されていることを特徴とする半導体装置。 The semiconductor device according to claim 1 or 2,
An enclosure portion formed on the substrate and lower than the bumps and arranged to surround the bumps;
A semiconductor device, wherein the resin portion is formed by being filled and solidified in the enclosure portion. 基板上に１つ又は複数のバンプを形成する工程と、
前記バンプの上部が露出した状態で前記バンプの周囲に樹脂を充填固化して樹脂部を形成する工程と、
前記樹脂部上に半導体チップを載置すると共に荷重を掛けて前記バンプの上部を押し潰して前記バンプに半導体チップを接合させる工程と、を備えていることを特徴とする半導体装置の製造方法。 Forming one or more bumps on a substrate;
Forming a resin part by filling and solidifying resin around the bump with the upper part of the bump exposed;
And a step of placing a semiconductor chip on the resin portion and applying a load to crush the upper portion of the bump to bond the semiconductor chip to the bump. 請求項４に記載の半導体装置の製造方法において、
前記半導体チップが、ＬＥＤチップであることを特徴とする半導体装置の製造方法。 In the manufacturing method of the semiconductor device according to claim 4,
A semiconductor device manufacturing method, wherein the semiconductor chip is an LED chip. 請求項４又は５に記載の半導体装置の製造方法において、
前記基板上に前記バンプよりも低いと共に前記バンプを囲った囲い部を形成する工程を有し、
前記樹脂部を形成する工程が、前記囲い部内に樹脂を充填固化することを特徴とする半導体装置の製造方法。 In the manufacturing method of the semiconductor device according to claim 4 or 5,
Forming a surrounding part on the substrate that is lower than the bumps and surrounds the bumps;
The method of manufacturing a semiconductor device, wherein the step of forming the resin portion fills and solidifies the resin in the enclosure portion. 請求項６に記載の半導体装置の製造方法において、
前記囲い部を、レジスト又はドライフィルムで形成することを特徴とする半導体装置の製造方法。
In the manufacturing method of the semiconductor device according to claim 6,
A method of manufacturing a semiconductor device, wherein the enclosing portion is formed of a resist or a dry film.
JP2005310627A 2005-10-26 2005-10-26 Semiconductor device and manufacturing method thereof Expired - Fee Related JP4697789B2 (en)

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