JP2007122318A - Print controller - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To achieve the high speed operation of the image processing of a printer and the simple change of a processing content or conditions. <P>SOLUTION: A main processor operates as an overall processing control part for controlling overall image processing for generating print image data based on image data expressing a print object image. A second sub-processor operates as a JPEG developing part. A third sub-processor operates as a format converting part. A fourth sub-processor operates as an image correcting part. The first sub-processor operates as a resizing processing part, and operates as an image processing proxy control part for controlling operations of the JPEG developing part, the format converting part, the image correcting part and the resize processing part on behalf of the overall processing control part, and operates as a layout processing part. A sixth sub-processor operates as a color conversion processing part, and operates as a half-tone encoding part. The sixth sub-processor operates as a half-tone decoding part. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a print control apparatus for processing image data representing an image to be printed and executing printing.

  In a printing apparatus such as a printer, the arrangement of dots on a print medium is determined based on image data (hereinafter also referred to as “print target image data”) representing an image to be printed (hereinafter also referred to as “print target image”). Binary data (hereinafter also referred to as “print image data”) is generated, and print processing is performed to print an image on a print medium based on the generated print image data. In addition, the print image data is processed by performing various processes such as a data format conversion process, a color correction process, a sharpness process, a noise removal process, and a resolution conversion process on the image data to be printed. It may be generated. In the following, image processing such as print image data generation processing, data format conversion processing, image correction processing, and resolution conversion processing may be collectively referred to as image processing.

  In a conventional printing apparatus, a CPU provided in the printing apparatus functions as a print control apparatus for executing the printing process, and executes the image processing (see, for example, Patent Documents 1 and 2). In order to increase the speed of image processing, a print control apparatus is configured by combining a CPU and a dedicated hardware circuit, and the dedicated hardware circuit operating under the control of the CPU actually executes the image processing. There are some (see, for example, Patent Document 3).

JP 2001-138484 A JP 2003-101940 A JP 2000-198240 A

  However, as described above, in the dedicated hardware circuit, the processing contents and processing conditions to be executed are fixed in advance, and therefore, to change these, the hardware circuit must be re-created. For this reason, in a printing apparatus using a print control apparatus that is a combination of a CPU and a dedicated hardware circuit, it is not easy to change the processing contents and processing conditions of image processing executed by the dedicated hardware circuit. There is a problem that the point is insufficient.

  The present invention has been made in order to solve the above-described problems, and is capable of speeding up image processing executed in a printing apparatus and capable of easily changing processing contents and processing conditions. An object is to provide a control device.

In order to solve at least a part of the problems described above, the first aspect of the present invention provides:
A print control device configured by an asymmetric multiprocessor, which executes image processing for generating print image data based on image data representing an image to be printed, and executes printing based on the generated print image data. And
A main processor that operates as an overall processing control unit that controls the entire image processing;
A second sub-processor that operates as a JPEG expansion unit that expands JPEG-format image data;
A third sub-processor operating as a format conversion unit for converting the JPEG-expanded image data from YCbCr image data to RGB image data;
A fourth sub-processor that operates as an image correction unit that corrects the image quality of the format-converted image data;
The JPEG development unit, the format conversion unit, and the image correction unit operate as a resize processing unit that executes a resizing process so that the resolution of the image represented by the image data whose image quality has been corrected becomes the resolution of an image to be printed on a print medium. And an image processing proxy control unit that controls the operation of the resizing processing unit on behalf of the overall processing control unit, and an image represented by the resized image data is actually displayed on the print medium. A first sub-processor that operates as a layout processing unit that performs layout processing at a print position;
The layout-processed image data operates as a color conversion processing unit that performs color conversion processing from RGB image data to CMYK image data, and determines the dot formation position based on the gradation value of each pixel in the color-converted image data. A fifth sub-processor that operates as a halftone encoding unit that performs a halftone encoding process that encodes encoded data representing information for
A sixth sub-processor that operates as a halftone decoding unit that executes halftone decoding processing for generating print image data indicating the dot formation position by decoding the encoded data that has been encoded;
It is characterized by providing.

In addition, the second aspect of the present invention includes
A print control device configured by an asymmetric multiprocessor, which executes image processing for generating print image data based on image data representing an image to be printed, and executes printing based on the generated print image data. And
A main processor that operates as an overall processing control unit that controls the entire image processing;
A second sub-processor that operates as a JPEG expansion unit that expands JPEG-format image data;
A third sub-processor operating as a format conversion unit for converting the JPEG-expanded image data from YCbCr image data to RGB image data;
A fourth sub-processor that operates as an image quality correction unit that corrects the image quality of the image represented by the image data after being resized so as to have the resolution of the image to be printed on the print medium;
It operates as a resizing processing unit that executes the resizing process on the image data subjected to the format conversion, and the operations of the JPEG developing unit, the format converting unit, the image correcting unit, and the resizing processing unit are performed as the overall processing. A first image processor that operates as an image processing proxy control unit that performs control on behalf of the control unit, and that also operates as a layout processing unit that performs layout processing on an actual print position on the print medium, the image represented by the resized image data. Subprocessors,
The layout-processed image data operates as a color conversion processing unit that performs color conversion processing from RGB image data to CMYK image data, and determines the dot formation position based on the gradation value of each pixel in the color-converted image data. A fifth sub-processor that operates as a halftone encoding unit that performs a halftone encoding process that encodes encoded data representing information for
A sixth sub-processor that operates as a halftone decoding unit that executes halftone decoding processing for generating print image data indicating the dot formation position by decoding the encoded data that has been encoded;
It is characterized by providing.

  According to the printing control apparatus of the first and second aspects, JPEG expansion processing, format conversion processing, and image quality correction executed in image processing for generating print image data based on image data representing an image to be printed. Since the six sub-processors execute processing, resizing processing, layout processing, color conversion processing, halftone encoding processing, and halftone decoding processing under the overall processing control of the main processor, image processing The speed can be increased. In addition, since the main processor and the first to sixth sub-processors execute the image processing, it is possible to easily change the processing content and processing conditions.

Hereinafter, embodiments of the present invention will be described in the following order based on examples.
A. Example:
A1. Configuration and function of the print controller:
A2. Example of image processing operation by print control device:
A3. effect:
B. Variation:

A. Example:
A1. Configuration and function of the print controller:
FIG. 1 is an explanatory diagram showing the main configuration of a print control apparatus as an embodiment of the present invention. This print control apparatus IPC is a microprocessor in which an asymmetric multiprocessor composed of one main processor and one or more sub-processors is integrated on one semiconductor substrate. The main processor and the sub processor mean units including peripheral circuits such as a CPU, a memory, and a bus controller. In the present embodiment, as shown in the figure, a case in which one main processor 10 and six sub-processors 20A to 20F are configured is shown as an example. The print control apparatus IPC also includes a secondary cache memory (abbreviated as L2 in the figure) 40 and a secondary cache controller (L2C in the figure) that controls the operation of the secondary cache memory 40. , 30, two memory controllers (abbreviated as MEMC in the drawing) 50, 70, an I / O interface 60, and a bridge circuit 80. .

  The sub processors 20A to 20F are connected to the main processor 10 via communication paths NESS1 to NESS6 provided individually, and the sub processors 20A to 20F and the main processor 10 communicate with each other individually. Can do. In addition, each of the sub processors 20A to 20F can communicate with each other via the main processor 10. Although not shown, each communication path is composed of a set of paths, a path from the main processor to the sub processor and a path from the sub processor to the main processor. Hereinafter, the communication paths NESS1 to NESS6 may be collectively referred to as a communication path NESS.

  In addition, each of the sub processors 20A to 20F is connected to a second memory controller 50 that controls access to the RAM 110 connected to the outside via communication paths NEMM1A to NEMM6A that are individually provided. The RAM 110 can be accessed individually. Similarly, each of the sub-processors 20A to 20F is connected to the secondary cache controller 30 that controls access to the secondary cache memory 40 via the communication paths NEMM1B to NEMM6B provided individually. The secondary cache memory 40 can be accessed. Note that the communication paths NEMM1A to NEMM6A and NEMM1B to NEMM6B are not shown in the same manner as the communication paths NESS1 to NESS6, but are one of the path from the sub processor to the memory controller and the path from the memory controller to the sub processor. It consists of a set of routes. Hereinafter, these communication paths NEMM1A to NEMM6A and NEMM1B to NEMM6B may be collectively referred to as a communication path NEMM.

  Furthermore, one main processor 10, six sub-processors 20A to 20F, a secondary cache controller 30, and a second memory controller 50 are connected in a loop by connecting their respective inputs and outputs in order. They are connected to each other via a provided communication path NIO. Accordingly, one main processor 10 and six sub-processors 20A to 20F can communicate with each other via this communication path NIO.

  Of the six sub-processors 20A to 20F, the first to fourth sub-processors 20A to 20D further connect the respective inputs and outputs in order to establish a communication path NIO2 provided in a loop. And can communicate with each other via this communication path NIO2.

  The main processor 10 is connected to the bridge circuit 80 via a general communication path NEIB called a bus. The bridge circuit 80 is connected to the second memory controller 50 and the secondary cache controller 30 via communication paths NEMM7A and NEMM7B similar to the communication path NEMM. The bridge circuit 80 mediates two communication paths having different specifications. Therefore, the main processor 10 is connected to the second memory controller and the secondary cache controller 30 via the bridge circuit 80 and can access the RAM 110 and the secondary cache memory 40.

  The main processor 10 is connected to the first memory controller 70 and an I / O interface (abbreviated as I / O in the drawing) via a communication path NEIB. The first memory controller 70 is a control circuit that controls access to an externally connected memory such as the ROM 120A or the RAM 120B. The I / O interface 60 includes an input device such as an operation panel (abbreviated as IP in the figure) 130, a card reader (abbreviated as CR in the figure) 140, This is a control circuit that controls access to various peripheral devices connected to the outside such as a print engine (abbreviated as PE in the drawing) 160.

  The functions described below are assigned to each of the main processor 10 and the six sub processors 20A to 20F.

  The main processor 10 is assigned a function for controlling a print processing operation executed by the multiprocessor MPU as a whole by reading and executing a predetermined program stored in the ROM 120A. Specifically, a function for controlling processing for generating print image data based on print target image data (hereinafter also referred to as “image processing control function”), or a processing for executing printing based on the generated print image data And the like (hereinafter also referred to as “print execution control function”).

  As will be described below, various image processing functions are assigned to the sub-processors 20A to 20F by reading and executing a predetermined program from a ROM (not shown) provided in each processor.

  Instead of the main processor 10, the first sub-processor 20A is assigned an image processing proxy control function for controlling image processing operations executed by the second to fourth sub-processors 20B to 20D. The fourth sub-processors 20B to 20D execute respective processes in accordance with instructions from the first sub-processor 20A.

  When attention is paid only to the operations of the first to fourth sub-processors 20A to 20D, the first sub-processor 20A is an image main processor (abbreviated as “image main” in the drawing). It can be seen that the second to fourth sub-processors 20B to 20D function as image sub-processors (denoted as “image sub” in the drawing).

  In the second and third sub-processors 20B and 20C, when the image data to be printed is JPEG format image data, the image decoding function for developing the image data and converting it into image data based on the RGB color space Is assigned. Specifically, among the image decoding functions, the second sub-processor 20B is assigned a JPEG expansion function for expanding JPEG-format image data, and the third sub-processor 20B is expanded in 20C. From the YCbCr image data expressed by a combination of gradation values of Y (luminance), Cb (color difference (luminance-blue)), Cr (color difference (luminance-red)), R (red), G A format conversion function for converting to RGB image data expressed by a combination of (green) and B (blue) gradation values is assigned.

  The fourth sub-processor 20D is assigned an image correction function for automatically correcting an image, such as color correction processing of an image represented by image data, sharpness processing, and noise removal processing.

  In addition to the image processing proxy control function, the first sub processor 20A is assigned a resizing processing function for converting the resolution of the image data to the resolution of the image to be printed on the printing medium (printing resolution). Furthermore, the first sub-processor 20A has a layout processing function for generating image data (hereinafter also referred to as “layout image data”) in which an image represented by print target image data is arranged at an actual print position on the print medium. Assigned.

  Color conversion processing functions and halftone processing functions are assigned to the fifth and sixth sub-processors SC5 and SC6. Color conversion processing refers to converting RGB image data expressed by a combination of R, G, and B gradation values into image data expressed by a combination of gradation values for each color of ink used for printing. It is a process to convert. For example, when four color inks of C (cyan), M (magenta), Y (yellow), and K (black) are used, RGB represented by R, G, and B colors in the color conversion process. The image data is converted into CMYK image data represented by C, M, Y, and K colors. Halftone processing is processing for converting CMYK image data into print image data representing the density of dots to be formed on a print medium.

  Specifically, the fifth sub-processor SC5 has a color conversion processing function and a halftone for obtaining and encoding information for determining the dot formation position for each tone value of a certain pixel in the image data. An encoding function is assigned. The sixth sub-processor SC6 is assigned a halftone decoding function for generating print image data indicating the dot formation position on the print medium by decoding the encoded data representing the coded information.

A2. Example of image processing operation by print control device:
Hereinafter, the operation of each processor constituting the print control apparatus IPC will be described by taking an image processing operation for generating print image data from print target image data as an example.

  FIG. 2 is an explanatory diagram showing an image processing operation executed by the print control apparatus when printing an image represented by an image file stored in the memory card. The numbers (1) to (34) shown in the figure indicate the order of main processing executed between one main processor 10, six sub-processors 20 </ b> A to 20 </ b> F, and the RAM 110. .

  When the user selects execution of printing of an image represented by file data stored in the memory card (hereinafter referred to as “card printing”) using the input device 130 of FIG. 1, the main processor 10 performs card printing. Is read from the ROM 120A and executed. At this time, as shown in FIG. 2, the main processor 10 includes a file system 11, a file access control unit 12, an image processing control unit 13, an image object acquisition control unit 14, a color conversion / halftone control unit 15, and a process. It operates as each functional block of the result output unit 16 and realizes an image processing control function. The main processor 10 operates as various functional blocks such as a function for controlling the printer engine 160 and a function for controlling the operation of a motor for controlling the position of a print head (not shown) to realize a print execution control function. However, since this print execution control function is the same as the conventional one, illustration and description thereof are omitted here.

  When card printing is started, first, the image processing control unit 13 operates to cause the image object acquisition control unit 14 to start an image object acquisition operation.

  At this time, the image object acquisition control unit 14 instructs the first sub-processor 20A to acquire the print target image represented by the selected file data as an image object (processing 1), and notification of acquisition of the image object. Is waited for from the first sub-processor 20A. Note that the instruction from the first sub-processor 20A and the notification from the first sub-processor 20A are sent via a dedicated communication path NESS1 provided between the first main processor 10 and the first sub-processor 20A. Reportedly.

  Here, the first sub-processor 20A operates as the functional blocks of the image processing proxy control unit 21A, the decode control unit 22A, the image correction control unit 23A, the resizing processing unit 24A, and the layout processing unit 25A. The image object acquisition instruction supplied from the image object acquisition control unit 14 is transferred to the image processing proxy control unit 21A.

  First, the image processing proxy control unit 21A requests the decoding control unit 22A to execute image decoding processing (processing 2).

  The decode control unit 22A sends the acquired image object to the band buffer (denoted as Bandbuf in the figure) 112 assigned to the RAM 110 for the second sub-processor 20B functioning as a JPEG expansion unit. Request to write data (process 3). This request is transmitted from the first sub-processor 20A to the second sub-processor 20B via the communication path NIO2.

  Upon receiving the image object data write request, the second sub-processor 20B sends the file data read from the memory card 150 to the file access control unit 12 of the main processor 10 and a stream buffer (in the figure) assigned to the RAM 110. Is requested to write to 111 (represented as Streambuf) (process 4). This request is transmitted via a dedicated communication path NESS2 provided between the first main processor 10 and the second sub processor 20B.

  At this time, the file access control unit 12 reads and acquires the file data from the memory card 150 via the file system 11 (process 5), writes the acquired file data to the stream buffer 111 (process 6), and the second The sub processor 20B is notified that the acquired file data has been stored in the stream buffer 111 (process 7). Note that the access to the stream buffer 111 is executed via the communication path NEIB, the bridge circuit 80, and the communication path NEMM7A. The notification to the second sub processor 20B is transmitted through a dedicated communication path NESS2 provided between the first main processor 10 and the second sub processor 20B.

  When the second sub-processor 20B receives the notification that the file data is stored in the stream buffer 111, the second sub-processor 20B reads out and acquires the file data stored in the stream buffer 111 (process 8), and obtains JPEG format image data. Development processing is performed to generate YCbCr image data. The generated YCbCr image data is transferred to the third sub-processor 20C functioning as a format conversion unit. The access to the stream buffer 111 is executed via a dedicated communication path NEMM2 provided between the second sub processor 20B and the second memory controller 50.

  The third sub-processor 20C converts the format of the delivered YCbCr image data into RGB image data, and writes it into the band buffer 112 (process 9). The transfer of YCbCr image data is performed by arranging a part of the RAM provided in the second sub-processor 20B so that the third sub-processor 20D can also access the YCbCr image data obtained by the expansion processing. This is realized by saving the file. Note that the access to the band buffer 112 is performed via a dedicated communication path NEMM3 provided between the third sub-processor 20C and the second memory controller 50.

  When finishing writing image data to the band buffer 112, the third sub-processor 20C notifies the second sub-processor 20B of the end of processing. Receiving the notification, the second sub-processor 20B notifies the decoding control unit 22A of the first sub-processor 20A of the end of data writing to the band buffer (processing 10). Upon receiving the notification, the decoding control unit 22A notifies the image processing proxy control unit 21A of the end of the image decoding process (processing 11). This notification is transmitted from the third sub-processor 20C to the first sub-processor 20A via the communication path NIO2.

  Next, the image processing proxy control unit 21A requests the image correction control unit 23A to perform image correction (processing 12).

  The image correction control unit 23A requests the fourth sub-processor 20D functioning as an image correction unit to perform image correction processing on the image data stored in the band buffer 112 (processing 13). This request is transmitted from the first sub processor 20A to the fourth sub processor 20D via the communication path NIO2.

  The fourth sub-processor 20D reads out and acquires the image data stored in the band buffer 112 (process 14), performs the image correction process, and then writes the result back to the band buffer 112 (process 15). Note that access to the band buffer 112 is executed via a dedicated communication path NEMM4 provided between the fourth sub-processor 20D and the second memory controller 50.

  When the image correction process ends, the fourth sub processor 20D notifies the image correction control unit 23A of the first sub processor 20A of the end of the image correction process (process 16). This notification is transmitted from the fourth sub-processor 20D to the first sub-processor 20A via the communication path NIO2.

  The image correction control unit 23A that has received the notification of the end of the image correction process notifies the image processing proxy control unit 21A of the end of the image correction process (process 17).

  Next, the image processing proxy control unit 21A requests the resizing processing unit 24A to execute the resizing processing (processing 18).

  The resizing processing unit 24A reads and acquires the image data stored in the band buffer 112 (processing 19), and sets the resolution of the image represented by the acquired image data to the resolution of the image to be printed on the printing medium (printing resolution). A resize process is performed to convert the result into an output buffer, and the result is written in an output buffer (indicated as Outputbuf in the figure) 113 assigned to the RAM 110 (process 20). Then, when the resizing process unit 24A ends the resizing process, it notifies the image processing proxy control unit 21A of the end of the resizing process (process 21). Access to the band buffer 112 and the output buffer 113 is executed via a dedicated communication path NEMM1 provided between the first sub-processor 20A and the second memory controller 50.

  Upon receiving the resizing process end notification, the image processing proxy control unit 21A notifies the image object acquisition control unit 14 that the image data of the received image object has been acquired (processing 22).

  Upon receiving the image object acquisition notification, the image object acquisition control unit 14 notifies the image processing control unit 13 of the end of image object acquisition.

  Upon receiving the image object acquisition notification from the image object acquisition control unit 14, the image processing control unit 13 executes layout processing on the acquired image data of the image object to the layout processing unit 25A of the first sub-processor 20A. Is requested (process 23). Further, when there is a next image object to be acquired, the image processing control unit 13 causes the image object acquisition control unit 14 to start an acquisition operation for the next image object. As a result, as described above, the first to fourth sub-processors 20A to 20D operate, and the operation for acquiring the next image object is started. For example, since the image object acquisition instruction by the image object acquisition control unit 14 is normally executed in a preset band unit, the next image object acquisition instruction is the next of the band instructed to be acquired first. This is an acquisition instruction for the band. The layout processing execution request is transmitted via a dedicated communication path NESS1 provided between the first main processor 10 and the first sub-processor 20A.

  Upon receiving the layout processing request, the layout processing unit 25A of the first sub-processor 20A reads out and acquires the image data stored in the output buffer 113 (processing 24), and prints the image represented by the acquired image data. Layout image data arranged at an actual printing position on the medium is generated and written into an RGB buffer (indicated as RGBbuf in the figure) 114 assigned to the RAM 110 (process 25). When the layout processing ends, the layout processing unit 25A notifies the image processing control unit 13 of the end of the layout processing (processing 26).

  The image processing control unit 13 that has received the notification of the end of the layout processing starts the operation of the color conversion / halftone control unit 15 and, when receiving the notification of the end of acquisition of the next image object, the first sub The layout processing unit 25A of the processor 20A is requested to execute layout processing.

  The color conversion / halftone control unit 15 requests the fifth sub-processor 20E functioning as a color conversion / halftone encoding processing unit to perform color conversion and halftone encoding processing (processing 27). This request is transmitted via a dedicated communication path NESS5 provided between the first main processor 10 and the fifth sub processor 20E.

  The fifth sub-processor 20E that has received the execution request for the color conversion and the halftone encoding process reads out and acquires the layout image data stored in the RGB buffer 114 (process 28). Then, color conversion processing and halftone encoding processing are executed on the acquired layout image data, and the result of halftone encoding processing is written in the MW buffer 115 assigned to the RAM 110 (processing 29), and color conversion / halftone is performed. The control unit 15 is notified of the end of color conversion and halftone encoding processing (processing 30). Note that a request for color conversion and halftone encoding processing, and notification of completion of color conversion and halftone encoding processing are dedicated communication paths provided between the first main processor 10 and the fifth sub processor 20E. It is communicated via NESS5. Access to the RGB buffer 114 and the MW buffer 115 is executed via a dedicated communication path NEMM5 provided between the fifth sub-processor 20E and the second memory controller 50.

  Next, the color conversion / halftone control unit 15 requests the sixth sub-processor 20F functioning as a halftone decoding processing unit to execute halftone decoding processing (processing 31).

  The sixth sub-processor 20F that has received the execution request for the halftone decoding process reads out and acquires the halftone encoded data stored in the MW buffer 115 (process 32). Then, halftone decoding processing is executed on the acquired halftone encoded data to generate print image data representing the dot formation position on the print medium, and an image buffer (in the figure, assigned to the RAM 110). The data is written to 116 (denoted as Imagebuf) (process 33). Then, the sixth sub-processor 20F notifies the color conversion / halftone control unit 15 of the end of the halftone decoding process (process 34). The request for halftone decoding processing and the notification of the end of halftone decoding processing are transmitted via a dedicated communication path NESS6 provided between the first main processor 10 and the sixth sub processor 20F. Access to the MW buffer 115 and the image buffer 116 is executed via a dedicated communication path NEMM6 provided between the sixth sub-processor 20F and the second memory controller 50.

  When the color conversion / halftone control unit 15 receives the end notification of the halftone decoding process, the processing result output unit 16 operates to notify the printer engine control unit (not shown) of a print execution instruction. As a result, printing on the print medium is started based on the print image data stored in the image buffer 116. At this time, if the layout processing of the next image object has been completed, the color conversion / halftone control unit 15 performs color conversion and halftone on the layout image data for which the layout processing has been completed. Execute the process.

  As described above, the functions assigned to the first to sixth sub-processors 20A to 20F are executed under the control of the main processor 10, and the image processing for card printing is executed.

  In the above image processing, the case where the resizing process is executed after the image correcting process is described as an example. However, the resizing process may be performed first and then the image correcting process may be performed. In this case, after the image correction process, the image processing proxy control unit 21A notifies the image object acquisition control unit 14 that the image data of the received image object has been acquired. .

A3. effect:
As described above, in the print control apparatus IPC of the above-described embodiment, JPEG expansion processing and format conversion processing as image decoding processing executed in image processing for generating print image data based on print target image data , Image correction processing, resizing processing, layout processing, color conversion processing, halftone encoding processing, and halftone decoding processing functions are assigned to the six sub-processors 20A to 20F, and the image processing is controlled as a whole. An image processing control function is assigned to the main processor 10. Specifically, the JPEG expansion processing function is assigned to the second sub processor 20B, and the format conversion processing function is assigned to the third sub processor 20C. Then, an image processing proxy control function for controlling the operations of the second and third sub-processors instead of the main processor 10, a resizing processing function, and a layout processing function are assigned to the first sub-processor 20A. Further, the color conversion processing and halftone encoding processing functions are assigned to the fifth sub processor 20E, and the half tone encoding processing functions are assigned to the sixth sub processor 20F.

  As described above, each processing function executed in sequence in the image processing is assigned to each sub-processor, so that an image decoding process and an image correction that operate under the control of the image processing control function of the first sub-processor 20A are performed. Processing, image object acquisition processing including resizing processing, layout processing executed by the first sub-processor 20A, and color conversion processing and halftone processing executed by the fifth and sixth sub-processors 20E and 20F. Each can be executed in parallel. As a result, it is possible to increase the speed of image processing.

  In addition, the functions assigned to each processor are realized by reading and executing the program stored in the built-in ROM, so the processing contents and processing conditions can be easily modified by changing the program. Or can be changed, which is advantageous in terms of versatility.

  In addition, the main processor controls the operation of the image processing, and the actual processing is executed by the sub processor to which the corresponding processing function is assigned. Therefore, the load on the main processor at the time of executing the image processing is reduced. It is possible. In particular, the processes executed by the first to fourth sub-processors 20A to 20D are controlled by the image processing proxy control function of the first sub-processor 20A, so that these processes are executed. Therefore, it is possible to reduce the load on the main processor more effectively.

B. Variation:
As mentioned above, although embodiment of this invention was described, this invention is not limited to such embodiment at all, In the range which does not deviate from the summary, it is possible to implement in various aspects. . For example, the following modifications are possible.

  In the above embodiment, the JPEG development processing function of the image decoding process is assigned to the second sub-processor 20B, and the format conversion processing function is assigned to the third sub-processor 20C. Processing and format conversion processing functions may be assigned. Further, the JPEG expansion processing function may be further divided into a plurality of processing functions, and a sub processor may be assigned to each of the divided processing functions.

  In the above embodiment, the first sub-processor 20A has the decoding that controls the image decoding processing executed by the second and third sub-processors 20B and 20C in accordance with the image object acquisition instruction from the main processor 10. In addition to the control function, the image correction control function for controlling the image correction process executed by the fourth sub-processor 20D, and the resizing process function, a layout process function executed in accordance with the layout process instruction from the main processor 10 is assigned. However, the layout processing function sub processor may be provided independently.

  In the above embodiment, the color conversion processing and halftone encoding processing functions are assigned to the fifth sub-processor 20E. However, a sub-processor for the color conversion function may be provided separately. Further, in place of the main processor 10, a function for controlling the operation of a sub processor to which a color conversion processing function, a halftone encoding processing function, and a halftone decoding processing function are assigned, for example, a color conversion processing function is assigned. You may make it allocate to a subprocessor.

  That is, the print control apparatus is not limited to an asymmetric multiprocessor including one main processor and six sub-processors, and may include a plurality of sub-processors for one main processor. it can.

  In addition, in the image processing for generating the print image data based on the print target image data, various processing functions during the image processing that are sequentially executed can be assigned to the plurality of sub processors.

It is explanatory drawing which shows the main structures of the printing control apparatus to which the multiprocessor of this invention is applied. FIG. 10 is an explanatory diagram illustrating an image processing operation executed by the print control apparatus when printing an image represented by an image file stored in a memory card.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 ... Main processor 11 ... File system 12 ... File access control part 13 ... Image processing control part 14 ... Image object acquisition control part 15 ... Color conversion / halftone control part 16 ... Processing result output part 20A-20F ... Sub processor 21A ... Image processing proxy control unit 22A ... Decode control unit 23A ... Image correction control unit 24A ... Resize processing unit 25A ... Layout processing unit 30 ... Secondary cache controller 40 ... Secondary cache memory 50 ... Second memory controller 60 ... I / O Interface 70 ... first memory controller 80 ... bridge circuit 110 ... RAM
111 ... Stream buffer 112 ... Band buffer 113 ... Output buffer 114 ... RGB buffer 115 ... MW buffer 116 ... Image buffer 120A ... ROM
120B ... RAM
DESCRIPTION OF SYMBOLS 130 ... Input device 150 ... Card reader 150 ... Memory card 160 ... Printer engine NESS1-NESS6 ... Communication path NEMM1A-NEMM7A ... Communication path NEMM1B-NEMM7B ... Communication path NIO ... Communication path NIO2 ... Communication path NEIB ... Communication path NEMM7A ... Communication path IPC ... Print control device

Claims (2)

A print control device configured by an asymmetric multiprocessor, which executes image processing for generating print image data based on image data representing an image to be printed, and executes printing based on the generated print image data. And
A main processor that operates as an overall processing control unit that controls the entire image processing;
A second sub-processor that operates as a JPEG expansion unit that expands JPEG-format image data;
A third sub-processor operating as a format conversion unit for converting the JPEG-expanded image data from YCbCr image data to RGB image data;
A fourth sub-processor that operates as an image correction unit that corrects the image quality of the format-converted image data;
The JPEG development unit, the format conversion unit, and the image correction unit operate as a resize processing unit that executes a resizing process so that the resolution of the image represented by the image data whose image quality has been corrected becomes the resolution of an image to be printed on a print medium. And an image processing proxy control unit that controls the operation of the resizing processing unit on behalf of the overall processing control unit, and an image represented by the resized image data is actually displayed on the print medium. A first sub-processor that operates as a layout processing unit that performs layout processing at a print position;
The layout-processed image data operates as a color conversion processing unit that performs color conversion processing from RGB image data to CMYK image data, and determines the dot formation position based on the gradation value of each pixel in the color-converted image data. A fifth sub-processor that operates as a halftone encoding unit that performs a halftone encoding process that encodes encoded data representing information for
A sixth sub-processor that operates as a halftone decoding unit that executes halftone decoding processing for generating print image data indicating the dot formation position by decoding the encoded data that has been encoded;
A printing control apparatus comprising: A print control device configured by an asymmetric multiprocessor, which executes image processing for generating print image data based on image data representing an image to be printed, and executes printing based on the generated print image data. And
A main processor that operates as an overall processing control unit that controls the entire image processing;
A second sub-processor that operates as a JPEG expansion unit that expands JPEG-format image data;
A third sub-processor operating as a format conversion unit for converting the JPEG-expanded image data from YCbCr image data to RGB image data;
A fourth sub-processor that operates as an image quality correction unit that corrects the image quality of the image represented by the image data after being resized so as to have the resolution of the image to be printed on the print medium;
It operates as a resizing processing unit that executes the resizing process on the image data subjected to the format conversion, and the operations of the JPEG developing unit, the format converting unit, the image correcting unit, and the resizing processing unit are performed as the overall processing. A first image processor that operates as an image processing proxy control unit that performs control on behalf of the control unit, and that also operates as a layout processing unit that performs layout processing on an actual print position on the print medium, the image represented by the resized image data. Subprocessors,
The layout-processed image data operates as a color conversion processing unit that performs color conversion processing from RGB image data to CMYK image data, and determines the dot formation position based on the gradation value of each pixel in the color-converted image data. A fifth sub-processor that operates as a halftone encoding unit that performs a halftone encoding process that encodes encoded data representing information for
A sixth sub-processor that operates as a halftone decoding unit that executes halftone decoding processing for generating print image data indicating the dot formation position by decoding the encoded data that has been encoded;
A printing control apparatus comprising:

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