JP2007122303A - Logically partitioned computer system - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To monitor dispatch intervals in order to collect hypervisor dump information if a logical partition has a rate of using instruction processors equal to or lower than an intended value, that is, if the logical partition misses the dispatch of instruction processors for a fixed interval or longer. <P>SOLUTION: Control parts for monitoring dispatch intervals of instruction processors are provided to monitor the intervals at which instruction processors are dispatched to logical instruction processors. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

The present invention relates to monitoring of an instruction processor dispatch interval to a logical instruction processor of a logical partition in a logically partitioned computer system.

In recent years, information system management operations are not directly linked to profits, so outsourcing that outsources these operations to specialists has attracted attention as one of the management strategies. As an example of an outsourcing embodiment, a logically partitioned computer system is used. Each of the entrusted work is managed independently by dividing it into logical partitions. Due to the above, demands regarding the allocation of instruction processor capacity to logical partitions are also diversifying. In general,
A method of sharing an instruction processor among a plurality of logical partitions is used. In such a case, in a state where only one logical partition is heavily loaded, the instruction processor can be used beyond a predetermined range.
Further, as described in JP-A-9-81401, there is a method called resource capping that suppresses the instruction processor usage rate to a limit value or less. It is possible to combine such scheduling methods. The scheduling of the instruction processor is determined by the time slice scheduling method, and the instruction processor is dispatched to the logical partition in a time division manner. The time slice scheduling method is discussed in Japanese Patent Application Laid-Open No. 2003-177928 and Kyoritsu Publishing Co., Ltd., virtual computer, Masami Yamatani, page 183 of December 1, 1978.

Japanese Patent Laid-Open No. 9-81401 Japanese Patent Laid-Open No. 2003-177928 Kyoritsu Publishing Co., Ltd., virtual computer, Masami Yamatani, page 183, December 1, 1978

In general, a logically partitioned computer system is used by sharing a small number of instruction processors in many logical partitions by reducing the number of expensive and high-performance instruction processors. The allocation of instruction processors to logical partitions is determined by the instruction processor usage rate set for each logical partition. Whether the instruction processors are allocated by the instruction processor usage rate set for the logical partition can be determined by the instruction processor usage rate collected by the system monitor.
However, if the result collected by the system monitor is not the intended value of the usage rate of the instruction processor in the logical partition (for example, the system is used in spite of the state where a logical partition is using the instruction processor without a break) (The case where the instruction processor usage collected by the monitor is significantly lower than the instruction processor usage set for the logical partition), only the result that there was a problem because the system monitor is a post-mortem result Does not remain.

The above problem may be dealt with by collecting hypervisor dump information, but the instruction processor usage rate at the time of dump collection is not necessarily problematic.

Therefore, in the present invention, when the usage rate of an instruction processor in a certain logical partition is less than an intended value, that is, dispatch that collects dump information of the hypervisor when the instruction processor is not dispatched to a certain logical partition for a certain interval or more. An object of the present invention is to provide a logically partitioned computer system for monitoring intervals.

In order to achieve the above object, in the dispatch interval monitoring of an instruction processor to a logical partition according to the present invention, a control unit for monitoring the dispatch interval of the instruction processor is provided in the logical partition, and the instruction processor is dispatched to the logical instruction processor. Means for monitoring the interval are provided.

As described above, according to the dispatch interval monitoring of the instruction processor to the logical partition of the present invention, there are the following effects. This is to make it possible to collect the dump information of the hypervisor at the time when an unintended phenomenon such that the instruction processor is dispatched at a certain interval or more in a certain logical partition without stopping the operating system operating in the logical partition.
For this reason, it is possible to minimize the influence on the logically partitioned computer system and to perform investigation using the hypervisor dump information.

An embodiment of a dispatch interval monitoring method for an instruction processor in a logically partitioned computer system according to the present invention will be described below with reference to the drawings.

FIG. 1 is a system configuration diagram showing an embodiment of the present invention. Logical partitioned computer system 1
00 can define one or more logical partitions 101 in the system. One or more logical instruction processors 102 can be configured in the logical partition. The logical instruction processor is dispatched by the dispatch control unit 104 of the hypervisor 103 that manages the logically partitioned computer system in a manner that shares the instruction processor 105 with other logical partitions based on the instruction processor usage rate 201 of FIG. . The instruction processor usage rate 201 is set in the logical partition information unit 108 via the console input / output control unit 107 in response to a request from the console device 106. Since 50% is set in the instruction processor usage rate 201, 50% of the capability of the instruction processor can be used simply. When the dispatch processor 104 dispatches the instruction processor 105, the dispatch interval monitoring unit 109 determines whether the dispatch is performed within 60 ms set in the dispatch interval monitoring time 202 of FIG. If the monitoring time is exceeded, a dump output request is sent to the dump output control unit 110 of the hypervisor 103, and the hypervisor dump information is output to the dump file 111. The dispatch interval monitoring time 202 is similar to the instruction processor usage rate 201 in response to a request from the console device 106.
7 is set in the logical partition information unit 108.

FIG. 3 is a diagram illustrating an example of instruction processor dispatch information managed by the logical instruction processor 102 generated for each logical partition. As shown in the figure, the dispatch interval monitoring time 3
01, last dispatch time 302, current dispatch time 303, and maximum dispatch interval 304, and information is managed for each logical instruction processor generated in the logical partition. The dispatch interval monitoring time 301 managed here reflects the value set in the dispatch interval monitoring time 202 in FIG. Other previous dispatch time 302, current dispatch time 303, and maximum dispatch interval 304 are information set when dispatch interval monitoring is actually activated.

4 and 5 are flowcharts of the dispatch interval monitoring unit 109. The dispatch interval monitoring unit 109 performs the initial setting process of FIG. 4 in response to a dispatch interval monitoring activation request from the console device 106. In the initial setting process, the logical processor information section is initialized.
Initial values 0 are set in the current dispatch time 303 and the maximum dispatch interval 304 (
Step 401). The dispatch interval monitoring time 202 set in the logical partition information unit 108 is set as the dispatch interval monitoring time 301 (step 402). In the previous dispatch time 302, the current time is acquired and set (step 403). After completion of the initial setting process, the dispatch interval is monitored by the dispatch interval monitoring process of FIG. In the dispatch interval monitoring process, the current time to be compared is acquired and set as the current dispatch time 303 (step 501). The current dispatch interval is obtained by subtracting the current dispatch time 303 from the previous dispatch time 302 (step 5).
02). The magnitude relationship between the current dispatch interval and the dispatch interval monitoring time 301 is compared (step 503). When the current dispatch interval is larger, the dispatch interval monitoring process for all logical partitions is stopped, and the dump output control unit 11 of the hypervisor 103 is stopped.
A dump information output request is sent to 0 (step 507). When the current dispatch interval is smaller, the magnitude relationship between the current dispatch interval and the maximum dispatch interval 304 is compared (step 504). If the current dispatch interval is larger, the maximum dispatch interval 304 is updated to the current dispatch interval (step 505). If the current dispatch interval is smaller, or after the maximum dispatch interval is updated, the previous dispatch time 302 is updated to the current dispatch time 303 (step 506).
. By repeating the dispatch interval monitoring process shown in FIG. 5, it is possible to collect information when the dispatch interval is longer than intended.

It is a figure which shows the outline | summary of the system block diagram by one Embodiment of this invention. It is a table figure for managing the definition information regarding the logical instruction processor of a logical partition. It is a table figure for managing the dispatch interval with respect to the logical instruction processor of a logical partition. It is a flowchart figure which shows the dispatch interval monitoring start process with respect to the logical instruction processor of a logical partition. It is a flowchart figure which shows the dispatch interval monitoring process with respect to the logical instruction processor of a logical partition.

Explanation of symbols

DESCRIPTION OF SYMBOLS 100 ... Logical partition type computer system, 101 ... Logical partition, 102 ... Logical instruction processor, 103 ... Hypervisor, 104 ... Dispatch control part, 105 ... Instruction processor, 10
6 ... Console device 107 ... Console input / output control unit 108 ... Logical partition information unit 10
9 ... dispatch interval monitoring unit, 110 ... dump output control unit, 111 ... dump file.

Claims (2)

In a logically partitioned computer system in which a plurality of logical partitions are generated by logically dividing physical computer resources configured in one physical computer system and one or more operating systems can be executed simultaneously, an instruction processor The logical partition has one or more logical instruction processors, and the instruction processor is dispatched to the logical instruction processor, and control is performed to monitor the dispatch interval of the instruction processor. A logically partitioned computer system characterized in that an interval is provided to monitor the interval at which the instruction processor is dispatched to the logical instruction processor. The logical partition type computer according to claim 1, wherein an instruction processor dispatch interval to a logical instruction processor of a logical partition is monitored, and an abnormality is reported when the instruction processor is not dispatched within a predetermined time. system.

Images