JP2007093330A - Defect extraction device and defect extraction method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a defect extraction device and a defect extraction method capable of improving the reliability of defect inspection, and reducing the data amount of inspection result. <P>SOLUTION: This device has an illumination part 12 for irradiating a semiconductor wafer W with a light; an imaging part 13 for imaging the surface of the semiconductor wafer W irradiated with the illumination part 12; a defect extraction part 33 for extracting defects, by comparing an inspection image imaged by the imaging part 13 with a reference image; and a quality determination part 34 for setting an inspection region determined as being a defective domain in the preceding process as a non-inspection region, based on the extraction result by the defect extraction part 33, and determining the quality relative to other inspection regions that exclude this non-inspection region. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a defect extraction apparatus and a defect extraction method for extracting defects formed on the surface of a sample to be inspected such as a semiconductor wafer.

  In a manufacturing process for manufacturing a chip on a semiconductor wafer, for example, a defect extraction apparatus that extracts a defect on a semiconductor wafer by macro inspection for each manufacturing process such as a film forming process or an etching process has been proposed (for example, a patent). References 1 and 2).

This defect extraction apparatus captures an image to be inspected on the surface of a semiconductor wafer by irradiating the surface of the semiconductor wafer with light and imaging the irradiated portion. Then, the feature amount such as the brightness of the captured image to be inspected is compared with the feature amount of the reference image having no defect set in advance for each pixel, so that scratches, foreign matter, unevenness, dirt on the semiconductor wafer are compared. The defect position where a defect such as the above is formed is extracted macroscopically. Note that the inspection result by the defect inspection apparatus is stored in a recording apparatus.
In such a defect inspection apparatus, there arises a problem that the base defect extracted in the previous process is detected again as a pseudo defect. In order to solve this problem, Patent Document 1 pays attention to the fact that the range of the base portion having a difference in luminance is wide, and a pixel area (for example, 16 × 16 pixels) determined with respect to a preset defect determination threshold value. ) Is added to obtain a new defect determination threshold value, thereby preventing the occurrence of pseudo defects.
JP 2001-68517 A (FIG. 1) JP 2003-243290 A (FIG. 1)

However, in the conventional defect extraction apparatus, since the defect extraction image in which the presence or absence of the defect is determined in each pixel of the image to be inspected is stored in the recording apparatus, the data amount of the defect extraction image increases, and the stored defect There has been a problem that processing using the extracted image takes time.
Further, in the inspection apparatus of Patent Document 1 described above, since the pseudo defects due to the difference in the film thickness of the base are not detected, the base defects extracted in the previous process are extracted again as surface defects. There arises a problem that it is determined as a surface defect.

  The present invention has been made in view of the above circumstances, and has an object to provide a defect extraction apparatus and a defect extraction method capable of improving the reliability of defect inspection and reducing the data amount of inspection results. To do.

The present invention employs the following means in order to solve the above problems.
The defect extraction apparatus according to the present invention is imaged by the illumination unit that irradiates the inspection target with light, the imaging unit that images the surface of the inspection target irradiated by the illumination unit, and the imaging unit. Comparing the image to be inspected with a preset reference image and extracting the defect, and based on the extraction result by the defect extraction unit, the inspection area determined as a defective area in the previous process is not inspected And a pass / fail judgment unit for judging pass / fail with respect to other inspection areas excluding the non-inspection area.

  The defect extraction apparatus according to the present invention includes an illuminating unit that irradiates light to an inspection target, an imaging unit that images the surface of the inspection target irradiated by the illuminating unit, and an image captured by the imaging unit. A defect extraction unit that extracts a defect by comparing the inspected image with a preset reference image, an input unit that inputs design information of the inspection object, and a preprocess of the inspection object A data storage unit for recording the pass / fail judgment result in the process, and a pass / fail judgment unit for reading the pass / fail judgment result in the previous process from the data storage unit and judging pass / fail only in the inspection area determined to be good by the pass / fail judgment result in the previous process It is characterized by providing.

  Moreover, it is preferable that the defect extraction apparatus according to the present invention includes a display unit that displays the inspection area in different colors according to the quality determination.

  In addition, the defect extraction method according to the present invention includes an imaging step of irradiating an object to be inspected and imaging the irradiated area, an inspection image captured in the imaging step, and a reference image set in advance. And the defect extraction process for extracting the defect position, and the pass / fail determination for other inspection areas excluding the inspection area determined as the defect area in the previous process based on the extraction result of the defect extraction process And a detection result output step.

  According to the pass / fail determination unit of the present invention, since the pass / fail determination result is converted for each inspection area composed of a plurality of pixels of the inspection image based on the extraction result by the defect extraction unit, The data amount of the inspection result can be reduced as compared with the case where the image data is extracted and the defect position is added to the inspected image.

  In addition, when determining pass / fail for an object to be inspected, defect determination can be performed more efficiently by performing pass / fail determination only on the inspection area determined to be good in the previous pass / fail determination result, and due to the underlying defect. Detection of pseudo defects can be prevented, and the reliability of defect inspection on the surface of the inspection object can be improved.

Next, an embodiment of the present invention will be described with reference to FIG.
The defect extraction apparatus 1 according to the present embodiment is a macro inspection apparatus that macroscopically detects defects in each chip formed on a semiconductor wafer.
The defect extraction apparatus 1 includes an inspection unit 2 that inspects a semiconductor wafer W that is one of inspection objects, a transfer unit 3 that transfers and positions the semiconductor wafer W, and an apparatus that controls the entire defect extraction apparatus 1. A control unit 4, an operation unit (input unit) 5 for operating the apparatus control unit 4, a display unit 6 for displaying inspection results, and a data storage unit 7 for storing defect extraction results are provided.

The inspection unit 2 includes a sample holding unit 11 that holds the semiconductor wafer W, an illumination unit 12, and an imaging unit 13.
The sample holder 11 is configured to hold the entire back surface of the semiconductor wafer W flatly by a small protrusion and hold it by vacuum suction in a state where the semiconductor wafer W is placed on the upper surface. As a result, the semiconductor wafer W is fixed so as not to move with respect to the sample holder 11. The sample holder 11 is configured to be movable at a constant speed in an axial direction along the surface of the semiconductor wafer W (A-B direction shown in FIG. 1).

The illuminating unit 12 makes illumination light incident on the surface of the semiconductor wafer W placed on the sample holding unit 11 at an incident angle θ ₁ and illuminates the entire surface of the semiconductor wafer W uniformly with a parallel light beam. Or it is comprised by the line illumination light source which irradiates the surface of the semiconductor wafer W to a thin linear form. The illumination unit 12 is configured to be movable so that the incident angle of light with respect to the semiconductor wafer W can be changed without changing the irradiation position on the surface of the semiconductor wafer W.
The imaging unit 13 receives reflected light reflected at the reflection angle θ ₂ from the irradiation position on the surface of the semiconductor wafer W and converts it into an image, and is configured by a line sensor camera or an area sensor camera. The imaging unit 13 is configured to be rotatable so that the angle of the optical axis c can be changed. In this embodiment, the illumination part 12 is comprised with the line illumination light source, and the imaging part 13 is comprised with the line sensor camera.

The imaging unit 13 captures the diffracted light reflected on the surface of the semiconductor wafer W by appropriately adjusting the optical axis angle (reflection angle θ ₂ ) of the imaging unit 13 with respect to the incident angle θ ₁ of light by the illumination unit 12. The diffraction image can be obtained as an inspection image. When the imaging unit 13 includes an interference filter, the imaging unit 13 can obtain an interference image using light interference as an image to be inspected. The defect extraction on the semiconductor wafer W is performed using the diffraction image and the interference image.

The transfer unit 3 includes a sample loading / unloading unit 21 for loading / unloading the semiconductor wafer W, a sample transfer unit 22, and a sample positioning unit 23.
The sample carry-in / out unit 21 carries in the semiconductor wafer W from the outside to the inside of the defect extraction apparatus 1 and carries out the semiconductor wafer W to the outside of the defect extraction apparatus 1.
The sample transfer unit 22 is configured to suck and hold the semiconductor wafer W and transfer the semiconductor wafer W between the sample carry-in / out unit 21, the sample positioning unit 23, and the inspection unit 3. Note that the structure may be such that the transfer is performed by holding the edge portion of the semiconductor wafer W.
The sample positioning unit 23 detects notches or orientation flats (hereinafter abbreviated as orientation flats) formed on the semiconductor wafer W to position both or one of the rotational position and the center position of the semiconductor wafer W. is there.

The apparatus control unit 4 includes a drive control unit 31 that performs drive control of the inspection unit 2 and the conveyance unit 3, an image correction unit 32, a defect extraction unit 33, and a quality determination unit 34.
The drive control unit 31 controls the switching of light irradiation by the illumination unit 12, controls the incident angle θ ₁ and intensity of the irradiated light, adjusts the optical axis angle θ ₂ by the imaging unit 13, and controls the semiconductor by the transport unit 3. The transfer of the wafer W is driven.
The image correction unit 32 performs luminance correction such as shading correction, distortion correction, and magnification correction on the inspection image captured by the imaging unit 13.

The defect extraction unit 33 extracts defects formed on the surface of the semiconductor wafer W by comparing the inspected image corrected by the image correction unit 32 with a reference image having no defect registered in advance.
Further, the defect extraction unit 33 discriminates the manufacturing process performed on the semiconductor wafer W based on the inspection condition (recipe) input by the operation unit 5, and the manufacturing performed on the semiconductor wafer W from a plurality of stored reference images. The reference image corresponding to the process is used to compare with the image captured by the imaging unit 13.

The pass / fail judgment unit 34 converts the data image extracted by the defect extraction unit 33 into a pass / fail judgment result for each fixed area composed of a plurality of pixels such as a chip area. The pass / fail judgment results are, for example, “1” for a good area that is a chip area in which no defect is detected, “3” for a defect area that is a chip area in which a defect has been detected, The non-inspection area, which is a defective chip area, is output as “5”.
The pass / fail judgment unit 34 reads the pass / fail judgment result (inspection result data) of the previous process from the data storage unit 7 at the start of inspection when it is set not to inspect the underlying defective chip in the recipe creation by the operation unit 5. The defect data extracted by the defect extraction unit 33 is set as a non-inspection area by setting a chip area (position) corresponding to the base defect chip area, which is determined to be defective because a defect is extracted in the previous process based on the pass / fail judgment result. It is configured to perform pass / fail judgment for other areas excluding the non-inspection area. The non-inspection area is set at the time of slot inspection in which the semiconductor wafer W is taken out from the cassette, and it is possible to prevent the defect extraction unit 33 from extracting defects in the chip set as the non-inspection area.

  The operation unit 5 is input means such as a keyboard, a mouse, a trackball, and a touch panel monitor, and includes at least one of them. In addition, the operation unit 5 can input a recipe setting such as a non-inspection function for a base defective chip, a lot ID of the semiconductor wafer W, a manufacturing process name applied to the semiconductor wafer W, and the like to the defect extraction unit 33. It is configured to be able to.

The display unit 6 displays an image that has been colored corresponding to the good region, the defective region, and the non-inspection region, which are the good / bad determination results converted by the good / bad determination unit 34. In addition to the quality determination result image, a defect area, the number of defects, a defect name, a product name, a semiconductor chip manufacturing process name, a lot ID, a wafer ID, a slot number, and the like may be displayed.
The data storage unit 7 is a recording device that stores pass / fail determination results, design information of the semiconductor wafer W input by the operation unit 5, and the like.

Next, the defect extraction method according to the present invention will be described with reference to FIGS.
As shown in FIG. 3, this defect extraction method is applied during each semiconductor chip manufacturing process in the manufacturing process of the semiconductor chip formed on the semiconductor wafer W. The semiconductor chip manufacturing process of the semiconductor wafer W includes, for example, first to third semiconductor chip manufacturing processes (steps S11 to S13 shown in FIG. 3), and is performed by a defect extraction method after each semiconductor chip manufacturing process. Defect extraction of the semiconductor wafer W is performed.

In the following, a defect extraction method for the semiconductor wafer W in which the first semiconductor chip manufacturing process has been performed will be described.
First, a sample carrying-in process is performed (step S1 shown in FIG. 2).
First, the semiconductor wafer W is loaded into the sample loading / unloading unit 21. Here, the semiconductor wafer W is transferred to the sample positioning unit 23 by the sample transfer unit 22 in accordance with an inspection start signal from the operation unit 5. Then, the semiconductor wafer W is positioned at a predetermined position by detecting a notch, an orientation flat or a center blur amount of the semiconductor wafer W. The semiconductor wafer W positioned by the sample positioning unit 23 is transported to the sample holding unit 11 of the inspection unit 2 by the sample transfer unit 22.

Next, an input process is performed (step S2 shown in FIG. 2).
In this case, an inspection condition for the semiconductor wafer W transferred to the inspection unit 2 is input from the operation unit 5. This inspection condition is set, for example, by inputting the process name before the manufacturing process performed on the semiconductor wafer W and the lot ID of the semiconductor wafer W. As the inspection conditions set here, there are an irradiation condition of the irradiation unit 12 in an imaging process described later, an imaging condition of the imaging unit 13, an area where presence / absence of a defect is determined in an inspection result output process described later, and the like.

Next, an imaging process is performed (step S3 shown in FIG. 2).
First, the illumination unit 12 irradiates the surface of the semiconductor wafer W placed on the sample holding unit 11 with thin linear light at an incident angle θ ₁ . The imaging unit 13 receives the reflected light reflected at the reflection angle θ ₂ from the irradiation position on the surface of the semiconductor wafer W and converts it into an image.
At this time, the sample holder 11 on which the semiconductor wafer W is placed has an axial direction (AB shown in FIG. 1) along the surface of the semiconductor wafer W at a predetermined speed set based on the capturing period of the imaging unit 13. Direction). The illumination unit 12 scans the surface of the semiconductor wafer W in the A-B direction, whereby an inspection image that is an image of the entire surface of the semiconductor wafer W is obtained.
The inspection image captured in this way is sent to the image correction unit 32.

The drive control unit 31 controls the light intensity by the illumination unit 12 and the incident angle θ _{1 with} respect to the semiconductor wafer W based on the inspection condition input from the operation unit 5. Further, the reflection angle θ ₂ of the optical axis received by the imaging unit 13 is controlled by the drive control unit 31 as in the illumination unit 12.

Next, a defect extraction process is performed (step S4 shown in FIG. 2).
This is because the image correction unit 32 first performs luminance correction such as shading correction on the inspected image obtained by the inspection unit 2, individual differences of lenses that are components of the imaging unit 13, and the optical system. Image distortion due to an adjustment error or an error in image magnification is corrected by image processing. This corrected image to be inspected is sent to the defect extraction unit 33.

  Next, the defect extraction unit 33 reads a reference image corresponding to the semiconductor wafer W on which the first semiconductor chip manufacturing process is performed based on the inspection condition input by the operation unit 5, and the reference image and the inspection image And compare. This comparison is performed in units of pixels of the reference image and the image to be inspected, and when the difference between the feature amount such as luminance in the reference image and the feature amount in the inspected image is larger than a predetermined threshold value, the comparison portion is determined. Extract as a defect. The defect extraction result extracted in this way is sent to the pass / fail judgment unit 34.

Next, an inspection result output process is performed (step S5 shown in FIG. 2).
In this case, the pass / fail judgment unit 34 converts the chip area as shown in FIG. 4A into a pass / fail judgment result for each chip area based on the defect extraction result extracted by the defect extraction unit 33. . In FIG. 4A, a region where no chip is formed is “0”, and a region where a chip is formed is “1”.
Then, as shown in FIG. 4B, a good area where no defect is determined is output as “1”, and a defective area where a defect is determined is output as “3”. An uninspected area in which no chip is formed and no defect is determined is converted as “0”.

  As shown in FIG. 5A, the display unit 6 displays different colors in the good region W1 and the defect region W2 based on the pass / fail determination result output by the pass / fail determination unit 34. The data storage unit 7 stores the lot ID of the semiconductor wafer W, the name of the semiconductor chip manufacturing process applied to the semiconductor wafer W, and the pass / fail judgment result.

Finally, a sample unloading process is performed (step S6 shown in FIG. 2).
This is similar to the sample loading process described above, in which the semiconductor wafer W loaded into the inspection unit 2 is transferred to the sample loading / unloading unit 21 and taken out from the defect extraction apparatus 1.

The semiconductor wafer inspection of the semiconductor wafer W is performed as described above.
Thereafter, for the area determined to be a defective area based on the quality determination result converted by the quality determination unit 34, for example, the defect area is confirmed using another inspection apparatus such as a microscope. Do.

Next, a defect extraction method for the semiconductor wafer W in which the second semiconductor chip manufacturing process has been performed will be described. In the following description, the description of the point that is the same as the defect extraction method of the semiconductor wafer W in which the first semiconductor chip manufacturing process described above is performed will be omitted.
This defect extraction method for the semiconductor wafer W is the first ID which is the process ID of the lot ID of the semiconductor wafer W and the previous process (first process) of the second semiconductor chip manufacturing process in the input process (step S2 shown in FIG. 2). Enter the semiconductor chip manufacturing process.
In this way, the inspection result of the semiconductor wafer W in the previous process stored in the data storage unit 7 is read, and the area determined as a defective area by the inspection result is inspected in the current process (second process). Mask data for setting a non-inspection area not to be performed is created. As shown in FIG. 4C, this mask data is formed so as to inspect only the chip area determined to be good in which no defect was detected in the first step of FIG. 4B. . In this figure, “0” is an inspection area to be inspected in the second process, and “1” is an inspection in the second process for an area corresponding to a base defective chip in which a defect is detected in the first process. There is no non-inspection area.

  Further, in the inspection result output step (step S5 shown in FIG. 2), the pass / fail judgment unit 34 converts the pass / fail judgment result as shown in FIG. 4D based on the defect extraction result extracted by the defect extraction unit 33. To do. However, since the mask data is created in the input process described above, the chip corresponding to “1” in the mask data of FIG. 4C is set to the non-inspection area “5”, so that FIG. ), Only the chip including the defect newly detected in the second step is converted into the defect area “3”. In FIG. 4 (e), a good region where no defect was extracted is “1”, a defect region where a defect was extracted in the second step is “3”, and a defect was detected in the first step. A non-inspection area that has not been inspected for defects in the process is converted to “5”. An uninspected area in which no chip is formed and no defect is extracted is converted as “0”.

  As shown in FIG. 5B, the display unit 6 displays the good region W1, the defective region W2, and the non-inspection region W3 in different colors based on the pass / fail determination result converted by the pass / fail determination unit 34. About the area | region determined to be a defect area | region, after performing a sample carrying-out process (step S6 shown in FIG. 2), the defect area | region is confirmed using the other inspection apparatus which can perform a micro inspection similarly to the above.

Next, a defect extraction method for the semiconductor wafer W in which the third semiconductor chip manufacturing process has been performed will be described. In the following description, the description of the point that is the same as the defect extraction method of the semiconductor wafer W in which the above-described second semiconductor chip manufacturing process is performed will be omitted.
In this defect extraction method for the semiconductor wafer W, in the input step (step S2 shown in FIG. 2), as shown in FIG. 4 (f), the chips detected in the previous step including the first step and the second step are detected. To form mask data. This mask data is formed so as to perform inspection only in a good region where no defect is extracted in the first step and the second step in the same manner as described above in FIG.

  Then, in the inspection result output step (step S5 shown in FIG. 2), the pass / fail judgment unit 34 converts the pass / fail judgment result as shown in FIG. 4 (g) based on the defect extraction result extracted by the defect extraction unit 33. However, since the mask data as shown in FIG. 4 (f) is created, the pass / fail judgment result as shown in FIG. 4 (h) is obtained. And as shown in FIG.5 (c), the display part 6 displays with a different color for every quality determination result based on the quality determination result which the quality determination part 34 converted.

According to the defect extraction apparatus 1 and the defect extraction method, only the non-defective chips excluding the base defective chips (chips determined to be defective areas in the previous process) based on the extraction result by the defect extraction unit 33 are determined by the quality determination unit 34. Therefore, it is possible to improve the reliability of the defect inspection of the surface of the semiconductor wafer W without erroneously detecting the underlying defect in which the defect was found in the previous process.
In addition, by using the pass / fail determination result that is the presence / absence of a defect for each chip region, the inspection result of the semiconductor wafer W is mutually exchanged with another defect extraction apparatus capable of performing other micro inspections such as an optical microscope. Therefore, efficient defect extraction of the semiconductor wafer W can be performed.
Further, the pass / fail judgment unit 34 converts the result into pass / fail judgment results for each chip area, so that the presence / absence of a defect can be determined for each chip.
Further, when the pass / fail judgment result is displayed on the display unit 6, it is displayed in a different color for each pass / fail judgment result, so that the defect extraction result of the inspection object can be confirmed more efficiently.

  Further, by using the design information and the pass / fail determination result in the previous process, the chip determined to be good in the previous pass / fail determination result without storing the image data of the base process (previous process) in the data storage unit 7. By performing pass / fail judgment only on the area, the amount of inspection result data can be reduced, and more efficient defect extraction can be performed without using special hardware.

  Moreover, since the display part 6 displays a determination area | region with a different color for every pass / fail determination result, the defect extraction result of the semiconductor wafer W can be confirmed more efficiently.

The technical scope of the present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the spirit of the present invention.
For example, in the above-described embodiment, the pass / fail determination unit performs pass / fail determination for each fixed area that is a chip area. However, the fixed area may be an area composed of a plurality of pixels.
Further, although the color-coded image based on the pass / fail determination result is displayed on the display unit, the pass / fail determination result may be combined with the image to be inspected and displayed.
In addition, a re-determination means is provided for correcting a defect using a laser repair device or the like for a defect area determined to be a defect by the detection result output process, and performing defect extraction again on the semiconductor wafer having the defect corrected. Also good.

It is a block diagram which shows the defect extraction apparatus in one Embodiment concerning this invention. It is a flowchart which shows the defect extraction method in one Embodiment concerning this invention. It is a flowchart which shows the semiconductor chip manufacturing process in one Embodiment concerning this invention. It is a chart figure which shows the quality determination result and mask data in one Embodiment concerning this invention. It is the schematic which shows the display part in one Embodiment concerning this invention.

Explanation of symbols

1 Defect extraction device 5 Operation unit (input unit)
6 Display unit 12 Illumination unit 13 Imaging unit 33 Defect extraction unit 34 Pass / fail judgment unit W Semiconductor wafer (inspected sample)

Claims (4)

An illumination unit for irradiating the object to be inspected with light;
An imaging unit that images the surface of the inspection object irradiated by the illumination unit;
A defect extraction unit that extracts a defect by comparing the inspected image captured by the imaging unit with a preset reference image;
Based on the extraction result by the defect extraction unit, the inspection area determined as a defective area in the previous process is set as a non-inspection area, and the quality determination section determines the quality of other inspection areas excluding the non-inspection area And a defect extraction apparatus characterized by comprising: An illumination unit for irradiating the object to be inspected with light;
An imaging unit that images the surface of the inspection object irradiated by the illumination unit;
A defect extraction unit that extracts a defect by comparing the inspected image captured by the imaging unit with a preset reference image;
An input unit for inputting design information of the inspection object;
A data storage unit for recording a pass / fail determination result in a previous process of the inspection object;
A defect extraction apparatus comprising: a quality determination unit that reads a quality determination result in a previous process from the data storage unit and determines quality only in an inspection area determined to be good in the quality determination result of the previous process.   The defect extraction apparatus according to claim 1, further comprising a display unit that displays the inspection area in different colors according to the quality determination. An imaging step of irradiating the object to be inspected with light and imaging the irradiated area;
A defect extraction step of extracting a defect position by comparing the inspection image captured in the imaging step with a preset reference image;
A defect extraction method comprising: a detection result output step for determining pass / fail with respect to another inspection region excluding the inspection region determined as a defect region in the previous step based on the extraction result in the defect extraction step .

Images