JP2007060531A - Moving picture display device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a moving picture receiver capable of applying high-quality image interpolation processing to a significant region at all the time even if a packet is delayed or lost, and waiting long the reception of the delay packet in a region of low significance, thereby reducing the loss of image data caused by delay and displaying high-quality moving picture data at all the time. <P>SOLUTION: If image data in a region of interest are lost in a network route, high-quality image interpolation processing is performed and if image data in a peripheral region such as 503, 502 are lost, simple interpolation processing is applied. When applying the simple interpolation processing, since the interpolation processing is completed in a short time, the delay packet is waited long. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a display device that displays a moving image distributed via a network.

  In a system that distributes moving image data over a network, a loss or delay of a data packet transmitted on the network path has occurred, and as a result, the distributed image cannot be reproduced correctly and image degradation has occurred.

  In particular, in a system that requires real-time performance, when a delivery delay occurs, a delay packet that does not meet the display timing must be regarded as lost data and display processing must be started. As a countermeasure, there is known a technique such as error correction (FEC) technology that restores lost packets by transmitting redundant data.

  In addition, as a countermeasure against lost or delayed packets, there is one having a function of performing a retransmission request in time for display timing when data on the network is lost (see, for example, Patent Document 1).

  On the other hand, in order to display image data in which a part has been lost, a method of interpolating a missing portion of an image is taken. There are various image interpolation methods for interpolating the missing part, such as using the data of the previous frame as the missing part data and generating the missing part data from the data around the missing part.

For example, there is a technique in which a plurality of interpolation methods are applied to a missing portion, and data having the highest similarity with surrounding images is selected as interpolation data for the missing portion (see, for example, Patent Document 2).
JP 2003-169040 A Japanese Unexamined Patent Publication No. 7-111654

  However, in a system that makes a retransmission request, a function for responding to the retransmission request is also necessary on the moving image data transmission side, and the system on the transmission side is limited. In addition, in the case of data with a high frame rate of moving image data to be distributed, since the display update interval is short, it is considered that the effect of packet loss compensation by retransmission cannot be sufficiently expected in consideration of the time required for retransmission.

  Also, in the conventional method of interpolating missing image data, the interpolation processing takes a long time when high-quality interpolation processing is performed. For this reason, it is necessary to make the interpolation processing start timing earlier so as to be in time for the image display timing, and as a result, the packet loss caused by the delay is increased.

  In order to achieve the above object, the first aspect of the invention provides a receiving means for receiving moving image data distributed via a network, a decoding means for decoding compressed image data, and a display for displaying a moving image. Moving image having a plurality of interpolation methods for interpolating a missing area of image data, and a missing area detecting means for detecting a missing area in the image data received by the receiving means In the image display device, timing output means for outputting timing at the maximum time required for each interpolation processing of the interpolation means having different processing times with reference to the update timing of the display means, and output at the output timing of the timing output means Interpolation processing selection means for selecting an interpolation process by associating the timing type with the detection output of the missing area detection means. Sea urchin was constructed.

  According to a second aspect of the present invention, in the moving image display device according to the first aspect, the missing region detection means divides the detection region so as to detect at least the attention region, and the interpolation processing selection means When a region is missing, a high-quality interpolation process is selected from the interpolation processes.

  According to a third aspect of the present invention, in the moving picture display device according to the first aspect, the missing area detecting means outputs an output value corresponding to a missing ratio in one frame image.

  According to a fourth aspect of the present invention, in the moving image display device according to the first aspect, the image interpolation processing has an interpolation processing method for performing interpolation processing based on a motion vector, and the moving image received by the receiving means A motion vector detecting means for detecting a motion vector from the image data is provided.

  In the moving picture receiving apparatus of the present invention, even when a packet is delayed or lost, an important area can always be subjected to high-quality interpolation processing. Since it is possible to wait for a long time to receive a delayed packet in an area of low importance, it is possible to reduce the loss of image data due to the delay, and it is possible to always display high-quality moving image data.

(First embodiment)
FIG. 1 is a block diagram showing a schematic configuration of the moving image display apparatus of the first embodiment. In FIG. 1, reference numeral 101 denotes a CPU, and the control of the moving image display apparatus of the first embodiment is controlled by the CPU 101. A DMA controller (DMAC) 102, a memory controller 103, a communication unit 107, a decoding unit 108, an image interpolation processing unit 109, and a display control unit 110 are connected to the CPU 101 via a bus 106. Further, the CPU 101 is connected to a signal line 122 that indicates a reception state of moving image data from the communication unit 107. Further, from the image interpolation processing unit 109, a signal line 120 indicating the operation state of the image interpolation processing is connected and an interpolation processing signal is input. A signal line 121 that outputs a state indicating whether image data has already been received from a region having a high degree of importance among image regions divided by the degree of importance is connected to the image interpolation processing unit 109.

  A ROM 104 and a RAM 105 are connected to the memory controller 103, and the CPU 101 accesses the ROM 104 and the RAM 105 via the memory controller 103. Further, the CPU 101 performs various controls based on a control program stored in the ROM 104. Among these controls, there is a control for transferring the image data received by the communication unit 107 to the decoding unit 108, a control for transferring the image data decoded by the decoding unit 108 to the image interpolation processing unit 109, and an image interpolation processing unit 109. This includes control for storing the interpolated image data in the VRAMs 1 and 2 (105a, b), control for operating the display control unit 110 and displaying the image data stored in the VRAMs 1 and 2 on the display unit 110, and the like.

  The DMAC 102 performs data transfer between the modules according to the settings performed by the CPU 101.

  The RAM 105 is divided into areas 105a to 105e. The areas 105a and 105b are VRAM areas in which image data to be displayed on the display unit 111 by the display control unit 110 at a constant cycle is stored. In the first embodiment, the image data stored in the VRAM 1 (105a) and VRAM 2 (105b) is alternately switched and displayed on the display unit 111 with a double buffer configuration. The area 105c (buffer 1) is a buffer area for temporarily storing a packet received by the communication unit 107, and stores compressed image data from which information such as a communication header has been deleted so that the decoding unit 108 can decode it. The area 105d is used as a work area for various programs and an area for temporarily saving various data.

  The communication unit 107 receives the moving image data transmitted via the network, and when receiving the data, notifies the CPU 101 of the data reception via the signal line 122.

  The decoding unit 108 decodes the compressed moving image data, and transfers the decoded image data to the image interpolation processing unit.

  The display control unit 110 reads out the image data stored in the VRAM 1 (105a) and VRAM 2 (105b) for each frame, and transfers them to the display unit 111 (CRT, LCD, etc.) at a constant cycle. Further, the Vsync signal is output to the image interpolation processing unit 109 through the signal line 123.

  The display unit 111 is connected to the display control unit 110 and displays the image data transferred from the display control unit.

  The image interpolation processing unit 109 performs a process of interpolating the missing area of the decoded image data and storing it in the VRAM. Hereinafter, the detailed configuration and operation of the image interpolation processing unit 109 will be described with reference to FIG.

  In FIG. 2, 201 (frame buffer 1) is a buffer for storing one frame of image data. The image data decoded by the decoding unit 108, motion vector information, image decoding information, and the like are stored through the data line 220. The Here, the decode information is information indicating an area of the image data decoded by the decoding unit 108, and an area missing during the interpolation process is specified from the decode information. In the first embodiment, the decoding information is in units of macroblocks. As the motion vector information, a value extracted from data encoded by a hybrid encoding method or the like at the time of decoding by the decoding unit 108 is stored. However, a motion detection unit may be added to detect motion information between frames.

  Reference numeral 205 (frame buffer 2) is also a buffer for storing one frame of image data, and stores image data obtained by interpolating missing portions by interpolation processing units 202 to 204 described later. Further, during the interpolation process, it is used as a buffer for referring to image data of the previous frame. The image data stored in the frame buffer 2 (205) is transferred to the VRAM area of the RAM 105 by the DMAC 102 via the data line 221.

  An interpolation processing unit A 202 is connected to the frame buffer 1 (201) and the frame buffer 2 (205), and can read and write data in the frame buffer. Further, an enable signal (EN) for controlling on / off of the operation is connected from the interpolation processing selection unit 206.

  When the enable signal (EN) is turned on, the interpolation processing unit A202 detects a missing area from the decode information stored in the frame buffer 1 (201), and interpolates image data based on the motion vector information. The image data for one frame including the processed image data is transferred to the frame buffer 2 (205).

  The interpolation process of the interpolation processing unit A202 is a motion adaptive interpolation process. When a motion vector of a missing macroblock remains, the vector value is used. Interpolation processing is performed using values calculated from vector values. At this time, the interpolation is performed by copying the image of the area shifted by the value obtained from the motion vector from the previous frame image stored in the frame buffer 2 (205). In addition, processing such as filtering is performed on the block boundary for high image quality processing.

  An interpolation processing unit B 203 is also connected to the frame buffer 1 (201) and the frame buffer 2 (205), and can read and write data in the frame buffer. Further, an enable signal (EN) for controlling on / off of the operation is connected from the interpolation processing selection unit 206.

  When the enable signal (EN) is turned on, the interpolation processing unit B203 performs image data interpolation processing based on the decoding information stored in the frame buffer 1 (201), and the image data after the interpolation processing is processed. The image data for one frame is transferred to the frame buffer 2 (205).

  The interpolation process of the interpolation processing unit B203 is an intra-frame interpolation process, and performs an interpolation process with reference to upper and lower image data of a missing macroblock.

  An interpolation processing unit C 204 is connected to the frame buffer 1 (201) and the frame buffer 2 (205), and can read and write data in the frame buffer. Further, an enable signal (EN) for controlling on / off of the operation is connected from the interpolation processing selection unit 206.

  When the enable signal (EN) is turned on, the interpolation processing unit C202 performs an interpolation process on the stored image data based on the decode information stored in the frame buffer 1 (201). One frame of image data including the image data is transferred to the frame buffer 2 (205).

  The interpolation processing unit C204 performs the interpolation process by copying the image data of the same area from the image data of the previous frame stored in the frame buffer 2 (205) to the missing image area. In the first embodiment, when there is no image loss, the interpolation processing unit C204 is operated. At this time, if the interpolation processing unit C204 determines from the decode information that there is no region to be interpolated, the interpolation processing unit C204 transfers the image data to the frame buffer 2 (205) without executing the interpolation processing.

  In addition, the processing times ta, tb, and tc of the interpolation processes A, B, and C satisfy the relationship shown in the following expression when the defective area has the same area.

“Ta>tb> tc” (1)
Next, the operation of the interpolation process selection unit 206 will be described with reference to the timing chart of FIG.

  FIG. 3 is a timing chart showing the relationship between the display timing Vsync and the start of interpolation processing.

  In FIG. 3, in the display device of the first embodiment, the display control unit 110 alternately outputs the image data stored in the VRAM 1 (105a) and VRAM 2 (105b) to the display unit 111 for display at a timing of 30 fps.

  Therefore, the VRAM1 (105a) and VRAM2 (105b) need to store the updated image data by the next Vsync timing (304). Here, assuming that the maximum time (Ta) required for the interpolation process when the image data is interpolated by the interpolation process A, the time indicated by the dotted line 301 in the timing chart 3 performs the interpolation process A and the image data is stored in the VRAM area. This is the timing indicating the interpolation process start time limit when the writing process is performed. Similarly, a timing indicated by 302 is a time limit for starting the interpolation processing when the interpolation processing B is performed, and a timing indicated by 303 is a time limit for starting the interpolation processing when the interpolation processing C is performed.

  Further, the maximum time Ta is the total processing time when the interpolation process A is executed on the maximum value of the preset missing area ratio (number of macroblocks) (including the time for writing to the VRAM). Similarly, Tb is the maximum processing time when the interpolation processing unit B is executed, and Tc is the maximum processing time when the interpolation processing unit C is executed.

  Signals are input from the timing control unit 207 to the interpolation processing selection unit 206 at the timings 301, 302, and 303 shown in FIG. The timing control unit 207 creates timings 301 to 303 based on the Vsync signal 224 output from the display control unit 110 and the signal output of the timer 208 and outputs the generated timing to the interpolation processing selection unit 206.

  When the timing signal 225 is input from the timing control unit 207, the interpolation processing selection unit 206 selects an interpolation processing method based on the region information signal 120 output from the CPU 101, and then performs each interpolation to instruct the start of the interpolation processing. The enable signal (EN) connected to the processing units (202 to 204) is turned on. If the conditions for starting the interpolation process are not met, the interpolation process is not started until the next timing.

  In the first embodiment, when the timing signal 225 (a 3-bit signal that can identify Ta, Tb, and Tc) is input, the start of the interpolation processing is determined together with the region information signal 120. At this time, the region information signal 120 outputs information indicating whether decoding has been completed for each region in the received image data. In the first embodiment, the received image data is divided into the areas shown in FIG. 5B, and the relationship between the area information values and FIG. 5B is shown below.

When area information is 0: Image data reception of area 504 is not completed. When area information is 1: Reception of image data of area 503 is not completed. When area information is 2: Reception of image data of area 502 is not completed. Area information Is: All image reception completed The operation of the interpolation processing selection unit 206 is selected as shown in Table 1 according to the value of the region information signal 120 and the type of the timing signal 207, which are given above. In the case of “No interpolation processing” in Table 1, the interpolation processing C is selected, and the interpolation processing unit C executes the above-described processing without the interpolation processing.

  Further, when the interpolation processing selection unit 206 determines the interpolation processing, the interpolation processing selection unit 206 turns on the enable signal (EN) to operate the selected interpolation processing block. Further, the output of the interpolation processing signal 102 is turned on to notify the CPU 101 that the interpolation processing has started. The interpolation processing unit 206 turns off each enable signal and then turns off the enable signal (EN) and the interpolation processing signal 102 in response to the input of the next Vsync 224.

  Next, the operation of the CPU 101 will be described using the flowchart of image interpolation processing selection shown in FIG.

  Processing is started from step S401, and it is determined by input of the signal line 122 whether the communication unit 107 has received data in step S402. If data is received in step S402, the data is read from the communication unit 107 and written in the buffer 1 (105c) area of the RAM 105 in step S403. At this time, processing such as rearrangement of data whose order has been changed due to congestion on the network is also performed. If data has not been received in step S402, the process proceeds to step S404.

  In step S404, it is determined by referring to the output of the interpolation processing signal 121 in FIG. 2 whether the image interpolation processing unit 109 is executing the image interpolation processing. If the interpolation process is not being executed, the process proceeds to step S409, and the reception status is analyzed from the header information of the compressed image data stored in the buffer 1 (105c). The analysis of the reception status is judged from the header information of the image data, the communication header information, and the like, and it is confirmed whether data is prepared in one slice unit or there is no missing packet. This determines whether a communication packet is lost on the network path or whether the packet has not arrived due to a delay, so that it cannot be decoded. Note that MPEG and JPEG-compressed image data can be decoded as long as the data is available in units of slices even when intermediate image data is lost, and the header includes slice position information. Therefore, the position in the frame can be specified. For example, when the slice configuration of an image of one frame is taken as shown in FIG. 5A, each of the slices a to o can be decoded independently.

  In step S410, it is determined from the analysis result in step S409 whether data is prepared in units of slices. If there is no slice in which data is prepared, the process returns to step S402. The process proceeds to step S411.

  In the process of step S411, the corresponding compressed data is transferred to the decoding unit 108 according to the setting of the DMAC 102, and the compressed data is decoded by the decoding unit 108. The decoded image data is transferred to the image interpolation processing unit 109 together with the motion vector data. At this time, the decoded area information is stored in the area 105 d in the RAM 105.

  Next, in the process of step S412, as shown in FIG. 5 (2), when the image area in one frame is divided into areas surrounded by dotted lines 502, 503, and 504 (the areas do not overlap each other), which area It is detected whether or not decoding has been completed. In the detection of the decoding area, the information of the decoded area stored in step S411 is read from the RAM area 105d, and it is analyzed whether the decoding is completed for each area divided by the importance, and the process proceeds to step S413.

  In step S413, it is determined from the analysis result in step S412 whether the image data in the area 504 in FIG. 5 (2) is missing. If missing, the process proceeds to step S414 and is shown as area information in FIG. Then, “0” is output to the interpolation process selection unit 206 via the signal line 121, and the process returns to step S402. If the image data in the area 504 is not lost in step S413, the process proceeds to step S415.

  In step S415, it is determined from the analysis result in step S412 whether the image data in the region 503 in FIG. 5B is missing. If it is missing, the process proceeds to step S416 and “1” is added to the region information. And the process returns to step S402. If the image data in the area 503 is not lost in step S415, the process proceeds to step S417.

  In step S417, it is determined from the analysis result in step S412 whether the image data in the area 502 in FIG. 5B is missing. If the image data is missing, the process proceeds to step S418 and the area information is “2”. And the process returns to step S402.

  If the image data in the area 502 is not lost in step S417, the decoding of all the image data has been completed, so “3” is output as the area information in step S419, and the process proceeds to step S406.

  When the interpolation process is being executed in step S404, the process proceeds to step S405, and in step S405, the received data stored in the buffer 1 (105c) has the same frame as the frame in which the interpolation process is currently started. Delete the image data. In the next step S406, it is determined with reference to the interpolation processing signal 120 whether the interpolation processing has been completed. If the interpolation processing has been completed, the processing proceeds to step S07. If the interpolation process is not completed in step S406, step S406 is repeated.

  In step S407, it is determined whether or not the moving image display operation is to be stopped. If the display operation is to be continued, the process returns to step S402 to start processing the next frame.

  If the display operation is terminated in step S407, the process is terminated in step S415.

  Although not explicitly shown in the present embodiment, the stop of the display operation is given by an instruction by a command from the transmission side or a stop of the display operation by the user.

  With the operation described above, the display device of the first embodiment performs high-quality interpolation processing when the image data of the region of interest 504 shown in FIG. When peripheral areas such as 503 and 502 are lost, simple interpolation processing is performed. In this case, since the time required for interpolation processing is shorter than interpolation processing that emphasizes image quality, it is possible to wait for the arrival of a delayed packet for a long time. It can also be displayed.

  In this way, even when packets are delayed or lost, important areas can always be subjected to high-quality interpolation processing, and less important areas can wait for delayed packets for a long time. It is possible to reduce the loss and display the received image data with always high image quality.

(Second embodiment)
In the first embodiment, the interpolation method and the interpolation start timing are selected according to the missing area of the received image. In the second embodiment, the interpolation process is selected based on the ratio of the missing data.

  In the second embodiment, the image interpolation process selection flowchart of FIG. 4 in the first embodiment is replaced with the flowchart shown in FIG.

  The process of the flowchart for selecting the image interpolation process shown in FIG. 6 will be described below. In FIG. 6, the processes in steps S601 to S611 are the same as the processes in steps S401 to S411 in FIG.

  In the process of S612, the information of the decoded area stored in step S611 is read from the RAM area 105d, and the missing rate of the frame being received is calculated.

  Next, in the process of step S613, if the missing ratio obtained in step S612 is equal to or greater than the predetermined value “A”, the process proceeds to step S614, and “0” is output to the area information in step S614. The process returns to step S602. If the missing rate is less than “A” in step S613, the process proceeds to step S614.

  In the process of step S614, if the missing ratio obtained in step S612 is greater than or equal to the predetermined value “B”, the process proceeds to step S616, “1” is output to the area information in step S616, and the process proceeds to step S602. Return processing. If the loss rate is less than “B” in step S614, the process proceeds to step S617.

  In the process of step S617, it is determined whether or not there is a defect area from the defect ratio obtained in step S612. If there is a defect area, the process proceeds to step S618, and “2” is output to the area information in step S618. The process returns to step S602. If no defect is found in step S617, the process proceeds to step S619.

  In step S619, after “3” is output as the area information, the process proceeds to step S606.

  In addition, the relationship shown in the following equation is established between the values A and B that are compared with the missing values in the second embodiment.

"A>B" --- (2)
With the operation described above, the display device of the second embodiment performs high-quality interpolation processing when the image loss rate is high for the received image data, and waits for data reception when the loss rate is low. The system is configured to perform simple interpolation processing.

(Third embodiment)
In the first embodiment, the motion vector information of the received image is extracted from the compressed image data received by the decoding unit and is transmitted to the image interpolation processing unit. However, in the third embodiment, the motion vector information is displayed as an image. It was configured so as to be obtained by calculation in the interpolation unit.

  The third embodiment is realized by replacing the detailed configuration of the image interpolation processing unit 109 of FIG. 2 of the first embodiment with the configuration shown in FIG.

  In FIG. 7, reference numeral 701 (frame buffer 1) is a buffer for storing one frame of image data, and the image data decoded by the decoding unit 108, image decoding information, and the like are stored through the data line 220. Here, the decoding information is information indicating the area of the image data decoded by the decoding unit 108, and an area that is missing due to communication packet loss, delay, or the like during the interpolation process is specified from the decoding information. Similarly to the first embodiment, the third embodiment also provides decode information in units of macroblocks.

  205 (frame buffer 2) is a buffer for storing two frames of image data, and stores image data in which missing portions are interpolated by the interpolation processing units 202 to 204. In the frame buffer 2 205, the previous frame and the previous frame image data are stored in the frame buffer areas of the image data 1 and 2. When new frame image data is sent, it is updated as needed. The frame buffer 2 is referred to by the interpolation processing unit A 702, the interpolation processing unit B 703, and the motion detection unit 709.

  The image data stored in the frame buffer 2 (205) is transferred from the data line 221 to the VRAM area by the DMAC.

  The interpolation processing unit A702 executes the interpolation processing by the same operation as the interpolation processing unit A202 of the first embodiment, but the motion vector information refers to the data stored in the memory 710.

  An interpolation processing unit A 702 is connected to the frame buffer 1 (201) and the frame buffer 2 (205), and can read and write data in the frame buffer. In the third embodiment, a memory 710 is newly connected, and unlike the first embodiment, the motion vector information is read from the memory 710 and interpolation processing is performed. At this time, a motion vector value in the same area as the missing area is read out, interpolation processing is performed, and motion adaptive interpolation processing is executed.

  Other operations are the same as those in the first embodiment. When an enable signal (EN) for controlling on / off of the operation is turned on from the interpolation processing selection unit 206, the decoding information stored in the frame buffer 1 (201) is stored. A defective area is detected from the image data, image data interpolation processing is performed based on the motion vector information from the memory 710, and image data for one frame including the processed image data is transferred to the frame buffer 2 (205).

  Interpolation processing units B and C (703 and 704) execute interpolation processing by the same operation as the interpolation processing units 203 and 204 of the first embodiment.

  The operations of the interpolation process selection unit 706, the timing control unit 707, and the timer 708 are the same as those of the interpolation process selection unit 206, the timing control unit 207, and the timer 208 of the first embodiment.

  In the third embodiment, a motion detection unit 709 and a memory 710 are added. The motion detection unit 709 detects a motion vector from the image data of the previous frame and the previous frame, and stores the obtained motion vector value in the memory 710. The motion vector detection unit 709 is a well-known technique such as a block matching method (searches for a region having a small inter-frame difference for each divided block and calculates a motion vector) and a gradient method (a motion vector based on the screen luminance gradient and the inter-frame difference). Motion vector detection processing is performed.

  With the operation described above, in the third embodiment, motion vector information can be detected by the image interpolation unit. High-quality interpolation is possible even for compression-type data in which motion vector information is not included in the compressed image data.

  In the third embodiment, the motion vector is calculated from the images of the previous frame and the previous frame. However, by adopting the configuration shown in FIG. 8, it is possible to detect motion from the frame being received and the previous frame. is there. In the configuration of FIG. 8, the motion detection unit is connected to the frame buffer 1 (801) and the frame buffer 2 (805), and detects a motion vector. In the configuration illustrated in FIG. 8, the interpolation processing unit A802 is configured to calculate and obtain a motion vector of a missing region from surrounding motion vectors.

It is a block diagram which shows schematic structure of the moving image display apparatus of 1st Example. It is a block diagram which shows the detailed structure of the image interpolation process part 109 of 1st Example. It is a timing chart which shows the timing of the display process of the moving image display apparatus of 1st Example. It is a flowchart which shows the flow of operation | movement of the decoding information output of CPU101 of 1st Example. (1) is a figure which shows the example of a slice division | segmentation of the image in the moving image display apparatus of 1st Example. (2) is a diagram showing an example of dividing an attention area of an image in the moving image display apparatus of the first embodiment. It is a flowchart which shows the flow of operation | movement of the decoding information output of CPU101 of 2nd Example. It is a block diagram which shows the detailed structure of the image interpolation process part 109 of 3rd Example. It is a block diagram which shows another example in the detailed structure of the image interpolation process part 109 of 3rd Example.

Explanation of symbols

101 CPU
104 ROM
105 RAM
DESCRIPTION OF SYMBOLS 107 Communication part 108 Decoding part 109 Image interpolation process part 110 Display control part 111 Display part 120 Interpolation process signal 122 Area | region information signal 201, 205 Frame buffer 206 Interpolation process selection part 202-204 Interpolation process part

Claims (4)

Receiving means for receiving moving image data distributed via a network;
Decoding means for decoding the compressed image data;
Display means for displaying a video;
Of the image data received by the receiving means, a missing area detecting means for detecting a missing area;
In a moving image display apparatus having an image interpolation means having a plurality of interpolation methods for interpolating a missing area of image data,
Timing output means for performing timing output at the maximum time required for each interpolation processing of the interpolation means having different processing times based on the update timing of the display means;
A moving image display apparatus comprising: an interpolation process selection unit that selects an interpolation process by associating a type of timing output at an output timing of the timing output unit with a detection output of the missing area detection unit.   The missing area detection means divides the detection area so as to detect at least the attention area, and the interpolation process selection means selects a high-quality interpolation process among the interpolation processes when the attention area is missing. The moving image display apparatus according to claim 1, wherein:   The moving image display apparatus according to claim 1, wherein the defect area detection unit outputs an output value corresponding to a defect ratio in one frame image. The image interpolation processing has an interpolation processing method for performing interpolation processing based on a motion vector,
The moving image display apparatus according to claim 1, further comprising a motion vector detection unit that detects a motion vector from the moving image data received by the reception unit.

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