JP2007035964A - Thin film transistor and manufacturing method thereof, and display device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a thin film transistor having high and stable transistor characteristics. <P>SOLUTION: This transistor has a structure in which a heat conducting member 3a having a thermal conductivity higher than that of a gate insulation layer is provided so as to at least thermally couple to a gate electrode 3, corresponding to only either of a source region 12 and a drain region 13. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a thin film transistor, a method for manufacturing the same, and a display device having the thin film transistor.

  In recent years, a display device that displays an image using an organic EL (Electro Luminescence) phenomenon has attracted attention as one of flat panel displays. This display device, that is, an organic EL display has excellent features such as a wide viewing angle and low power consumption because it utilizes the light emission phenomenon of the organic light emitting element itself. Furthermore, since it exhibits high responsiveness to high-definition high-speed video signals, development for practical use is being promoted particularly in the video field.

Among the driving methods for organic EL displays, the active matrix method using thin film transistor (TFT) driving elements is superior in response time and resolution compared to the conventional passive matrix method. It is considered that the driving method is particularly suitable for an organic EL display having the above.
An active matrix organic EL display has a driving panel provided with an organic light emitting element (organic EL element) having at least an organic light emitting material and a driving element (thin film transistor) for driving the organic light emitting element. And the sealing panel have a configuration in which the organic light emitting element is sandwiched through an adhesive layer.

A thin film transistor that constitutes an active matrix type organic EL display requires at least a switching transistor that controls brightness and darkness of a pixel and a drive transistor that controls light emission of the organic EL element.
In a thin film transistor, it is known that a threshold voltage shifts when a voltage is continuously applied to its gate electrode. However, some of the thin film transistors of the organic EL display need to maintain an energized state as long as the organic EL element emits light, and a threshold shift is likely to occur. When the threshold voltage of the driving transistor shifts, the amount of current flowing through the driving transistor changes, and as a result, the luminance of the light-emitting elements constituting each pixel changes.

In recent years, in order to reduce the threshold shift of the thin film transistor, an organic EL display using a thin film transistor in which a channel region is formed of a semiconductor layer made of polycrystalline silicon (polysilicon; p-Si) has been developed.
A thin film transistor formed of polycrystalline silicon is generally formed by forming an amorphous silicon (α-Si) layer on a glass substrate and then annealing the amorphous silicon layer with an excimer laser or the like to make it polycrystalline. It is common. This thin film transistor forming process is a technique that has already been put to practical use in liquid crystal displays.

However, in the case of such a silicon crystallization process, the size of crystal grains existing in the channel is not uniform, and thus transistor characteristics are not uniform. For this reason, the serious problem that the light emission luminance of the organic EL display is different for each pixel has arisen as a result.
On the other hand, according to the role of each transistor, the structure which reduces the dispersion | variation in a characteristic is selected by selecting the material which comprises a channel region in either an alpha-Si layer or a p-Si layer. (For example, refer to Patent Document 1).

5A and 5B show a conventional inverted staggered thin film transistor. In this thin film transistor 101, a gate electrode 103 is disposed on an insulating substrate 102. A crystalline Si layer 105 is formed on the gate electrode 103 via a gate insulating layer 104 made of, for example, a SiN layer and a SiO ₂ layer.
An amorphous Si layer 106 is formed on the crystalline Si layer 105, and a portion immediately below the SiN etching stop layer 107 is formed as a channel region 115, and a source region 112 extending to both sides across the channel region 115, and A drain region 113 is formed.

Of the amorphous Si layer 106, an n + amorphous Si layer 108 is formed on a peripheral portion of the amorphous Si layer 106 that is not covered with the etching stop layer 107, that is, on the source region 112 and the drain region 113, and the first to third metals are formed thereon. A source electrode 116 and a drain electrode 117 are formed by the layers 109 to 111. Further, an SiN layer 114 serving as a passivation film is formed on the upper surface over the laminated structure and the etching stop layer 107, and an etching stopper type inverted staggered transistor 101 is formed.
Here, the gate electrode 103 is formed by extending the same width ΔL, usually 1 μm, in the partial source region 112 and the drain region 113, respectively.

In the manufacture of this thin film transistor, the crystalline Si layer 105 is generally crystallized by forming an amorphous Si and then directly crystallizing it with a pulsed excimer laser having a wavelength that is absorbed by the amorphous Si. Lasers have a problem that it is difficult to achieve uniform crystallization due to problems such as energy variations, and thus a transistor having characteristics cannot be obtained.
In such a case, after forming the SiO ₂ layer as the buffer layer and the Mo layer as the light absorption layer on the amorphous Si, annealing is performed with a laser having a wavelength that is absorbed by the light absorption layer, and indirect by the heat generated by the light absorption layer. In particular, a technique for crystallizing amorphous Si is effective. The SiO ₂ layer as the buffer layer and the Mo layer as the light absorption layer are removed by etching after crystallization.

  However, since such a crystallization technique is to crystallize amorphous silicon by heat based on laser light irradiation, it was applied to the manufacture of an inverted staggered thin film transistor as shown in FIGS. 5A and 5B, for example. In some cases, inconvenience arises. That is, since the gate electrode made of a material having a higher thermal conductivity than that of silicon or an insulating film is formed in advance, the heat originally required for crystallization of amorphous silicon is absorbed and propagated by the gate electrode. If amorphous silicon is not sufficiently crystallized, problems such as deterioration of crystallinity and non-uniformity occur.

  For example, when crystallization is performed by an excimer laser or the like, as shown in FIG. 6A, the width of the unit region 202 including the thin film transistor forming portion and finally forming the unit pixel is wide. The pulsed laser beam 203 shaped into a line is scanned stepwise in a direction perpendicular to the major axis direction (width direction) of the laser beam 203 and continuously irradiated to amorphous silicon. In FIG. 6A, reference numeral 204 denotes a laser irradiation region.

In this method, the pulse laser beam 203 has an energy distribution in the short axis direction (movement direction a) of the laser beam 203 in addition to the energy variation of about 5% for each pulse. An energy strong point (shown by a broken line) as shown in FIG. 6B may occur at the laser irradiation end.
In the irradiation of laser light having energy non-uniformity due to variations between pulses or within the pulse, the minor axis direction (scan direction) is used to average the irradiation energy in the irradiated unit region 202. ) By repeating the step movement of the minute section to) and laser light irradiation, and overlapping the irradiation ranges of each pulse with each other, so that the difference in accumulated irradiation energy amount in each part in the unit region 202 is reduced. Irradiating.

  However, even if such an averaging method is used, it is difficult to achieve sufficient averaging, and at least as long as the current excimer laser is used, a difference occurs in the degree of crystallization along the scanning direction a. This difference in crystallinity causes non-uniform resistance in the thin film transistors in each part, resulting in a difference in the amount of current flowing through the transistors, which is wide in the direction perpendicular to the laser scan direction and laser scan. A streak-like characteristic unevenness that is stepped in the direction occurs. In a device whose luminance is determined by the amount of current of a thin film transistor such as an organic EL display, this characteristic unevenness is recognized as luminance unevenness, which causes an influence on the entire device such as color spots.

On the other hand, proposals have been made to reduce the film thickness of the gate metal or to anneal after disposing a dummy gate pattern in the vicinity of the gate electrode, that is, in the vicinity of the channel (see, for example, Patent Document 2). .
Japanese Patent No. 2814319 Japanese Patent Laid-Open No. 10-242052 JP 2003-218362 A JP 2002-124677 A

As described above, since the laser beam irradiation is sequentially performed with a scan, the laser beam reaches the formation portion in order to sufficiently crystallize the amorphous silicon in the formation portion of the thin film transistor. Before, it is preferable to make the gate electrode into a thermally saturated state.
However, the heat transfer member made of a material having the same heat capacity as that of the gate electrode, for example, is simply disposed in the vicinity of the gate electrode by the method described in Patent Document 2, and this heat transfer member is annealed by laser light irradiation. It is difficult to contribute enough. Therefore, for example, a portion that is not sufficiently effective for the above-described crystallization occurs in the heat transfer member, and an area more than necessary is occupied in the unit region, and the thin film transistor and the display device that are finally obtained are mounted. Density decreases.

  In particular, when crystallization is performed by a solid laser or the like, a problem different from the case of using the excimer laser described above occurs. In the case of the solid laser method, the laser output power is small, so it is difficult to increase the irradiation area while maintaining an energy density suitable for annealing. For this reason, as shown in FIG. 7, the unit region 202 that finally forms the unit pixel including the thin film transistor formation portion is shaped into a line shape or a rectangular shape with a width that extends only partially. The continuous laser beam 205 is scanned for each row of amorphous silicon, slid to the next row, and then repeatedly started to scan in the same direction or in the reverse direction as in the previous row. It is necessary to aim for cross-irradiation (arrow a shown).

In this solid-state laser method, since the laser light irradiation is continuous irradiation, it is possible to avoid wide streak-like characteristic unevenness in the direction perpendicular to the laser scanning direction, which is a problem with the excimer laser, but FIG. (Reprinted from E Express 2005.2.1 p.33) As shown in the relationship between annealing time and thermal diffusion length, the thermal diffusion length when supplying the amount of heat necessary for crystallization is longer than that of excimer laser. For this reason, the influence of heat conduction by the gate metal becomes more prominent, resulting in insufficient crystallization, resulting in deterioration of characteristics and non-uniformity.
Therefore, particularly in the case of using a solid laser, crystallization deficiency and nonuniformity are likely to occur due to thermal diffusion in annealing with laser light, and the problem becomes more serious.

  The present invention has been made in view of the above situation, and an object thereof is to provide a thin film transistor in which characteristic deterioration and characteristic unevenness are reduced, a manufacturing method thereof, and a display device including the thin film transistor. There is to do.

  In the thin film transistor according to the present invention, a channel region is provided on a gate electrode through a gate insulating layer, and the source region and the drain region are partially extended on both ends of the gate electrode with the channel region interposed therebetween. A heat transfer member having a higher thermal conductivity than the gate insulating layer is provided at least thermally connected to the gate electrode, corresponding to only one of the source region and the drain region. It is characterized by that.

  The display device according to the present invention is a display device having a thin film transistor, wherein the thin film transistor is provided with a channel region on a gate electrode through a gate insulating layer, and both ends of the gate electrode sandwiching the channel region. A heat transfer member having a heat conductivity higher than that of the gate insulating layer corresponding to only one of the source region and the drain region is provided. , At least thermally connected to the gate electrode.

  A thin film transistor manufacturing method according to the present invention includes a first step of forming a gate electrode on a substrate, a second step of forming a gate insulating layer covering at least the gate electrode, a channel region, a source region, and a gate region on the gate insulating layer. A third step of forming an amorphous region to be a drain region, and a fourth step of forming at least a part of the amorphous region into a crystalline channel region by laser light irradiation. Prior to the step, the heat transfer member that is at least thermally connected to the gate electrode is formed corresponding to only one of the source region and the drain region.

  The thin film transistor according to the present invention is provided with a heat transfer member at least thermally connected to the gate electrode corresponding to only one of the source region and the drain region, so that the channel region is crystallized by laser light irradiation. Thus, uniform crystallization is achieved, and a thin film transistor having high and stable transistor characteristics can be formed.

  Further, according to the display device according to the present invention, since it is configured by such a thin film transistor, an active matrix type display device such as an organic EL display can be configured with high display characteristics.

  According to the method of manufacturing a thin film transistor according to the present invention, after the heat transfer member that is at least thermally connected to the gate electrode is formed corresponding to only one of the source region and the drain region, the channel is formed by laser light irradiation. Since the amorphous region corresponding to the region is crystallized, the portion corresponding to, for example, the channel region of the finally obtained thin film transistor can be stably crystallized while suppressing an increase in the area of the unit pixel.

  Embodiments of the present invention will be described below with reference to the drawings.

<Embodiments of Thin Film Transistor and Display Device>
First, an embodiment of a thin film transistor and a display device according to the present invention will be described.
1A and 1B are a schematic cross-sectional view and a schematic top view showing the configuration of the thin film transistor according to the present embodiment, respectively.

As shown in FIG. 1A, in the thin film transistor 1 according to this embodiment, a gate electrode 3 made of Mo is disposed on the surface of an insulating substrate 2. A crystalline Si layer 5 is formed on the gate electrode 3 via a gate insulating layer 4 made of, for example, SiN and SiO ₂ .
An amorphous Si layer 6 is formed on the crystalline Si layer 5, and a portion immediately below the etching stop layer 7 made of SiN is formed as a channel region 15. A source region 12 extending on both sides across the channel region 15 and A drain region 13 is formed.

  Of the amorphous Si layer 6, an n + amorphous Si layer 8 is formed on the peripheral portion of the amorphous Si layer 6 that is not covered with the etching stop layer 7, that is, on the source region 12 and the drain region 13, on which the first to third metals are formed. The source electrode 16 and the drain electrode 17 by the layers 9 to 11 are stacked. Further, an SiN layer 14 serving as a passivation film is formed on the upper surface over the laminated structure and the etching stop layer 7, thereby forming an etching stopper type inverted staggered transistor 1.

In the present embodiment, the gate electrode 3 is partly extended only to one of the source region 12 and the drain region 13, in this example only to the source region 12 side, to serve as the heat transfer section 3 a, The heat transfer part 3a connected to the heat and the heat constitutes the side edge of the electrode 3 as a heat transfer member.
In the present embodiment, an example in which the gate electrode 3 and the heat transfer member are integrated will be described. However, the gate electrode 3 and the heat transfer member are not necessarily integrated, and may not be electrically connected, for example.
That is, although not shown, for example, the gate electrode 3 is formed only directly under the channel region under the etching stop layer 7 and is separated from the gate electrode 3 while being thermally connected, for example, near the SiN layer. It is also possible to adopt a configuration in which a heat transfer member is separately arranged next to a part of 4, and this heat transfer member may be made of a material having a higher thermal conductivity than that of the gate electrode. it can.

In this embodiment, the width ΔL ₁ from the end of the source region 12 in contact with the channel region to the one end on the source region side of the gate electrode 3 including the heat transfer portion 3 a is in contact with the channel region of the drain region 13. The width is made larger than the width ΔL ₂ from the end to one end of the gate electrode 3 on the drain region side.
As described above, with the configuration in which one width ΔL ₁ is larger than the other width ΔL ₂ , the crystallization of the channel region by laser light irradiation becomes uniform as will be apparent from the manufacturing method described later.
As a result of examining the value of ΔL ₁ , as shown in [Table 1], by setting ΔL ₁ to 1.5 μm or more (particularly 2.0 μm or more), the mobility indicating the characteristics of the transistor is measured by laser irradiation. It has been confirmed that characteristics equal to or better than the case where cooling by heat conduction of the gate electrode is suppressed as much as possible by separately arranging a heat transfer member on the upstream side in the direction can be obtained. ΔL ₂ was set to 1.0 μm as in the conventional case.

  Also from this examination result, the heat transfer member that is at least thermally connected to the gate electrode 3 is provided according to the laser light irradiation in the manufacturing process of the thin film transistor to be described later, particularly corresponding only to the source region 12, It is considered that a thin film transistor having stable and stable transistor characteristics can be formed because the crystallinity of the channel region is stabilized.

Next, driving of the unit pixel in the active matrix type organic EL display (display device) including the thin film transistor according to the present embodiment will be described using an equivalent circuit of the unit pixel shown in FIG. In the following description, it is assumed that the signal line is Y ₁ , the current supply line is Y ₂ , the scanning lines are X ₁ and X _2, and the thin film transistor according to this embodiment is the switching transistor Tr 2.
The equivalent circuit includes an organic EL light emitting unit EL, a first TFT transistor (MOS transistor) Tr1, a second TFT transistor (MOS transistor) Tr2, and a capacitor C. One main electrode (for example, source) of the second TFT transistor Tr2 is connected to the signal line Y1, the other main electrode (for example, drain) is connected to the current supply line Y2 through the storage capacitor C, and the gate electrode is scanned. Connected to line X1. On the other hand, the anode of the light emitting portion EL is connected to the current supply line Y2 via the first TFT transistor Tr1, and the gate electrode of the first TFT transistor Tr1 is connected to the connection middle point of the second TFT transistor Tr2 and the capacitor C. Is done.

The operation of this equivalent circuit is as follows.
A current is constantly supplied to the current supply line Y2. When a scanning pulse is applied to the scanning line X1 and a required signal is supplied to the signal line Y1, the second TFT transistor Tr2 is turned on, and the required signal is written to the storage capacitor C. Based on the written signal, the first TFT transistor Tr1 is turned on, a current corresponding to the signal amount is supplied to the light emitting unit EL through the current supply unit Y2, and the light emitting unit EL is lit and displayed.
A plurality of unit pixels are arranged in a two-dimensional matrix to constitute a display device.

Note that in such a transistor that performs a write operation on the storage capacitor C, a configuration in which ΔL ₂ on the drain side connected to the storage capacitor C is set to 1 μm as usual and ΔL _{1 is set} to 2 μm on the source side opposite to the conventional _one. As a result of the examination, the transistor produced by this design has a small threshold voltage variation even when compared with the amorphous silicon TFT. As a result of producing a 12-inch diagonal organic EL display using this transistor, the threshold value of the second transistor Tr2 is obtained. It can be confirmed that the off-state current of the transistor is suppressed when the voltages are uniform, and a panel with excellent luminance uniformity can be manufactured.
Even when the first transistor Tr1 is configured by the thin film transistor according to this embodiment, variations in mobility and threshold voltage are suppressed, and characteristics of the transistor and the display device are improved.

Further, the width ΔL ₁ from the end portion of the source region 12 in contact with the channel region to the one end on the source region side of the gate electrode 3 including the heat transfer portion 3 a, or the end portion of the drain region 13 in contact with the channel region Increasing the width ΔL ₂ up to one end on the drain region side of the gate electrode 3 including the portion 3 a not only increases the area of the driving element occupying the unit pixel, but also parasitic capacitance between the gate electrode 3 and the source region 12. (Gate to Source Capacitance; Cgs) and parasitic capacitance (Gate to Drain Capacitance; Cgd) between the gate electrode 3 and the drain region 13 increase, display characteristics and yield decrease, and power consumption increases. There is a fear.

In the case of the equivalent circuit of FIG. 5, the problem is the feedthrough voltage due to the parasitic capacitance Cgd of the switching transistor. When a pulse voltage is applied to the switching transistor, electric charge is written into the capacitor C. However, at the moment when the transistor is turned off, a potential drop of the capacitor C called feedthrough occurs due to the parasitic capacitor Cgd. Since this feedthrough voltage is proportional to the value of Cgd, an increase in ΔL ₂ in the drain region of the transistor directly connected to the capacitor constituting the threshold voltage correction circuit becomes a problem. Therefore, only ΔL ₁ in the opposite source region is present. Thus, the source region and the drain region can be formed so that the channel region is asymmetric with respect to the gate metal.

That is, in the display device including the thin film transistor 1 as a driving element, the capacitance related to the threshold value variation circuit in the pixel circuit is not connected to the source region 12 of the thin film transistor 1 as in the present embodiment, and is equivalent to the conventional structure. It is preferable to connect only to the drain region 13 by ΔL (that is, ΔL ₂ ). With this configuration, the influence of the feedthrough voltage can be avoided.
Therefore, from the above examination results, it is possible to drive by using a thin film transistor provided with a heat transfer member corresponding to only one of the source region and the drain region as described above, more preferably only the source region. It is considered that display characteristics of an active matrix display device using elements can be improved.
Even in the case of solid laser annealing with a relatively large thermal diffusion length, the thermal diffusion length is about 10 μm. From the melting point of Si (1400 ° C.), the thermal diffusion related to the temperature affecting crystallization is limited to a range of several μm. It is thought that. The design rule of the flat panel is generally Line / Space = 3/3 μm, but if another pattern is arranged in the vicinity of 3 μm, there is a risk that an electrical short circuit will occur. In the case of the method described in Patent Document 2 described above, there is a gap of 3 μm between the gate metal and the pattern, and SiO ₂ or Si ₃ N ₄ having a relatively low thermal conductivity exists between them. However, the configuration according to the present invention is considered preferable.

<Embodiment of Manufacturing Method of Thin Film Transistor>
Next, an embodiment of a method for manufacturing a thin film transistor according to the present invention will be described with reference to FIGS.

First, as shown in FIG. 3A, an insulating substrate 2 is prepared, a molybdenum thin film is formed on the surface thereof by, for example, sputtering, and the molybdenum thin film is subjected to, for example, photolithography and etching, whereby the gate electrode 3 is finally formed. The first step of arranging and forming together with the heat transfer portion 3a integrated as a heat transfer member that is thermally connected in a wide manner compared to the width of the channel region to be obtained is performed.
Subsequently, a gate insulating layer 4 made of SiN and SiO ₂ and a Si layer 5 made of amorphous silicon are formed on the gate electrode 3 by, for example, plasma CVD (Chemical Vapor Deposition). 2nd process and 3rd process are performed.

  Subsequently, as shown in FIG. 3B, laser light L from a solid laser or the like is scanned and irradiated from the source region side in the finally obtained thin film transistor to start crystallization of the Si layer 5.

Subsequently, as shown in FIG. 3C, the Si layer 6 is continuously scanned with laser light to crystallize at least the Si layer 5 over the entire area of the gate electrode 3 to perform the fourth step.
According to the method for manufacturing a thin film transistor according to the present embodiment, the gate electrode 3 can be brought into a pre-annealed state in which the gate electrode 3 is thermally saturated before the laser beam L reaches the portion corresponding to the channel region, and finally obtained. The portion corresponding to the channel region can be uniformly crystallized.

Here, when using a laser whose wavelength is not absorbed by the amorphous Si layer, a 30 nm SiO ₂ layer as a buffer layer and a 200 nm Mo layer as a light absorption layer are formed on the amorphous Si before laser irradiation. Then, crystallization may be performed by laser irradiation. In this case, the SiO ₂ layer as the buffer layer and the Mo layer as the light absorption layer are removed by etching after crystallization. Specifically, after amorphous Si is crystallized indirectly by the heat generated by the light absorption layer, the SiO ₂ layer as the buffer layer and the Mo layer as the light absorption layer are removed by etching.
The SiO ₂ layer serving as the buffer layer is for preventing metal diffusion into the Si layer 5 and is formed as a very thin layer. The buffer layer may be a material that can suppress the diffusion of the metal used as the light absorption layer into the Si layer 5 and the thermal reaction at the interface of the Si layer 5, even if it is not an SiO ₂ layer, and is formed of an extremely thin layer. . The metal used for the light absorption layer is not limited to Mo but may be any material that can absorb laser light and convert it into heat.

  Following the scan irradiation of the laser beam L, an amorphous Si layer 6 is formed on the crystallized Si layer 5 as shown in FIG. 4A.

Subsequently, as shown in FIG. 4B, an etching stop layer 7 made of, for example, SiN is formed on the amorphous Si layer 6 so as to correspond to a portion that finally becomes a channel region. When the etching stop layer 7 is formed, it is formed so that the relationship between ΔL ₁ on the source side and ΔL ₂ on the drain side satisfies ΔL ₁ > ΔL ₂ as described above. In the Si layer 5 and the amorphous Si layer 6, a channel region 15 is formed immediately below the etching stop layer 7, and a source region 12 and a drain region 13 are formed on both sides thereof.

Subsequently, an n + amorphous Si layer 8 is formed across the etching stop layer 7 and the exposed portion of the surrounding amorphous Si layer 6.
Thereafter, as shown in FIG. 4C, first to third metal layers 9 to 11 are formed across the n + amorphous Si layer 8 and the etching stop layer 7, and the first to third metal layers on the etching stop layer 7 are formed. 9 to 11 and the n + amorphous Si layer 8 in the channel portion are etched. As a result, the source electrode 16 and the drain electrode 17 are formed by the first to third metal layers 9 to 11 on the source region 12 and the drain region 13. Further, an SiN layer 14 serving as a passivation film is formed on the entire surface to obtain an inverted staggered transistor.

Conventionally, proposals have been made to select the irradiation conditions of the laser beam corresponding to the gate electrode and the heat transfer member, but the arrangement conditions of the heat transfer member corresponding to the crystallization of amorphous silicon by the laser beam irradiation have been made. It is preferable to select, and according to the present invention, this is possible.
In addition, the asymmetric transistor structure in the prior art reduces the parasitic resistance on the source side by reducing the asymmetric structure in which the grain boundary in lateral crystallization is formed outside the channel region and the low concentration implantation region formed on the source side. An asymmetric LDD (Lightly Doped Drain) structure is proposed (see, for example, Patent Documents 3 and 4). However, in the method of manufacturing the thin film transistor according to the present embodiment, the amorphous silicon based on thermal diffusion is provided by providing a heat transfer member at least thermally connected to the gate electrode 3 on the upstream side of the scan irradiation of the laser beam. It is possible to improve non-uniformity in crystallization, and has a large difference in purpose and effect from the asymmetric structures described in Patent Documents 3 and 4.

Although the embodiment according to the present invention has been described above, the numerical conditions such as the materials used, the amount thereof, the processing time, and the dimensions mentioned in the description of the present embodiment are merely preferred examples, and each figure used for the description. The dimensional shape and arrangement relationship in FIG. That is, the present invention is not limited to this embodiment.
For example, the thickness of the SiO ₂ layer serving as the buffer layer is centered between 1 and 100 nm, and the thickness of the Mo layer serving as the light absorption layer is selected centering between 50 and 300 nm. be able to.
Further, for example, in the above-described embodiment, since the amorphous Si layer 6 is a buffer layer of the crystalline Si layer 5 and the n + amorphous silicon layer 8, the amorphous Si layer 6 is disposed immediately above the crystalline Si layer 5. However, the present invention is not limited to this configuration, and a configuration in which the n + amorphous Si layer 8 is disposed directly below is also possible.

Further, for example, in the present embodiment, an example of an inverted staggered transistor has been described. However, other bottom gate type configurations can be used, and the heat generated by the gate electrode after forming the gate electrode is not necessarily a bottom gate type. Applicable to configurations where diffusion is a problem.
For example, in the present embodiment, the embodiment of the thin film transistor and the method of manufacturing the same according to the present invention has been described by taking an etching stopper type thin film transistor as an example. However, a back channel type transistor that does not use an etching stopper may be used.
The crystallization described above is not limited to so-called polycrystallization, and may be microcrystallization.

  Further, for example, in the display device according to the present embodiment, among the unit regions corresponding to the unit pixels, the first and second unit regions adjacent to each other are at least partially on the virtual surface orthogonal to the main surface of the substrate. Can be arranged in a two-dimensional matrix with a symmetrical arrangement. In this case, the thin film transistor in each unit region is formed of the thin film transistor according to the present invention, and the display device is manufactured by, for example, simultaneously irradiating each adjacent portion of the first and second unit regions adjacent to the virtual plane with laser light. Can also be done.

  In the above example, the present invention is applied to an organic EL display and a thin film transistor used therefor. In addition, the present invention can be applied to other flat panel displays such as liquid crystal displays and thin film transistors used therefor, as long as threshold value fluctuation suppression, mobility improvement, in-plane characteristic uniformity are required. The present invention can be variously modified and changed.

FIGS. 3A and 3B are a schematic cross-sectional view and a schematic top view, respectively, showing a configuration of an example of a thin film transistor according to the present invention. FIGS. FIG. 6 is an equivalent circuit diagram for explaining driving of a unit pixel in an exemplary configuration of a display device according to the present invention. FIGS. 1A to 1C are each a manufacturing process diagram (part 1) illustrating an example of a manufacturing method of a thin film transistor according to the present invention. FIGS. FIGS. 8A to 8C are manufacturing process diagrams (part 2) illustrating an example of a method for manufacturing a thin film transistor according to the present invention. FIGS. A and B are a schematic cross-sectional view and a schematic top view, respectively, showing the configuration of a conventional thin film transistor. Each of A and B is a schematic diagram for explaining an example of annealing by laser light irradiation, and a schematic diagram showing an example of energy intensity of laser light. It is a schematic diagram which shows the relationship between annealing time and thermal diffusion length for every annealing method. It is a schematic diagram with which it uses for description of the other example of annealing by laser beam irradiation.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 ... Thin-film transistor, 2 ... Substrate, 3 ... Gate electrode, 3a ... Heat-transfer part (heat-transfer member), 4 ... Gate insulating layer, 5 ... Si layer, 6 ... Amorphous Si layer, 7 ... etching stop layer, 8 ... n + amorphous Si layer, 9 ... first metal layer, 10 ... second metal layer, 11 ... third metal layer, 12 ... Source region, 13 ... Drain region, 14 ... SiN layer, 15 ... Channel region, 16 ... Source electrode, 17 ... Drain electrode, 101 ... Conventional thin film transistor, 102 ... substrate, 103 ... gate electrode, 104 ... gate insulating layer, 105 ... Si layer, 106 ... amorphous Si layer, 107 ... etching stop layer, 108 ... n + amorphous Si Layer, 109 ... first metal layer 110 ... second metal layer, 111 ... third metal layer, 112 ... source region, 113 ... drain region, 114 ... SiN layer, 115 ... channel region, 116 ... Source electrode, 117 ... Drain electrode, 202 ... Unit region, 203 ... Pulse laser beam, 204 ... Laser irradiation region, 205 ... Continuous laser beam

Claims (14)

A channel region is provided on the gate electrode through a gate insulating layer, and a source region and a drain region are provided to partially extend on both ends of the gate electrode with the channel region interposed therebetween.
Corresponding to only one of the source region and the drain region, a heat transfer member having a higher thermal conductivity than the gate insulating layer is provided at least thermally connected to the gate electrode. A thin film transistor characterized by The thin film transistor according to claim 1, wherein the heat transfer member is provided corresponding to only the source region. The thin film transistor according to claim 1, wherein the heat transfer member is electrically connected to the gate electrode. The thin film transistor according to claim 1, wherein the heat transfer member constitutes a side edge of the gate electrode. The thin film transistor according to claim 1, wherein a thermal conductivity of the heat transfer member is equal to or higher than a thermal conductivity of the gate electrode. The heat transfer member has a width extending to a position separated by 1.5 μm or more from an end portion in contact with the channel region of one of the source region and the drain region which is closer to the heat transfer member. The thin film transistor according to claim 1. Of the source region and the drain region, the capacitance bonded to one region corresponding to the heat transfer member has a larger potential fluctuation at the time of switching than the capacitance bonded to the other region. The thin film transistor according to claim 1, having a configuration. A display device having a thin film transistor,
The thin film transistor is
A channel region is provided on the gate electrode through a gate insulating layer, and a source region and a drain region are provided to partially extend on both ends of the gate electrode across the channel region.
Corresponding to only one of the source region and the drain region, a heat transfer member having a higher thermal conductivity than the gate insulating layer is provided at least thermally connected to the gate electrode. A display device characterized by that. A plurality of unit regions by the thin film transistors are provided in a two-dimensional matrix,
9. The display device according to claim 8, wherein the first and second unit regions adjacent to each other have a symmetrical arrangement shape at least partially with respect to a virtual plane orthogonal to the main surface of the substrate. . The display device according to claim 8, wherein each of adjacent portions that are adjacent to the virtual plane and that form the first and second unit regions are simultaneously irradiated with laser light. A first step of forming a gate electrode on the substrate;
A second step of forming a gate insulating layer covering at least the gate electrode;
A third step of forming an amorphous region to be a channel region, a source region and a drain region on the gate insulating layer;
A fourth step of forming at least a part of the amorphous region into a crystalline channel region by laser light irradiation,
Prior to the second step, a heat transfer member that is at least thermally connected to the gate electrode is formed corresponding to only one of the source region and the drain region. Method. The method of manufacturing a thin film transistor according to claim 11, wherein the heat transfer member is formed simultaneously with the gate electrode. The method of manufacturing a thin film transistor according to claim 11, wherein the laser light irradiation is performed by a solid laser. The laser light irradiation is performed by continuous or stepwise scanning irradiation,
The method for manufacturing a thin film transistor according to claim 11, wherein the heat transfer member is formed on the upstream side of the scan irradiation as compared with the gate electrode.

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