JP2006337666A - Image display device and its driving method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an image display device and its driving method that can improve uniformity of luminance. <P>SOLUTION: The image display device is equipped with an electric field emission element 2 having a cathode electrode layer 12, a cathode element 15 which is selectively provided thereupon and electrically connected thereto and has a plurality of projection portions on a surface, a gate electrode layer 14 which is provided opposite the cathode electrode layer 12 and has an opening 14A opposite the cathode element 15, an anode electrode layer 24 which is provided opposite the gate electrode layer 14 on the opposite side from the cathode electrode layer 12 across the gate electrode layer 14, and a light emission layer 22 which is provided adjacently to the anode electrode layer 24, and an element driving section 3 which applies a first voltage to the cathode electrode layer 12, a second voltage to the gate electrode layer 14, and an electron lead-out voltage to the anode electrode layer 24 to form an electric field distribution such that electric field intensity in an area which is ≥50% of the area of the opening 14A is included in the range of a higher electric field. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention provides an image display using a field emission device that emits electrons from the tips of a plurality of protrusions formed on the surface of a cathode electrode by setting the potential difference between the cathode electrode and the gate electrode to a predetermined magnitude or more. The present invention relates to an apparatus and a driving method thereof.

  In recent years, a so-called field emission display (field emission display: hereinafter referred to as FED) has been developed as one of flat display panels used in image display devices. This FED, like a cathode ray tube (CRT), is based on the principle that electrons emitted from an electron emission source in a vacuum collide with a light emitting surface provided with a light emitting layer to emit light. A panel display can be realized. However, in the case of a cathode ray tube, a single electron emission source is usually arranged at a position that is 10 to several tens of centimeters away from the light emitting surface, whereas in the FED, a plurality of electron emission is located at a position about several mm away from the light emitting surface The basic structure is different in that the sources are arranged in a matrix.

  Here, the basic structure and operation of a general FED will be described more specifically. The FED has a triode structure in which a cathode electrode, a gate electrode, and an anode electrode are arranged in this order at predetermined intervals, and a cathode element as an electron emission source is selectively provided on the cathode electrode. . The gate electrode is provided with a gate hole in a portion facing the cathode element, and electrons are emitted from the cathode element by setting a potential difference between the cathode electrode and the gate electrode to a predetermined magnitude or more, and the light emitting layer of the anode electrode It is supposed to collide with.

  In recent years, a method using a fibrous material such as carbon nanotube (CNT) or carbon nanofiber as a material of the cathode element has been proposed (Patent Documents 1 to 3). In this method, usually, a plurality of protrusions made of a fibrous material are formed on the surface of the cathode element.

JP 2003-168355 A JP 2003-303540 A JP 2003-229044 A

  By the way, since the process of generating a cathode element using the fibrous material as described above is a process accompanied by variations, a plurality of protrusions formed on the surface of the cathode element have a length, a diameter, an orientation, and a distribution. As a result, unevenness in brightness tends to occur. Therefore, in order to suppress such brightness unevenness and improve brightness uniformity, it is necessary to form as many protrusions as possible on the surface of the cathode element. Therefore, the area of the protrusion formation region (cathode) It is necessary to enlarge the area. As a method therefor, there is a method of enlarging the cathode area by making the gate hole diameter as large as possible.

  However, when an electric field having a non-uniform spatial distribution is applied to the protrusions having such variations, even if the cathode area is enlarged, a part of the enlarged cathode element surface having a large electric field strength is applied. Brightness unevenness occurs due to variations in the protrusions in the region. In fact, in a general tripolar type (cathode electrode, gate electrode, and anode electrode) FED, a strong electric field is applied to the protrusion in the outer edge region of the gate hole, and the protrusion in the central region of the gate hole is applied. On the other hand, since a weak electric field is applied, there is a problem that unevenness in luminance occurs due to variations in protrusions in the outer edge region of the gate hole.

  The present invention has been made in view of such problems, and an object of the present invention is to provide an image display device and a driving method thereof that can suppress luminance unevenness and improve luminance uniformity. .

The image display device of the present invention includes the following components (A) to (D).
(A) An image is displayed by selectively driving pixels arranged in a matrix. (B) The first electrode layer is selectively provided on the first electrode layer, and is electrically connected to the first electrode layer. The reference is based on the second electrode layer and the second electrode layer, which are connected to each other and have an electron emission layer having a plurality of protrusions on the surface and the first electrode layer, and have an opening at a position facing the electron emission layer. And a third electrode layer provided opposite to the second electrode layer on the side opposite to the first electrode layer, and a light emitting layer provided adjacent to the third electrode layer, and an electric field constituting a pixel Emitting element (C) An element driving unit that applies a first voltage to the first electrode layer, applies a second voltage to the second electrode layer, and applies an electron extraction voltage to the third electrode layer. By controlling the first voltage, the second voltage and the electron extraction voltage, respectively, the opening area 50 Forming an electric field distribution as the electric field intensity is to be included within the scope of the higher electric field in more areas

  In the image display device of the present invention, an electric field distribution is formed by the element driving unit so that the electric field strength in the region of 50% or more of the area of the opening of the second electrode layer is included in the upper electric field range. As described above, the first voltage is applied to the first electrode layer, the second voltage is applied to the second electrode layer, and the electron extraction voltage is applied to the third electrode layer. As a result, electrons emitted from the protruding portion of the electron emission layer are attracted to the third electrode layer side according to the electric field distribution and then collide with the light emitting layer. Thereby, the light emitting layer emits light.

  Here, the range of the upper electric field refers to a predetermined value and a predetermined value in the spatial distribution of the average value of the electric field distributed in each segment when the opening of the second electrode layer is finely divided into a matrix. It means the electric field range between 0.5V / μm minus value. The predetermined value means that the average value of the electric field is increased starting from the average value of the electric field when the ratio (occupancy ratio) occupied by the segment having the average value of a certain electric field among all the segments becomes the maximum. Mean the average value of the electric field when the occupation ratio falls below 2% for the first time.

  Moreover, said protrusion part can be comprised including a carbon nanotube or a carbon nanofiber, for example. Carbon nanotubes are those in which a graphite sheet is rolled up into a cylindrical shape and has a cylindrical diameter of 1 to 10 nm. The carbon nanofibers are formed by rounding a graphite sheet into a cylindrical shape and having a cylindrical diameter of 10 to 1000 nm.

  The image display device driving method of the present invention is selectively provided on the first electrode layer and the first electrode layer, and is electrically connected to the first electrode layer and has a plurality of protrusions on the surface. The second electrode on the opposite side of the first electrode layer with respect to the second electrode layer, the second electrode layer being provided facing the electron emission layer and the first electrode layer and having an opening at a position facing the electron emission layer A driving method of an image display device comprising a third electrode layer provided opposite to a layer and a light emitting layer provided adjacent to the third electrode layer, wherein the first voltage is applied to the first electrode layer Then, the second voltage is applied to the second electrode layer, the electron extraction voltage is applied to the third electrode layer, and the electric field strength in the region of 50% or more of the area of the opening is included in the upper electric field range. Such an electric field distribution is formed.

  According to the image display device and the driving method thereof of the present invention, the electric field distribution is formed such that the electric field strength in the region of 50% or more of the opening area of the second electrode layer is included in the upper electric field. Since it did in this way, the electric field applied to a projection part can be made spatially uniform. As a result, luminance unevenness can be suppressed and luminance uniformity can be improved.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

  FIG. 1 shows a schematic configuration of a field emission element 2 and an element driving unit 3 constituting an image display apparatus 1 according to an embodiment of the present invention. FIG. 1 shows a cut surface of the field emission device 2 cut along a plane perpendicular to the row direction (X axis) and the column direction (Y axis). FIG. 2 is an enlarged perspective view of a part of the field emission device 2. In addition, since the drive method of the image display apparatus 1 is embodied by the element drive part 3, it is demonstrated collectively below.

  The field emission device 2 is formed by disposing the cathode panel 10 and the anode panel 20 so as to face each other with a predetermined interval and assembling the panels 10 and 20 integrally with a frame 30.

  The cathode panel 10 includes a support substrate 11, a cathode electrode layer 12 (first electrode layer), an insulating layer 13, a gate electrode layer 14 (second electrode layer), and a cathode element 15.

  A plurality of cathode electrode layers 12 extending in the Y-axis direction are formed on the support substrate 11, and an insulating layer 13 is formed on the cathode electrode layer 12. A plurality of gate electrode layers 14 extending in the X-axis direction are formed on the insulating layer 13. In this embodiment, the cathode electrode layers 12 are arranged in m columns and the gate electrode layers 14 are arranged in a matrix for n rows. Here, m and n are positive integers.

  A portion where the cathode electrode layer 12 and the gate electrode layer 14 intersect with each other when viewed from the Z-axis direction is an electron emission region 16 and constitutes each pixel. In the insulating layer 13 and the gate electrode layer 14 in the electron emission region 16, a plurality of gate holes 17 each including a hole 13A and an opening 14A penetrating them are formed at a predetermined interval. Note that the plurality of gate holes 17 may not be formed in a lattice shape as illustrated in FIG. 1, and may be formed in only one row in the X-axis direction or the Y-axis direction, for example. A cathode element 15 (electron emission layer) is formed on the surface of the cathode electrode layer 12 corresponding to the bottom of the gate hole 17. A plurality of protrusions 15 </ b> A are disposed on the surface of the cathode element 15, and the protrusions 15 </ b> A and the cathode electrode layer 12 are electrically connected via the cathode element 15.

  On the other hand, the anode panel 20 includes a transparent substrate 21, a light emitting layer 22, a black matrix 23, and an anode electrode layer 24.

  A plurality of light emitting layers 22 extending in the Y-axis direction are formed on the transparent substrate 21 so as to correspond to the positions facing the electron emission regions 16, and between the adjacent band-shaped light emitting layers 22. The black matrix 23 is arranged in the area. The light emitting layer 22 includes a light emitting layer 22R for R (red), a light emitting layer 22G for G (green), and a light emitting layer 22B for B (blue), and is repeatedly arranged in the order of 22R, 22G, and 22B in the X-axis direction. Has been. An anode electrode layer 24 (third electrode layer) is formed at least in a region facing the electron emission region 16 on the light emitting layer 22 and the black matrix 23.

  The cathode panel 10 and the anode panel 20 are joined to each other at the outer peripheral portion (peripheral portion) via the frame body 30, and the space formed by joining the frame body 30 is in a vacuum state. Yes. A spacer (not shown) is disposed in a region where the cathode panel 10 and the anode panel 20 face each other in order to maintain a distance in a region away from the outer peripheral portion of the cathode panel 10 and the anode panel 20. .

  Thus, the field emission device 2 is configured by a tripolar structure including the cathode electrode layer 12, the gate electrode layer 14, and the anode electrode layer 24. The field emission device 2 can perform color display by using 22R, 22G, and 22B as the light emitting layer 22 as described above. However, in this embodiment, the description is simplified. Therefore, the description will be made without distinguishing each color particularly in color display.

  Here, the support substrate 11 is made of an insulating material, for example, a glass substrate having a thickness of 1.1 mm. The cathode electrode layer 12 is made of a conductive material, for example, aluminum (Al) having a thickness of 0.1 μm.

The insulating layer 13 is made of a material that can insulate the cathode electrode layer 12 and the cathode element 15 from the gate electrode layer 14. For example, the insulating layer 13 is made of SiO ₂ or SiN having a thickness ti of 3 μm to 7 μm. ing. Here, the reason why the upper limit is set to 7 μm is that if the upper limit is exceeded, the trajectory of electrons emitted from the protrusion 15A is bent by the negative charge charged up on the side wall of the insulating layer 13, which is not preferable. . Further, the lower limit is set to 3 μm because if it is smaller than that, the distance between the gate electrode 15 on the insulating layer 13 and the protrusion 15A becomes too close to make it difficult to control the field emission. . In the insulating layer 13, a hole 13A having a diameter substantially the same as the diameter φ1 of the bottom of the gate hole 17 described later is formed in a region facing the bottom of the gate hole 17.

  The gate electrode layer 14 is made of a conductive material suitable for plating. For example, the gate electrode layer 14 is made of aluminum (Al) having a thickness tg of 0.1 μm. Note that the thickness of the gate electrode layer 14 is not limited to the above-described thickness as long as it does not make the spatial distribution of the electric field nonuniform. Further, the gate electrode layer 14 has an opening 14A (corresponding to the opening of the second electrode layer) in a region facing the bottom of the gate hole 17 and having a diameter substantially the same as the diameter φ1 of the bottom of the gate hole 17 described later. Is formed.

  The cathode element 15 includes a fibrous material and a binder material, and has a thickness of, for example, 0.3 μm. The fibrous material only needs to be a material in which electrons can easily penetrate the energy barrier due to the quantum tunnel effect. For example, the fibrous material is composed of carbon nanotube (CNT) or carbon nanofiber powder having an average length of 1 μm and an average diameter of 1 nm. Has been. The binder material may be a conductive paste, and is composed of, for example, a thermally decomposable organic metal such as organic tin and organic indium, or a metal salt such as indium chloride. Further, the protruding portion 15 </ b> A formed on the surface of the cathode element 15 includes a fibrous material protruding from the inside of the cathode element 15 to the surface. Further, the plurality of protrusions 15A are not necessarily the same in length, diameter, orientation, and density everywhere on the surface of the cathode element 15, and have a certain variation.

  A plurality of gate holes 17 are formed in the electron emission region 16 corresponding to one pixel. The diameter φ1 of the bottom of the gate hole 17 may be any size as long as the area where the protrusion 15A is formed can be made as large as possible while suppressing DC emissions in the electron emission region 16. Specifically, It is preferable to be within the range of 2 (tg + ti) to 3 (tg + ti). Here, when a numerical value is substituted into this equation, when the thickness tg of the gate electrode layer 14 is 0.1 μm, it is 6.2 μm (tg = 0.1 μm, ti = 3 μm) to 21.3 μm (tg = 0.1 μm, ti = 7 μm).

The transparent substrate 21 is made of a material having transparency and insulating properties, for example, a glass substrate having a thickness of 2.8 mm. The light emitting layer 22 is made of, for example, Y ₂ O ₂ S (for red), ZnS (for green), ZnS (for blue) or the like generally used as a material for a fluorescent surface of a CRT. For example, 23 is made of chromium oxide. The anode electrode layer 24 is made of a material having transparency and conductivity, and is made of chromium having a thickness of 0.2 μm, for example.

  Then, the effect | action of the field emission element 2 of this Embodiment is demonstrated.

  In the field emission device 2, a cathode voltage Vc having a relatively negative voltage compared to the gate voltage Vg is applied from the cathode electrode driving unit 4 to the cathode electrode layer 12. A gate voltage Vg having a relatively positive voltage compared to the cathode voltage Vc is applied from the gate electrode driving unit 5 to the gate electrode layer 14. Further, a positive voltage higher than the gate voltage Vg is applied from the anode electrode driving unit 6 to the anode electrode layer 24.

  In the field emission device 2, when an image is actually displayed, a cathode voltage Vc (pixel voltage) as a video signal is input to the cathode electrode layer 12 from the cathode electrode driving unit 4, and a gate is applied to the gate electrode layer 14. A gate voltage Vg (scanning voltage) as a scanning signal is input from the electrode driver 5. Then, an anode voltage Ve (electron extraction voltage) is input from the anode electrode driving unit 6 to the anode electrode layer 24. Contrary to the above, a cathode voltage Vc (scanning voltage) as a scanning signal is input to the cathode electrode layer 12 from the cathode electrode driving unit 4, and a gate as a video signal from the gate electrode driving unit 5 to the gate electrode layer 14. A voltage Vg (pixel voltage) may be input.

  Here, the pixel voltage application method may be analog driving in which gradation display is performed by changing the magnitude of the applied voltage, or digital display in which gradation display is performed by changing the application time of the applied voltage. It may be driven.

  As a result, a voltage is applied between the cathode electrode layer 12 and the gate electrode layer 14, and the electric field is concentrated on the tip of the protrusion 15A (for example, the tip of the CNT). As a result, electrons penetrate through the energy barrier by the quantum tunnel effect and are emitted from the tip of the protrusion 15A to the outside of the gate hole 17. The electrons thus emitted enter the anode panel 20 according to the average electric field Es1 (= Vs / D) obtained by dividing the potential difference Vs between the anode electrode layer 24 and the gate electrode layer 14 by the shortest distance D. It is attracted and collides with the light emitting layer 22 (22R, 22G, 22B) on the transparent substrate 21. As a result, the light emitting layer 22 emits light when excited by the collision of electrons. Furthermore, a desired image can be displayed on the display panel by controlling the light emission position in units of pixels.

  Here, the average electric field Es1 is desirably large enough to give the electrons sufficient energy to obtain a desired luminance. Specifically, the average electric field Es1 is 4V / μm to 10V / μ. It is desirable to be within the range. The electric field generated from the potential difference between the cathode electrode layer 12 and the anode electrode layer 24 does not exist on average in all the spaces between the anode electrode layer 24 and the cathode electrode layer 12, The gate hole 17 is weakened by the influence of the shape of the gate hole 17 and the potential difference between the gate electrode layer 14 and the cathode electrode layer 12.

  By the way, in order to emit electrons from the tip of the protrusion 15A, it is necessary to apply an electric field exceeding the threshold electric field Eth to the tip of the protrusion 15A. This threshold electric field Eth is the minimum electric field necessary for electrons to penetrate the energy barrier, and varies depending on the material and shape of the protrusion 15A. An example of the magnitude of the threshold electric field Eth is approximately 2 V / μm when the protrusion 15A is composed of CNTs having an average length of 1 μm and an average diameter of 1 nm. Therefore, when a voltage that generates only an electric field less than the threshold electric field Eth is applied to the tip of the protrusion 15A between the cathode electrode layer 12 and the gate electrode layer 14, electrons are emitted from the tip. Therefore, the light emitting layer 22 hardly emits light. On the other hand, when a voltage generating an electric field equal to or higher than the threshold electric field Eth is applied between the cathode electrode layer 12 and the gate electrode layer 14 at the tip of the protrusion 15A, electrons are emitted from the tip and the light emitting layer 22 emits light.

  However, the above condition is that the influence of the anode electrode layer 24 is smaller than the influence of the gate electrode layer 14 at the tip of the protrusion 15A, that is, the cathode electrode layer 12 and the anode electrode at the tip of the protrusion 15A. It is assumed that the magnitude of the electric field resulting from the potential difference with the layer 24 is less than the threshold electric field Eth. Therefore, when the voltage applied to the anode electrode layer 24 is increased, a phenomenon called electric field penetration, in which an electric field equal to or higher than the threshold electric field Eth reaches the tip of the projection 15A, It occurs regardless of whether it is hidden. As a result, DC emission always occurs in the central portion of the cathode element 15 farthest from the position of the gate electrode layer 14, and electron emission is accurately controlled by the voltage normally applied to the gate electrode layer 16. Can not be. Accordingly, the thickness of the gate electrode layer 14 and the insulating layer 13, the shape of the gate hole 17, the distance between the anode electrode layer 24 and the cathode electrode layer 12, or the cathode electrode layer 12 and the gate so that DC emission does not occur. It is necessary to adjust the voltage applied to the electrode layer 14 and the anode electrode layer 24.

In addition, when the tip of the protrusion 15A having a certain variation is used as an electron emission source, in order to suppress uneven brightness and improve the uniformity of the brightness, as described above, the protrusion 15A is applied to the protrusion 15A. It is necessary to make the spatial distribution of the electric field uniform. Here, the following formula (1) is used as a scale A for achieving uniformity of luminance.
A = (σ1 / AVG1) × 100 (1)

  Here, σ1 is the average luminance at a certain pixel (i, j) (1 ≦ i ≦ m, 1 ≦ j ≦ n), and the pixel having the average luminance is counted for each average luminance. This is the standard deviation when the vertical axis is a value obtained by dividing the number obtained by dividing the total number of pixels. AVG1 is a value of average luminance when the counted number is maximum. Note that the preferable range of the scale A for achieving uniformity of luminance is preferably 6% or less, and more preferably 3% or less, considering practicality as an image display element.

  In addition, the following rules are introduced as a scale B for achieving the uniformity of the electric field. The definition is that “the electric field strength in a region of 50% or more of the area of the opening 14A in the gate electrode layer 14 (substantially the same as the cathode area in the present embodiment) is included in the range of the upper electric field”. In this definition, the range of the upper electric field is described with reference to the graphs illustrated in FIGS. 11A and 11B. Each segment S when the openings 14A in the gate electrode layer 14 are finely divided in a matrix form. The graph shows the average value of the electric field distributed in the horizontal axis and the value obtained by multiplying the number of segments S having the average value divided by the total number of segments (100) (occupancy) as the vertical axis. In the spatial distribution, it means an electric field range between a predetermined value E1 and a value E2 obtained by subtracting 0.5 V / μm from the predetermined value E1. Here, when the average value of the electric field is increased starting from the average value of the electric field when the occupation ratio in the graph constituting the main mountain M1 is the maximum, the predetermined value E1 is 2 It means the average value of the electric field when it falls below% for the first time.

  It should be noted that the concept of the main mountain M1 refers to a mountain including the segment S with the largest occupation ratio, and when there is a mountain M2 that follows the main mountain M1, it is unclear where to start. It is specified to avoid clarification. In addition, the number of 2% used when determining the starting point is specified in order to accurately determine the range of the upper electric field even when the base of the main mountain M1 spreads low. It is. In addition, the number of 0.5 V / μm used when determining the range of the upper electric field described above represents the current density necessary for realizing a desired luminance level, Ic, and the electric field in the vicinity of the protrusion 15A at that time. Assuming Ec, the lower limit current density contributing to light emission is about 1/5 to 1/7 of Ic, and the magnitude of the electric field at that time is a value obtained by subtracting about 0.5 V / μm from Ec. In the spatial distribution of the electric field at the opening in the gate electrode layer, the lower limit electric field contributing to light emission is defined.

  By the way, “more than 50% of the area of the opening 14A in the gate electrode layer 14” is set to be light emission when an area to which an electric field contributing to light emission is applied in the vicinity of the opening 14A in the gate electrode layer 14 becomes too small. This is because a region where contributing electrons are emitted and a region where electrons are not emitted are generated, resulting in uneven luminance on the entire screen and lowering of luminance uniformity. On the contrary, when the area to which the electric field contributing to light emission is applied increases, electrons contributing to light emission are emitted from the entire surface of the cathode element 15, so that the luminance unevenness of the entire screen is suppressed and the luminance is uniform. This is because the property is improved. As described above, by controlling the spatial distribution of the electric field in each very small opening 14A, the luminance distribution of the entire screen can be controlled.

Further, the following formula (2) is used as a scale C for achieving the uniformity of the electric field.
C = (σ2 / AVG2) × 100 (2)

  Here, σ2 is the average value of the electric field distributed in each segment when the openings 14A in the gate electrode layer 14 are finely divided in a matrix, and the number of segments having the average value is counted as the total number of segments. This is the standard deviation when the vertical axis is the value divided by the number. AVG2 is an average value when the counted number becomes the maximum.

  Note that the desirable range of the scale C for achieving the uniformity of the electric field greatly varies depending on the degree of variation of the protrusions 15A. This is because when the variation in density of the projections 15A is small, even if the spatial distribution of the electric field is somewhat nonuniform, the uniformity of luminance is not necessarily deteriorated, but the variation in density of the projections 15A is large. In addition, when the spatial distribution of the electric field is non-uniform, the luminance uniformity may be significantly deteriorated. Therefore, when the spatial distribution of the electric field satisfying the desired range of the scale A is obtained by numerical calculation in a state where the influence of the protrusion 15A is excluded (that is, without the protrusion 15A), the scale C is 30% or less. It can be seen that it is desirable that it is 8% or less. Therefore, when the influence of the protrusion 15A is taken into account (that is, when the protrusion 15A is provided and there is variation), it is expected that the desirable value of the scale C is smaller than the above. The reason why the smaller scale C is desirable is that the smaller the standard deviation, the steeper the peak of the spatial distribution of the electric field, and the more uniform the electric field distribution in the vicinity of the opening 14A in the gate electrode layer 14.

  As described above, according to the image display device 1 and the driving method thereof according to the present embodiment, the electric field strength in the region of 50% or more of the area of the opening of the gate electrode layer 14 is included in the upper electric field range. Since such an electric field distribution is formed, the electric field applied to the protrusion 15A can be made spatially uniform. As a result, luminance unevenness can be suppressed and luminance uniformity can be improved.

  Examples of the present invention will be described below.

  First, the first embodiment will be described in comparison with the first comparative example. The comparative example has the same structure as that of the present embodiment, but is displayed by a driving method different from that of the present embodiment.

  3A and 3B show the results of this example. Specifically, FIG. 3A shows the spatial distribution of the electric field at the opening 14A of the gate electrode layer 14 in the color-type field emission device 2 designed so that the scale A to the scale C are within a desired range. It is obtained by numerical calculation. FIG. 3B shows the luminance distribution of the entire screen in the field emission device 2 designed in the same manner as in FIG.

  4A and 4B show the results of this comparative example. Specifically, FIG. 4A shows a gate electrode layer in a color field emission device designed so that only scale C is in the desired range, but scale A and scale B are not in the desired range. The spatial distribution of the electric field at the aperture is obtained by numerical calculation. FIG. 4B shows the luminance distribution of the entire screen in the field emission device designed in the same manner as FIG.

In this embodiment, the support substrate 11 serving as the base of the cathode panel 10 is a glass substrate having a thickness of 1.1 mm, the cathode electrode layer 12 is 0.1 μm in thickness, and aluminum (Al) having a stripe width W of 86.5 μm, The insulating layer 13 was made of SiO _{2 having} a thickness of 7 μm, and the gate electrode layer 14 was made of Al having a thickness of 0.1 μm. In the insulating layer 13 and the gate electrode layer 14, 50 gate holes 17 having a bottom diameter φ1 of 7 μm were formed.

  The cathode element 15 at the bottom of the gate hole 17 is composed of a mixed material of CNT having a thickness of 0.3 μm and ITO, and a protrusion 15A made of CNT is oriented substantially vertically on the surface of the cathode element 15.

The transparent substrate 21 serving as the base of the anode panel 20 is a glass substrate having a thickness of 2.8 mm, and the light emitting layer 22 is Y ₂ O ₂ S (for red), ZnS (for green) and ZnS (for blue) having a thickness of 10 μm. The black matrix 23 was made of chromium oxide having a thickness of 0.2 μm, and the anode electrode layer 24 was made of Al having a thickness of 0.2 μm. The distance between the anode electrode layer 24 and the cathode element 15 was set to 1.0 mm.

  In this comparative example having the above configuration, when a voltage of 4 kV is applied to the anode electrode layer, a voltage of 50 V is applied to the gate electrode layer, and a voltage of −25 V is applied to the cathode element, the gate electrode layer As shown in FIG. 4 (A), the spatial distribution of the electric field at the aperture in FIG. 4A has a locally sharp peak in a region where the electric field is small, and a region where the vertical axis value slightly exceeds 2%. Followed gently to a large area. The scale B at this time is 25%, and the scale C is 19%. In addition, the luminance distribution is not uniform as shown in FIG. 4B, and the scale A at this time is 25%.

  At this time, the average electric field magnitude Es1 is 4.0 V / μm, and the average electric field magnitude Es2 is 10.7 V / μm. Therefore, the magnitudes of both average electric fields are different. The voltage of 50 V applied to the gate electrode layer is the same as the voltage applied when displaying a so-called white level (maximum luminance level) image.

  On the other hand, in this embodiment having the above configuration, when a voltage of 6 kV is applied to the anode electrode layer 24, a voltage of 25V is applied to the gate electrode layer 14, and a voltage of -17V is applied to the cathode element 15, As shown in FIG. 3A, the spatial distribution of the electric field in the opening 14A in the gate electrode layer 14 is very narrow compared to the comparative example. The scale B at this time is 89%, and the scale C is 80%. Further, the luminance distribution is uniform as shown in FIG. 3B, and the scale A at this time is 5.5%.

  At this time, the average electric field magnitude Es1 is 6.1 V / μm, and the average electric field magnitude Es2 is 6.0 V / μm. Therefore, the magnitudes of both average electric fields are almost the same. The voltage of 25 V applied to the gate electrode layer 14 is the same as the voltage applied when displaying a so-called white level (maximum luminance level) image.

  Next, the second embodiment will be described in comparison with the second comparative example. The comparative example has the same structure as that of the present embodiment, but is displayed by a driving method different from that of the present embodiment.

  5A and 5B show the results of this example. Specifically, FIG. 5A shows the spatial distribution of the electric field at the opening 14A in the gate electrode layer 14 in the monochrome field emission device 2 designed so that the scale A to the scale C are within a desired range. It is obtained by numerical calculation. FIG. 5B shows the luminance distribution of the entire screen in the field emission device 2 designed in the same manner as in FIG.

  6 (A) and 6 (B) show the results of this comparative example. Specifically, FIG. 6A shows a gate electrode layer in a monochrome field emission device designed such that only scale B is in the desired range, but scale A and scale C are not in the desired range. The spatial distribution of the electric field at the aperture is obtained by numerical calculation. FIG. 6B shows the luminance distribution of the entire screen in the field emission device designed in the same manner as in FIG.

In this embodiment, the support substrate 11 serving as the base of the cathode panel 10 is a glass substrate having a thickness of 1.1 mm, the cathode electrode layer 12 is 0.1 μm in thickness, and aluminum (Al) having a stripe width W of 86.5 μm, The insulating layer 13 was made of SiO _{2 having} a thickness of 7 μm, and the gate electrode layer 14 was made of Al having a thickness of 0.1 μm. In the insulating layer 13 and the gate electrode layer 14, 50 gate holes 17 having a bottom diameter φ1 of 7 μm were formed.

  The cathode element 15 at the bottom of the gate hole 17 is composed of a mixed material of CNT having a thickness of 0.3 μm and ITO, and a protrusion 15A made of CNT is oriented substantially vertically on the surface of the cathode element 15.

  The transparent substrate 21 serving as the base of the anode panel 20 is a glass substrate having a thickness of 2.8 mm, the light emitting layer 22 is ZnO having a thickness of 10 μm, the black matrix 23 is chromium oxide having a thickness of 0.2 μm, and the anode electrode layer 24 is It was made of Al having a thickness of 0.2 μm. The distance between the anode electrode layer 24 and the cathode element 15 was set to 1.0 mm.

  In this comparative example having the above configuration, when a voltage of 4 kV is applied to the anode electrode layer, a voltage of 50 V is applied to the gate electrode layer, and a voltage of −25 V is applied to the cathode element, the gate electrode layer As shown in FIG. 6 (A), the spatial distribution of the electric field at the aperture in FIG. The exceeding region continues gently between the peaks. The scale B at this time is 25%, and the scale C is 38%. In addition, the luminance distribution is not uniform as shown in FIG. 6B, and the scale A at this time is 25%.

  At this time, the average electric field magnitude Es1 is 4.0 V / μm, and the average electric field magnitude Es2 is 10.7 V / μm. Therefore, the magnitudes of both average electric fields are different. The voltage of 50 V applied to the gate electrode layer is the same as the voltage applied when displaying a so-called white level (maximum luminance level) image.

  On the other hand, in this embodiment having the above configuration, when a voltage of 6 kV is applied to the anode electrode layer 24, a voltage of 25V is applied to the gate electrode layer 14, and a voltage of -17V is applied to the cathode element 15, As shown in FIG. 5A, the spatial distribution of the electric field in the opening 14A in the gate electrode layer 14 is very narrow compared to the comparative example. The scale B at this time is 89%, and the scale C is 80%. Further, the luminance distribution is uniform as shown in FIG. 5B, and the scale A at this time is 5.7%.

  At this time, the average electric field magnitude Es1 is 6.0 V / μm, and the average electric field magnitude Es2 is 6.0 V / μm. Therefore, the magnitudes of both average electric fields are almost the same. The voltage of 25 V applied to the gate electrode layer 14 is the same as the voltage applied when displaying a so-called white level (maximum luminance level) image.

  From the results of the first and second examples and the first and second comparative examples, when the scale B and the scale C are satisfied, the scale A is satisfied, but when the scale C is satisfied, the scale B is not satisfied. It can be confirmed that does not satisfy the scale A.

  From the results of the first and second embodiments described above, as one method for obtaining a desirable electric field distribution satisfying the scale B, it is considered that the average electric field Es1 and the average electric field Es2 are substantially the same. It is done. Therefore, also in this embodiment, when a voltage applied when displaying a white level (maximum luminance level) image is applied between the gate electrode layer 14 and the cathode electrode layer 12, the anode electrode layer 24 is used. The average electric field Es1 obtained by dividing the potential difference between the gate electrode layer 14 and the gate electrode layer 14 by the shortest distance is equal to the average electric field Es2 obtained by dividing the potential difference between the gate electrode layer 14 and the cathode element 15 by the shortest distance. By adjusting the driving conditions as described above, the scale B and the scale C can be satisfied, and as a result, the scale A can be satisfied. Here, “equally” includes not only the case where both are completely the same, but also the case where there is a difference of about a manufacturing error.

  The potential difference between the gate electrode layer 14 and the cathode electrode layer 12 is maximized when displaying a white level (maximum luminance level) image (the potential difference at this time is referred to as a maximum drive voltage). For this reason, the driving condition for applying the maximum driving voltage between the gate electrode layer 14 and the cathode electrode layer 12 is the condition that the electric field distribution in the opening 14A in the gate electrode layer 14 is the most nonuniform, and the luminance unevenness is This is the most noticeable condition. Therefore, when the maximum drive voltage is applied between the gate electrode layer 14 and the cathode electrode layer 12 as in the first and second embodiments, the scale B and the scale C are satisfied. It can be said that the scale B and the scale C are satisfied even when a small driving voltage is applied between the gate electrode layer 14 and the cathode electrode layer 12.

  Note that scale B selects an electric field distribution in which a peak exists in a region where the electric field is large (within the upper electric field) and a gentle region whose vertical axis value slightly exceeds 2% does not exist. It can be said that it is stipulated.

  As described above, according to the first and second embodiments, the scale B and the scale C are satisfied when the tip of the projection 15A having a certain variation is used as the electron emission source. The uniformity (scale B) of the spatial distribution of the electric field applied to 15A can be improved. As a result, luminance unevenness due to variations in the protrusion 15A in the vicinity of the gate electrode can be suppressed, and luminance uniformity (scale A) can be improved.

  Then, the manufacturing method of the field emission element 2 is demonstrated.

  First, as shown in FIG. 7A, a cathode electrode layer 12 made of aluminum (Al) having a thickness of, for example, 0.1 μm is formed on a support substrate 11 serving as a base of the cathode panel 10 by, eg, sputtering. To do.

  Next, a process for disposing the cathode element 15 on the cathode electrode layer 12 is performed. Specifically, for example, organic tin and organic indium, or a metal salt such as indium chloride is used as the binder material, and for example, CNT or carbon nanofiber powder having an average diameter of 1 nm and an average length of 1 μm is used as the fibrous material. And a mixed solution in which these are dispersed in a volatile solution (for example, butyl acetate) under the following conditions is obtained. At that time, in order to improve the dispersibility of the fibrous material, a dispersant (for example, sodium dodecyl sulfate) is mixed with the above mixed solution. Further, ultrasonic treatment may be performed to further improve the dispersibility of the fibrous material. It is also possible to mix other additives.

(Example of mixed solution generation conditions)
Organic tin and organic indium: 10 to 50% by mass
Butyl acetate: 30-80% by mass
Sodium dodecyl sulfate: 0.1 to 5% by mass
CNT: 0.001 to 20% by mass

  Subsequently, as shown in FIG. 7B, the above mixed solution is applied onto the cathode electrode layer 12 by, for example, a dry spray method, a slurry method, or a screen printing method to form the cathode element 15. Here, the dry spray method is a method in which a material is sprayed on the surface in an atmosphere higher than room temperature (for example, 50 ° C.). When the dry spray method is used, the material sprayed on the surface is used. It can be dried instantly. Thereafter, the cathode element 15 is fired. Thereby, the cathode element 15 is solidified in a state where the volatile component is evaporated and the fibrous material is embedded in the binder material.

  Next, as shown in FIG. 7C, the cathode element 15 is processed into a disk shape. Specifically, a resist material is applied to the entire surface of the cathode element 15 by, for example, spin coating to form a resist layer (not shown). Subsequently, the resist layer is patterned by a photolithography technique to form a resist pattern serving as an etching mask on the cathode element 15. Next, the resist layer other than the patterned portion is removed by, for example, a wet etching method.

  Subsequently, the cathode element 15 other than the portion covered with the resist pattern is removed by, for example, a wet etching method. As a result, for example, a disk-shaped cathode element 15 having a thickness of 0.3 μm and a diameter (corresponding to the diameter φ1) of 2 (tg + ti) to 3 (tg + ti) is formed. Thereafter, the resist pattern is removed.

  Subsequently, the cathode electrode layer 12 is processed into a stripe shape having a width W by, for example, a dry etching method or a wet etching method.

  Next, as shown in FIG. 8A, in order to prevent RIE (Reactive Ion Etching) damage at the time of forming a gate hole 17 which will be described later, it is made of MgO having a thickness of 0.3 μm, for example, by a lift-off method, for example. A protective film P is formed so as to cover the cathode element 15.

Subsequently, on the exposed portions of the protective film P and the cathode electrode layer 12, for example, SiO ₂ having a thickness ti of 3 μm to 7 μm by a CVD method using TEOS (tetraethoxysilane) as a source gas. An insulating layer 13 made of is formed.

  Next, the gate electrode layer 14 is formed. Specifically, a resist material is applied to the entire surface of the insulating layer 13 by, eg, spin coating to form a resist layer R. Subsequently, the resist layer R is patterned by a photolithography technique, so that a plating mask is formed on the surface of the insulating layer 13 other than the region facing the cathode element 15 as shown in FIG. 8B. A resist pattern is formed. Next, the resist layer R other than the patterned portion is removed by, for example, a wet etching method. As a result, only the region facing the cathode element 15 on the surface of the insulating layer 13 is exposed.

  Subsequently, aluminum (Al) is grown on the circular region of the surface of the insulating layer 13 by, for example, plating. Thereafter, by removing the resist pattern, as shown in FIG. 9A, a gate electrode layer 14 having a thickness tg + α and having an opening with a diameter of 7 μm, for example, is formed. Here, the above-mentioned α assumes that the portion to be removed by etching is used in advance because the gate electrode layer 14 is used as a mask when an insulating layer 13 described later is etched.

  Next, as shown in FIG. 9B, using the gate electrode layer 14 as an etching mask, the insulating layer 13 is etched by, eg, RIE to complete the gate hole 17. As described above, by using the gate electrode layer 14 as an etching mask, the positions of the opening 14A formed in the gate electrode layer 14 and the hole 13A formed in the insulating layer 13 are shifted from each other as viewed from the Z-axis direction. The gate hole 17 can be processed with high accuracy. Further, since it is not necessary to form a resist mask for each layer, the manufacturing process of the gate hole 17 can be facilitated and shortened.

  Subsequently, after the protective film P is etched to expose the surface of the cathode element 15, a part of the binder material of the cathode element 15 is removed by, for example, an ITO wet etching method based on the following conditions. In this way, a part of the fibrous material of the cathode element 15 is exposed.

(Example of ITO wet etching conditions)
Etching solution: ITO-06N (manufactured by Kanto Chemical)
Etching time: 5 to 60 seconds Etching temperature: 10 to 60 ° C

  Thereafter, as shown in FIG. 10, the fibrous material is subjected to an orientation treatment (activation) so that each fibrous material stands up substantially vertically on the surface of the cathode element 15. Specifically, after sticking an adhesive member (not shown) on the gate electrode layer 14, the adhesive member is peeled off, whereby the fibrous material is applied to the support substrate 11 on the surface of the support substrate 11. Orientation is performed in a direction substantially perpendicular to the direction (Z-axis direction). This makes it possible to secure a larger number of protrusions 15A that emit electrons by field emission on the surface of the cathode element 15, and thus it is possible to provide an electron-emitting element having excellent electron-emitting characteristics. In this way, the field emission device 2 is manufactured.

1 is a schematic configuration diagram of an image display device according to an embodiment of the present invention. It is a perspective view of the image display element of FIG. It is the electric field distribution map and luminance distribution map of the image display apparatus which concerns on an Example. It is an electric field distribution map and luminance distribution map of an image display device concerning a comparative example. It is the electric field distribution map and luminance distribution map of the image display apparatus which concerns on another Example. It is the electric field distribution map and luminance distribution map of the image display apparatus which concerns on another comparative example. It is sectional drawing in the manufacturing process of the image display element of FIG. FIG. 8 is a cross-sectional view for explaining a step following the step in FIG. 7. FIG. 9 is a cross-sectional view for explaining a step following the step in FIG. 8. FIG. 10 is a cross-sectional view for explaining a step following the step in FIG. 9. It is an electric field distribution diagram for demonstrating a high-order electric field.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Image display apparatus, 2 ... Field emission element, 3 ... Element drive part, 4 ... Cathode electrode drive part, 5 ... Gate electrode drive part, 6 ... Anode electrode drive part, 10 ... Cathode panel, 11 ... Support substrate, 12 DESCRIPTION OF SYMBOLS ... Cathode electrode layer, 13 ... Insulating layer, 13A ... Hole, 14 ... Gate electrode layer, 14A ... Opening, 15 ... Cathode element, 15A ... Projection part, 16 ... Electron emission region, 17 ... Gate hole, 20 ... Anode panel, DESCRIPTION OF SYMBOLS 21 ... Transparent substrate, 22 ... Light emitting layer, 22B ... Light emitting layer for B (blue), 22G ... Light emitting layer for G (green), 22R ... Light emitting layer for R (red), 23 ... Black matrix, 24 ... Anode electrode layer 30 ... frame, A ... aspect ratio, e ... electron, Eth ... threshold electric field, G ... opening of gate hole, H ... height of inner wall surface of gate hole, L ... light emission, M1 ... main mountain, M2 ... Subordinate mountain, P ... Protective film R: resist layer, S: segment, tg: thickness of gate electrode layer, ti: thickness of insulating layer, W: stripe width, φ1: outer diameter of cathode element (inner diameter of gate electrode layer), φ2: cathode element Inner diameter

Claims (7)

An image display device that displays an image by selectively driving pixels arranged in a matrix,
A first electrode layer, an electron emission layer selectively provided on the first electrode layer, electrically connected to the first electrode layer, and having a plurality of protrusions on the surface; the first electrode layer; A second electrode layer provided oppositely and having an opening at a position facing the electron-emitting layer; opposed to the second electrode layer on a side opposite to the first electrode layer with respect to the second electrode layer A field emission device having a third electrode layer provided and a light emitting layer provided adjacent to the third electrode layer, and constituting the pixel;
An element driving unit that applies a first voltage to the first electrode layer, applies a second voltage to the second electrode layer, and applies an electron extraction voltage to the third electrode layer;
The element driving unit controls the first voltage, the second voltage, and the electron extraction voltage, respectively, so that the electric field strength in a region of 50% or more of the area of the opening is included in the upper electric field range. An image display device characterized by forming an electric field distribution such that The element driving unit includes the first voltage, the second voltage, and the second voltage so that the electric field distribution is formed when the potential difference between the first voltage and the second voltage is maximized. The image display apparatus according to claim 1, wherein each of the electron extraction voltages is controlled. The element driving unit includes the first voltage, an average electric field between the third electrode and the second electrode, and an average electric field between the second electrode and the first electrode. The image display apparatus according to claim 1, wherein the second voltage and the electron extraction voltage are respectively controlled. The image display apparatus according to claim 1, wherein the element driving unit performs gradation display by changing a magnitude of at least one of the first voltage and the second voltage. The image display apparatus according to claim 1, wherein the element driving unit performs gradation display by changing an application time of the first voltage and the second voltage. The image display device according to claim 1, wherein the protrusion includes a carbon nanotube or a carbon nanofiber. A first electrode layer, an electron emission layer selectively provided on the first electrode layer, electrically connected to the first electrode layer, and having a plurality of protrusions on the surface; the first electrode layer; A second electrode layer provided oppositely and having an opening at a position facing the electron-emitting layer; opposed to the second electrode layer on a side opposite to the first electrode layer with respect to the second electrode layer A driving method of an image display device comprising: a third electrode layer provided; and a light emitting layer provided adjacent to the third electrode layer,
A first voltage is applied to the first electrode layer, a second voltage is applied to the second electrode layer, an electron extraction voltage is applied to the third electrode layer, and a region of 50% or more of the area of the opening is applied. A method for driving an image display device, characterized in that an electric field distribution is formed such that an electric field intensity is included in a range of an upper electric field.

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