JP2006310912A - Moving picture bit rate conversion method, moving picture bit rate conversion apparatus, moving picture bit rate conversion circuit, and program recording medium - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To control the bit rate of an output stream to be constant after bit rate conversion of a compression coded moving picture stream. <P>SOLUTION: A code amount reduction section uses a combination of three code amount reduction systems comprising revision of a quantization scale, round-off threshold value corresponding to re-quantization and reduction in discrete cosine transform coefficient so as to determine a code amount reduction parameter in advance in a way of being capable of meticulously controlling a bit rate unit, calculates a target code quantity from the target bit rate by each prescribed control unit, obtains the code amount reduction parameter from accumulation of errors between the target code amount and an output code amount to reduce the code amount, and carries out code amount control so that the error of the output code amount with respect to the target code amount is suppressed within a prescribed range. Further, when the target bit rate is low and the bit rate cannot be decreased depending on a picture type, the target code amount ratio by each picture type is revised to make the target bit rate of whole the bit stream constant. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a moving image bit rate conversion for converting a bit rate of a moving image bit stream compressed and encoded using a moving image compression technique standardized by MPEG (Moving Picture Experts Group) into a desired bit rate in real time. The present invention relates to a method and a moving image bit rate conversion apparatus. In particular, the present invention relates to a moving image bit rate conversion method and apparatus that satisfies the video bit stream standard, performs bit rate conversion without decoding the encoded moving image bit stream, and maintains the bit rate. .

  In recent years, moving image transmission for transmitting a compression-coded moving image bit stream stored in a video server typified by a personal computer or a DVD recorder to a moving image receiving terminal serving as a client via a network such as a LAN. The system is starting to spread. These video bitstreams are generally MPEG standards such as MPEG1 (ISO / IEC11172), MPEG2 (ISO / IEC13818-2), MPEG4 (ISO / IEC14496-2) using discrete cosine transform as a compression encoding method. Is compressed and encoded.

  In such a moving image transmission system, when a high-quality moving image bit stream is transmitted, the transmission band of the network is insufficient, or the performance of the moving image receiving terminal is low although it is compressed and encoded according to the MPEG standard. In some cases, the received moving image bitstream is not sufficient to decode the moving image, and the moving image received at the moving image receiving terminal may not be reproduced in real time. Therefore, a method of transmitting a moving image bit stream stored in a video server with a reduced bit rate in the video server or a relay station on the network in response to a request from a network monitoring terminal or a moving image receiving terminal There is.

  As described above, as a method for reducing the bit rate of a moving image bit stream that has already been compression-encoded, there is a moving image bit rate conversion device described in Patent Document 1.

  FIG. 16 shows the configuration of the conventional moving image bit rate conversion apparatus. In FIG. 16, a conventional moving image bit rate conversion apparatus 110 has an input bit stream bs1 compression-encoded by MPEG2 as an input, a variable length decoding unit 111 that performs variable length decoding of the input bit stream bs1, and a variable length An inverse quantization unit 112 that dequantizes the decoded bitstream and outputs a discrete cosine coefficient transform sequence; a requantization unit 113 that divides the discrete cosine coefficient transform sequence by a quantization scale and performs quantization; A variable length coding unit 114 is provided that performs variable length coding on the requantized discrete cosine coefficient transform sequence to obtain an output bit stream bs2, and outputs an output bit stream bs2 obtained by converting the bit rate.

  Further, the conventional moving image bit rate conversion apparatus 110 includes a code amount control unit 115 that gives a quantization scale used in the requantization unit 113 in the requantization. The code amount control unit 115 performs code amount control so that the bit rate of the output bit stream bs2 to be output is constant.

  FIG. 17 is a flowchart showing a detailed operation of the code amount control unit 115 of the conventional moving image bit rate conversion apparatus. The detailed operation of the code amount control unit 115 will be described with reference to FIG.

  First, in the first step, the complexity Xi, Xp, and Xb of I picture, P picture, and B picture are calculated by the following equations, respectively.

Xi = Si × Qi
Xp = Sp × Qp
Xb = Sb × Qb
Here, Si, Sp, and Sb are generated code amounts of I picture, P picture, and B picture, respectively, and Qi, Qp, and Qb are quantizations of all macroblocks in I picture, P picture, and B picture, respectively. The average value of the scale.

  In addition, initial values of the complexity Xi, Xp, and Xb of the I picture, P picture, and B picture are given by the following equations, respectively.

Xi = 160 × Rtarget / 115
Xp = 60 × Rtarget / 115
Xb = 42 × Rtarget / 115
In the next step, the allocated code amounts Ti, Tp, and Tb for the I picture, P picture, and B picture in the GOP are calculated by the following equations, respectively.

Ti = Kp · Kb · Xi
/ (Kp · Kb · Xi + Kb · Np · Xp + Kp · Nb · Xb) × R
Tp = Kb · Xp / (Kb · Np · Xp + Kp · Nb · Xb) × R
Tb = Kp · Xb / (Kp · Nb · Xb + Kb · Np · Xp) × R
Here, Np and Nb are the numbers of uncoded P pictures and B pictures in the GOP, respectively, and Kp and Kb are the quantum of the P picture and B picture with reference to the quantization scale of the I picture. The ratio of the conversion scale is shown. Experimentally, the overall image quality is optimized when Kp = 1.0 and Kb = 1.4.

  In the subsequent step, an allocated code amount R for an uncoded picture in the GOP is calculated.

R = R-Si
R = R-Sp
R = R-Sb
Here, Si, Sp, and Sb are the generated code amounts of the I picture, P picture, and B picture when the previous picture is encoded, respectively, depending on the picture type to be encoded. The formula is used.

  Also, the allocated code amount R for an uncoded picture in the GOP when the first picture of the GOP is coded is given by the following equation.

R = Rtarget × N / frame_rate + R
Here, N is the total number of pictures in the GOP, and frame_rate is the frame rate, representing the number of screens displayed per second.

  In the next step, the buffer occupancy di (j), dp (j), and db (j) when encoding the j-th macroblock in the I picture, P picture, and B picture are expressed by the following equations, respectively. calculate.

di (j) = di (0) + B (j-1) -Ti * (j-1) / NMB
dp (j) = dp (0) + B (j−1) −Tp × (j−1) / NMB
db (j) = db (0) + B (j−1) −Tb × (j−1) / NMB
Here, B (j−1) is the generated code amount of all macroblocks up to the (j−1) th macroblock, and NMB is the number of macroblocks in the picture. Further, di (0), dp (0), and db (0) are initial values of buffer occupancy amounts of I picture, P picture, and B picture, respectively, and are given by the following equations.

di (0) = 10 × r / 31
dp (0) = Kp × di (0)
db (0) = Kb × di (0)
Here, r is called a reaction parameter and is given by the following equation.

r = 2 × Rtarget / frame_rate
Also, the buffer occupancy at the end of encoding of the I picture, P picture, and B picture, that is, the buffer occupancy di (NMB), dp (NMB), and db (NMB) when the NMB-th macroblock is encoded are These are used as initial values di (0), dp (0), and db (0) of the buffer occupancy for the next encoding for each picture type.

  In the next step, a quantization scale for quantizing the j-th macroblock for each picture type is obtained from the buffer occupancy d (j) by the following equation.

Q (j) = d (j) × 31 / r
In the next step, it is determined whether or not the encoding of the macroblock in the picture has been completed up to the NMB-th macroblock, and if completed, the process proceeds to the next step, and if not completed, the macroblock code is determined. Return to the buffer occupancy calculation step at the time of conversion, and repeat the following processing.

Next, it is determined whether or not all the pictures to be encoded have been encoded. If all the encoding has been completed, the process ends.If not all have been encoded, the process returns to the picture complexity calculation step. The following process is repeated.
Japanese Patent Laying-Open No. 2001-128175 (page 7-8, FIG. 1)

  However, in the conventional moving image bit rate conversion method, since the code amount control is performed when performing compression encoding from the original image, the GOP structure is analyzed and the complexity for each picture type is calculated. Thus, the allocated code amount is obtained, and the code amount control is performed so that the buffer occupation amount becomes constant.

  For this reason, since analysis of the GOP structure is required, there is a problem that processing delay increases and the circuit configuration becomes complicated.

  The moving picture bit rate conversion method and apparatus according to the present invention solves the above-described conventional problems, and the code amount of the code amount maintained at the target bit rate based on the input code amount information of the compressed and coded moving picture bit stream. It is an object of the present invention to provide a moving image bit rate conversion method and apparatus, and a recording medium that can reduce the amount of code without increasing the circuit scale.

  In order to solve the conventional problem, the moving image bit rate conversion method according to claim 1 of the present invention counts an input code amount and an output code amount of a moving image bit stream for each predetermined code amount control unit. A step of calculating a target code amount from the input code amount and a predetermined code amount reduction rate, a step of calculating a code amount error between the target code amount and the output code amount, and the code for each picture type A step of performing a cumulative calculation of a quantity error, a step of smoothing the cumulative code quantity error, a step of calculating a code quantity reduction parameter for each picture type from the smoothed cumulative code quantity error, and a moving picture bitstream A discrete cosine transform sequence that has been subjected to variable length decoding and inverse quantization for each predetermined code amount control unit is requantized and separated by the code amount reduction parameter. A code amount reduction step by reducing cosine transform series and performing variable length coding, wherein the code amount reduction parameter is a parameter for specifying a value to be added to a quantization scale during requantization and a quantum Including a parameter for specifying a value to be added to the discrete cosine transform series and a parameter for specifying the number to reduce the discrete cosine transform coefficient sequence, and by controlling the code amount reduction parameter, This is converted to a desired bit rate.

  By this method, the code amount reduction parameter is set in advance so that the code amount can be controlled in units of a fine bit rate. Therefore, it is optimal to maintain a desired bit rate with low delay processing for each predetermined code amount control unit. Code amount control can be performed.

  In the moving image bit rate conversion method according to the second aspect of the present invention, the code amount reduction parameter is obtained by reducing the code amount by reducing the coefficient of the discrete cosine transform series, and then adding the value to the quantization scale. It is set to reduce the amount.

  By this method, the code amount reduction parameter for instructing the code amount reduction can be set in units of fine bit rates.

  According to a third aspect of the present invention, there is provided a moving picture bit rate conversion method in which a quantization rounding correction value is added during rounding processing when a code amount reduction parameter is requantized by adding a quantization scale by one. The quantization rounding correction parameter is changed, and then the quantization scale is set to be added by 2 or more.

  By this method, the code amount reduction parameter for instructing the code amount reduction can be set in units of fine bit rates.

  The moving image bit rate conversion method according to claim 4 of the present invention is such that the code amount reduction parameter is obtained by dividing the accumulated code amount error by the control unit code amount determined for each picture type. .

  By this method, code amount control can be performed according to the code amount characteristic of each picture for each picture type.

  The moving image bit rate conversion method according to claim 5 of the present invention divides the control unit code amount by dividing the average input code amount per control unit by the number of code amount reduction parameters and multiplying by the code amount ratio for each picture type. The value is set so as to be the same value.

  By this method, code amount control can be performed according to the code amount characteristic of each picture for each picture type.

  In the moving image bit rate conversion method according to claim 6 of the present invention, the control unit code amount is set to be determined in advance assuming that the code amount ratio for each picture type is a fixed code amount ratio. It is what.

  This method eliminates the need to calculate the code amount ratio each time the code amount is detected, thereby reducing the circuit scale.

  In the moving image bit rate conversion method according to the seventh aspect of the present invention, the predetermined control unit is set to be a slice unit.

  With this method, code amount control can be performed in units of slices, and the processing delay of bit rate conversion can be reduced.

  In the moving picture bit rate conversion method according to the eighth aspect of the present invention, the predetermined control unit is set to be a macroblock unit.

  By this method, code amount control can be performed in units of macro blocks, and the processing delay of bit rate conversion can be reduced.

  The moving image bit rate conversion method according to claim 9 of the present invention includes a step of counting an input code amount of a moving image bit stream for each predetermined code amount detection unit, and a moving image for each predetermined code amount detection unit. A step of counting the variable length code amount in the bitstream, and calculating a code amount reduction rate excluding the non-reduced bit string in a predetermined code amount detection unit from the bit rate reduction rate, the input code amount and the variable length code amount It is a thing.

  By this method, code amount control can be performed based on an accurate code amount reduction rate excluding non-reduced bit strings, and a bit stream with a code amount reduced to a desired target bit rate can be output.

  In the moving image bit rate conversion method according to claim 10 of the present invention, when the moving image bit stream is MPEG2-TS, the number of MPEG2-TS packets for each code amount detection unit is counted, and the MPEG2-TS packet is counted. The input code amount is calculated from the number, and the code amount reduction rate excluding the non-reduced bit string is calculated for a predetermined code amount detection unit.

  By this method, even if the input bit stream is MPEG2-TS, it is possible to perform code amount control based on an accurate code amount reduction rate excluding non-reduced bit strings, and to reduce the bit amount to a desired target bit rate. A stream can be output.

  In the moving image bit rate conversion method according to the eleventh aspect of the present invention, the predetermined code amount detection unit is set to be a picture unit.

  By this method, it is possible to obtain a code amount reduction rate for outputting a desired target bit rate for each picture unit.

  In the moving image bit rate conversion method according to claim 12 of the present invention, the accumulated code amount error increases for each predetermined code amount control unit even though the code amount reduction parameter is a preset lower limit value. In this case, the target code amount for each picture type is corrected by the target code amount ratio, and the output code amount is reduced.

  By this method, even when the target bit rate is low and the code amount cannot be reduced depending on the picture type, the bit rate of the entire bit stream is adjusted to the desired target bit rate by correcting the target code amount ratio for each picture type. Can be reduced.

  In the moving image bit rate conversion method according to the thirteenth aspect of the present invention, although the target code amount ratio for each picture type is the same in the initial state, the code amount reduction parameter is a preset lower limit value. If the accumulated code amount error increases for each predetermined code amount control unit, the output code amount is reduced by lowering the target code amount ratio of the P picture.

  By this method, even when the target bit rate is low and the code amount cannot be reduced depending on the picture type, by reducing the target code amount ratio of the P picture, the bit of the entire bit stream is maintained while maintaining the minimum image quality. The rate can be reduced to the desired target bit rate.

  In the moving picture bit rate conversion method according to the fourteenth aspect of the present invention, when the target code amount of the P picture is lowered to the target code amount of the B picture, the accumulated code amount error is determined every predetermined code amount control unit. Is increased, the output code amount is reduced by lowering the target code amount ratio of the I picture.

  By this method, even when the target bit rate is low and the code amount cannot be reduced only by reducing the target code amount ratio of the P picture, the bit rate of the entire bit stream can be reduced by reducing the target code amount ratio of the I picture. Can be reduced to a desired target bit rate.

  The moving image bit rate conversion method according to claim 15 of the present invention calculates the target code amount ratio from an average code amount for each picture type for each GOP unit in an input bitstream, and The target code amount ratio for each picture type to be corrected is calculated based on the average code amount ratio.

  By this method, it is possible to obtain a correction value of the target code amount ratio according to the code amount ratio characteristic for each picture type in the bitstream.

  The moving image bit rate conversion method according to claim 16 of the present invention assumes that the target code amount ratio is a fixed code amount ratio for each input picture type, and the code amount ratio for each picture type is fixed. Based on the above, a target code amount ratio for each picture type to be corrected is calculated and held in advance.

  With this method, it is not necessary to calculate the target code amount correction value every time the code amount is detected, and the circuit scale can be reduced.

  According to a seventeenth aspect of the present invention, there is provided a moving image bit rate conversion method in which one GOP or a plurality of GOPs is used as a code amount correction unit, and a target code amount and a target code corrected by a target code amount ratio for each code amount correction unit The total error correction amount is calculated by accumulating the amount error, and the total error correction amount is divided by the target code amount ratio for each picture type to calculate the error correction amount for each picture type. The target code amount is corrected by distributing the error correction amount for each picture type for each amount control unit.

  By this method, it is possible to correct a target code amount error that occurs in one GOP or a plurality of GOP units.

  The moving image bit rate conversion method according to claim 18 of the present invention includes a plurality of steps for performing code amount reduction using different code amount reduction parameters, and a plurality of output code amounts for which code amount reduction has been performed. And a step of selecting a code amount reduction parameter that outputs an output code amount that is less than the target code amount and is closest to the target code amount.

  By this method, it is possible to control the code amount to be pulled in stably and at high speed as compared with the case of performing the code amount control from the original bit rate as the code amount reduction parameter immediately after the bit rate conversion. Also, since a bit stream having an output code amount lower than the target code amount is output immediately after bit rate conversion, it is effective when the transmission band of the network is insufficient.

  According to a nineteenth aspect of the present invention, there is provided a moving image bit rate conversion method comprising: a step of performing code amount reduction for each code amount control unit by sequentially using different code amount reduction parameters; and an output code amount for each code amount control unit. Detecting and holding together with a code amount reduction parameter, and selecting a code amount reduction parameter that outputs an output code amount that is less than the target code amount and is closest to the target code amount from among the plurality of held output code amounts. It is intended to provide.

  By this method, it is possible to control the code amount to be pulled in stably and at high speed as compared with the case of performing the code amount control from the original bit rate as the code amount reduction parameter immediately after the bit rate conversion. Also, since a bit stream having an output code amount lower than the target code amount is output immediately after bit rate conversion, it is effective when the transmission band of the network is insufficient.

  The moving image bit rate conversion apparatus according to claim 20 of the present invention receives a moving image bit stream compressed and encoded using orthogonal transformation, converts the moving image bit rate to a desired bit rate, and outputs the converted moving image bit rate. An input code amount detection unit that counts an input code amount of a moving image bit stream input for each predetermined code amount control unit, and an output of a moving image bit stream that is output for each predetermined code amount control unit An output code amount detection unit that counts a code amount; a target code amount calculation unit that calculates a target code amount from the input code amount and a given code amount reduction rate; and a code amount of the target code amount and the output code amount A code amount error calculating unit for calculating an error, a code amount error accumulating unit for accumulating the code amount error for each picture type, and a code for smoothing the accumulated code amount error An error smoothing unit, a code amount reduction parameter calculation unit for calculating a code amount reduction parameter from the smoothed accumulated code amount error, and variable-length decoding the video bitstream for each predetermined code amount control unit to perform inverse quantum A code amount reduction unit that reduces the amount of code by requantizing the discrete cosine transform system sequence that has been converted, requantizing the code amount reduction parameter, and performing variable-length coding. The code amount reduction parameter reduces a parameter for specifying a value to be added to the quantization scale at the time of requantization, a parameter for specifying a value to be added to the discrete cosine transform series in the quantization rounding process, and a discrete cosine transform coefficient sequence. And a parameter that specifies the number.

  With this configuration, since the code amount reduction parameter is set in advance so that the code amount can be controlled in units of fine bit rate, the code amount is set so as to maintain the desired bit rate with low delay processing for each predetermined code amount control unit. It is possible to perform control and output a moving image bit stream converted to a target bit rate.

  A moving picture bit rate conversion apparatus according to a twenty-first aspect of the present invention includes a unit code detection unit that receives a moving picture bit stream and a bit rate reduction rate and detects a head of a predetermined code amount detection unit, and a predetermined code. A code amount detection unit that counts the input code amount of a moving image bit stream input for each unit of quantity, and a variable that counts an input variable length code amount in a moving image bit stream input for each predetermined code amount unit A long code amount detection unit; and a code amount reduction rate calculating unit that calculates a code amount reduction rate from the input code amount, the input variable length code amount, and a given bit rate reduction rate, and the code amount reduction rate Is set to be output to the target code amount calculation unit.

  With this configuration, it is possible to perform code amount control based on an accurate code amount reduction rate excluding non-reduced bit strings, and to output a bit stream with the code amount reduced to a desired target bit rate.

  The moving image bit rate conversion device according to claim 22 of the present invention is the moving image bit rate conversion device according to claim 20, wherein the accumulated code amount error is increased even though the code amount reduction parameter reaches the lower limit. A target code amount ratio correction unit that receives a ratio change instruction from the code amount reduction parameter calculation unit and corrects the ratio of the target code amount for each picture type, and determines that the target code amount and the target code amount A target code amount error correction unit that corrects a code amount error with a target code amount whose ratio for each picture type is corrected, and is set to output the corrected target code amount to a code amount error calculation unit. is there.

  With this configuration, even when the target bit rate is low and the code amount cannot be reduced depending on the picture type, the bit rate of the entire bit stream is set to the desired target bit rate by correcting the target code amount ratio for each picture type. Can be reduced.

  A moving picture bit rate conversion apparatus according to a twenty-third aspect of the present invention is the moving picture bit rate conversion apparatus according to the twentieth aspect, wherein a coding amount reduction parameter storage unit stores initial values of a plurality of coding amount reduction parameters. A plurality of code amount reduction units that respectively reduce the code amount using a code amount reduction parameter that is an initial value of the code amount reduction parameter or an output of the code amount reduction parameter calculation unit; and a plurality of code amount reduction units A code amount reduction unit that outputs an output code amount that is less than the target code amount and is closest to the target code amount from the outputs of the plurality of code amount reduction units at the time of bit rate conversion The code amount reduction unit selected thereafter is set to perform code amount reduction using the code amount reduction parameter output from the code amount reduction parameter calculation unit. .

  With this configuration, as a code amount reduction parameter immediately after bit rate conversion, it is possible to control the code amount to be pulled in stably at a higher speed than in the case where the code amount control is performed from the original bit rate.

  A moving image bit rate conversion device according to a twenty-fourth aspect of the present invention is the moving image bit rate conversion device according to the twentieth aspect, wherein a code amount reduction parameter storage unit stores initial values of a plurality of code amount reduction parameters; A first code amount reduction unit that performs code amount reduction for each control unit by sequentially using initial values of the plurality of code amount reduction parameters, and counts the output code amount of the first code amount reduction unit, An output code amount detection unit that is held together with a code amount reduction parameter, and a second code amount reduction unit that performs code amount reduction using the code amount reduction parameter, according to a given target code amount at the time of bit rate conversion, A code amount reduction parameter that outputs an output code amount that is less than the target code amount and is closest to the target code amount from the output code amount that has been subjected to code amount reduction using the plurality of code amount reduction parameters. The second code amount reduction unit uses the selected code amount reduction parameter at the time of bit rate conversion; otherwise, the code amount reduction parameter that is the output of the code amount reduction parameter calculation unit Is set so as to reduce the code amount.

  With this configuration, as a code amount reduction parameter immediately after bit rate conversion, it is possible to control the code amount to be pulled in stably at a higher speed than in the case where the code amount control is performed from the original bit rate.

  A moving image bit rate conversion device according to claim 25 of the present invention is the moving image bit rate conversion device according to claim 20, wherein a code amount reduction parameter storage unit stores initial values of a plurality of code amount reduction parameters; A first code amount reduction unit that performs code amount reduction using a code amount reduction parameter given from a code amount reduction parameter calculation unit; and a second code amount reduction that uses an initial value of the code amount reduction parameter A code amount reduction unit, and an output code amount detection holding unit that detects the output code amount of the output bitstream output from the second code amount reduction unit for each code amount control unit and holds it together with the initial value of the code amount reduction parameter And at the time of bit rate conversion, an output code amount that is less than the target code amount from the output code amount held by the output code amount detection holding unit and that is closest to the target code amount was obtained. Select issue reduction parameter, the first code amount reduction unit, the bit rate conversion during only is obtained by setting to perform reduction code amount using the selected code amount reduction parameter.

  With this configuration, as a code amount reduction parameter immediately after bit rate conversion, it is possible to control the code amount to be pulled in stably at a higher speed than in the case where the code amount control is performed from the original bit rate.

  A program recording medium according to a twenty-sixth aspect of the present invention is a program for realizing all or part of the functions of the moving image bitstream conversion method according to any one of the first to eighteenth aspects of the present invention. Is stored.

  With this configuration, the moving image bitstream conversion method can be realized not only by hardware but also by software.

  An integrated circuit according to a twenty-seventh aspect of the present invention receives, as an input, a moving picture bitstream that has been compression-encoded using orthogonal transformation, and the moving picture bitstream conversion according to any one of the first to nineteenth aspects All or some of the functions of the method are realized by an integrated circuit, and a moving image bit stream converted to a desired bit rate is output.

  With this configuration, it is possible to reduce the size of the device and significantly reduce the cost by integrating the moving image bitstream conversion method.

  According to the moving image bit rate conversion method of the present invention, the target code amount is calculated from the input code amount and the code amount reduction rate for each code amount control unit based on the input code amount information of the moving image bit stream, and the target code amount is calculated. Since the code amount reduction parameter can be set for each code amount control unit from the code amount error of the amount and the output code amount, it is possible to control the code amount with a simple circuit configuration and reduce the code amount to the target bit rate. It becomes possible.

  Furthermore, according to the moving picture bit rate conversion method of the present invention, the bit rate unit is finely divided by combining three code amount reduction methods by changing the quantization scale, correcting the rounding threshold at the time of requantization, and reducing the discrete cosine transform coefficient. Since the code amount reduction parameter is determined in advance so that control is possible, optimal code amount control can be performed in order to keep the target bit rate constant.

  Further, according to the moving image bit rate conversion method of the present invention, when the target bit rate is low and the bit rate cannot be lowered depending on the picture type, the target code amount ratio for each picture type is changed, so that the minimum The code amount can be reduced to the target bit rate while maintaining the limited image quality.

  Embodiments of the present invention will be described below with reference to the drawings.

(Embodiment 1)
FIG. 1 shows a configuration of a moving image bit rate conversion apparatus according to Embodiment 1 of the present invention. The moving image bit rate conversion apparatus 100 converts the input bit stream bs1 that has been input into an output bit stream bs2 having a predetermined target bit rate R_target and outputs the result. The input bit stream bs1 is, for example, an MPEG2-PS obtained by packetizing an information stream compressed and encoded using MPEG2, which is a moving image compression method using orthogonal transform, or an information stream compressed and encoded using the MPEG2. (MPEG2 Program Stream) or MPEG2-TS (MPEG2 transport Stream).

  FIG. 18 is a diagram illustrating a hierarchical structure of a compression-coded moving image bitstream handled in each embodiment described below. Here, an MPEG2 bit stream will be described as an example. In FIG. 18, MPEG2 includes a sequence layer, a GOP (Group of Pictures) layer, a picture layer, a slice layer, a macroblock layer, and a block layer. In this embodiment, it is the variable-length code of the block layer that performs bit reduction, and no other additional information is reduced. The slice header and the macroblock header include a quantization scale code and represent a quantization step when the slice and the macroblock are quantized.

  In FIG. 1, a moving image bit rate conversion apparatus 100 receives an input bit stream bs1 and reduces the code amount of the input bit stream bs1, and outputs an output bit stream bs2, for each predetermined control unit. The input code amount detection unit 20 for detecting the code amount of the input bit stream bs1, the output code amount detection unit 30 for detecting the bit rate of the output bit stream bs2 for each predetermined control unit, and the target code amount for each predetermined control unit Code amount error calculation unit 51 for calculating an error between the input code amount and the output code amount, a code amount error accumulation calculation unit 52 for accumulating the code amount error, and smoothing the accumulated code amount error Code amount error smoothing unit 53 and code amount reduction parameter calculating unit 54 for calculating a rate conversion parameter, Outputting a force bitstream bs2.

  FIG. 2 shows a detailed configuration of the code amount reduction unit 10. The code amount reduction unit 10 receives the input bitstream bs1, and includes a variable length decoding unit 11, an inverse quantization unit 12, a requantization unit 13, a coefficient reduction unit 14, and a variable length coding unit 15, and outputs them. The bit stream bs2 is output. The requantization unit 13 and the coefficient reduction unit 14 transmit the code amount from the code amount reduction parameter calculation unit 54 of the moving image bit rate conversion apparatus 100 illustrated in FIG. 1 so that the bit rate of the output bitstream maintains a desired bit rate. In response to an instruction by a reduction parameter, each process is performed using a predetermined code amount reduction parameter.

  The detailed operation of the moving image bit rate conversion apparatus 100 configured as described above will be described. The input bit stream bs1 input to the moving image bit rate conversion apparatus 100 is first input to the input code amount detection unit 20.

  The input code amount detection unit 20 counts the code amount of the input bitstream bs1 for each predetermined control unit, and outputs the count result, that is, the input code amount for each predetermined control unit, to the target code amount calculation unit 40. Here, the predetermined control unit is a layer unit of a stream structure defined in MPEG2, for example, a unit divided for each functional unit such as a picture, a slice, or a macroblock. Hereinafter, the predetermined control unit will be described as a slice unit. However, the control unit is not limited to a slice, and may be a macroblock unit.

  The input bit stream bs1 is input to the code amount reduction unit 10 at the same time. The code amount reduction unit 10 performs code amount reduction using a predetermined code amount reduction parameter according to an instruction from the code amount reduction parameter calculation unit 54. In the detailed configuration of the code amount reduction unit 10 illustrated in FIG. 2, the variable length decoding unit 11 performs variable length decoding of the input bit stream bs1 input to obtain a discrete cosine transform coefficient sequence, and an inverse quantization unit 12 is output.

  The inverse quantization unit 12 inversely quantizes the discrete cosine transform coefficient sequence obtained by the variable length decoding unit 11 using a quantization scale described in the bitstream. The inverse quantization unit 12 outputs the inversely quantized discrete cosine transform system sequence to the requantization unit 13.

  The requantization unit 13 adds the quantization parameter value indicated by the code amount reduction parameter given from the code amount reduction parameter calculation unit 54 to the quantization scale used in the inverse quantization by the inverse quantization unit 12. The discrete cosine transform series is requantized with the added quantization scale. The requantization unit 13 outputs the requantized discrete cosine transform system sequence to the coefficient reduction unit 14.

  The coefficient reduction unit 14 reduces the requantized discrete cosine transform system sequence using the coefficient reduction parameter indicated by the code amount reduction parameter given from the code amount reduction parameter calculation unit 54.

  At this time, a method of reducing the discrete cosine transform coefficient sequence will be described with reference to FIG. FIG. 3 shows the scan order of the discrete cosine transform coefficients when the current moving image is divided into blocks of 8 pixels × 8 lines, subjected to discrete cosine transform, quantized, and then subjected to variable length coding. FIG. 3A is a diagram showing the order of zigzag scanning, and FIG. 3B is a diagram showing the order of alternate scanning. These scan orders are standardized by MPEG2, and which scan order is adopted is described in the bitstream. In the coefficient reduction unit 14, it is possible to reduce the bit rate by performing variable length coding with the coefficient cosine parameter of the code amount reduction parameter set to 0 as the discrete cosine transform system sequence after a predetermined number in the scan order. Become.

  The coefficient reduction unit 14 outputs a discrete cosine transform system sequence obtained by converting the discrete cosine transform coefficients after a predetermined scan order number to 0 according to the coefficient reduction parameter to the variable length coding unit 15.

  The variable length coding unit 15 performs variable length coding on the discrete cosine transform series and outputs an output bit stream bs2 obtained by converting the bit rate.

  Next, the target code amount calculation unit 40 calculates the target code amount by multiplying the input code amount for each control unit by the code amount reduction rate. The code amount reduction rate is given from a bit rate control unit (not shown) or the like, and can be obtained by a method of dividing a desired bit rate by the average bit rate of the input bit stream bs1. By obtaining the target code amount for each control unit, it is not necessary to analyze the GOP structure and assign the target code amount, and code amount control can be performed with the control unit as the minimum unit. The target code amount calculation unit 40 outputs the obtained target code amount to the code amount error calculation unit 51.

  Similar to the input code amount detection unit 20, the output code amount detection unit 30 counts the code amount of the bit stream bs2 output from the code amount reduction unit 10 for each predetermined control unit. The counted output code amount is output to the code amount error calculation unit 51.

  The code amount error calculation unit 51 calculates a target code amount for the input code amount obtained by dividing the input bit stream bs1 for each control unit and an error code amount of the output code amount in the same control unit in the output bit stream bs2. For example, if the control unit is a slice unit, the target code amount of the nth slice of the mth picture from the beginning of the GOP in the input bitstream bs1 is Target (m, n), and the GOP of the output bitstream bs2 When the output code amount of the nth slice of the mth picture from the beginning of S is Sout (m, n), Target (m, n) −Sout (m, n) is calculated. The code amount error calculation unit 51 outputs the obtained code amount error to the code amount error accumulation calculation unit 52.

  The code amount error accumulation calculation unit 52 accumulates the code amount error obtained by the code amount error calculation unit 51 for each picture type. That is, for each picture type of I picture, P picture, and B picture, the code amount error for each slice unit output from the code amount error calculation unit 51 is accumulated, and the accumulated code amount error that is the calculation result is represented by the code amount. Output to the error smoothing unit 53.

  The code amount error smoothing unit 53 smoothes the accumulated code amount error using a filter or the like for each picture type in order to suppress variation in the accumulated code amount error for each picture type obtained by the code amount error accumulation calculation unit 52. To do.

  FIG. 7 is a diagram illustrating an example of a detailed configuration of the code amount error smoothing unit 53. The configuration shown in FIG. 7 is a loop filter used in a feedback loop, and is a kind of low-pass filter. G1 and G2 represent the gain of the filter, and can be obtained from the model analysis result of the secondary feedback loop including the feedback of the output code amount in accordance with the system requirements of the moving picture bit rate conversion apparatus.

  The code amount reduction parameter calculation unit 54 obtains a code amount reduction parameter from the accumulated code amount error smoothed by the code amount error smoothing unit 53. The code amount reduction parameter is obtained by dividing the accumulated code amount error output from the code amount error smoothing unit 53 by the control unit code amount determined for each picture type. By this calculation, the difference of the code amount reduction parameter for correcting the code amount error between the output code amount and the target code amount can be obtained, and the code amount reducing unit 10 uses the obtained code amount reduction parameter to obtain the code amount. By reducing the code amount control, the code amount control can be performed so that the output code amount approaches the target code amount.

  Here, the control unit code amount is defined for each picture type as follows.

Ui = Rin / frame_rate / Ncu / Nrcp × Ki
Up = Rin / frame_rate / Ncu / Nrcp × Kp
Ub = Rin / frame_rate / Ncu / Nrcp × Kb
In the above equation, Ui, Up, and Ub are the control unit code amounts of I picture, P picture, and B picture, Rin is the bit rate of the input bit stream bs1, frame_rate is the frame rate of the input bit stream bs1, and Ncu is the control within the picture. The number of units, Nrcp is the number of code amount reduction parameters, and Ki, Kp, and Kb are the code amount ratios of I picture, P picture, and B picture. The control unit number Ncu in the picture is the number of slices in the picture when the control unit is a slice unit, and is the number of macroblocks in the picture when the control unit is a macroblock unit.

The code amount ratios Ki, Kp, and Kb for each picture type are obtained by the following procedure. First, the average input code amount Sgop in GOP units is
Sgop = Si × Ni + Sp × Np + Sb × Nb
The average picture number Ngop is
Ngop = Ni + Np + Nb
It becomes. In the above equation, Si, Sp, and Sb are average input code amounts of I picture, P picture, and B picture, respectively, and Ni, Np, and Nb are average picture numbers of I picture, P picture, and B picture, respectively. At this time, the code amount ratios of the I picture, P picture, and B picture can be calculated by the following equations, respectively.

Ki = Si / Sgop × Ngop
Kp = Sp / Sgop × Ngop
Kb = Sb / Sgop × Ngop
In the above description, the code amount ratios Ki, Kp, and Kb for each picture type are calculated based on the average code amounts of the I picture, the P picture, and the B picture in the input bit stream bs1, but the input bit stream bs1 May be calculated as the code amount of the I picture, P picture, and B picture in the previous GOP.

  Further, the code amount ratio of I picture, P picture, and B picture may be assumed to be a fixed ratio, for example, 4: 2: 1, and may be calculated by substituting into the average code amount of the above formula. Assuming that the code amount ratio of I picture, P picture, and B picture is 4: 2: 1 and the number of pictures is 1: 4: 10, the values of Ki, Kp, and Kb are omitted from the above calculation. Can be determined in advance as follows.

Ki = 2.727
Kp = 1.363
Kb = 0.682
Next, the code amount reduction parameter will be described. The code amount reduction parameter is composed of three variables: a quantization parameter, a quantization rounding correction parameter, and a coefficient reduction parameter.

  The quantization parameter is a value added to the quantization scale used at the time of inverse quantization in the inverse quantization unit 12 and is used as the quantization scale at the time of requantization by the requantization unit 13. For example, when the quantization scale of one macroblock of the input bitstream bs1 is 3 and the quantization parameter is 1, the requantization unit 13 uses 4 for the quantization scale. When the value obtained by adding the quantization parameter to the quantization scale exceeds 31, which is the maximum value of the quantization scale, 31 is used as the quantization scale at the time of requantization.

  The coefficient reduction parameter is a variable in which a predetermined number in the scan order for converting the discrete cosine transform series into 0 in the coefficient reduction unit 14 is determined in advance. FIG. 4 shows an example of the coefficient reduction parameter. FIG. 4A shows a zigzag scan, and FIG. 4B shows a coefficient reduction parameter and a scan order number of a discrete cosine transform series sequence to be converted to 0 when an alternate scan is used. For example, when zigzag scanning is used and the coefficient reduction parameter is 1, all the discrete cosine transform coefficients after the scan order number 58 in FIG. When the alternate scan is used and the coefficient reduction parameter is 2, all the discrete cosine transform coefficients after the scan order number 52 in FIG.

  FIG. 5 shows an average output bit rate when the code amount reduction is performed by changing the coefficient reduction parameter and the quantization parameter from 1 to 10, respectively, in the 12 Mbps test sequence “Mobile & Calendar” of CCIR (International Radio Consultative Committee). ing. As apparent from FIG. 5, the change in the average output bit rate due to the change of the coefficient reduction parameter is moderately reduced, whereas the quantization parameter is 1 when the quantization parameter is changed. The average output bit rate has been drastically reduced, and then gradually reduced. Therefore, after using the coefficient reduction parameters 1 to 9 as parameters at the time of code amount reduction, by using the quantization parameter, an output code amount that changes in a relatively fine bit rate unit and close to linear can be obtained. Therefore, the code amount control can be easily performed. In this case, the number of code amount reduction parameters is set to 15, coefficient reduction parameters 1 to 8 are assigned to code amount reduction parameters 1 to 8, and quantization parameters 1 to 6 are assigned to code amount reduction parameters 9 to 15. .

  However, the above parameter assignment is only an example, and the same effect can be obtained even if other assignments are performed using the same method, and parameter assignment is performed based on various compression-coded bitstream examples. Also good. The quantization parameter can take a value from 1 to 30, and the reduction scan order number of the discrete cosine transform coefficient sequence can take a value from 2 to 63, from which the code amount reduction parameter is set. can do. Discrete cosine transform coefficient reduction When the scan order number is 1, only the DC coefficient is left, which is excluded in this case.

  Next, another example of the code amount reduction parameter will be described. The quantization rounding correction parameter is a rounding process when the requantization unit 13 performs a requantization operation, usually rounding off the decimal part, and after adding the quantization rounding correction value, the rounding process Is to do. For example, when 1 coefficient of the discrete cosine transform coefficient sequence before rounding processing is 3.8 at the time of requantization calculation, since usually only the fractional part is rounded down, the value after rounding processing is 3. When the quantization rounding correction value is set to 0.375, 0.375 is added to the coefficient value 3.8 and the rounding process is performed from 4.175, so the value after the rounding process is 4. Therefore, when the quantization rounding correction value is increased, the probability of rounding up the decimal point is increased, and the reduction code amount at the time of variable length encoding is reduced.

  FIG. 6 shows a CCIR 12 Mbps test sequence “Mobile & Calendar” with a quantization parameter at requantization of 1 and a quantization rounding correction parameter of 1 to 6, that is, 0.5 and 0.375 as quantization rounding correction values. , 0.25, 0.187, 0.125, and 0, the average output bit rate is shown when the code amount is reduced. When the quantization rounding correction value is 0, the decimal part of the discrete cosine transform series is rounded down, and when it is 0.5, the process is the same as rounding. From FIG. 6, it is possible not only to simply increase the quantization scale at the time of re-quantization but also to obtain an output code amount that changes in finer bit rate units by changing the quantization rounding correction value. Therefore, when the quantization parameter is 1, it is combined with the quantization rounding correction parameter, and after changing the quantization rounding correction parameter by 1 to 6, the code amount reduction parameter is set so as to take a value of 2 or more of the quantization parameter. If it is set, it is possible to obtain an output code amount that changes in a relatively fine bit rate unit and close to linear, and it becomes easy to control the code amount.

  However, the combinations of the code amount reduction parameters shown above are examples, and other combinations may be used.

  As described above, the quantization parameter, the quantization rounding correction parameter, the coefficient reduction parameter, and the combination thereof, which are the three elements of the code amount reduction parameter, have been described. By giving an instruction with the code amount reduction parameter from the amount reduction parameter calculation unit 54 to the code amount reduction unit 10, it is possible to control the code amount in fine bit rate units.

  With the above operation, code amount control can be performed in units of slices or macroblocks, and bit rate conversion with a small rate conversion delay and a desired target bit rate can be performed.

  In the first embodiment, after reducing the discrete cosine transform coefficient sequence quantized by the coefficient reducing unit 14 when the code amount is reduced, the variable length coding unit 15 uses the variable length code of the discrete cosine transform series number sequence. However, when the variable length coding unit 15 performs variable length coding, the discrete cosine transform system sequence is read out in a predetermined scan order, and remains when the reduction parameter is reached by an instruction from the code amount reduction parameter calculation unit 54. It is also possible to perform variable length coding with the discrete cosine transform series of 0 as 0 and omit the processing of the coefficient reduction unit 14.

  In the first embodiment, the inverse quantization unit 12 and the requantization unit 13 are divided into two processing blocks. However, the inverse quantization unit 12 multiplies the discrete cosine transform series by the input quantization scale. And the requantization unit 13 divides the discrete cosine transform sequence by the quantization scale obtained by adding the quantization parameter to the input quantization scale, and the inverse quantization unit 12 and the requantization unit The unit 13 may have two processing blocks as one processing block.

  In the first embodiment, the video bit rate conversion device has been described. However, it is also possible to describe these device configurations in a software program, record them on a recording medium, and execute them by the CPU. .

  Furthermore, in the first embodiment, each functional block is typically realized as an LSI that is an integrated circuit. These may be individually made into one chip, or may be made into one chip so as to include a part or all of them. The name used here is LSI, but it may also be called IC, system LSI, super LSI, or ultra LSI depending on the degree of integration. Further, the method of circuit integration is not limited to LSI, and implementation with a dedicated circuit or a general-purpose processor is also possible. An FPGA (Field Programmable Gate Array) that can be programmed after manufacturing the LSI, or a reconfigurable processor that can reconfigure the connection and setting of circuit cells inside the LSI may be used. Further, if integrated circuit technology comes out to replace LSI's as a result of the advancement of semiconductor technology or a derivative other technology, it is naturally also possible to carry out function block integration using this technology. Biotechnology can be applied.

  A video server and a network repeater to which an LSI in which each functional block of the moving image bit rate conversion apparatus according to the first embodiment is integrated will be described with reference to FIGS.

  FIG. 14 is a block diagram illustrating a configuration of a video server 80 using an LSI in which the respective functional blocks of the moving image bit rate conversion apparatus according to the first embodiment are integrated. In FIG. 14, a video server 80 is a moving image bit rate converting unit 81 that converts the bit rate of a moving image bit stream, a network interface 82, a network control unit 83, a moving image that records moving images and outputs a moving image bit stream. An image recording unit 84 is used.

  The moving image recording unit 84 records the moving image bit stream, and outputs the recorded moving image bit stream to the moving image bit rate conversion unit 81 in response to a request from a client (not shown) via the network.

  The moving image bit stream conversion unit 81 is a circuit in which the functional blocks of the moving image bit rate conversion apparatus 100 are integrated. The input bit stream bs1 input from the moving image recording unit 84 is given from the network control unit 83. The output bit stream bs2 is output after conversion to a desired bit rate by the code amount reduction rate.

  The network interface 82 is a transmission / reception processing interface such as a LAN for connecting to a client that receives and reproduces a moving image bitstream via a network. Here, a specific communication standard is not specified as a network interface. For example, as a typical communication standard, there are IEEE 802.3 as a LAN standard, IEEE 802.11 as a wireless LAN standard, and the like. These are examples of communication standards, and other communication means may be used without being bound by the communication standards.

  The network control unit 83 monitors the communication state of the network interface 82, gives a code amount reduction rate to the moving image bit rate conversion unit 81, controls the bit rate of the output bit stream bs 2, and transmits the transmission buffer overflow of the network interface 82 Control to prevent As a method for monitoring the communication state of the network interface 82, a threshold value that does not cause a transmission buffer overflow is set, and a code amount reduction rate is set so as to reduce the code amount when the transmission buffer capacity exceeds the threshold value. . Another method for monitoring the communication status is to monitor the transmission error occurrence state and set the code amount reduction rate so that the code amount is reduced when the transmission error rate exceeds a preset threshold. To do.

  With the above operation, even when the transmission capacity of the network connecting the video server and the client is smaller than the bit rate of the moving image bit stream recorded in the moving image recording unit 84, the transmission buffer overflow of the network interface 82 occurs. The client can play back the received moving image bitstream without interruption.

  FIG. 15 is a block diagram showing a configuration of a network repeater using an LSI in which the respective functional blocks of the moving image bit rate conversion apparatus according to the first embodiment are integrated. In FIG. 15, a network repeater 90 includes a moving image bit rate converting unit 91 that converts a bit rate of a moving image bit stream, network interfaces 92 and 93, a bridge unit 94 that performs bridge processing of the network interfaces 92 and 93, and network control. The unit 95 is configured.

  The moving image bit rate conversion unit 91 is a circuit in which the functional blocks of the moving image bit rate conversion apparatus 100 are integrated, and the code amount provided from the network control unit 95 to the input bit stream bs1 input from the bridge unit 94. The output bit stream bs2 is output to the bridge unit 94 after being converted into a desired bit rate by the reduction rate.

  The network interfaces 92 and 93 are transmission / reception processing interfaces such as a LAN for connecting to a video server or a client via a network. Here, a specific communication standard is not specified as a network interface. For example, as a typical communication standard, there are IEEE 802.3 as a LAN standard, IEEE 802.11 as a wireless LAN standard, and the like. These are examples of communication standards, and other communication means may be used without being bound by the communication standards. The network interfaces 92 and 93 may be the same communication standard or different communication standards.

  The bridge unit 94 performs a bridge process between the network interfaces 92 and 93, extracts a moving image bit stream from the frame received by the network interface 92 or 93, and supplies the extracted moving image bit stream to the moving image bit rate conversion unit 91. Also, the output bit stream bs2 output from the moving image bit rate conversion unit 91 is output to the network interface 92 or 93. When the network interfaces 92 and 93 are different communication standards, the frame format is converted.

  The network control unit 95 monitors the communication state of the network interfaces 92 and 93, gives the code amount reduction rate to the moving image bit rate conversion unit 91, controls the bit rate of the output bit stream bs2, and controls the network interface 92 or 93. Control is performed so that no transmission buffer overflow occurs.

  With the above operation, the transmission capacity of the network to which either the network interface 92 or 93 connected to the client that receives and reproduces the moving image bitstream is connected is sent from the network interface connected to the other video server. Even when the bit rate of the moving image bit stream is smaller, the transmission buffer overflow of the network interface 92 or 93 does not occur, and the client can reproduce the received moving image bit stream without interruption.

(Embodiment 2)
FIG. 8 is a block diagram showing the configuration of the moving image bit rate conversion apparatus 101 according to Embodiment 2 of the present invention. In FIG. 8, a moving image bit rate conversion apparatus 101 receives an input bitstream bs1 as an input, reduces the code amount of the input bitstream bs1, and outputs an output bitstream bs2, for each predetermined control unit. The input code amount detection unit 20 that detects the code amount of the input bit stream bs1, the output code amount detection unit 30 that detects the bit rate of the output bit stream bs2 for each predetermined control unit, and the code for each predetermined code amount detection unit Code amount reduction rate detection unit 41 that calculates the amount reduction rate, target code amount calculation unit 40 that calculates the target code amount for each predetermined control unit, and code amount error calculation unit that calculates the error between the input code amount and the output code amount 51, a code amount error accumulating unit 52 for accumulating code amount errors, a code amount error smoothing unit 53 for smoothing accumulated code amount errors, and a code We are constituted by the code amount reduction parameter calculation unit 54 for calculating the reduction parameters, and outputs an output bit stream bs2.

  In the moving image bit rate conversion apparatus 101, each processing block other than the code amount reduction rate detection unit 41 performs the same operation as each processing block of the moving image bit rate conversion apparatus 100 in the first embodiment. A detailed description of each processing block other than the detection unit 41 is omitted here.

  FIG. 9 is a block diagram illustrating a detailed configuration of the code amount reduction rate detection unit 41 in the moving image bit rate conversion apparatus 101. In FIG. 9, a moving image bit rate conversion apparatus 101 receives an input bit stream bs1 and a bit rate reduction rate as input, and a unit code detection unit 42 that detects the beginning of a predetermined code amount detection unit, for each predetermined code amount unit. A code amount detector 43 that counts the input code amount of the input bitstream bs1, a variable length code amount detector 44 that counts the input variable length code amount in the input bitstream bs1 for each predetermined code amount unit, an input code amount, The code amount reduction rate calculating unit 45 calculates the code amount reduction rate from the input variable length code amount and the bit rate reduction rate, and the code amount reduction rate is the target code amount of the moving image bit rate conversion apparatus 101 shown in FIG. Output to the calculation unit 40.

  A detailed operation of the moving image bit rate conversion apparatus 101 configured as described above will be described.

  The unit code detection unit 42 detects the head part of a predetermined code amount detection unit from the input bit stream bs1. Here, the predetermined code amount detection unit is a layer unit of a stream structure defined in MPEG2, and is a unit divided for each functional unit such as GOP, picture, or slice. Hereinafter, the predetermined code amount detection unit will be described as a picture unit. The unit code detector 42 detects the picture start code that is the head of the code amount detection unit from the input bitstream bs1, and outputs the head timing of the picture to the code amount detector 43 and the variable length code amount detector 44.

  The code amount detection unit 43 counts the input bit string of the input bit stream bs1 from the picture head timing output from the unit code detection unit 42 to the next picture head timing. By this operation, the input code amount for each picture can be obtained. The code amount detection unit 43 outputs the counted input code amount in units of pictures to the code amount reduction rate calculation unit 45.

  The variable length code amount detector 44 counts only the variable length encoded bit string in the input bitstream bs1 from the picture head timing output from the unit code detector 42 to the next picture head timing. By this operation, it is possible to obtain the code amount of the variable-length-coded bit string that is a net bit reduction part excluding a non-reduction part such as a header for each picture. The code amount detection unit 43 outputs the counted input variable length code amount in units of pictures to the code amount reduction rate calculation unit 45.

  The code amount reduction rate calculation unit 45 obtains an input code amount from the code amount detection unit 43, an input variable length code amount from the variable length code amount detection unit 44, a bit rate control rate from a bit rate control unit (not shown), etc. The code amount reduction rate is calculated for each code amount detection unit, that is, for each picture unit.

  First, in accordance with the following calculation formula, the code amount reduction unit 10 obtains the non-reduced code amount occupied by a header or the like in which the code amount in the input bitstream bs1 is not reduced in units of pictures.

Snr (m) = Sfu (m) −Svlc (m)
Here, Snr (m) is a non-reduced code amount per code amount detection unit, Sfu (m) is an input code amount per code amount detection unit, and Svlc (m) is a variable length code amount per code amount detection unit. . Further, m is a number assigned to each picture unit divided by natural numbers.

  Next, an accurate reduction target code amount for each picture obtained by correcting the non-reduction code amount Snr (m) from the target code amount obtained from the input code amount in units of pictures and the rate reduction rate is obtained.

Target (m) = Sin (m) × Rred−Snr (m)
Here, Target (m) is a net target code amount per code amount detection unit, an input code amount obtained by dividing the input bitstream bs1 in units of pictures, and Rred is a rate reduction rate.

  Finally, the code amount reduction rate Rs (m) is obtained from the net target code amount and the variable length code amount by the following calculation formula.

Rs (m) = Target (m) / Svlc (m)
The code amount reduction rate calculation unit 45 outputs the code amount reduction rate Rs (m) for each picture unit obtained above to the target code amount calculation unit 40 of the moving picture bit rate conversion apparatus 101 shown in FIG.

  With the above operation, it is possible to obtain an accurate code amount reduction rate by removing non-reduced portions such as headers in a moving picture bitstream from a given rate reduction rate, and to control the output code amount more stably. Is possible.

  When the input bit stream is MPEG2-TS, the audio TS and the section code amount detection unit 42 in addition to the video TS remove the header of the audio TS and elementary stream from the MPEG2-TS by this operation. The net code amount can be obtained.

  At this time, the input code amount per picture unit is obtained by the following equation.

Sin (m) = Nts (m) × 188 × 8
Here, Nts (m) is the number of input TS packets per predetermined code amount detection unit, 188 is the number of bytes of the TS packet, and 8 is a byte to bit conversion.

  With the above operation, even if the input bit stream bs1 is MPEG2-TS, an accurate code amount reduction rate excluding non-reduced portions such as the audio TS and header in the moving image bit stream from the given rate reduction rate is obtained. It can be obtained.

  In the second embodiment, the video bit rate conversion device has been described. However, it is also possible to describe the configuration of these devices in a software program, record them on a recording medium, and execute them by the CPU. .

  In the second embodiment, each functional block is typically realized as an LSI that is an integrated circuit. These may be individually made into one chip, or may be made into one chip so as to include a part or all of them. The name used here is LSI, but it may also be called IC, system LSI, super LSI, or ultra LSI depending on the degree of integration. Further, the method of circuit integration is not limited to LSI, and implementation with a dedicated circuit or a general-purpose processor is also possible. An FPGA (Field Programmable Gate Array) that can be programmed after manufacturing the LSI, or a reconfigurable processor that can reconfigure the connection and setting of circuit cells inside the LSI may be used. Further, if integrated circuit technology comes out to replace LSI's as a result of the advancement of semiconductor technology or a derivative other technology, it is naturally also possible to carry out function block integration using this technology. Biotechnology can be applied.

  Further, the video server and the network repeater to which the LSI in which the functional blocks of the moving image bit rate conversion apparatus in the second embodiment are integrated are applied have the same configurations as those in FIGS. 14 and 15 in the first embodiment, respectively. is there. However, the code amount reduction rate given from the network control units 83 and 95 to the moving image bit rate conversion units 81 and 91 is the bit rate reduction rate in the second embodiment.

(Embodiment 3)
FIG. 10 is a block diagram showing a configuration of a moving image bit rate conversion apparatus according to Embodiment 3 of the present invention. In FIG. 10, a moving image bit rate conversion apparatus 102 receives an input bit stream bs1 and reduces the code amount of the input bit stream bs1, and outputs an output bit stream bs2, for each predetermined control unit. The input code amount detection unit 20 for detecting the code amount of the input bit stream bs1, the output code amount detection unit 30 for detecting the bit rate of the output bit stream bs2 for each predetermined control unit, and the target code amount for each predetermined control unit Target code amount calculation unit 40 for calculating the target code amount ratio correction unit 46 for correcting the target code amount ratio for each picture type, target code amount error correction unit 47 for correcting the target code amount error, input code amount and output Code amount error calculation unit 51 for calculating code amount error, code amount error accumulation calculation unit 52 for cumulative calculation of code amount error, cumulative code It is constituted by the code amount reduction parameter calculation unit 54 for calculating a code amount error smoothing unit 53, and the code amount reduction parameter smoothes the amount error, and outputs an output bit stream bs2.

  In the moving image bit rate conversion apparatus 102, each processing block other than the target code amount calculation unit 40, the target code amount ratio correction unit 46, the target code amount error correction unit 47, and the code amount reduction parameter calculation unit 54 is described in the embodiment. 1, the target code amount calculation unit 40, the target code amount ratio correction unit 46, the target code amount error correction unit 47, and the code amount reduction parameter calculation unit are performed. A detailed description of each processing block other than 54 is omitted here.

  Note that the code amount reduction rate that is the output of the code amount reduction rate detection unit 41 in the second embodiment may be used as the code amount reduction rate that is an input to the target code amount calculation unit 40.

  If the designated code amount reduction rate is low when the code amount reduction unit 10 reduces the code amount, the predetermined code amount reduction parameter reaches the lower limit, and the bit rate cannot be reduced. In particular, when looking at each picture type, since the code amount of B pictures is originally small, there is a limit to reducing the code amount. Therefore, the bit rate can be reduced to a desired bit rate by correcting the code amount ratio of the I picture, P picture, and B picture.

  When the code amount reduction parameter calculation unit 54 determines that the accumulated code amount error has increased despite the code amount reduction parameter reaching the lower limit, the code amount reduction parameter calculation unit 54 determines the ratio to the target code amount ratio correction unit 46. Output change instructions.

  The target code amount ratio correction unit 46 sets the target code amount ratio of the I picture, P picture, and B picture to 1: 1: 1 in the initial state, and does not correct the target code amount. In the initial state, when the target code amount ratio correction unit 46 receives a ratio change instruction from the code amount reduction parameter calculation unit 54, the target code amount ratio of the P picture is set to a predetermined value without changing the target code amount ratio of the I picture. Decrease by the ratio. Each time the target code amount ratio correction unit 46 receives a ratio change instruction from the code amount reduction parameter calculation unit 54, the target code amount ratio of the P picture is decreased by a predetermined ratio. Next, the code amount ratio of the I picture is lowered at the time when it is lowered until it becomes the same as the target code amount. As described above, by changing the code amount ratio, the code amount can be further reduced as compared with the case where the I picture, the P picture, and the B picture are changed at a fixed ratio.

Hereinafter, the code amount ratio correction method will be described in detail. First, a case where the code amount ratio of the P picture is lowered without changing the code amount ratio of the I picture will be described. The total Spb of the average code amount of P picture and B picture in GOP unit is
Spb = Sp × Np + Sb × Nb
The ratio Kpb of the average code amount of the P picture to the average code amount of the B picture is:
Kpb = Sp / Sb
It becomes. Here, when the code amount ratio of the P picture is lowered to Kc (0 <Kc <1), the target code amount ratio of the P picture is Kpb × Kc when the B picture is 1. Accordingly, the target code amount Dt per code amount ratio 1 is
Dt = Spb / (Np × Kpb × Kc + Nb)
From the above, the target code amount ratios Ktp and Ktb of the P picture and the B picture can be obtained by the following calculation formulas, respectively.

Ktp = Dt / Sp × Kpb × Kc
Ktb = Dt / Sb
The target code amount of the P picture is obtained by multiplying the target code amount ratios Ktp and Ktb of the P picture and B picture obtained above by the target code amount of the P picture and B picture, which are the outputs of the target code amount calculation unit 40, respectively. The target code amount of each picture when the amount ratio is lowered to Kc can be obtained.

Next, a case where the code amount ratio of both the I picture and the P picture is lowered will be described. The total Sipb of the average code amount of I picture, P picture and B picture in GOP unit is
Sipb = Si × Ni + Sp × Np + Sb × Nb
The ratios Kib and Kpb of the average code amount of the I picture and P picture to the average code amount of the B picture are respectively
Kpi = Si / Sb
Kpb = Sp / Sb
It becomes. Here, when the code amount ratio of the I picture is lowered to Kci (0 <Kci <1) and the code amount ratio of the P picture is lowered to Kcp (0 <Kcp <1), the target code amount ratio of the I picture and the P picture is B If the picture is 1, Kib × Kci and Kpb × Kcp. Accordingly, the target code amount Dt per code amount ratio 1 is
Dt = Sipb / (Ni × Kib × Kci + Np × Kpb × Kcp + Nb)
From the above, the target code amount ratios Kti, Ktp, and Ktb of I picture, P picture, and B picture can be obtained by the following calculation formulas, respectively.

Kti = Dt / Si × Kib × Kci
Ktp = Dt / Sp × Kpb × Kcp
Ktb = Dt / Sb
The target code amount ratios Kti, Ktp, and Ktb for the I picture, P picture, and B picture obtained above are respectively multiplied by the target code amounts for the I picture, P picture, and B picture that are output from the target code amount calculation unit 40. Thus, the target code amount of each picture when the target code amount ratio of the I picture is lowered to Kci and the target code amount ratio of the P picture is lowered to Kcp can be obtained.

  In the above, the target code amount ratio is calculated based on the average code amount of I, P, and B pictures in GOP units, but the average code amount of I, P, and B pictures in GOP units is fixed. The target code amount ratio to be corrected is stored in the memory in advance, and each time the ratio change instruction is received from the code amount reduction parameter calculation unit 54, the correction ratio is sequentially read from the memory to correct the target code amount. May be.

  The target code amount error correction unit 47 corrects an error between the corrected target code amount and the target code amount that occurs in the code amount correction unit when one GOP or a plurality of GOPs is used as the code amount correction unit. The error correction amount is calculated for each code amount correction unit by accumulating the error between the target code amount after correction based on the target code amount ratio of all pictures and the target code amount before correction to obtain the total error correction amount. The amount is obtained by dividing the amount by the target code amount ratio by picture type in the code amount correction unit. The obtained error correction amount for each picture type is dispersed for each code amount control unit in the following and subsequent code amount correction units to correct the target code amount.

  As a method of distributing the error correction amount, the error correction amount for each picture type is uniformly distributed in the code amount control unit for each picture type to correct the target code amount. As another method of distributing the error correction amount, the target code amount is corrected by being distributed in units of control unit code amounts Ui, Up, and Ub for each picture type for each code amount control unit.

  With the above operation, even when the code amount reduction rate is extremely low, it is possible to output an output bit stream converted to a desired bit rate.

  In the third embodiment, the video bit rate conversion device has been described. However, these device configurations can be described in a software program, recorded on a recording medium, and executed by the CPU. .

  In the third embodiment, each functional block is typically realized as an LSI that is an integrated circuit. These may be individually made into one chip, or may be made into one chip so as to include a part or all of them. The name used here is LSI, but it may also be called IC, system LSI, super LSI, or ultra LSI depending on the degree of integration. Further, the method of circuit integration is not limited to LSI, and implementation with a dedicated circuit or a general-purpose processor is also possible. An FPGA (Field Programmable Gate Array) that can be programmed after manufacturing the LSI, or a reconfigurable processor that can reconfigure the connection and setting of circuit cells inside the LSI may be used. Further, if integrated circuit technology comes out to replace LSI's as a result of the advancement of semiconductor technology or a derivative other technology, it is naturally also possible to carry out function block integration using this technology. Biotechnology can be applied.

  In addition, the video server and the network repeater to which the LSI in which the functional blocks of the moving image bit rate conversion apparatus according to the third embodiment are integrated are applied have the same configurations as those of FIGS. 14 and 15 according to the first embodiment, respectively. It is.

(Embodiment 4)
FIG. 11 is a block diagram showing the configuration of the code amount reduction apparatus according to the fourth embodiment of the present invention, and can be used as an alternative to the code amount reduction unit 10 in the first to third embodiments. In FIG. 11, the code amount reduction device 60 receives an input bitstream bs1 and stores a code amount reduction parameter storage unit 65 that stores initial values of a plurality of code amount reduction parameters, initial values of code amount reduction parameters, and code amount reduction. A first code amount reduction circuit 61, a second code amount reduction circuit 62, a third code amount reduction circuit 63, a fourth code amount reduction circuit 64, a target code, which select parameters and reduce the code amount respectively. A switch unit 66 is provided that selects the output of the first to fourth code amount reduction circuits 61 to 64 according to the amount and outputs the output bit stream bs2.

  The first to fourth code amount reduction circuits 61 to 64 have the same configuration as the code amount reduction unit 10 shown in FIG. The code amount reduction parameter is provided from the code amount reduction parameter calculation unit 54 described in the first to third embodiments, and the target code amount is provided from the target code amount calculation unit 40. Here, for convenience of explanation, the number of code amount reduction circuits is four, but it is selected from a plurality of two or more according to the circuit scale and system requirements.

  The detailed operation of the code amount reduction device 60 configured as described above will be described. First, when the bit rate conversion of a moving image bit stream becomes necessary due to a lack of network bandwidth or a request from a receiving terminal, an instruction for bit rate conversion is given to the code amount reduction device 60 from a control device (not shown). At this time, the first to fourth code amount reduction circuits 61 to 64 read the initial value of the code amount reduction parameter from the code amount reduction parameter storage unit 65, and respectively reduce the code amount of the input bitstream. At this time, the initial values of the code amount reduction parameters given to the first to fourth code amount reduction circuits 61 to 64 are all different values, and different output code amounts are obtained.

  FIG. 12 is a diagram illustrating transitions in the code amount control units output from the first to fourth code amount reduction circuits 61 to 64, that is, the output code amounts in slice units. In FIG. 12, a bit rate conversion instruction is given at the time of slice number 0, the code amount is reduced by the initial value of the code amount reduction parameter, and thereafter output by the code amount reduction parameter given from the code amount reduction parameter calculation unit 54. Code amount control is performed so that the code amount approaches the target code amount. The points indicated by white circles are output code amounts output from the first to fourth code amount reduction units 61 to 64 from the bottom. At this time, the switch unit 66 selects the output of the second code amount reduction circuit 62 that is below the target code amount and is the output code amount closest to the target code amount. Thereafter, the second code amount reduction circuit 62 receives the code amount reduction parameter from the code amount reduction parameter calculation unit 54, and outputs the output bit stream bs2 subjected to the code amount reduction.

  With the above operation, it is possible to control the code amount to be pulled in at a higher speed and more stably than the case where the code amount control is performed from the original bit rate as the code amount reduction parameter immediately after the bit rate conversion. In addition, since the bit stream of the output code amount lower than the target code amount is output immediately after the bit rate conversion, the network transmission band is insufficient compared to the case of performing the code amount control from the original high bit rate. It is effective when there is.

  In the above, code amount reduction circuits are arranged in parallel to reduce the code amount, and the code amount reduction circuit that outputs the maximum output code amount below the target code amount is selected, but the code amount reduction circuit is The code amount of the same slice is reduced using a plurality of code amount reduction parameters given from the code amount reduction parameter storage unit 65, and the output code amount closest to the target code amount is output below the target code amount The code amount reduction parameter may be selected and the code amount may be reduced thereafter.

  In the fourth embodiment, the code amount reduction device has been described. However, it is also possible to describe these device configurations in a software program, record them in a recording medium, and execute them by the CPU.

  In the fourth embodiment, each functional block is typically realized as an LSI that is an integrated circuit. These may be individually made into one chip, or may be made into one chip so as to include a part or all of them. The name used here is LSI, but it may also be called IC, system LSI, super LSI, or ultra LSI depending on the degree of integration. Further, the method of circuit integration is not limited to LSI, and implementation with a dedicated circuit or a general-purpose processor is also possible. An FPGA (Field Programmable Gate Array) that can be programmed after manufacturing the LSI, or a reconfigurable processor that can reconfigure the connection and setting of circuit cells inside the LSI may be used. Further, if integrated circuit technology comes out to replace LSI's as a result of the advancement of semiconductor technology or a derivative other technology, it is naturally also possible to carry out function block integration using this technology. Biotechnology can be applied.

  Further, the video server and the network repeater to which the LSI in which the functional blocks of the moving image bit rate conversion apparatus according to the fourth embodiment are integrated are applied have the same configurations as those in FIGS. 14 and 15 in the first embodiment, respectively. is there.

(Embodiment 5)
FIG. 13 is a block diagram showing the configuration of the code amount reduction unit of the moving image bit rate conversion apparatus according to Embodiment 5 of the present invention. In Embodiments 1 to 3, it is used as an alternative to the code amount reduction unit 10. it can. In FIG. 13, the code amount reduction device 70 receives the input bitstream bs1 and receives a code amount reduction parameter storage unit 73 that stores initial values of a plurality of code amount reduction parameters, and a code provided from the code amount reduction parameter calculation unit 54. The first code amount reduction circuit 71 that performs code amount reduction using the amount reduction parameter, the second code amount reduction circuit 72 that performs code amount reduction using the initial value of the code amount reduction parameter, and the code amount reduction circuit 72 An output code amount detection holding unit 74 that detects the output code amount and holds it together with the code amount reduction parameter.

  The first code amount reduction unit 71 and the second code amount reduction circuit 72 have the same configuration as the code amount reduction unit 10 shown in FIG. The code amount reduction parameter is provided from the code amount reduction parameter calculation unit 54 described in the first to third embodiments, and the target code amount is provided from the target code amount calculation unit 40.

  The detailed operation of the code amount reducing apparatus 70 configured as described above will be described. The second code amount reduction circuit 72 sequentially reads the code amount reduction parameters from the code amount reduction parameter storage unit 73 for each code amount control unit, and reduces the code amount. That is, code amount reduction is performed using different code amount reduction parameters for each slice unit. The code amount reduction circuit 72 uses all the code amount reduction parameters stored in the code amount reduction parameter storage unit 73, and then repeatedly performs code amount reduction again from the first code amount reduction parameter. The code amount reduction circuit 72 outputs the output bit stream and the code amount reduction parameter used to the output code amount detection unit holding unit 74.

  The output code amount detection holding unit 74 detects the output code amount of the output bitstream for each code amount control unit, and holds it together with the code amount reduction parameter. When the same code amount reduction parameter is input from the code amount reduction circuit 72, the stored output code amount and code amount reduction parameter are deleted.

  Here, when the bit rate conversion of the moving image bit stream becomes necessary due to a lack of network bandwidth or a request from the receiving terminal, a bit rate conversion instruction is given to the code amount reduction device 70 from a control device (not shown). . At this time, the output code amount detection / holding unit 74 is provided with the target code amount from the target code amount calculation unit 40, and is less than the target code amount from the output code amount that is the output result of the repeated code amount reduction. The code amount reduction parameter that obtained the output code amount closest to is selected and output to the code amount reduction circuit 71.

  The code amount reduction circuit 71 subsequently performs code amount reduction using the code amount reduction parameter given from the output code amount detection holding unit 74, and outputs the output bit stream bs2.

  With the above operation, it is possible to control the code amount to be pulled in at a higher speed and more stably than the case where the code amount control is performed from the original bit rate as the code amount reduction parameter immediately after the bit rate conversion. In addition, since the bit stream of the output code amount lower than the target code amount is output immediately after the bit rate conversion, the network transmission band is insufficient compared to the case of performing the code amount control from the original high bit rate. It is effective when there is.

  Although the fifth embodiment has been described as a moving image bit rate conversion device, it is also possible to describe the configuration of these devices in a software program, record them on a recording medium, and execute them by a CPU. .

  In the fifth embodiment, each functional block is typically realized as an LSI which is an integrated circuit. These may be individually made into one chip, or may be made into one chip so as to include a part or all of them. The name used here is LSI, but it may also be called IC, system LSI, super LSI, or ultra LSI depending on the degree of integration. Further, the method of circuit integration is not limited to LSI, and implementation with a dedicated circuit or a general-purpose processor is also possible. An FPGA (Field Programmable Gate Array) that can be programmed after manufacturing the LSI, or a reconfigurable processor that can reconfigure the connection and setting of circuit cells inside the LSI may be used. Further, if integrated circuit technology comes out to replace LSI's as a result of the advancement of semiconductor technology or a derivative other technology, it is naturally also possible to carry out function block integration using this technology. Biotechnology can be applied.

  Further, the video server and the network repeater to which the LSI in which the functional blocks of the moving picture bit rate conversion apparatus in the fifth embodiment are integrated are applied have the same configurations as those in FIGS. 14 and 15 in the first embodiment, respectively. is there.

  A moving image bit rate conversion method and apparatus according to the present invention has a function of converting a bit rate of a moving image bit stream compression-encoded by orthogonal transform such as MPEG in real time, in a moving image server or a video camera. Or, it is arranged in a repeater on a network, etc., and is useful as a moving image transmission system that converts the bit rate of a moving image according to a request from a moving image receiving terminal or a load state of a transmission path, etc. .

1 is a block diagram showing a configuration of a moving image bit rate conversion apparatus according to Embodiment 1 of the present invention. The block diagram which shows the structure of the code amount reduction part in Embodiment 1 of this invention. The figure which shows the scanning order of a discrete cosine transform coefficient sequence when performing variable length coding The figure which shows an example of the coefficient reduction parameter in Embodiment 1 of this invention The figure showing the average output bit rate when the coefficient reduction parameter and the quantization parameter are changed in the code amount reduction unit according to the first embodiment of the present invention. The figure showing the average output bit rate when changing the quantization rounding correction parameter in the code amount reduction unit according to the first embodiment of the present invention. The block diagram which shows the structure of the code amount error smoothing part in Embodiment 1 of this invention. The block diagram which shows the structure of the moving image bit rate conversion apparatus in Embodiment 2 of this invention. The block diagram which shows the structure of the code amount reduction rate detection part in Embodiment 2 of this invention. FIG. 9 is a block diagram showing a configuration of a code amount reduction unit in a moving image bit rate conversion apparatus according to Embodiment 3 of the present invention. FIG. 9 is a block diagram showing the configuration of a code amount reduction unit in a moving image bit rate conversion apparatus according to Embodiment 4 of the present invention. Explanatory drawing which shows the transition of the output code amount of the code amount reduction part in Embodiment 4 of this invention. FIG. 9 is a block diagram showing a configuration of a code amount reduction unit in a moving image bit rate conversion apparatus according to Embodiment 5 of the present invention. The block diagram which shows the structure of the video server in Embodiment 1 of this invention. The block diagram which shows the structure of the network repeater in Embodiment 1 of this invention. The block diagram which shows the structure of the conventional moving image bit rate conversion apparatus The flowchart which shows operation | movement of the code amount control part of the conventional moving image bit rate conversion apparatus. Explanatory drawing showing the hierarchical structure of the bit stream of the MPEG2 standard

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 Code amount reduction part 11 Variable length decoding part 12 Inverse quantization part 13 Requantization part 14 Coefficient reduction part 15 Variable length encoding part 20 Input code amount detection part 30 Output code amount detection part 40 Target code amount calculation part 41 Code amount reduction rate detection unit 42 Unit code detection unit 43 Code amount detection unit 44 Variable length code amount detection unit 45 Code amount reduction rate calculation unit 46 Target code amount ratio correction unit 47 Target code amount error correction unit 50 Code amount control unit 51 Code amount error calculation unit 52 Code amount error accumulation calculation unit 53 Code amount error smoothing unit 54 Code amount reduction parameter calculation unit 60, 70 Code amount reduction device 61, 62, 63, 64, 71, 72 Code amount reduction circuit 65, 73 Code amount reduction parameter storage unit 66 Switch unit 74 Output code amount detection holding unit 80 Video server 81 Video bit rate conversion unit 82 Network interface Ace 83 Network control unit 84 Video recording unit 90 Network repeater 91 Video bit rate conversion unit 92, 93 Network interface 94 Bridge unit 95 Network control unit 100, 101, 102 Video bit rate conversion device 110 Conventional video bit rate Rate converter 111 Variable length decoding unit 112 Inverse quantization unit 113 Requantization unit 114 Variable length encoding unit 115 Code amount control unit

Claims (27)

A moving image bit rate conversion method for converting a moving image bit stream compressed and encoded using orthogonal transformation into a desired bit rate,
Counting an input code amount and an output code amount of a moving picture bitstream for each predetermined code amount control unit;
Calculating a target code amount from the input code amount and a predetermined code amount reduction rate;
Calculating a code amount error between the target code amount and the output code amount;
Performing a cumulative calculation of the code amount error for each picture type;
Smoothing the accumulated code amount error;
Calculating a code amount reduction parameter from the smoothed accumulated code amount error;
A discrete cosine transform sequence that is variable-length decoded and inverse-quantized for each predetermined code amount control unit is requantized using the code amount reduction parameter to reduce the discrete cosine transform sequence. A code amount reduction step by performing long encoding,
The code amount reduction parameter reduces a parameter for determining a value to be added to the quantization scale at the time of requantization, a parameter for determining a value to be added to the discrete cosine transform series in the quantization rounding process, and a discrete cosine transform coefficient sequence. A parameter specifying the number,
A moving image bit rate conversion method for converting a moving image bit stream to a desired bit rate by controlling a code amount reduction parameter. The moving image according to claim 1, wherein the code amount reduction parameter is set to perform code amount reduction by adding a value to a quantization scale after performing code amount reduction by reducing coefficients of a discrete cosine transform series. Bit rate conversion method. The code amount reduction parameter is obtained by changing a quantization rounding correction parameter to which a quantization rounding correction value is added during rounding when adding a quantization scale by 1 and requantizing, and then increasing the quantization scale by two or more. The moving image bit rate conversion method according to claim 1, wherein the moving image bit rate conversion method is set to add. The moving image bit rate conversion method according to claim 1, wherein the code amount reduction parameter is obtained by dividing the accumulated code amount error by a control unit code amount determined for each picture type. 5. The moving image bit rate conversion method according to claim 4, wherein the control unit code amount is a value obtained by dividing an average input code amount per control unit by the number of code amount reduction parameters and multiplying by a code amount ratio for each picture type. . 5. The moving image bit rate conversion method according to claim 4, wherein the control unit code amount is determined in advance assuming a code amount ratio for each picture type as a fixed code amount ratio. The moving image bit rate conversion method according to claim 1, wherein the predetermined control unit is a slice unit. The moving image bit rate conversion method according to claim 1, wherein the predetermined control unit is a macroblock unit. Counting the input code amount of the video bitstream for each predetermined code amount detection unit;
Counting a variable length code amount in a moving image bitstream for each predetermined code amount detection unit;
The video bit rate conversion according to claim 1, further comprising: calculating a code amount reduction rate excluding a non-reduced bit string in a predetermined code amount detection unit from the bit rate reduction rate, the input code amount, and the variable length code amount. Method. When the moving image bitstream is MPEG2-TS, the number of MPEG2-TS packets per code amount detection unit is counted,
10. The moving image bit rate conversion method according to claim 9, wherein an input code amount is calculated from the number of MPEG2-TS packets, and a code amount reduction rate excluding a non-reduced bit sequence is calculated for a predetermined code amount detection unit. The moving image bit rate conversion method according to claim 9, wherein the predetermined code amount detection unit is a picture unit. When the accumulated code amount error increases for each predetermined code amount control unit even though the code amount reduction parameter is a preset lower limit value, the target code amount for each picture type is set as the target. The moving image bit rate conversion method according to claim 1, wherein the output code amount is reduced by correcting the code amount ratio. In the initial state, the target code amount ratio for each picture type is the same, and the accumulated code amount error increases for each predetermined code amount control unit even though the code amount reduction parameter is a preset lower limit value. 13. The moving image bit rate conversion method according to claim 12, wherein if the ratio is set, the target code amount ratio of the P picture is lowered to reduce the output code amount. When the target code amount of the P picture is reduced to the target code amount of the B picture, and the accumulated code amount error increases for each predetermined code amount control unit, the target code amount ratio of the I picture is set to 14. The moving image bit rate conversion method according to claim 13, wherein the output code amount is reduced to reduce the output code amount. The target code amount ratio calculates an average code amount ratio from an average code amount for each picture type for each GOP unit in the input bitstream,
The moving image bit rate conversion method according to claim 12, wherein a target code amount ratio for each picture type to be corrected is calculated based on the average code amount ratio. The target code amount ratio is assumed to be fixed for each input picture type.
13. The moving image bit rate conversion method according to claim 12, wherein a target code amount ratio for each picture type to be corrected based on the code amount ratio for each picture type is calculated and held in advance. 1 GOP or multiple GOPs are used as a code amount correction unit,
For each code amount correction unit, calculate the total error correction amount by accumulating errors between the target code amount and the target code amount corrected by the target code amount ratio,
Dividing the total error correction amount by the target code amount ratio by picture type to calculate the error correction amount by picture type,
13. The moving image bit rate conversion method according to claim 12, comprising a step of correcting the target code amount by distributing the error correction amount for each picture type for each code amount control unit in a next code amount correction unit. A plurality of steps for performing code amount reduction using different code amount reduction parameters;
And a step of selecting a code amount reduction parameter that outputs an output code amount that is less than the target code amount and is closest to the target code amount, from among a plurality of output code amounts subjected to code amount reduction. Video bit rate conversion method. Performing code amount reduction for each code amount control unit by sequentially using different code amount reduction parameters;
Detecting an output code amount for each code amount control unit and holding it together with a code amount reduction parameter;
The moving image bit rate conversion method according to claim 1, further comprising: selecting a code amount reduction parameter that outputs an output code amount that is less than the target code amount and is closest to the target code amount from among the plurality of output code amounts held. . A moving image bit rate conversion device that receives a moving image bit stream that has been compression-encoded using orthogonal transformation, converts the moving image bit stream to a desired bit rate, and outputs the moving image bit rate.
An input code amount detection unit that counts an input code amount of a moving image bitstream input for each predetermined code amount control unit;
An output code amount detection unit that counts the output code amount of the moving image bitstream output for each predetermined code amount control unit;
A target code amount calculation unit for calculating a target code amount from the input code amount and a predetermined code amount reduction rate;
A code amount error calculation unit for calculating a code amount error between the target code amount and the output code amount;
A code amount error accumulation calculation unit that performs accumulation calculation of the code amount error for each picture type;
A code amount error smoothing unit that smoothes the accumulated code amount error;
A code amount reduction parameter calculation unit for calculating a code amount reduction parameter from the smoothed accumulated code amount error;
A discrete cosine transform sequence that is variable-length decoded and inverse-quantized for each predetermined code amount control unit is requantized using the code amount reduction parameter to reduce the discrete cosine transform sequence. A code amount reduction unit that performs code amount reduction by long encoding,
The code amount reduction parameter reduces a parameter for specifying a value to be added to the quantization scale at the time of requantization, a parameter for specifying a value to be added to the discrete cosine transform series in the quantization rounding process, and a discrete cosine transform coefficient sequence. A moving image bit rate conversion device including a parameter for specifying a number. Input video bit stream and bit rate reduction rate,
A unit code detection unit for detecting a head of a predetermined code amount detection unit;
A code amount detection unit that counts the input code amount of a moving image bitstream input for each predetermined code amount unit;
A variable-length code amount detection unit that counts an input variable-length code amount in a moving image bitstream input for each predetermined code amount unit;
A code amount reduction rate calculating unit that calculates a code amount reduction rate from the input code amount, the input variable length code amount, and a given bit rate reduction rate;
21. The moving image bit rate conversion device according to claim 20, wherein the code amount reduction rate is output to the target code amount calculation unit. When it is determined that the accumulated code amount error has increased despite the code amount reduction parameter reaching the lower limit, a ratio change instruction is received from the code amount reduction parameter calculation unit, and each picture type of the target code amount A target code amount ratio correction unit for correcting the ratio of
A target code amount error correction unit that corrects a code amount error between the target code amount and a target code amount obtained by correcting a ratio for each picture type;
21. The moving image bit rate conversion device according to claim 20, wherein the corrected target code amount is output to a code amount error calculation unit. A code amount reduction parameter storage unit that stores initial values of a plurality of code amount reduction parameters;
A plurality of code amount reduction units that respectively reduce a code amount using a code amount reduction parameter that is an initial value of the code amount reduction parameter or an output of a code amount reduction parameter calculation unit;
A switch unit for selecting one from a plurality of code amount reduction units,
At the time of bit rate conversion, select a code amount reducing unit that outputs an output code amount that is less than the target code amount from the outputs of the plurality of code amount reducing units and is closest to the predetermined target code amount,
21. The moving picture bit rate conversion apparatus according to claim 20, wherein the selected code amount reduction unit performs code amount reduction using a code amount reduction parameter that is an output of the code amount reduction parameter calculation unit. A code amount reduction parameter storage unit that stores initial values of a plurality of code amount reduction parameters;
A first code amount reduction unit that performs code amount reduction for each control unit by sequentially using initial values of the plurality of code amount reduction parameters;
An output code amount detection unit that counts an output code amount of the first code amount reduction unit and holds it together with a code amount reduction parameter;
A second code amount reduction unit that performs code amount reduction using the code amount reduction parameter;
At the time of bit rate conversion, an output that is less than the target code amount from the output code amount obtained by performing code amount reduction using the plurality of code amount reduction parameters by a predetermined target code amount and is closest to the predetermined target code amount Select the code amount reduction parameter to output the code amount,
The second code amount reduction unit uses the selected code amount reduction parameter at the time of bit rate conversion, and otherwise uses the code amount reduction parameter that is the output of the code amount reduction parameter calculation unit. 21. The moving image bit rate conversion device according to claim 20, wherein the reduction is performed. A code amount reduction parameter storage unit that stores initial values of a plurality of code amount reduction parameters;
A first code amount reduction unit that performs code amount reduction using the code amount reduction parameter given from the code amount reduction parameter calculation unit;
A second code amount reduction unit that performs code amount reduction using an initial value of the code amount reduction parameter;
An output code amount detection holding unit that detects the output code amount of the output bitstream output by the second code amount reduction unit for each code amount control unit, and holds the initial value of the code amount reduction parameter;
At the time of bit rate conversion, select a code amount reduction parameter that is less than the target code amount from the output code amount held by the output code amount detection holding unit and obtains the output code amount closest to the target code amount,
21. The moving image bit rate conversion apparatus according to claim 20, wherein the first code amount reduction unit performs code amount reduction using the selected code amount reduction parameter only at the time of bit rate conversion. A program recording medium configured to store a program for realizing all or part of the functions of the moving image bitstream conversion method according to any one of claims 1 to 19 by a computer. A moving image bit rate conversion circuit that receives a moving image bit stream that has been compression-encoded using orthogonal transformation, converts the moving image bit stream to a desired bit rate, and outputs the moving image bit rate.
An input code amount detection unit that counts an input code amount of a moving image bitstream input for each predetermined code amount control unit;
An output code amount detection unit that counts the output code amount of the moving image bitstream output for each predetermined code amount control unit;
A target code amount calculation unit for calculating a target code amount from the input code amount and a predetermined code amount reduction rate;
A code amount error calculation unit for calculating a code amount error between the target code amount and the output code amount;
A code amount error accumulation calculation unit that performs accumulation calculation of the code amount error for each picture type;
A code amount error smoothing unit that smoothes the accumulated code amount error;
A code amount reduction parameter calculation unit for calculating a code amount reduction parameter from the smoothed accumulated code amount error;
A discrete cosine transform sequence that is variable-length decoded and inverse-quantized for each predetermined code amount control unit is requantized using the code amount reduction parameter to reduce the discrete cosine transform sequence. A code amount reduction unit that performs code amount reduction by long encoding,
The code amount reduction parameter reduces a parameter for specifying a value to be added to the quantization scale at the time of requantization, a parameter for specifying a value to be added to the discrete cosine transform series in the quantization rounding process, and a discrete cosine transform coefficient sequence. A moving image bit rate conversion circuit including a parameter for specifying a number.

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