JP2006310386A - Nano cluster substrate for integrated electronic device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a wafer technique that becomes a base for continuous development to future integrated circuit technology using quantum dot while corresponding to the progress of micro-fabrication technology. <P>SOLUTION: An atomic group which is generated by changing a solid material into gas phase is enclosed in a specific space area 5, and the gas phase atoms collide with each other to join them and form a cluster group 6 having a diameter of 5 nm or less. The formed cluster group 6 is flown out from the specific space area 5, and it is scattered on a substrate 7 at a velocity where a kinetic energy per atom in the cluster becomes less than an energy enough to break the inter-atomic bonding of the atoms, and then a uniform cluster film 9 is formed on the substrate 7. In addition, an electronic barrier is formed between the respective clusters in a process from the formation of cluster to the formation of the cluster film 9, thus making a nano cluster substrate for integrated electronic device wherein an electronic device utilizing a nano cluster assembly is formed at a desired position on the substrate. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

The present invention relates to a means for realizing a solid-state electronic apparatus that controls electrons in a solid and realizes advanced functions, and in particular, a large-scale that fulfills advanced functions by integrating many solid-state electronic devices that control electrons in solids The present invention relates to a nanocluster substrate for an integrated electronic device applied as a component of an integrated circuit.

Solid-state electronic devices have continued to advance as silicon integrated circuit technology since the latter half of the 20th century. This is due to low energy and high integration density by miniaturization of devices in a silicon chip, that is, MOS transistors, due to advancement of microfabrication technology. Its miniaturization is 100nm
It has entered the following areas. Conventionally, silicon integrated circuits have been manufactured by using a silicon wafer as a substrate and performing a process of forming MOS transistors and wirings thereon. 10
Since the operating margin of the MOS transistor decreases in the region near 0 nm, a silicon single crystal thin film is formed on the surface of the silicon wafer via a silicon oxide film as an insulating film instead of a simple silicon wafer as the substrate of the integrated circuit. Configure SOI (Silicon o
A technique using a substrate called n insulator) is spreading. In this technology, a silicon single crystal thin film is used as the main part of the MOS transistor structure, and each MOS transistor is completely electrically insulated from the substrate, and there is an advantage in securing an operation margin and improving performance of the MOS transistor. However, it is said that the progress made by extending the technology that has continued for many years has come to a limit. That is, with the miniaturization, the breakdown voltage between the source and drain of the MOS transistor decreases, the operating margin decreases by lowering the power supply voltage, the problem of leakage current generation due to the necessity of thinning the gate insulating film, etc. .

On the other hand, research on nanotechnology aiming at future solid-state electronic devices has been actively promoted in various fields since the 1990s, and it is known that ultrafine crystal materials have characteristics due to quantum effects. It is named a dot. However, real microfabrication technology is difficult to realize, and only a theory and a special experiment are performed to prove it. As a device using the quantum effect, a resonant tunnel transistor (see Non-Patent Document 1) and a report of an experiment of a single-electron transistor (see Non-Patent Documents 2 and 3) are also made. However, these are experimental studies as individual elements, and no realization means to link them to large scale integrated electronic devices is shown.

Next, there is Patent Document 1 regarding utilization of the cluster deposition structure. However, the purpose of the patented technology is a power storage unit such as a solar cell, and is an individual component technology, which is a structure in which a combination of a cluster layer and another dielectric and metal is laminated. Therefore, the functions required for the cluster are different, and therefore no condition is given to the cluster size. That is, it is not a technology related to the realization of an electronic device that utilizes cluster characteristics influenced by the quantum effect. Also,
It is not a structure that allows a large number of electronic devices to be realized simultaneously by forming a film over a wide range in a plane.

In addition, there exists patent document 2 regarding a cluster production | generation technique. The cluster generation device of Patent Document 2 is an example of means for previously forming a uniform cluster of 5 nm or less.
In addition, non-patent document 4 has experimentally confirmed the possibility that a cluster having a fine size of several nanometers and a uniform size may be created.
Regarding the use of silicon particles for floating gates,
Non-Patent Document 5 and Non-Patent Document 6 presented at EDM (International Electron Devices Meeting) are discussed.

JP 2002-299601 “Accumulator” Japanese Patent Laid-Open No. 2001-158956 “Cluster Generation Method and Apparatus” “Proposal and Demonstration of New Devices Using Quantum Effects and Their Research” Koichi Maezawa, Nagoya University, http: // www. echo. nuee. nagoya-u. ac. jp / ~ maezawa / research. html “Efforts to Realize Single Electronic Devices—From NTT Science Plaza 2003” pcweb. mycom. co. jp / news / 2003/08/27/08. html “IEDM 2004-Single Electron Transistor Integrated Circuit Successfully Operated at Room Temperature” pcweb. mycom. co. jp / articles / 2004/12/14 / iedm2 / “Sequence ordering of silicon nanoblocks and practical application of thin film generation system”; Journal of Laser Processing, Vol. 10, No. 3, 2003.12. Paper number 22.3: “High Speed and Nonvolatile Si Nanocrystal Memory for Scaled Flash Technology using High Field-Sensitive Tunnel.” Article No. 26.2: “A 6V Embedded 90 nm Silicon Nanocrystalline Nonvolatile Memory” (Motorola, USA)

As described above, the integrated circuit technology has realized the integrated circuit by forming a large number of MOS devices by finely processing the surface of the silicon single crystal wafer by the lithography technology, but the MOS device approaches the limit in terms of operation principle. However, with the current lithography technology, it is difficult to realize an ultrafine process for realizing a single electron transistor for the time being. In other words, there is a large gap between the limits of the conventional semiconductor integrated circuit technology and the future quantum device technology, and a technology that continues the continuous evolution of the existing technology has been desired. In other words, in a region that cannot be achieved by means of creating a device by finely processing a silicon single crystal of the above silicon wafer by lithography technology and realizing an integrated circuit, a device that replaces a conventional MOS device is realized, and the integrated circuit is further improved. It is necessary to reduce energy with density.
The present invention has been made in view of the above circumstances, and realizes a wafer technology as a foundation for continuous development to an integrated circuit technology based on future quantum dots, and has a higher density and lower energy nanocluster integration. An object is to provide a substrate for an electronic device.

The present invention is based on the following concept. That is, the present invention has a cluster with a particle size of 5 nanometers or less (hereinafter referred to as nanocluster) that exhibits its quantum effect.
This is based on the concept of realizing a device by electrically controlling the electronic behavior of the nanocluster assembly as a structure. With the concept of handling nanocluster assemblies,
It can be easily integrated on a large scale with the processing technology of the current advanced semiconductor integrated circuit technology, which is still difficult to achieve in the nano-scale, and the operation as a device based on the quantum effect of the nanocluster component is Therefore, it is considered that functions will be exhibited even in a minute region where future MOS devices will be difficult due to operational limitations. Further progress will be made in microfabrication technology, and it will be possible to handle each nanocluster one by one, and if it reaches the stage where the function of each cluster as a quantum dot can be used, the integrated circuit can be realized. As described above, the basic concept based on the present invention is to provide a basic technology that enables continuous progress toward miniaturization, high integration, and low energy. It is partly used in current CMOS LSIs and demonstrates its power. At the same time, it is used for research and development of innovative devices that bridge the gap between LSIs and innovative LSIs symbolized by future single-electron transistors. Provide research tools for
This will enable future continuous development of LSI.

Specific means will be described below for each claim.
In order to solve the above-mentioned problem, the nanocluster substrate for integrated electronic device according to claim 1, nanoclusters having a substantially uniform particle diameter of 5 nanometers or less affected by the quantum effect are dispersed on the entire surface of the substrate, and the nanocluster mutual This is a substrate on which integrated circuits that form a homogeneous structure (hereinafter referred to as a film) and use this nanocluster film as an electronic device can be collectively produced.
In other words, a silicon thin film is conventionally mounted on a silicon wafer via an oxide insulating film as a high-value-added substrate to improve the performance of a silicon wafer, and an electronic device is realized using this silicon thin film. Although a substrate called SOI (Silicon on Insulator) is being used, the present invention enables realization of an electronic device using a nanocluster film by laying nanoclusters instead of the silicon thin film. .

Here, in order to form a homogeneous cluster film on the substrate, it is applied to the substrate with an average kinetic energy per atom of an appropriate cluster and a constant cluster application speed (number of clusters / area / time). In addition, a substance added for the purpose of terminating the dangling bonds of atoms appearing on the cluster surface in the process from the cluster formation to the cluster film formation, an insulating substance added for the purpose of controlling electrical conduction between the clusters, and the cluster A cluster film formed by aggregating a cluster composed of a plurality of types of atoms with its own constituent atoms (referred to as a composite cluster), or a cluster layer or a composite cluster gathers at an arbitrary location on a substrate to form a cluster layer It is possible to use integrated electronic circuits in which multiple electronic devices are integrated using the cluster assembly That.

When it is assumed to be used for an integrated electronic device, the magnitude of the electron transfer speed in the nanocluster film is one of the most necessary properties as the functionality of the cluster film. Substances added for the purpose of terminating the dangling bonds of atoms appearing on the cluster surface in the cluster film can cause an extreme decrease in the moving speed of electrons due to the dangling bonds acting as traps for electrons moving through the cluster film. There is a work to prevent.

According to a second aspect of the present invention, there is provided a method of forming a cluster group having a substantially uniform size with a diameter of 5 nm or less in a cluster generation container and spraying with a predetermined average kinetic energy per atom in the cluster. That is, the vapor generated by the laser irradiation of the solid material in the cluster generation vessel is confined in a specific space region, and the diameter is 5n by the coupling caused by the collision of the material atoms or molecules.
A cluster group having substantially uniform dimensions of m or less is formed, the cluster group formed in the specific space region is caused to flow out from a window provided in the cluster generation container, and the average kinetic energy per atom of the cluster has It is scattered on the substrate at a predetermined value that does not exceed the energy for breaking the interatomic bond.

As a specific example, a shock wave is generated in the inert gas filled in the cluster formation container by a material vapor pressure generated by means such as evaporating a solid material by intermittent laser beam irradiation. Reflected by the wall of the container, it concentrates on the vapor that has traveled, and the vapor pressure is confined in a specific space region for a specific time, and a nanocluster is formed by the combination of evaporated atoms or evaporated molecules.

Next, this cluster group is caused to flow out from the window of the cluster forming container and is deposited on the substrate. At this time, the accretion rate of the cluster to the substrate is set so that the average kinetic energy per atom in the cluster is 5 eV or less for breaking the interatomic bond of the atom.
With the above method, a substrate having a uniform nanocluster film in which nanoclusters having a diameter of 5 nm or less are spread on the substrate is completed. This is the invention described in claim 2.

In order to effectively apply to the integrated electronic device in the nanoelectronics field which is the object of the present invention, the substrate used for this needs to have a large substrate area and is economical. In response to a large substrate area, the process of spreading the clusters onto the substrate is performed while moving the substrate.
In order to realize economic efficiency, it is important that the cluster formation rate can be increased. For this purpose, the intensity of the irradiation laser beam of claim 2 is increased, and the generation of material vapor and the shock wave of the inert gas are generated at that time. First of all, it is necessary to design a cluster forming means that achieves both occurrences of the above. Furthermore, in the flow channel that flows the cluster group out of the formed cluster generation container window and directs it toward the substrate, the cross-sectional area of the flow channel is expanded, and the cluster is dispersed over a larger area of the substrate, so that a large-area and homogeneous cluster film is formed. The production conditions can be satisfied. Based on an understanding of these techniques, the proposal of the present invention becomes possible.

The cluster group formed to have a uniform dimension with a diameter of 5 nm or less according to claim 3 is characterized in that the cluster has a crystal structure. If it is assumed to be used for integrated electronic devices in the field of nanoelectronics, the electron transfer speed in the nanocluster film needs to be high, and scattering of disordered atoms due to lattice vibration is avoided to form an atomic arrangement order. Clusters or composite clusters with a crystal structure enable a large electron transfer rate in the nanocluster film.

The cluster group formed in a uniform dimension having a diameter of 5 nm or less according to claim 4 is characterized in that the cluster has a crystal structure and at the same time the cluster forms a periodic lattice structure on the substrate. And In order to obtain a large electron transfer rate in the nanocluster film on the premise of use in an integrated electronic device, it is necessary to reduce the scattering of electrons when electrons pass between the adjacent clusters in the nanocluster film. is there. The distance between the clusters is shortened, and at the same time, the adjacent clusters are bonded to each other through an insulating material such as an oxygen atom or a nitrogen atom, thereby causing disordered lattice vibration when electrons pass through the clusters. Electron scattering is reduced, and the probability of electron transmission is determined by the tunnel current controlled by the electron barrier of the insulating material that bonds between the clusters. A nanocluster film formed by an assembly of composite clusters formed by bonding the clusters having a uniform dimension of 5 nm or less in diameter through an insulating material, the composite clusters form a periodic lattice structure. A nanocluster film with a high electron transfer speed is realized by a tunneling current that is arranged and controlled by an electron barrier of an insulating material.

The invention according to claim 5 relates to the nanocluster substrate for integrated electronic device according to claim 1, wherein a silicon substrate coated with an electrical insulating film is used as a substrate on which the cluster group is dispersed. To do.
In this configuration, a substrate in which an insulating film is coated on the surface of a silicon wafer currently used in a semiconductor integrated circuit is applied as a substrate on which clusters are dispersed. Thereby, the substrate for a nanocluster integrated electronic device can be applied to the manufacture of a nanocluster integrated electronic device using a current semiconductor integrated circuit manufacturing device. In addition, the nanocluster film in a specific area on the wafer can be removed by etching, and a normal semiconductor integrated circuit can be formed directly on the silicon substrate at that portion, realizing an integrated nanocluster integrated electronic device. This is a possible substrate.

The invention according to claim 6 relates to the nanocluster substrate for an integrated electronic device according to claim 1, wherein an electron barrier between individual clusters of the cluster film is a range in which a direct tunnel current flows. And
Here, the movement of electrons by direct tunneling means that an insulating material such as an oxygen atom or a nitrogen atom existing between adjacent clusters chemically bonds between adjacent clusters, thereby causing a disorder of crystallinity between the clusters. An electron barrier is formed without being formed, and electrons move through the electron barrier due to a transmission probability of electrons depending on a potential gradient before and after the electron barrier.

In the configuration of claim 6, the width and height of the electron barrier formed by the insulating material that bonds the individual clusters of the cluster film are set so that the direct barrier current can flow through the electron barrier. is there. As a result, electrons in a specific energy level in the cluster assembly can move by a tunnel current when each cluster is at the same potential, and when the clusters are not at the same potential, the tunnel current flows. Can be used to switch the flow of information or function as a memory, and to realize electronic devices with these functions.
It is possible to realize a nanocluster integrated electronic device in which a large number of the electronic devices are formed on the substrate.

The invention according to claim 7 relates to the nanocluster substrate for an integrated electronic device according to claim 1, wherein the electronic barrier between the individual clusters of the cluster film is set to a value that prevents the flow of direct tunnel current. It is characterized by setting.
In this configuration, the thickness of the electrically insulating layer between individual clusters of the nanocluster film is set to a value at which the electronic barrier prevents the flow of direct tunnel current. In this case, movement of electrons between the clusters does not occur in a specific range of the electric field applied between the nanoclusters. When a strong electric field exceeding a specific range is applied, the width of the electron barrier is narrowed, so that the probability of electron transmission increases and electron movement occurs. Compared to the case of claim 6, it is possible to create a faster electron flow by applying a higher voltage, and it is possible to realize a memory function that holds electrons more stably. Claim 7 proposes a substrate capable of realizing a nanocluster integrated electronic device using an electronic device utilizing such a function.

The invention according to claim 8 relates to the nanocluster substrate for integrated electronic device according to claim 1, wherein a thin layer of silicon is formed on an object whose surface is an insulator as a substrate to which the cluster group is dispersed. The surface of the substrate is covered with an insulating thin layer.
In this configuration, as the substrate on which the cluster group according to claim 1 is dispersed, a substrate in which a thin layer of silicon is formed on an object whose surface is an insulating material is covered with a thin insulating layer. It was. This is the so-called SOI (S used in current semiconductor integrated circuits.
The nanocluster film according to claim 1 is formed on a silicon on insulator substrate through a thin insulating film. If the nanocluster substrate for an integrated electronic device according to claim 8 is used, the silicon thin layer can be used as an electrode of a nanocluster assembly, and the behavior of electrons in the nanocluster film can be reduced. It is possible to realize an electronic device that functions by linking the behavior of electrons in the silicon thin layer existing under the sandwich, and a nanocluster integrated electronic device including this device can be realized. Furthermore, if this nanocluster substrate for integrated electronic devices is used, a device structure for bonding the cluster film and the silicon thin layer under the film is formed in advance in mass production as a common substrate, and individual nanocluster integrated electronic devices are formed. Can be manufactured economically in a short time. That is, by increasing the added value of the common substrate, manufacturing efficiency and economy can be improved.

The invention according to claim 9 relates to the nanocluster substrate for integrated electronic device according to claim 1, wherein an integrated circuit for manufacturing an integrated electronic device having a specific function on a semiconductor substrate is used as a substrate to which the cluster group is dispersed. A substrate processed by a part of the processing steps is used.
This configuration is characterized in that a substrate on which a part of a processing step for manufacturing a functional device is processed on a semiconductor substrate is used as a substrate on which the cluster group according to claim 1 is dispersed. In other words, a functional design is made in accordance with the purpose of use of the apparatus, and a substrate whose manufacturing process is completed halfway is used. This enables a more flexible usage of the electronic device using the nanocluster film in the integrated electronic device. For example, if a cluster film is formed on a substrate after the step of forming a CMOS transistor circuit via an insulating film to produce an electronic device, a circuit stack type integrated electronic device is realized. That is, it is possible to further integrate at a higher density. If this method is expanded, it is possible to realize a multilayer stacked integrated circuit by placing an insulating film on the electronic device made of the cluster and placing the cluster film thereon.

The invention described in claim 10 relates to the nanocluster substrate for an integrated electronic device according to claim 1, wherein a bulk insulating substrate is used as an object for dispersing the cluster group as the substrate for dispersing the cluster group. It is characterized by.
In this configuration, a bulk insulating substrate is used as a substrate on which the cluster group according to claim 1 is dispersed. Conventionally, a semiconductor integrated circuit has been realized by forming an electronic device in a semiconductor crystal called silicon. It is difficult to form a silicon single crystal film on an insulating material substrate such as glass or plastic, and so-called thin film transistors having limited performance can be formed only by silicon polycrystals. However, since the cluster film formation according to claim 1 can also be formed on an insulating substrate, an integrated electronic device can be formed on an insulating material substrate such as glass or plastic.

The invention according to claim 11 relates to the nanocluster substrate for integrated electronic device according to claim 1, wherein in the process of forming the cluster film, conditions for different cluster fixing properties are previously applied to the substrate on which the cluster group is dispersed. By applying, clusters or composite clusters are automatically assembled according to a desired pattern when the clusters are dispersed to form a cluster layer.

In this configuration, in the cluster film forming process of claim 1, a difference is made in advance to the ease of adhesion of the clusters to the substrate on which the clusters are dispersed, and the cluster film is formed preferentially in the areas where adhesion is likely to occur. The process can be completed when the cluster film is formed on a necessary portion before the cluster film is formed on the entire surface of the substrate, and the time for forming the cluster film can be shortened. At the same time, it has the feature that clusters can be arranged according to the partial shape. This is because the attachment starts along the edge of the portion where the cluster is easily attached, and the arrangement of the clusters advances toward the inside of the portion where the cluster is easily attached on the basis thereof.

The invention according to claim 12 relates to the nanocluster substrate for integrated electronic device according to claim 1,
In the process of forming the cluster film, a predetermined concavo-convex microstructure is formed in advance on the substrate on which the cluster group is to be dispersed, and the cluster adherence between the concave portion and the convex portion is utilized to automatically change the cluster. And a cluster layer is formed by aggregating clusters or composite clusters according to a desired pattern.

In this configuration, in the cluster film forming process of claim 1, when a fine uneven structure is formed in advance on the substrate on which the clusters are dispersed by a technique such as etching, the uneven edge portion is compared with other flat portions. Therefore, since the arrangement strain of the atoms constituting the edge portion is large and the chemical reactivity is high, the cluster flying by the dispersion of the cluster group has a high probability of adhering to the edge portion. In the dispersion of the cluster group, subsequent flying clusters diffuse on the substrate and gather together with the already attached clusters to form a certain arrangement structure and stabilize, so that the edge portion has another portion. A cluster layer is preferentially formed compared to By utilizing the properties of this cluster, it is possible to manufacture a cluster film having a specific functional structure by forming a concavo-convex microstructure with a pattern necessary for a highly integrated electronic circuit.

As described above, according to the configuration of the present invention, in a region where an integrated circuit cannot be realized by a MOS device obtained by finely processing a silicon single crystal due to advancement of lithography technology,
It is possible to realize a device that replaces the S device, and to obtain an effect that the integrated circuit can be reduced in density and density.

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
[First Embodiment]
First, a nanocluster substrate for an integrated electronic device according to a first embodiment of the present invention will be described with reference to FIGS.
In this embodiment, there is a step of first creating a cluster group having a diameter of 5 nm or less, and then a step of dispersing the resulting clusters on the substrate is performed in time series to create a substrate for an integrated electronic device. Here, the material of the cluster can be either a semiconductor material or a metal material,
Here, silicon is taken as an example.

FIG. 1 is a schematic diagram illustrating the principle of a generation process for generating a cluster group in the method for manufacturing a nanocluster substrate for an integrated electronic device according to the first embodiment of the present invention. That is, this figure explains in principle the example of confining the material vapor in a specific space by vaporization of the solid material by the laser and the shock wave of the inert gas generated by the vapor pressure.
First, as shown in FIG. 1, a laser beam 2 is irradiated to a target 1 made of a silicon material installed at a point A in a container 5 to generate silicon vapor 3. The vapor pressure of the silicon vapor 3 bombards an inert gas, for example, He gas, present on the front surface of the silicon vapor 3 to generate a shock wave 4. The shock wave 4 is reflected by the container 5 and gathers so as to focus on the B region. At that time, the silicon vapor 3 moves in the container 5 and reaches the B region, and is confined in the inert gas collected by reflection of the silicon vapor. Form. It has been experimentally confirmed that the cluster 6 having almost the same size is created by this method.

FIG. 2 is a schematic view illustrating the principle of a spraying process in the method for manufacturing a nanocluster substrate for an integrated electronic device according to the first embodiment of the present invention.
In the spraying step, the cluster 6 formed in the container 5 is sprayed on the substrate to create an integrated electronic device substrate. The silicon cluster 6 having a diameter of 5 nm or less exhibits a quantum effect, and the nanocluster substrate for an integrated electronic device on which the cluster film having the quantum effect is mounted is obtained by flowing it out of the container 5 and spraying it on the substrate. Realize. If the cluster group generation process shown in FIG. 1 is used, the outflow from the window of the container 5 is caused by the pressure difference between the gas pressure when confined by the inert gas shock wave 4 in which the cluster 6 is formed and the gas pressure outside the container. It is performed in the form of erupting. The velocity of the flow is a value of 5 eV or less of the energy for breaking the interatomic bond of the atoms, although the average kinetic energy per atom in the cluster is as high as 1 eV, for example. In this example, a substrate on which the clusters 6 are dispersed is a silicon wafer 7 whose surface is covered with a silicon oxide film 8 made of an insulating material. The diameter of the silicon wafer 7 is 6 inches, 8 inches, or 12 inches currently used for mass production.
It is possible to realize the integrated electronic device by flowing the substrate for the nanocluster integrated electronic device to the current semiconductor integrated circuit manufacturing line.
Here, it is required to uniformly distribute the clusters on such a large-diameter substrate. This is realized by changing the relative positional relationship between the silicon wafer 7 and the cluster outflow window of the container 5. To do.

One of the important features of the present invention is that the process of forming a cluster and the process of forming a cluster film are made independent and clusters having appropriate kinetic energy are dispersed on the substrate. As a result, the cluster size is controlled in the container 5 for creating the cluster group to achieve the desired size cluster and the uniformity of the size, while the cluster film formation is independent over a wide area. In addition, a film having a uniform relationship between cluster particles is formed by the appropriate kinetic energy of the clusters when the clusters are dispersed.

Another feature of the present invention is that the cluster 6 formed in the container 5 is basically electrically neutral, and is accelerated by an electric field like a conventional ion cluster beam. Since it is not a thing, even if an impact is given to the substrate when spraying, the substrate is hardly damaged. Further, when a film is formed on the insulating substrate, charges are accumulated on the surface of the substrate, and there is an advantage that the film formation is not hindered.

FIG. 3 is a diagram showing an example of forming an electronic barrier between individual clusters in the spraying step of FIG. Fig. 3 (a) is an example in which the insulating material comes into contact with the insulating material before the cluster is dispersed and reaches the substrate. Fig. 3 (b) is an example where the insulating material reaches the substrate at the same time or after the cluster is dispersed and reaches the substrate. This is an example.
First, as shown in FIG. 3A, before the clusters 6 are dispersed and reach the substrate 7, the gaseous atmosphere 11 forms an insulating thin layer on the surface of the clusters 6 by the insulating material 10 being combined with the clusters 6. Exposed to. For example, when the gaseous atmosphere 11 is exposed to oxygen gas, oxygen atoms are bonded to the surplus bond joints of silicon atoms on the surface of the cluster 6, and the cluster 6
Oxygen atoms will cover the surface. In order to accelerate this bonding reaction, oxygen gas can be preheated. In this way, when an insulating thin layer is formed on the cluster surface before the cluster reaches the substrate, the thickness of the insulating layer attached to the cluster surface is limited, and the dimensions of the cluster after attachment are also aligned. After the cluster film is formed on the substrate, the distance between the clusters and the size of the electronic barrier are also uniform.

FIG. 3B shows an example in which the spaces between the individual clusters 6 are filled with the insulating material 10 at the same time or after the dispersed clusters 6 reach the substrate. Further, the surface of the cluster 6 can be eroded by a corrosive gas to be changed into an insulating material. After cluster 6 hits the substrate,
It moves while attracting other clusters to fill the substrate surface. In the process, an insulating thin layer made of the insulating material 10 can be covered on the surface of the cluster, and in this case, the insulating thin layer can be formed in a form bonded to the surface atoms of the cluster, so that the thickness of the layer is limited. And
A state in which the relationships between the clusters in the cluster film are also obtained. The gap between the clusters can be filled with a material gas that does not react with the surface atoms of the cluster 6, but in this case, the cluster spacing in the cluster film formed by the ratio of the density of the dispersed cluster group and the concentration of the material gas, etc. Is controlled. There is also a method of thickening the inter-cluster insulating layer by eroding and altering the clusters from the surface like, for example, oxidation after film formation.
In addition to this example, oxygen or hydrogen atoms may be automatically added to the cluster surface in the cluster group formation container, and an electronic barrier between clusters may be formed after film formation. In addition, the condition of the size of the electronic barrier formed in this way can be set.

FIG. 4 is a cross-sectional view showing the effectiveness of the nanocluster substrate for an integrated electronic device according to the first embodiment of the present invention compared to a conventional substrate for a semiconductor integrated circuit. 4A, 4B, and 4C are cross sections of a nanocluster substrate for an integrated electronic device of the present invention, and FIGS. 4D and 4E are cross sections of a conventional silicon wafer for a semiconductor integrated circuit. is there.
First, as shown in FIG. 4D, in the case of a conventional silicon wafer 7 for a semiconductor integrated circuit,
The surface is covered with a thin oxide film 8. When an integrated circuit is manufactured from this silicon wafer 7, as shown in FIG. 4E, processing miniaturization is limited by the limit L of the current lithography technology. As described above, in the case of the prior art, the limitation determines the dimension of the gate electrode of the MOS transistor. However, when the lithography technology further advances and miniaturization progresses to several tens of nm, the operation of the MOS transistor As the limit is approached, implementation as an integrated circuit becomes extremely difficult.

On the other hand, in the nanocluster substrate for an integrated electronic device of the present invention, as shown in FIG. 4A, a film 9 that is an aggregate of nanoclusters of dimension d on the oxide film 8 on the surface of the silicon wafer 7.
Is forming. Then, as shown in FIG. 4B, electrodes can be formed using the current lithography technology to control the electrons in the cluster, and even if the lithography technology further advances in the future, the cluster will be the unit base. The electronic device to be used can cope with miniaturization. In other words, each cluster has a memory function for storing electrons, and each cluster is involved in the access and transfer function of electrons, so even if L becomes smaller as the miniaturization technology advances and the cluster aggregate becomes smaller. The cluster aggregate can exhibit a function as an electronic device.

In the future, as shown in FIG. 4C, the single cluster 6 of the nanocluster film 9 functions as a quantum dot and can be applied to an integrated electronic device that operates as a single electron transistor or memory cell.
Current CMOS LSI (Complementary Metal-Oxide S)
An example of a cluster aggregate that can exhibit its characteristics in the technology of an electronic large scale integration) is its use as a floating gate of a flash memory. Although the use of silicon particles for floating gates is already known, when the present invention is applied to a floating gate of a flash memory,
It has the merit that the density of clusters, which is a problem in the conventional example, can be easily increased, and the current on / off switching function can be more reliably performed.

[Second Embodiment]
Next, a substrate for a nanocluster integrated electronic device according to a second embodiment of the present invention will be described with reference to FIGS.
FIG. 5 shows a configuration of a nanocluster substrate for an integrated electronic device according to the second embodiment of the present invention (SO
It is sectional drawing which shows the board | substrate which added further added value to I part. FIG. 5A shows a state before pattern formation, and FIG. 5B shows a state after pattern formation.
As shown in FIG. 5A, the cross-sectional structure of the nanocluster substrate for integrated electronic devices is as follows: a silicon thin layer 7a with a silicon oxide film SiO ₂ 8 as an insulating film sandwiched between the surfaces of a silicon wafer (Si substrate) 7; A so-called SOI substrate formed with a thin silicon oxide film SiO on its surface
_A cluster film (2 layers) 9a is formed on the ₂ 8b. The example in this figure shows the case where the number of layers of the cluster is two, but the number of layers may be one or even a large number of layers.

Next, as shown in FIG. 5B, using this substrate as a common substrate, patterning of the cluster film and processing of the silicon thin layer are performed in accordance with the product of the integrated electronic device, electrode attachment, wiring, etc. An LSI product is completed by adding a process. In other words, this nanocluster substrate for integrated electronic devices is a substrate with added value added to SOI, and by sharing this process, the nanocluster substrate can be made economical while reducing the manufacturing time. The characteristics of can be utilized. Further, the above-described flash memory can be configured on an SOI substrate, and higher speed and lower power operation can be obtained.

FIG. 6 is a perspective view showing a configuration of a nanocluster substrate for an integrated electronic device according to the second embodiment of the present invention.
The nanocluster substrate for an integrated electronic device according to the present embodiment is characterized in that the dimensions of the clusters are uniform and the cluster group is dispersed on the substrate at an appropriate speed, whereby a lattice structure is formed on the substrate. It is possible to form a cluster film having a specific arrangement. This has also been confirmed experimentally in the past.

FIG. 6 shows an example of a cluster film (three layers) 9b in which clusters are stacked in three layers, but a two-dimensional lattice structure can be realized in the same manner with the above-described single-layer cluster film 9 and two-layer cluster film 9a. . In addition, this figure is shown schematically and is not accurate, but in any case, by creating such a regular structure, the electron barrier between the clusters is made uniform, and the regular structure It is possible to generate an electron wave corresponding to the periodicity of and to realize a cluster film having a quantum effect. Therefore, the present invention makes it possible to realize a nanocluster integrated electronic device including an innovative electronic device utilizing the quantum effect.

[Third Embodiment]
Next, a nanocluster substrate for integrated electronic devices according to a third embodiment of the present invention will be described.
FIG. 7 is a diagram illustrating a manufacturing process of a nanocluster substrate for an integrated electronic device according to the third embodiment of the present invention. FIG. 7A is a cross-sectional view showing a spraying process, FIG. 7B is a cross-sectional view showing a film forming process, and FIG. 7C is a plan view showing a state after forming a cluster film.

In the present embodiment, as shown in FIG. 7A, in the cluster film formation process, as means for providing a partial difference in the ease of adhesion of the clusters 6 in advance to the substrates 7 on which the clusters 6 are dispersed,
This is an example in which a step 12 is provided on the surface of the substrate 7. When the cluster 6 is spread on the substrate 7, the cluster 6 is accommodated in the step 12. At that time, the cluster 6a dispersed from the center of the step 12 moves from the cluster 6a to the cluster 6b to the edge of the step 12, and as shown in the clusters 6b and 6c, the surface of the surface where the difference 12 is initially lowered is shown. As shown in FIG. 7 (b), the film is formed more quickly in the surface where the step 12 is lowered. The remaining cluster 6 is step 12
And remains on the substrate 7. This phenomenon depends on the arrival speed of the cluster 6 to the substrate 7, and the cluster 6 has energy that can move on the substrate 7 after reaching the substrate 7. If the upper cluster 6 is removed, as shown in the plan view of FIG. 7C, an array of clusters 6 with reference to the edge portion of the step can be obtained. In this arrangement, in addition to the square lattice as shown in FIG. 7 (c), there are also clusters in which the clusters 6 are shifted by half for each column. In any case, it has the characteristics of uniformity of electrical characteristics and the possibility of utilizing electron waves by taking a regular structure. Furthermore, when the time for spraying the clusters 6 on the substrate 7 is set so that a desired cluster film is formed on the low surface of the step 12, the film is formed in a shorter time than when the cluster film is formed on the entire surface of the substrate 7. The formation process can be completed.

As mentioned above, although embodiment of this invention was described, this invention is not limited to these embodiment, A various change is possible in the range which does not deviate from the meaning of this invention.
For example, a nanocluster substrate for an integrated electronic device can be manufactured by using the multilayer substrate in the second embodiment described above and the step in the third embodiment together.

It is the schematic which shows the principle of the production | generation process which produces | generates the cluster group in the manufacturing method of the nanocluster board | substrate for integrated electronic devices which concerns on 1st Embodiment of this invention. It is the schematic which shows the cluster distribution process in the manufacturing method of the nanocluster board | substrate for integrated electronic devices which concerns on 1st Embodiment of this invention. It is a figure which shows the example which forms the electronic barrier between each cluster in the dispersion | distribution process of FIG. It is sectional drawing which shows the effectiveness of the nanocluster board | substrate for integrated electronic devices which concerns on 1st Embodiment of this invention. (A), (b), (c) shows the board | substrate by this invention, (d), (e) is sectional drawing which shows the conventional board | substrate. It is sectional drawing which shows the structure (board | substrate which added the added value to the SOI part) of the nanocluster board | substrate for integrated electronic devices which concerns on 2nd Embodiment of this invention. (A) is a state before pattern formation, (b) is sectional drawing which shows the state after pattern formation. It is a perspective view which shows the structure (3 layers) of the nanocluster board | substrate for integrated electronic devices which concerns on 2nd Embodiment of this invention. It is a figure which shows the process in which the nanocluster board | substrate for integrated electronic devices which concerns on 3rd Embodiment of this invention is manufactured using a level | step difference. (A) is sectional drawing which shows a dispersion | distribution process, (b) is sectional drawing which shows a film formation process, (c) is a top view which shows the state after cluster film formation.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Silicon material, 2 ... Laser beam, 3 ... Steam, 4 ... Shock wave, 5 ... Container (specific space area),
6, 6a, 6b, 6c ... clusters, 7 ... Si substrate (silicon wafer), 7a ... Si thin film, 8 ... SiO ₂ (insulating thin layer), 8a ... SiO ₂ thin film, 9 ... cluster film (single layer), 9a ... Cluster film (2 layers), 9b ... Cluster film (3 layers), 10 ... Insulating material, 11 ... Insulating material attached to the cluster, 12 ... Step

Claims (12)

A cluster group composed of almost uniform clusters each having a particle size of 5 nm or less formed in advance is dispersed on the substrate with the average kinetic energy per cluster atom and the cluster dispersion rate set to predetermined values. A cluster film formed by
The clusterer film is formed by assembling a substance that terminates the dangling bonds of atoms that appear on the cluster surface in the process from cluster formation to film formation in the cluster group dispersion, or a composite cluster in which an insulating material is added to the surface. Become
A nanocluster substrate for an integrated electronic device capable of mounting a plurality of integrated electronic circuits in which a plurality of electronic devices utilizing a cluster assembly are integrated at an arbitrary location on the substrate. The substantially uniform cluster group of 5 nm or less is formed by confining vapor generated by laser irradiation of a solid material in a cluster generation container in a specific space region and causing collisions between material atoms or molecules. It is sprayed at a predetermined spray rate from the window provided in the container toward the substrate, and the average kinetic energy per atom of the cluster is a predetermined value that does not exceed the value that breaks the interatomic bond of the atom. The nanocluster substrate for an integrated electronic device according to claim 1. 2. The nanocluster substrate for an integrated electronic device according to claim 1, wherein the substantially uniform cluster group of 5 nm or less is composed of clusters having a crystal structure. Each cluster of the cluster film has a crystal structure, and a composite cluster formed by bonding adjacent clusters via an insulating material forms a periodic lattice structure on the substrate and arranges it. The nanocluster substrate for an integrated electronic device according to claim 1. 2. The nanocluster substrate for an integrated electronic device according to claim 1, wherein a silicon substrate coated with an electrical insulating film is used as the substrate on which the cluster group is dispersed. The insulating material of the cluster assembly forming the cluster film is characterized in that a predetermined electronic barrier is formed between adjacent clusters in the cluster film, and the electronic barrier is in a range in which a direct tunnel current flows. The nanocluster substrate for an integrated electronic device according to claim 1. 2. The nanocluster substrate for an integrated electronic device according to claim 1, wherein an electronic barrier between individual clusters of the cluster film is set to a value that prevents a direct tunnel current from flowing. The substrate on which the cluster group is dispersed is a substrate in which a surface of a substrate in which a thin layer of silicon is formed on an object having an insulating surface is covered with an insulating thin layer. Nanocluster substrate for integrated electronic devices. 2. The integrated electronic device according to claim 1, wherein the substrate on which the cluster group is dispersed is a substrate obtained by processing a part of a processing step for manufacturing an integrated electronic device having a specific function on a semiconductor substrate. Nanocluster substrate. 2. The nanocluster substrate for an integrated electronic device according to claim 1, wherein a bulk insulating substrate is used as an object on which the cluster group is dispersed as the substrate on which the cluster group is dispersed. In the process of forming the cluster film, a cluster layer according to a desired pattern is automatically formed during cluster distribution by preliminarily applying conditions with different cluster adhesion to the substrate on which the cluster group is dispersed. The nanocluster substrate for an integrated electronic device according to claim 1. In the process of forming the cluster film, a predetermined concavo-convex microstructure is formed in advance on the substrate on which the cluster group is to be dispersed, and the property that the adhesiveness of the clusters in the concave and convex portions is different is used to follow the desired pattern. The nanocluster substrate for an integrated electronic device according to claim 1, wherein a cluster layer is formed.

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