JP2006294730A - Method and apparatus of manufacturing semiconductor apparatus - Google Patents

Method and apparatus of manufacturing semiconductor apparatus Download PDF

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Publication number
JP2006294730A
JP2006294730A JP2005110765A JP2005110765A JP2006294730A JP 2006294730 A JP2006294730 A JP 2006294730A JP 2005110765 A JP2005110765 A JP 2005110765A JP 2005110765 A JP2005110765 A JP 2005110765A JP 2006294730 A JP2006294730 A JP 2006294730A
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circuit board
semiconductor element
bump
thermosetting resin
semiconductor device
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Japanese (ja)
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Kumiko Nomura
久美子 野村
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Panasonic Holdings Corp
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Matsushita Electric Industrial Co Ltd
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Priority to JP2005110765A priority Critical patent/JP2006294730A/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of manufacturing a semiconductor apparatus by which positional accuracy of mounting a semiconductor device to the electrode surface of a circuit board can be improved, and electric connection reliability and narrow pitch can be achieved by making the shape of a bump uniform. <P>SOLUTION: A bump (3) is formed on the electrode surface of a semiconductor device (2), a thermosetting resin (5) that is insulative and contains no conductive particle is interposed between a circuit board (6) and the semiconductor device (2), and then the semiconductor device is made opposite to the bump (3). While they are heated, the semiconductor device (2) is pressed down to the circuit board (6), and the thermosetting resin (5) is cured by heat while the warpage of the circuit board (6) is being corrected, and then the semiconductor device (2) and the circuit board (6) are bonded so as to electrically connect both electrodes. In this case, after the bump (3) formed on the electrode surface of the semiconductor device (2) is shaped to a desired shape, the bump is pressed by the circuit board (6). <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

本発明は半導体装置の製造方法及び半導体装置の製造装置に関し、特にフリップチップ実装技術に関するものである。   The present invention relates to a semiconductor device manufacturing method and a semiconductor device manufacturing apparatus, and more particularly to a flip chip mounting technique.

近年、電子回路基板は多くの分野の製品に使用されるようになり、特に最近では携帯機器の増加から電気回路基板の小型化が要求されるようになった。このような要求に応えるため、半導体素子を従来のパッケージでなく、裸のまま回路基板に搭載するフリップチップ実装方法が提案されている。   In recent years, electronic circuit boards have come to be used for products in many fields, and in recent years, the size of electric circuit boards has been demanded due to the increase in portable devices. In order to meet such a demand, a flip chip mounting method has been proposed in which a semiconductor element is mounted on a circuit board as it is, instead of a conventional package.

従来の電子回路基板へ半導体素子を裸のまま接合する方法としては、熱硬化性樹脂シートを回路基板電極面側に貼りつけた後、バンプ先端の鋭角な部分で樹脂シートを突き破り対向する配線基板の電極に圧接と同時に加熱することにより電気的に接続を維持するという技術が知られている。   As a method for joining a semiconductor element to a conventional electronic circuit board while bare, a thermosetting resin sheet is pasted on the circuit board electrode surface side, and then the wiring board facing through the resin sheet at an acute angle portion of the bump tip A technique is known in which electrical connection is maintained by heating the electrode simultaneously with pressure contact.

図６は従来の半導体装置の製造方法における製造工程の一例を示す工程図である。図中、１は圧着ツール、２は半導体素子、３はバンプ、５は熱硬化性樹脂、６は回路基板を示す。   FIG. 6 is a process diagram showing an example of a manufacturing process in a conventional method for manufacturing a semiconductor device. In the figure, 1 is a crimping tool, 2 is a semiconductor element, 3 is a bump, 5 is a thermosetting resin, and 6 is a circuit board.

まず、図６（ａ），（ｂ）に示すように半導体素子２の電極面上にバンプ３を形成する。次に、図６（ｃ）に示すように回路基板６の電極面側へ熱硬化性樹脂シート５を貼りつけ、バンプ３を形成した半導体素子２を反転させ、圧着ツール１により回路基板６の電極面と対向させる。次に、半導体素子２を図６（ｄ）に示すように上から加圧しバンプ３と回路基板６の電極を接合させると同時に加熱し、熱硬化性樹脂５を硬化させてバンプ３と電極を接続させる。   First, bumps 3 are formed on the electrode surface of the semiconductor element 2 as shown in FIGS. Next, as shown in FIG. 6C, the thermosetting resin sheet 5 is attached to the electrode surface side of the circuit board 6, the semiconductor element 2 on which the bumps 3 are formed is inverted, and the crimping tool 1 is used to reverse the circuit board 6. It is made to oppose with an electrode surface. Next, as shown in FIG. 6D, the semiconductor element 2 is pressed from above to heat the bump 3 and the electrode of the circuit board 6 at the same time and is heated to cure the thermosetting resin 5 so that the bump 3 and the electrode are bonded. Connect.

しかしながら、図６（ｅ）に示すように使用するバンプ３の先端部の位置や先端部の高さばらつきなどバンプ３の形状精度に異常があると半導体素子２を上から加圧したときに、図６（ｆ）に示すようにバンプ３が正規の位置に収まらずにズレを生じ、最終的には図６（ｇ）に示すような不満足な形状に成形されてしまう結果となる。   However, when the semiconductor element 2 is pressed from above if there is an abnormality in the shape accuracy of the bump 3 such as the position of the tip of the bump 3 to be used and the height variation of the tip as shown in FIG. As shown in FIG. 6 (f), the bump 3 does not fit in the normal position and is displaced, resulting in an unsatisfactory shape as shown in FIG. 6 (g).

このように、使用するバンプ３の先端部の位置、先端部の高さばらつきなどバンプの形状精度は狭ピッチ化と関連する接続位置精度、接続の信頼性に対して重要な要素となる。   In this way, the shape accuracy of the bumps, such as the position of the tip of the bump 3 to be used and the height variation of the tip, is an important factor for the connection position accuracy and connection reliability associated with narrowing the pitch.

従来バンプ形状を均一にする技術としては、例えば特許文献１に記載されているように、半導体素子と平行な台にバンプを形成した電極面側を形成させて上から加圧し、バンプ先端を潰して平らにするというレベリング技術が用いられている。
特開平１−９１４４０号公報 Conventionally, as a technique for making the bump shape uniform, for example, as described in Patent Document 1, an electrode surface side on which a bump is formed is formed on a stage parallel to a semiconductor element, pressed from above, and the tip of the bump is crushed. Leveling technology is used.
Japanese Unexamined Patent Publication No. 1-91440

しかしながら上記従来の製造方法においては、必要なバンプの高さを確保するのが容易で、かつ、先端部を鋭角にすることのできる金線を用いたスタッドバンプ形成技術を利用して台座のボール部を半導体素子の電極パッド上に圧着した後、上部でワイヤーを引きちぎるボールバンプを用いるが、この方法では台座になるボールが圧着される位置精度やワイヤーを引きちぎるため先端部のチップ電極面上に対する位置精度、先端部となるボール上部に残るワイヤーの長さの変動等が電気的接続を構成する上で重要な要素であるバンプ形状、形成精度の変動ばらつきとなり、大きな問題点となっていた。   However, in the above-described conventional manufacturing method, it is easy to secure the necessary bump height and the ball of the pedestal is made using a stud bump forming technique using a gold wire capable of making the tip part an acute angle. The ball bump that tears the wire at the top is used after crimping the part on the electrode pad of the semiconductor element, but in this method the position accuracy of the ball that becomes the base is crimped and the tip electrode surface on the tip electrode surface to tear the wire Positional accuracy, fluctuations in the length of the wire remaining on the top of the ball, which is the tip, etc., caused variations in bump shape and formation accuracy, which are important factors in constructing electrical connections, and this was a major problem.

本発明は上記従来の問題点を解決するものであり、バンプ形状の均一化を図ることにより、回路基板の電極面へ半導体素子が実装される位置精度を向上させ、電気的接続信頼性向上と狭ピッチ化を実現できる半導体装置の製造方法を提供することを目的とする。   The present invention solves the above-mentioned conventional problems, and by making the bump shape uniform, the positional accuracy of mounting the semiconductor element on the electrode surface of the circuit board is improved, and the electrical connection reliability is improved. It is an object of the present invention to provide a method for manufacturing a semiconductor device capable of realizing a narrow pitch.

前記目的を解決するために、本発明の半導体装置の製造方法は、半導体素子の電極面上にバンプを形成すると共に、回路基板と半導体素子との間に絶縁性で導電粒子を含まない熱硬化性樹脂を介在させて前記バンプと対向させ、加熱しながら前記半導体素子を前記回路基板に押圧し、前記回路基板の反り矯正を行いながら前記熱硬化性樹脂を熱により硬化させ、前記半導体素子と前記回路基板を接合して両電極を電気的に接続するようにした半導体素子の製造方法において、半導体素子の電極面上に形成したバンプを所望の形状に整形した後、これらバンプが回路基板に押圧されるようにしたものであり、また、半導体素子の電極面上にバンプを形成すると共に、回路基板と半導体素子との間に絶縁性で導電粒子を含まない熱硬化性樹脂を介在させて前記バンプと対向させ、加熱しながら前記半導体素子を前記回路基板に押圧し、前記回路基板の反り矯正を行いながら前記熱硬化性樹脂を熱により硬化させ、前記半導体素子と前記回路基板を接合して両電極を電気的に接続するようにした半導体素子の製造方法において、半導体素子の電極面上に形成したバンプを所望のバンプ形状と同一の凹みを設けた型に押し当ててこれを所望のバンプ形状に整形した後、これらバンプが回路基板に押圧されるようにしたものである。   In order to solve the above-described object, a method for manufacturing a semiconductor device according to the present invention includes forming a bump on an electrode surface of a semiconductor element, and thermally curing the circuit board and the semiconductor element without insulating conductive particles. The semiconductor element is opposed to the bumps with an interstitial resin interposed therebetween, and the semiconductor element is pressed against the circuit board while heating, and the thermosetting resin is cured by heat while correcting the warp of the circuit board, and the semiconductor element In the method of manufacturing a semiconductor device in which the circuit boards are joined and the electrodes are electrically connected, after the bumps formed on the electrode surfaces of the semiconductor elements are shaped into a desired shape, the bumps are formed on the circuit board. In addition, bumps are formed on the electrode surface of the semiconductor element, and a thermosetting resin that is insulative and does not contain conductive particles is interposed between the circuit board and the semiconductor element. The semiconductor element is pressed against the circuit board while being heated, and the thermosetting resin is cured by heat while correcting the warp of the circuit board, and the semiconductor element and the circuit board are In a method for manufacturing a semiconductor element in which both electrodes are electrically connected by bonding, a bump formed on the electrode surface of the semiconductor element is pressed against a mold having a recess having the same shape as the desired bump. After shaping into a desired bump shape, these bumps are pressed against the circuit board.

また、本発明の半導体装置の製造装置は、半導体素子の電極面上にバンプを形成させる装置と、熱硬化樹脂を回路基板へ供給する装置と、前記回路基板の電極と半導体素子の電極に形成されたバンプとを対向させ位置合せする装置と、前記熱硬化性樹脂を加熱する加熱装置と、前記加熱装置により前記熱硬化性樹脂を加熱しながら前記半導体素子を前記回路基板に押圧し、前記回路基板の反り矯正を行いながら前記半導体素子と前記熱硬化性樹脂を熱により硬化させ、前記半導体素子と前記回路基板を接合して両電極を電気的に接続する加圧装置を有する半導体装置の製造装置において、半導体素子の電極面上にバンプ形成後、バンプ形状を所望の形状に整形するため型に押し当てる装置をさらに備えたものである。   The semiconductor device manufacturing apparatus according to the present invention includes a device for forming bumps on an electrode surface of a semiconductor element, a device for supplying thermosetting resin to a circuit board, and an electrode for the circuit board and an electrode for the semiconductor element. A device for aligning the bumps facing each other, a heating device for heating the thermosetting resin, and pressing the semiconductor element against the circuit board while heating the thermosetting resin by the heating device, A semiconductor device having a pressurizing device that cures the semiconductor element and the thermosetting resin by heat while correcting warping of the circuit board, and joins the semiconductor element and the circuit board to electrically connect the electrodes. The manufacturing apparatus further includes an apparatus for pressing the bump shape on the electrode surface of the semiconductor element and then pressing the bump shape into a desired shape.

本発明によれば、バンプ形状の均一化を図ることにより、配線基板電極面への実装位置精度を上げることができ、また、バンプ先端を均一に尖らせることによりフリップチップ実装において配線基板に絶縁性熱硬化性樹脂シートを貼り付けた後チップを実装させる場合でも、これが樹脂シートを突き破り、電気的接続信頼性と狭ピッチ化を容易に実現することができる。   According to the present invention, it is possible to improve the mounting position accuracy on the wiring board electrode surface by making the bump shape uniform, and insulate the wiring board in the flip chip mounting by uniformly sharpening the tip of the bump. Even when the chip is mounted after attaching the heat-curable thermosetting resin sheet, it can break through the resin sheet and easily realize electrical connection reliability and narrow pitch.

以下、本発明の各実施の形態について図面を参照しながら説明する。なお、前記従来のものと同一の部分については同一符号を用いるものとする。   Hereinafter, embodiments of the present invention will be described with reference to the drawings. In addition, the same code | symbol shall be used about the same part as the said conventional thing.

（実施の形態１）
図１は本発明半導体装置の製造方法の実施の形態１における基本工程を概念的に示す説明図、図２は本発明半導体装置の製造方法の実施の形態１における製造工程を示す工程図、図３は図２の製造工程で用いられるバンプ整形用型の各例を示す構成図、図４は図３のバンプ整形用型により成形されるバンプの各例を示す説明図である。 (Embodiment 1)
FIG. 1 is an explanatory diagram conceptually showing the basic steps in the first embodiment of the method for manufacturing a semiconductor device of the present invention, and FIG. 3 is a block diagram showing each example of a bump shaping mold used in the manufacturing process of FIG. 2, and FIG. 4 is an explanatory view showing each example of a bump formed by the bump shaping mold of FIG.

各図において、１は圧着ツール、２は半導体素子、３はバンプ、４は型、５は熱硬化性樹脂シート、６は回路基板を示す。   In each figure, 1 is a crimping tool, 2 is a semiconductor element, 3 is a bump, 4 is a mold, 5 is a thermosetting resin sheet, and 6 is a circuit board.

本発明半導体装置の製造方法の基本工程としては、まず、図１（ａ）に示すように半導体素子２の電極面上に引きちぎり式のバンプ３を形成し、予め用意した所望のバンプ形状と同一の凹みを設けた型４に半導体素子２のバンプ形成面を対向させ、次に図１（ｂ）に示すように圧着ツール１により上から押し当てバンプを整形する。この時用いる型４の材質としては、金属、セラミックスなどが採用される。バンプ整形の基本工程としてはこのようになるが以下回路基板６に半導体素子２が接合されるまでの全工程について説明する。   As a basic process of the method for manufacturing a semiconductor device of the present invention, first, as shown in FIG. 1A, a tear-off bump 3 is formed on the electrode surface of the semiconductor element 2, and a desired bump shape prepared in advance is obtained. The bump forming surface of the semiconductor element 2 is made to face the mold 4 provided with the same recess, and then the bump is shaped by pressing from above with the crimping tool 1 as shown in FIG. As the material of the mold 4 used at this time, metal, ceramics, or the like is employed. Although the basic process of bump shaping is as described above, the entire process until the semiconductor element 2 is bonded to the circuit board 6 will be described below.

まず、図２（ａ）に示す回路接続用の電極を有する半導体素子２に図２（ｂ）に示すようにその各電極にバンプ３を形成する。次に図２（ｃ）に示すように予め用意した所望のバンプ形状と同一の凹みを設けた型４に半導体素子２のバンプ形成面を対向させ、次に図２（ｄ）に示すように圧着ツール１により上から押し当てバンプを整形する。次に回路基板６の電極面側へシート状の熱硬化性樹脂もしくは液状の熱硬化性樹脂５を貼り付けまたは塗布したものを予め用意し、図２（ｅ）に示すように前記バンプ３を整形した後の半導体素子２をバンプ形成面が回路基板６の電極上に載るように位置合わせを行い回路基板６上に載置する。次に、図２（ｆ）に示すように半導体素子２の裏面上から圧着ツール１により半導体素子２に圧力を加え、半導体素子２のバンプ３と回路基板６の電極を圧着させた状態を維持しながら加熱を行うことにより、図２（ｇ）に示すように熱硬化性樹脂５を硬化させ、半導体素子２と回路基板６を接合すると共に、バンプ３と配線とを電気的に接続し、図２（ｈ）に示すように完成する。   First, as shown in FIG. 2B, bumps 3 are formed on the respective electrodes of the semiconductor element 2 having circuit connection electrodes shown in FIG. Next, as shown in FIG. 2 (c), the bump forming surface of the semiconductor element 2 is made to face the mold 4 provided with the same depression as the desired bump shape prepared in advance, and then as shown in FIG. 2 (d). The bumps are shaped by pressing from above with the crimping tool 1. Next, a sheet-like thermosetting resin or liquid thermosetting resin 5 is attached or applied to the electrode surface side of the circuit board 6 in advance, and the bumps 3 are formed as shown in FIG. The shaped semiconductor element 2 is aligned and placed on the circuit board 6 so that the bump forming surface is placed on the electrode of the circuit board 6. Next, as shown in FIG. 2 (f), pressure is applied to the semiconductor element 2 from the back surface of the semiconductor element 2 by the crimping tool 1, and the bump 3 of the semiconductor element 2 and the electrode of the circuit board 6 are maintained in a crimped state. 2 (g), the thermosetting resin 5 is cured, the semiconductor element 2 and the circuit board 6 are joined, and the bumps 3 and the wirings are electrically connected. Completed as shown in FIG.

ここで、前述した製造方法を実現する本実施形態の製造装置においては、半導体素子電極面上にバンプを形成する装置、熱硬化性樹脂を回路基板へ供給する装置、半導体素子を熱硬化性樹脂が供給された回路基板上へ搭載し接合させる装置の他にバンプ形状を整形させる装置が備えられている。バンプ３を整形させる型４としては図３に示すように、バンプ３の先端が鋭角となるような加工を施した型を用いる。これにより、図４（ａ），（ｂ），（ｃ）に示したようなバンプ形状を得ることができ、回路基板６上に熱硬化性樹脂５が存在しても容易に樹脂を押し退けやすくなり、かつ回路基板６の電極面上に精度良く半導体素子を実装させることが可能となる。   Here, in the manufacturing apparatus of the present embodiment that realizes the manufacturing method described above, an apparatus for forming bumps on the semiconductor element electrode surface, an apparatus for supplying a thermosetting resin to a circuit board, and a semiconductor element for a thermosetting resin In addition to a device for mounting and bonding on a circuit board supplied with a device, a device for shaping a bump shape is provided. As the mold 4 for shaping the bump 3, as shown in FIG. 3, a mold that is processed so that the tip of the bump 3 has an acute angle is used. Thereby, the bump shape as shown in FIGS. 4A, 4B, and 4C can be obtained, and even if the thermosetting resin 5 exists on the circuit board 6, the resin can be easily pushed away. In addition, the semiconductor element can be mounted on the electrode surface of the circuit board 6 with high accuracy.

以上のように、本実施の形態によれば、半導体素子電極面上に引きちぎり式で形成され、形状，高さにばらつきのあったボールバンプは半導体素子電極面に対応した鋭角な頂点を持つ凹みのある型に押し当てることにより、本来あるべき位置に頂点を持つバンプを精度良く形成することができる。また、このように位置精度をあげることにより電気的接続信頼性と狭ピッチ化を実現することが可能となる。   As described above, according to the present embodiment, the ball bumps that are formed in a tearing manner on the semiconductor element electrode surface and have variations in shape and height have an acute apex corresponding to the semiconductor element electrode surface. By pressing against a mold having a recess, it is possible to accurately form a bump having an apex at a desired position. In addition, by increasing the positional accuracy in this way, it is possible to realize electrical connection reliability and a narrow pitch.

（実施の形態２）
図５は本発明半導体装置の製造方法の実施の形態２における製造工程を示す工程図である。 (Embodiment 2)
FIG. 5 is a process diagram showing a manufacturing process in the second embodiment of the method for manufacturing a semiconductor device of the present invention.

まず、図５（ａ）に示す回路接続用の電極を有する半導体素子２に、図５（ｂ）に示すように通常用いられるめっき工法を利用してその電極面上にめっきバンプ７を形成させる。次に図５（ｃ）に示すように予め用意した所望のバンプ形状と同一の凹みを設けた型４に半導体素子２のバンプ形成面を対向させ、次に図５（ｄ）に示すように圧着ツール１により上から押し当てめっきバンプ７を整形する。次に回路基板６の電極面側へシート状の熱硬化性樹脂もしくは液状の熱硬化性樹脂５を貼り付けまたは塗布したものを予め用意し、図５（ｅ）に示すように前記めっきバンプ７を整形した後の半導体素子２をめっきバンプ７の形成面が回路基板６の電極上に載るように位置合わせを行い回路基板６上に載置する。次に、図５（ｆ）に示すように半導体素子２の裏面上から圧着ツール１により半導体素子２に圧力を加え、半導体素子２のめっきバンプ７と回路基板６の電極を圧着させた状態を維持しながら加熱を行うことにより、図５（ｇ）に示すように熱硬化性樹脂５を硬化させ、半導体素子２と回路基板６を接合すると共に、めっきバンプ７と配線とを電気的に接続し、図５（ｈ）に示すように完成する。   First, the plating bumps 7 are formed on the electrode surface of the semiconductor element 2 having the circuit connection electrodes shown in FIG. 5A by using a plating method usually used as shown in FIG. 5B. . Next, as shown in FIG. 5 (c), the bump formation surface of the semiconductor element 2 is made to face the mold 4 provided with the same depression as the desired bump shape prepared in advance, and then as shown in FIG. 5 (d). The pressing bump 1 is shaped by pressing from above with the crimping tool 1. Next, a sheet-like thermosetting resin or liquid thermosetting resin 5 is applied or applied to the electrode surface side of the circuit board 6 in advance, and the plating bumps 7 are prepared as shown in FIG. The semiconductor element 2 after shaping is aligned and placed on the circuit board 6 so that the formation surface of the plating bump 7 is placed on the electrode of the circuit board 6. Next, as shown in FIG. 5 (f), the pressure is applied to the semiconductor element 2 from the back surface of the semiconductor element 2 by the crimping tool 1, and the plating bump 7 of the semiconductor element 2 and the electrode of the circuit board 6 are crimped. By heating while maintaining, as shown in FIG. 5G, the thermosetting resin 5 is cured, the semiconductor element 2 and the circuit board 6 are joined, and the plating bump 7 and the wiring are electrically connected. Then, the process is completed as shown in FIG.

以上のように本実施の形態によれば、通常めっき工法によるバンプは半導体素子電極面と平行にしか成長できず、バンプ台座よりも先端が鋭角な突起を作ることができなかったものが、所望のバンプ形状をめっき工法によるバンプでも容易に形成できるようになり、また、めっきバンプを用いることにより半導体素子電極面下へのバンプ形成時のダメージを最小限に抑えることができる等、半導体装置の信頼性も向上することが期待できる。   As described above, according to the present embodiment, bumps obtained by the normal plating method can grow only in parallel with the surface of the semiconductor element electrode, and the bumps having sharper tips than the bump pedestal could not be formed. The bump shape can be easily formed even with bumps made by plating, and the use of plated bumps can minimize damage when forming bumps under the surface of the semiconductor element electrode. Reliability can also be expected to improve.

本発明は半導体素子製造方法の一つであるフリップチップ工法などに有用である。   The present invention is useful for a flip chip method which is one of semiconductor device manufacturing methods.

本発明半導体装置の製造方法の実施の形態１における基本工程を概念的に示す説明図Explanatory drawing which shows notionally the basic process in Embodiment 1 of the manufacturing method of the semiconductor device of this invention. 本発明半導体装置の製造方法の実施の形態１における製造工程を示す工程図Process drawing which shows the manufacturing process in Embodiment 1 of the manufacturing method of the semiconductor device of this invention 図２の製造工程で用いられるバンプ整形用型の各例を示す構成図Configuration diagram showing examples of bump shaping molds used in the manufacturing process of FIG. 図３のバンプ整形用型により成形されるバンプの各例を示す説明図Explanatory drawing which shows each example of the bump shape | molded by the type | mold for bump shaping of FIG. 本発明半導体装置の製造方法の実施の形態２における製造工程を示す工程図Process drawing which shows the manufacturing process in Embodiment 2 of the manufacturing method of the semiconductor device of this invention 従来の半導体装置の製造方法における製造工程の一例を示す工程図Process drawing showing an example of a manufacturing process in a conventional method for manufacturing a semiconductor device

符号の説明Explanation of symbols

１ 圧着ツール
２ 半導体素子
３ バンプ
４ 型
５ 熱硬化性樹脂
６ 回路基板
７ めっきバンプ DESCRIPTION OF SYMBOLS 1 Crimping tool 2 Semiconductor element 3 Bump 4 Type 5 Thermosetting resin 6 Circuit board 7 Plating bump

Claims (5)

半導体素子の電極面上にバンプを形成すると共に、回路基板と半導体素子との間に絶縁性で導電粒子を含まない熱硬化性樹脂を介在させて前記バンプと対向させ、加熱しながら前記半導体素子を前記回路基板に押圧し、前記回路基板の反り矯正を行いながら前記熱硬化性樹脂を熱により硬化させ、前記半導体素子と前記回路基板を接合して両電極を電気的に接続するようにした半導体装置の製造方法において、半導体素子の電極面上に形成したバンプを所望の形状に整形した後、これらバンプが回路基板に押圧されるようにしたことを特徴とする半導体装置の製造方法。   A bump is formed on the electrode surface of the semiconductor element, and an insulating thermosetting resin containing no conductive particles is interposed between the circuit board and the semiconductor element so as to face the bump, and the semiconductor element is heated while being heated. The circuit board is pressed and the thermosetting resin is cured by heat while correcting the warping of the circuit board, and the semiconductor element and the circuit board are joined to electrically connect both electrodes. In the manufacturing method of a semiconductor device, the bump formed on the electrode surface of the semiconductor element is shaped into a desired shape, and then the bump is pressed against the circuit board. 半導体素子の電極面上にバンプを形成すると共に、回路基板と半導体素子との間に絶縁性で導電粒子を含まない熱硬化性樹脂を介在させて前記バンプと対向させ、加熱しながら前記半導体素子を前記回路基板に押圧し、前記回路基板の反り矯正を行いながら前記熱硬化性樹脂を熱により硬化させ、前記半導体素子と前記回路基板を接合して両電極を電気的に接続するようにした半導体装置の製造方法において、半導体素子の電極面上に形成したバンプを所望のバンプ形状と同一の凹みを設けた型に押し当ててこれを所望のバンプ形状に整形した後、これらバンプが回路基板に押圧されるようにしたことを特徴とする半導体装置の製造方法。   A bump is formed on the electrode surface of the semiconductor element, and an insulating thermosetting resin containing no conductive particles is interposed between the circuit board and the semiconductor element so as to face the bump, and the semiconductor element is heated while being heated. The circuit board is pressed and the thermosetting resin is cured by heat while correcting the warping of the circuit board, and the semiconductor element and the circuit board are joined to electrically connect both electrodes. In a manufacturing method of a semiconductor device, bumps formed on the electrode surface of a semiconductor element are pressed against a mold having the same recess as the desired bump shape and shaped into the desired bump shape. A method of manufacturing a semiconductor device, wherein the semiconductor device is pressed by 前記型の凹みの形状はバンプ先端が鋭角になるような凹みであることを特徴とする請求項２記載の半導体装置の製造方法。   3. The method of manufacturing a semiconductor device according to claim 2, wherein the shape of the recess of the mold is a recess in which a bump tip has an acute angle. 半導体素子の電極面上にバンプを形成させる装置と、熱硬化樹脂を回路基板へ供給する装置と、前記回路基板の電極と半導体素子の電極に形成されたバンプとを対向させ位置合せする装置と、前記熱硬化性樹脂を加熱する加熱装置と、前記加熱装置により前記熱硬化性樹脂を加熱しながら前記半導体素子を前記回路基板に押圧し、前記回路基板の反り矯正を行いながら前記半導体素子と前記熱硬化性樹脂を熱により硬化させ、前記半導体素子と前記回路基板を接合して両電極を電気的に接続する加圧装置を有する半導体装置の製造装置において、半導体素子の電極面上にバンプ形成後、バンプ形状を所望の形状に整形するため型に押し当てる装置をさらに備えたことを特徴とする半導体装置の製造装置。   An apparatus for forming bumps on the electrode surface of the semiconductor element; an apparatus for supplying thermosetting resin to the circuit board; and an apparatus for aligning the electrodes of the circuit board and the bumps formed on the electrodes of the semiconductor element. A heating device that heats the thermosetting resin, and the semiconductor device while pressing the semiconductor element against the circuit board while heating the thermosetting resin by the heating apparatus, and correcting the warping of the circuit board. In a semiconductor device manufacturing apparatus having a pressurizing device for curing the thermosetting resin by heat, joining the semiconductor element and the circuit board, and electrically connecting both electrodes, bumps are formed on the electrode surface of the semiconductor element. An apparatus for manufacturing a semiconductor device, further comprising an apparatus for pressing a bump shape against a mold after shaping to form a bump shape into a desired shape. 半導体素子の電極面上にバンプを形成させる装置と、熱硬化樹脂を回路基板へ供給する装置と、前記回路基板の電極と半導体素子の電極に形成されたバンプとを対向させ位置合せする装置と、前記熱硬化性樹脂を加熱する加熱装置と、前記加熱装置により前記熱硬化性樹脂を加熱しながら前記半導体素子を前記回路基板に押圧し、前記回路基板の反り矯正を行いながら前記半導体素子と前記熱硬化性樹脂を熱により硬化させ、前記半導体素子と前記回路基板を接合して両電極を電気的に接続する加圧装置を有する半導体装置の製造装置において、バンプ形成時にめっき工法を用いて半導体素子の電極面上にバンプを形成した後、これらめっきバンプを所望の形状に加工する装置をさらに備えたことを特徴とする半導体装置の製造装置。   An apparatus for forming bumps on the electrode surface of the semiconductor element; an apparatus for supplying thermosetting resin to the circuit board; and an apparatus for aligning the electrodes of the circuit board and the bumps formed on the electrodes of the semiconductor element. A heating device that heats the thermosetting resin; and the semiconductor device while pressing the semiconductor element against the circuit board while heating the thermosetting resin by the heating apparatus and correcting the warping of the circuit board. In a semiconductor device manufacturing apparatus having a pressurizing device that cures the thermosetting resin by heat, joins the semiconductor element and the circuit board, and electrically connects both electrodes, a plating method is used at the time of bump formation. An apparatus for manufacturing a semiconductor device, further comprising an apparatus for forming bumps on an electrode surface of a semiconductor element and then processing the plated bumps into a desired shape.
JP2005110765A 2005-04-07 2005-04-07 Method and apparatus of manufacturing semiconductor apparatus Pending JP2006294730A (en)

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