JP2006165265A - Storage element and memory - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a storage element capable of reducing a current value required for writing by improving spin implantation efficiency. <P>SOLUTION: Magnetization fixing layers 31, 32 are provided on the top and bottom of a storage layer 17 for holding information using the magnetization state of a magnetic body, via intermediate layers 16, 18. The intermediate layers 16, 18 each consist of an insulating layer. Directions of magnetization M15, M19 of ferromagnetic layers 15, 19, nearest to the storage layer 17, of the magnetization layers 31, 32 on the top and bottom of the storage layer 17 are opposite to each other. Area resistance values of the two intermediate layers 16, 18 on the top and bottom of the storage layer 17 are different. A current is applied to a laminate direction, thus the direction of magnetization M1 of the storage layer 17 changes, and the information is stored in the storage medium 3. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention includes a storage layer that stores the magnetization state of a ferromagnetic layer as information, and a magnetization fixed layer whose magnetization direction is fixed, and a storage element that changes the magnetization direction of the storage layer by passing an electric current. The present invention relates to a memory provided with this memory element, and is suitable for application to a nonvolatile memory.

With the rapid spread of information communication devices, especially small personal devices such as portable terminals, the elements such as memory and logic that compose this device are becoming more highly integrated, faster, lower power, etc. There is a demand for higher performance.
In particular, the non-volatile memory has a feature that is essentially advantageous for miniaturization because there is no moving part like a hard disk or an optical disk.

Examples of the nonvolatile memory include a flash memory using a semiconductor and an FRAM (Ferro electric Random Access Memory) using a ferroelectric.
However, the flash memory has a drawback in that it is not suitable for high-speed access because the writing speed is as low as the order of microseconds.
On the other hand, the FRAM has a limited number of rewritable times of 10 ¹² to 10 ^14, and therefore, it is pointed out that the durability is small to completely replace the SRAM and DRAM, and that fine processing of the ferroelectric capacitor is difficult. ing.

A magnetic random access memory (MRAM) that records information by magnetization of a magnetic material is attracting attention as a nonvolatile memory that does not have these drawbacks (see, for example, Non-Patent Document 1).
Since this MRAM stores data by rotating the magnetic moment, the number of rewrites is large.
Also, the access time is very high.

Here, a schematic diagram (perspective view) of a general MRAM is shown in FIG.
A drain region 108, a source region 107, and a gate electrode 101 constituting a selection transistor for selecting each memory cell are formed in a portion separated by the element isolation layer 102 of the semiconductor substrate 110 such as a silicon substrate. Has been.
A word line 105 extending in the front-rear direction in the figure is provided above the gate electrode 101.
The drain region 108 is formed in common to the left and right selection transistors in the drawing, and a wiring 109 is connected to the drain region 108.
A magnetic storage element 103 having a storage layer whose magnetization direction is reversed is disposed between the word line 105 and the bit line 106 disposed above and extending in the horizontal direction in the drawing. The magnetic memory element 103 is composed of, for example, a magnetic tunnel junction element (MTJ element).
Further, the magnetic memory element 103 is electrically connected to the source region 107 via the horizontal bypass line 111 and the vertical contact layer 104.
By applying current to each of the word line 105 and the bit line 106, a current magnetic field is applied to the magnetic memory element 103, thereby reversing the magnetization direction of the memory layer of the magnetic memory element 103 and recording information. be able to.

In order to stably hold recorded information in a magnetic memory such as MRAM, it is necessary that a magnetic layer (storage layer) for recording information has a certain coercive force.
On the other hand, in order to rewrite the recorded information, a certain amount of current must be passed through the address wiring.
However, as the elements constituting the MRAM become finer, the address wiring becomes thinner, so that a sufficient current cannot flow.

Therefore, attention has been paid to a magnetic memory having a configuration using magnetization reversal by spin injection as a configuration capable of reversing magnetization with a smaller current (see, for example, Patent Document 1).
Magnetization reversal by spin injection is to cause magnetization reversal in another magnetic material by injecting spin-polarized electrons that have passed through the magnetic material into another magnetic material.

  For example, when a current is passed through a giant magnetoresistive element (GMR element) or a magnetic tunnel junction element (MTJ element) in a direction perpendicular to the film surface, magnetization of at least a part of the magnetic layer of these elements is performed. Can be reversed.

  Magnetization reversal by spin injection has an advantage that magnetization reversal can be realized with a small current even if the element is miniaturized.

Moreover, the schematic diagram of the magnetic memory of the structure using the magnetization reversal by the spin injection mentioned above is shown in FIG.8 and FIG.9. 8 is a perspective view, and FIG. 9 is a cross-sectional view.
A drain region 58, a source region 57, and a gate electrode 51 constituting a selection transistor for selecting each memory cell are formed in a portion separated by the element isolation layer 52 of the semiconductor substrate 60 such as a silicon substrate. Has been. Of these, the gate electrode 51 also serves as a word line extending in the front-rear direction in FIG.
The drain region 58 is formed in common with the left and right selection transistors in FIG. 8, and a wiring 59 is connected to the drain region 58.
A storage element 53 having a storage layer in which the direction of magnetization is reversed by spin injection is disposed between the source region 57 and the bit line 56 disposed above and extending in the left-right direction in FIG.
The storage element 53 is configured by, for example, a magnetic tunnel junction element (MTJ element).
In the figure, reference numerals 61 and 62 denote magnetic layers. Of the two magnetic layers 61 and 62, one magnetic layer is a magnetization fixed layer whose magnetization direction is fixed, and the other magnetic layer is a magnetization direction. A changing magnetization free layer, that is, a storage layer is used.
The storage element 53 is connected to the bit line 56 and the source region 57 via the upper and lower contact layers 54, respectively. As a result, a current can be passed through the magnetic memory element 53 to reverse the magnetization direction of the memory layer by spin injection.

In the case of a memory that uses such magnetization reversal by spin injection, the device structure can be simplified as compared with the general MRAM shown in FIG.
Further, by utilizing magnetization reversal by spin injection, there is an advantage that the write current does not increase even when the element is miniaturized as compared with a general MRAM in which magnetization reversal is performed by an external magnetic field.

However, when the element is miniaturized, the thermal stability of magnetization indicated by KuV / kBT is insufficient, and it becomes superparamagnetic, and recorded information may not be retained.
Therefore, it is necessary to keep the write current low while keeping the value of KuV / kBT above a certain level. For this purpose, it is required to reduce the write current by improving the spin injection efficiency.

In order to increase the read signal, it is necessary to secure a large magnetoresistance change rate. For this purpose, it is effective to use the intermediate layer in contact with both sides of the storage layer as a tunnel barrier layer.
In this case, since the withstand voltage of the barrier layer is limited, the current at the time of spin injection needs to be suppressed also from this point.

Therefore, as a solution to suppress the current at the time of spin injection, the storage element is a stacked structure of a fixed magnetization layer / intermediate layer / storage layer / intermediate layer / magnetization fixed layer, and a fixed magnetization layer provided above and below the storage layer. There has been proposed a configuration in which the magnetization direction of each is opposite (see Patent Document 2 and Non-Patent Document 2).
In Patent Document 2 and Non-Patent Document 2, it is shown that spin injection efficiency can be doubled by making the magnetization directions of the upper and lower magnetization fixed layers opposite to each other.

  In Patent Document 2, one intermediate layer is formed of a nonmagnetic metal layer, and the other intermediate layer is formed of an oxide layer (insulating layer).

Nikkei Electronics 2001.1.22 (pages 164-171) L. Berger, J. Appl. Phys., 90, 2003, p.7693 JP 2003-17782 A US Patent Publication No. 2004/0027853

  The efficiency of spin injection is generally expressed by the following equation (1).

  Regardless of whether the intermediate layer is a tunnel barrier layer or a nonmagnetic metal layer, the spin injection efficiency P of the magnetic layer sandwiching the intermediate layer is expressed by the above formula. If it is determined only by the above, it is theoretically considered that the spin injection efficiency is doubled by adopting the structure described in Patent Document 2 above.

  However, as a result of actually producing a memory element having the structure described in Patent Document 2 and investigating the characteristics of this memory element, a theoretical result cannot be obtained and a sufficient improvement in spin injection efficiency is not recognized. It was.

  In order to solve the above-described problems, the present invention provides a memory element that can reduce a current value required for writing by improving spin injection efficiency, and a memory including the memory element. .

  The storage element of the present invention has a storage layer that holds information by the magnetization state of a magnetic material, and a fixed magnetization layer is provided above and below the storage layer via an intermediate layer, respectively, and each intermediate layer is insulated. In the magnetization fixed layers above and below the storage layer, the magnetization directions of the ferromagnetic layers closest to the storage layer are opposite to each other, and by passing a current in the stacking direction, the magnetization direction of the storage layer is As a result, information is recorded on the storage layer, and the area resistance values of the two upper and lower intermediate layers of the storage layer are different.

According to the configuration of the above-described storage element of the present invention, the storage layer that holds information by the magnetization state of the magnetic material has a storage layer, and a fixed magnetization layer is provided above and below the storage layer via an intermediate layer, By flowing current in the stacking direction, the direction of magnetization of the storage layer changes, and information is recorded on the storage layer. Therefore, it is possible to record information by spin injection by flowing current in the stacking direction. it can.
Further, in the magnetization fixed layers above and below the storage layer, the magnetization directions of the ferromagnetic layers closest to the storage layer are opposite to each other, so that the spin injection efficiency can be greatly increased. Thereby, the amount of current (threshold current) required to reverse the magnetization direction of the storage layer by spin injection can be reduced.
Further, since each intermediate layer is made of an insulating layer, the insulating layer can suppress and maintain the attenuation of the flow of polarized electrons (spin current). As a result, the spin injection efficiency can be further improved, and the amount of current (threshold current) required to reverse the magnetization direction of the storage layer by spin injection can be reduced.
The two intermediate layers above and below the memory layer have different sheet resistance values, so that even if the magnetoresistance change rate of each intermediate layer is negated, the magnetoresistive change rate of the entire memory element is ensured to be sufficiently large. It becomes possible to do.

  The memory of the present invention includes a storage element having a storage layer that holds information according to the magnetization state of a magnetic material, and two types of wirings that cross each other, and the storage element is provided above and below the storage layer via intermediate layers. A magnetization fixed layer is provided, and each intermediate layer is made of an insulating layer. In the magnetization fixed layers above and below the storage layer, the magnetization directions of the ferromagnetic layers closest to the storage layer are opposite to each other. By flowing a current in the direction, the magnetization direction of the storage layer changes, information is recorded on the storage layer, and the area resistance values of the two upper and lower intermediate layers of the storage layer are different. A storage element is arranged near the intersection of two types of wiring and between the two types of wiring, and a current in the stacking direction flows through the storage element through the two types of wiring.

According to the configuration of the memory of the present invention described above, a memory element having a memory layer that holds information according to the magnetization state of the magnetic material and two kinds of wirings intersecting each other are provided, and the memory element is the memory element of the present invention. The memory element is arranged near the intersection of two types of wiring and between the two types of wiring, and current in the stacking direction flows through the memory element through these two types of wiring. Information can be recorded by spin injection by passing a current in the stacking direction of the memory element through the wiring.
In addition, the amount of current (threshold current) required to reverse the magnetization direction of the storage layer of the storage element by spin injection can be reduced.
Furthermore, since the magnetoresistive change rate of the memory element is sufficiently large, it is easy to obtain high output by reading the information recorded in the memory layer of the memory element using the magnetoresistive change. Information can be read out.

In the storage element and the memory of the present invention, the magnetization fixed layers above and below the storage layer of the storage element each have a structure in which a plurality of ferromagnetic layers are stacked via a nonmagnetic layer. For the area magnetization amount represented by (film thickness) × (unit volume saturation magnetization), in each magnetization fixed layer, the total area magnetization amount of the ferromagnetic layer in which the magnetization is fixed in one direction, and the magnetization is the other It is also possible to adopt a configuration in which the total sum of the area magnetizations of the ferromagnetic layer fixed in the direction is substantially equal.
With such a configuration, the magnetization fixed layers above and below the storage layer of the storage element have a so-called laminated ferrimagnetic structure in which a plurality of ferromagnetic layers are laminated via a nonmagnetic layer.
And in this magnetization fixed layer of the laminated ferrimagnetic structure, the total area magnetization of the ferromagnetic layer whose magnetization is fixed in one direction and the area magnetization of the ferromagnetic layer whose magnetization is fixed in the other direction Is substantially equal to each other, the magnetic field leaking from the end face of the storage element of each magnetization fixed layer is canceled out, and the leakage magnetic field applied to the storage layer from the magnetization fixed layer can be made extremely small. As a result, the phenomenon that the amount of current for recording information by reversing the magnetization of the storage layer due to the action of the leakage magnetic field can be suppressed, and the increase in the amount of current during information recording can be suppressed. .

In the memory element and the memory according to the present invention, the magnetization fixed layers above and below the memory layer of the memory element may be configured such that the ferromagnetic layer in contact with the intermediate layer is a CoFeB layer.
In such a configuration, the CoFeB layer has a higher spin polarizability and higher spin injection efficiency than the CoFe layer and the like, so that the amount of current necessary for reversing the magnetization direction of the storage layer is further reduced. It becomes possible to do.

In the memory element and the memory of the present invention, an antiferromagnetic layer is provided on the opposite side to the memory layer in the magnetization fixed layers above and below the memory layer of the memory element, and the ferromagnetic layer in contact with the antiferromagnetic layer is CoFe It is also possible to adopt a structure that is a layer.
In such a configuration, since the antiferromagnetic layer is provided on the side opposite to the storage layer, the magnetization direction of the ferromagnetic layer of the magnetization fixed layer is fixed by the antiferromagnetic layer. Here, if the ferromagnetic layer in contact with the antiferromagnetic layer is, for example, a CoFeB layer, the antiferromagnetic coupling may be smaller than that of the CoFe layer, possibly because of insufficient crystal orientation with the antiferromagnetic layer. The strength is weakened. Therefore, the ferromagnetic layer in contact with the antiferromagnetic layer is preferably a CoFe layer.

In the memory element and the memory of the present invention, at least one of the magnetization fixed layers above and below the memory layer of the memory element has a structure in which a plurality of ferromagnetic layers are stacked via a nonmagnetic layer, and A configuration in which the ferromagnetic layer in contact with the magnetic layer is a CoFe layer is also possible.
In such a configuration, at least one of the magnetization fixed layers has a structure in which a plurality of ferromagnetic layers are laminated via a nonmagnetic layer, that is, a so-called laminated ferrimagnetic structure, and further below the nonmagnetic layer. Since the ferromagnetic layer in contact with the layer is a CoFe layer, sufficient antiferromagnetic coupling can be obtained in the laminated ferrimagnetic structure.

According to the present invention described above, the amount of current required for recording information can be reduced by improving the spin injection efficiency.
As a result, the power consumption of the entire memory can be reduced.
Therefore, it is possible to realize a memory with low power consumption that has not been conventionally available.

Further, according to the present invention, when the recorded information is read out, it is possible to obtain a high output and easily read out the information.
As a result, in a memory including a memory element, for example, a circuit for reducing power consumption at the time of reading or detecting an output by reducing a current flowing through the memory element when information is read Can be simplified, and read sensitivity can be improved.

Prior to the description of specific embodiments of the present invention, an outline of the present invention will be described.
In the present invention, information is recorded by reversing the magnetization direction of the storage layer of the storage element by the spin injection described above. The storage layer is composed of a magnetic material such as a ferromagnetic layer, and holds information by the magnetization state (magnetization direction) of the magnetic material.

The basic operation of reversing the magnetization direction of the magnetic layer by spin injection is perpendicular to the film surface of a memory element composed of a giant magnetoresistive element (GMR element) or a tunnel magnetoresistive element (MTJ element). In such a direction, a current exceeding a certain threshold is passed. At this time, the polarity (direction) of the current depends on the direction of magnetization to be reversed.
When a current having an absolute value smaller than this threshold is passed, magnetization reversal does not occur.

  When the magnetization direction of the magnetic layer is reversed by spin injection, the current threshold Ic required is phenomenologically expressed by the following formula 2 (for example, FJAlbert et al., Appl. Phys. Lett. ., 77, p. 3809, 2000, etc.).

In the present invention, as represented by the equation (1), the current threshold controls the volume V of the magnetic layer, the saturation magnetization M _s of the magnetic layer, and the magnitude of the effective magnetic anisotropy, Use that it can be set arbitrarily.
Then, a storage element having a magnetic layer (storage layer) capable of holding information depending on the magnetization state and a magnetization fixed layer in which the magnetization direction is fixed is configured.

The threshold value of the current that changes the magnetization state of the storage layer is actually a substantially elliptical giant magnetoresistive element (GMR element) having a storage layer thickness of 2 nm and a planar pattern of 120 to 130 nm × 100 nm, for example. , The positive threshold value + Ic = + 0.6 mA, the negative threshold value −Ic = −0.2 mA, and the current density at that time is about 6 × 10 ⁶ A · cm ² . These almost agree with the above formula (1) (see Rooftop et al., Journal of Japan Society of Applied Magnetics, Vol.28, No.2, p.149, 2004).

On the other hand, a normal MRAM that performs magnetization reversal by a current magnetic field requires a write current of several mA or more.
On the other hand, when the magnetization reversal is performed by spin injection, the threshold value of the write current becomes sufficiently small as described above, which is effective for reducing the power consumption of the integrated circuit.
In addition, the current magnetic field generating wiring (105 in FIG. 10) required for a normal MRAM is not necessary, and this is advantageous in terms of integration compared to a normal MRAM.

  As a result of various studies in order to solve the above-described problems, it has been found that the spin injection efficiency is improved when a junction having a magnetoresistive effect through two intermediate layers has a similar resistance change rate. It was.

  However, if the materials constituting the two intermediate layers have the same rate of change in resistance and the area resistance values are equal, the resistance changes cancel each other, so even if the spin injection efficiency is improved, the memory is stored. It is difficult to detect the direction of magnetization of the layer as a resistance change rate.

  On the other hand, when the two intermediate layers are both tunnel insulating layers such as oxides or nitrides, the resistance value can be freely adjusted without significantly reducing the rate of change in resistance by adjusting the film thickness and formation conditions of the insulating layers. Can be changed.

Therefore, in the present invention, in a storage element having a configuration in which a magnetization fixed layer is provided above and below the storage layer via an intermediate layer, the upper and lower intermediate layers of the storage layer are configured by insulating layers (tunnel insulating layers serving as tunnel barriers). At the same time, the sheet resistance values of the intermediate layers (insulating layers) above and below the memory layer are made different.
By configuring the upper and lower intermediate layers of the storage layer with insulating layers, the magnetoresistance change rate of the magnetic tunnel junction element by each intermediate layer can be increased.
By making the area resistance values of the upper and lower intermediate layers (insulating layers) of the storage layer different, the structure of the upper and lower magnetoresistive elements of the storage element is made asymmetric, so that the resistance change and magnetoresistance change rate of the upper and lower magnetoresistive elements are Even if they cancel each other, the magnetoresistance change rate of the entire memory element can be prevented from disappearing.
With these configurations, the magnetoresistance change rate of the entire memory element is increased.

In the present invention, the spin injection efficiency is improved by making the magnetization directions of the ferromagnetic layers on the storage layer side antiparallel in the magnetization fixed layers above and below the storage layer.
Thereby, the amount of current for reversing the magnetization direction of the storage layer by spin injection can be reduced.

As a material for the insulating layer, an oxide or a nitride can be used.
For example, aluminum oxide, aluminum nitride, magnesium oxide and the like can be mentioned, and an insulating layer mainly composed of these oxides and nitrides is formed.
The aluminum oxide can be formed, for example, by forming a metal Al layer and then oxidizing the Al layer.
The aluminum nitride can be formed, for example, by forming a metal Al layer and then nitriding the Al layer.
Magnesium oxide can be formed by directly depositing an oxide by, for example, RF sputtering.

The magnetization fixed layer has a configuration in which the magnetization direction of the ferromagnetic layer is fixed by using only the ferromagnetic layer or using antiferromagnetic coupling between the antiferromagnetic layer and the ferromagnetic layer.
The fixed magnetization layer may be formed of a single-layered ferromagnetic layer or a plurality of ferromagnetic layers, and may have a so-called laminated ferrimagnetic structure in which a plurality of ferromagnetic layers are laminated via a nonmagnetic layer.

When the magnetization direction of the ferromagnetic layer is fixed using antiferromagnetic coupling between the antiferromagnetic layer and the ferromagnetic layer in each of the two magnetization fixed layers above and below the storage layer, The magnetization direction of the ferromagnetic layer on the ferromagnetic layer side is fixed to the same direction.
Therefore, as described above, in order to improve the spin injection efficiency, in order to make the magnetization direction of the ferromagnetic layer on the storage layer side antiparallel, at least one magnetization fixed layer has a laminated ferrimagnetic structure. Therefore, it is necessary to select the number of ferromagnetic layers constituting the magnetization fixed layer having the laminated ferri structure.
For example, when the antiferromagnetic layer is AF, the ferromagnetic layer is FM, the nonmagnetic layer is N, and the magnetization directions in the easy axis direction are indicated by ↓ and ↑, the following (1) to (4) Combinations are possible.
(1) Lower magnetization fixed layer: AF / FM (↑), upper magnetization fixed layer: FM (↓) / N / (↑) FM / AF
(2) Lower magnetization fixed layer: AF / FM (↑) / N / FM (↓), Upper magnetization fixed layer: (↑) FM / AF
(3) Lower magnetization fixed layer: AF / FM (↑) / N / FM (↓), Upper magnetization fixed layer: FM (↑) / N / FM (↓) / N / (↑) FM / AF
(4) Lower magnetization fixed layer: AF / FM (↑) / N / FM (↓) / N / FM (↑), Upper magnetization fixed layer: FM (↓) / N / (↑) FM / AF

  Of course, combinations other than (1) to (4) are possible as long as the magnetization direction of the ferromagnetic layer on the storage layer side is fixed in the opposite direction. Generally speaking, one of the magnetization fixed layers may be composed of an odd number of ferromagnetic layers, and the other magnetization fixed layer may be composed of an even number of ferromagnetic layers. However, the number of the ferromagnetic layers is counted as a single ferromagnetic layer in which a plurality of ferromagnetic layers directly laminated without a nonmagnetic layer interposed therebetween.

More preferably, the magnetization amount of the ferromagnetic layer in each magnetization fixed layer is balanced by the direction of one magnetization and antiparallel to each other, and each magnetization fixed layer has each magnetization layer so as to cancel the leakage magnetic field. It is preferable that the area magnetization amount and the film thickness are adjusted.
When the amount of magnetization of each ferromagnetic layer is not sufficiently adjusted and a leakage magnetic field is generated from the end of the magnetization fixed layer of the storage element, the hysteresis measured in the RH loop is shifted, If an external magnetic field is not applied, spin-injection magnetization reversal cannot be obtained, and the shape of hysteresis is disturbed to make magnetization reversal unstable.

Therefore, in order to reduce the leakage magnetic field, the area magnetization amount represented by (film thickness) × (unit volume saturation magnetization) of the ferromagnetic layer is opposite for the plurality of ferromagnetic layers having different magnetization directions of the magnetization fixed layer. A balanced configuration is used to cancel the magnetic field.
That is, in each of the two magnetization fixed layers provided above and below the storage layer, the magnetization direction is fixed to one for the area magnetization amount indicated by (film thickness) × (unit volume saturation magnetization) of each ferromagnetic layer. The total area magnetization amount Σ (Mstp) of the ferromagnetic layers thus formed and the total area magnetization amount Σ (Mstm) of the ferromagnetic layers whose magnetization directions are fixed to the other are substantially equal.
And about these sum total (SIGMA) (Mstp) and (SIGMA) (Mstm),
Σ (Mstp) = xΣ (Mstm), 0.8 <x <1.2
It is preferable to configure so as to satisfy.
Usually, in the magnetization fixed layer having the laminated ferrimagnetic structure, the magnetization directions of the respective magnetic layers are alternately reversed. Therefore, the sums Σ (Mstp) and Σ (Mstm) of the area magnetization amounts are respectively odd-numbered magnetic layers. Corresponds to the total area magnetization amount of the even-numbered magnetic layers.

In addition, as a material of each layer which comprises a memory element, the following materials are mentioned, for example.
As materials used for the antiferromagnetic layer, manganese alloys such as iron, nickel, platinum, iridium, and rhodium, cobalt, nickel oxide, and the like can be used.
As a material used for the nonmagnetic layer, ruthenium, copper, chromium, gold, silver or the like can be used. Although the film thickness varies depending on the material, it is used in the range of about 0.4 nm to 2.5 nm.
As a material of the ferromagnetic layer constituting the magnetization fixed layer, a Co—Fe based ferromagnetic material, an amorphous material in which boron B is added to 15 to 30 atomic%, or a ferromagnetic material made of an alloy of Co, Fe, and Ni. Can be used.

  In particular, by using a CoFeB layer for the intermediate layer of the magnetization fixed layer, that is, the ferromagnetic layer in contact with the insulating layer serving as a tunnel barrier, the spin polarizability can be increased and the spin injection efficiency can be improved. As a result, the current for reversing the magnetization direction of the storage layer can be further reduced.

  However, a CoFeB layer having a boron B content of 15% or more is not suitable for a ferromagnetic layer that is in contact with an antiferromagnetic layer (for example, a PtMn film) and whose magnetization direction is fixed. It is desirable to be. This is because when a CoFeB layer having a boron B content of 15% or more is used as a ferromagnetic layer in contact with the antiferromagnetic layer, a sufficient antiferromagnetic coupling magnetic field cannot be obtained. This is because it becomes impossible to stably fix the orientation of.

  In a so-called laminated ferrimagnetic structure in which a plurality of ferromagnetic layers are laminated via a nonmagnetic layer, the ferromagnetic layer in contact with the lower side of the nonmagnetic layer (for example, Ru film) is also a CoFeB / Ru / CoFeB laminated layer. When a laminated ferrimagnetic structure is formed with a film, a sufficient antiferromagnetic coupling cannot be obtained, so a CoFe layer is preferable to a CoFeB layer.

  Therefore, for example, a CoFeB / CoFe laminated film may be used, such as a CoFeB layer on the side in contact with the tunnel barrier layer and a CoFe layer on the side in contact with the nonmagnetic layer of the laminated ferrimagnetic structure. it can.

As a material of the ferromagnetic layer used for the memory layer, a ferromagnetic material mainly composed of Co, Fe, and Ni can be used.
Since the amount of saturation magnetization can be reduced and the rate of resistance change is large, the storage layer is preferably a CoFeB layer, and more preferably, the content of boron B is 15 to 30%, and Co and Fe The composition ratio is preferably Co: Fe = 9: 1 to 5: 5.
Thereby, the amount of saturation magnetization can be reduced and a large resistance change rate can be obtained.

In the memory element of the present invention, a current is passed through two pairs of magnetic tunnel junction elements.
As described above, since the magnetization directions of the two magnetization fixed layers are fixed in opposite directions, the resistance change rates cancel each other.
When this is schematically shown, as shown in FIG. 4, two magnetic tunnel junction elements MTJ <b> 1 and MTJ <b> 2 that cancel out the resistance change rates are connected in series.

Here, assuming that the resistance value in the high resistance state is RH1 and the resistance value in the low resistance state is RL1, the first magnetic tunnel junction element MTJ1 is in the high resistance state. It is assumed that the resistance value is RH2 and the resistance value in the low resistance state is RL2.
As shown in FIG. 4, when the magnetization direction of the storage layer is one direction ↑, if the first magnetic tunnel junction element MTJ1 is in the high resistance state RH1, the second magnetic tunnel junction element MTJ2 Is in the low resistance state RL2, and the resistance value of the entire memory element is RH1 + RL2.
When the magnetization direction of the storage layer is the other direction ↓, the first magnetic tunnel junction element MTJ1 is in the low resistance state RL1 and the second magnetic tunnel junction element MTJ2 is in the high resistance state RH2. The resistance value of the entire element is RL1 + RH2.
Therefore, the resistance change rate of the entire memory element is expressed by the following formula (X).
{(RH1 + RL2)-(RL1 + RH2)} / (RL1 + RH2) (X)

  When the resistance values of the two magnetic tunnel junction elements MTJ1 and MTJ2 are equal and the resistance change rate is equal, RH1 = RH2, RL1 = RL2, and the numerator term of the above formula (X) is zero. The resistance change rate is not observed in the entire memory element.

  Here, the resistance change rates of the two magnetic tunnel junction elements MTJ1 and MTJ2 are both 50% as an example, the resistance change rate ΔR is taken on the vertical axis, and RL1 / (RL1 + RL2) is represented by each of the magnetic tunnel junction elements MTJ1 and MTJ2. These relationships are shown in FIG. 5 on the horizontal axis as the ratio of the resistance values.

  From FIG. 5, the resistance change rate of the element increases as the difference | RL1-RL2 | between the resistance values of the two magnetic tunnel junction elements increases, and the resistance change rate is 0 when the resistance values are equal (RL1 = RL2). It turns out that it becomes.

Next, conditions for the storage element to satisfy necessary characteristics will be described.
First, an intermediate layer constituting the tunnel magnetic junction element, that is, an insulating layer serving as a tunnel barrier (hereinafter referred to as a barrier layer) will be described.
For example, in a tunnel magnetic junction element in which a barrier layer is formed of AlOx, a current density of about 3 to 8 × 10 ⁶ (A / μm ² ) is required to enable magnetization reversal by spin injection.
Although depending on the reliability such as the pinhole density in the barrier layer, the spin-injection magnetization reversal is possible, and the dielectric breakdown voltage of the relatively low resistance barrier layer is about 1V.
Here, in order to obtain a current density of 3 to 8 × 10 ⁶ (A / μm ² ), assuming that the area of the memory element is 0.06 × 0.167 μm = 0.01 μm ² , The resistance value needs to be smaller than 33.3 to 12.5 (Ωμm ² ).
Note that the smaller the current density required for magnetization reversal, the larger the resistance value of the memory element.

Thus, the resistance of the barrier layer on the side sheet resistivity is high resistance, in view of obtaining a current density required for spin injection is preferably at least 30Omegamyuemu ² or less, still more preferably 15Omegamyuemu ² or less .
In addition, when other materials such as MgO are used for the barrier layer instead of AlOx, the required resistance value is determined for the same reason, but the insulation withstand voltage is also obtained when a material such as MgO is used. Since it is almost equivalent to AlOx, it is desirable that the resistance value is 30 Ωμm ² or less.

On the other hand, the resistance value of the barrier layer on the side where the area resistance value is low is considered from the tendency shown in FIG. 5 from the viewpoint of signal output when reading out information by the magnetization direction of the storage layer. Smaller is preferable. The smaller the resistance value, the higher the read signal gain.
However, as the resistance value of the barrier layer is lowered, the resistance change rate of the tunnel magnetic junction is generally lowered due to the influence of a pinhole or the like.
This means that spins of a spin-polarized current tunneling through the barrier layer on the low resistance side are scattered. Therefore, it is not preferable to reduce the resistance change rate simultaneously by reducing the resistance value.
Therefore, from the viewpoint of the read signal and the spin-polarized current, it is desirable that the area resistance value of the low resistance side barrier is sufficiently lower than the area resistance value of the high resistance side barrier and is at least about ½ or less.

Next, conditions for obtaining a suitable spin injection efficiency and a good resistance change rate will be described.
In the two tunnel magnetic junction elements constituting the memory element, the read resistance change rate of the memory element can be obtained even if the resistance change rate of the other is lower than the resistance change rate of one, but the other resistance change rate Since the spin-polarized current is reduced due to the low value, the efficiency of spin injection is reduced. Therefore, the current reduction effect is reduced.
Therefore, as described above, it is desirable to obtain the read resistance value by increasing the resistance change rate of the two tunnel magnetic junction elements as much as possible and making a difference in the area resistance value of the tunnel barrier.
The resistance change rate of the tunnel magnetoresistive element is determined mainly by the ferromagnetic layer in contact with the tunnel barrier, so that the desired resistance change rate can be obtained by selecting the material and thickness of the ferromagnetic layer. To do.

  The other configuration of the storage element can be the same as the conventionally known configuration of the storage element that records information by spin injection.

  As a method for reading information recorded in the memory layer of the memory element, a ferromagnetic layer that flows through the insulating layer is provided by providing a magnetic layer serving as a reference of information via a thin insulating film in the memory layer of the memory element. The recorded information may be read by a tunnel current, or may be read by a magnetoresistive effect.

  Next, embodiments of the present invention will be described.

As an embodiment of the present invention, a schematic configuration diagram (perspective view) of a memory is shown in FIG.
In this memory, a storage element capable of holding information in a magnetized state is arranged near the intersection of two types of address lines (for example, a word line and a bit line) orthogonal to each other.
That is, the drain region 8, the source region 7, and the gate electrode 1 that constitute a selection transistor for selecting each memory cell in a portion separated by the element isolation layer 2 of the semiconductor substrate 10 such as a silicon substrate, Each is formed. Of these, the gate electrode 1 also serves as one address wiring (for example, a word line) extending in the front-rear direction in the figure.
The drain region 8 is formed in common to the left and right selection transistors in the figure, and a wiring 9 is connected to the drain region 8.

The storage element 3 is disposed between the source region 7 and the other address wiring (for example, bit line) 6 disposed above and extending in the left-right direction in the drawing. The storage element 3 has a storage layer composed of a ferromagnetic layer whose magnetization direction is reversed by spin injection.
The storage element 3 is arranged near the intersection of the two types of address lines 1 and 6.
The storage element 3 is connected to the bit line 6 and the source region 7 through upper and lower contact layers 4, respectively.
As a result, a current in the vertical direction can be passed through the storage element 3 through the two types of address lines 1 and 6, and the magnetization direction of the storage layer can be reversed by spin injection.

A cross-sectional view of the memory element 3 of the memory according to the present embodiment is shown in FIG.
As shown in FIG. 2, the storage element 3 is provided with a first magnetization fixed layer 31 in the lower layer and a second magnetization fixed layer in the upper layer with respect to the storage layer 17 in which the direction of the magnetization M1 is reversed by spin injection. 32 is provided. That is, the upper and lower two magnetization fixed layers 31 and 32 are provided for the storage layer 17.
The antiferromagnetic layer 12 is provided under the first magnetization fixed layer 31, and the magnetization direction of the first magnetization fixed layer 31 is fixed by the antiferromagnetic layer 12. Further, the antiferromagnetic layer 20 is provided on the second magnetization fixed layer 32, and the magnetization direction of the second magnetization fixed layer 32 is fixed by the antiferromagnetic layer 20.

The first magnetization fixed layer 31 has a laminated ferrimagnetic structure.
Specifically, the first magnetization fixed layer 31 has a configuration in which two ferromagnetic layers 13 and 15 are stacked via the nonmagnetic layer 14 and antiferromagnetically coupled.
Since each of the ferromagnetic layers 13 and 15 of the first magnetization fixed layer 31 has a laminated ferrimagnetic structure, the magnetization M13 of the ferromagnetic layer 13 is directed to the right, and the magnetization M15 of the ferromagnetic layer 15 is directed to the left. The opposite direction.
Thereby, the magnetic fluxes leaking from the ferromagnetic layers 13 and 15 of the first magnetization fixed layer 31 cancel each other.
On the other hand, the second magnetization fixed layer 32 has only a single ferromagnetic layer 19.

  An underlayer 11 is formed under the antiferromagnetic layer 12, and a cap layer 21 is formed over the antiferromagnetic layer 20.

The material of the memory layer 17 is not particularly limited, and an alloy material composed of one or more of iron, nickel, and cobalt can be used. Furthermore, transition metal elements such as Nb and Zr, and light elements such as B can also be contained. In addition, the storage layer 17 may be configured by directly stacking a plurality of films made of different materials, such as a CoFe / NiFe / CoFe stacked film, without using a nonmagnetic layer.
In particular, when the storage layer 17 is a CoFeB layer, the saturation magnetization amount can be reduced and the resistance change rate can be increased. Therefore, the storage layer is preferably a CoFeB layer. More desirably, the content of boron B in CoFeB is 15 to 30%, and the composition ratio of Co and Fe is Co: Fe = 9: 1 to 5: 5.

As a material of the ferromagnetic layers 13, 15, and 19 of the magnetization fixed layers 31 and 32, an alloy material composed of one or more of iron, nickel, and cobalt, for example, a CoFe alloy can be used. Furthermore, transition metal elements such as Nb and Zr, and light elements such as B can also be contained.
For example, amorphous (amorphous) CoFeB in which 20 to 30 atomic% of boron B is added to a CoFe alloy can be used.

As the material of the nonmagnetic layer 14 constituting the laminated ferrimagnetic first magnetic pinned layer 31, ruthenium, copper, chromium, gold, silver or the like can be used. Although the film thickness of the nonmagnetic layer 14 varies depending on the material, it is preferably used in the range of approximately 0.4 nm to 2.5 nm.
As a material of the antiferromagnetic layers 12 and 20, an alloy of a metal element such as iron, nickel, platinum, iridium, and rhodium and manganese, an oxide of cobalt or nickel, or the like can be used.

In the present embodiment, in particular, the first magnetization fixed layer 31 and the intermediate layer between the second magnetization fixed layer 32 and the storage layer 17 of the storage element 3 are all insulating layers.
In other words, the first insulating layer 16 serving as a tunnel barrier layer (tunnel insulating layer) is provided between the storage layer 17 and the lower first magnetization fixed layer 31, and the storage layer 17 and the first magnetization fixed layer 31 are provided. The layer 31 constitutes an MTJ element.
A second insulating layer 18 serving as a tunnel barrier layer (tunnel insulating layer) is provided between the storage layer 17 and the upper second magnetization fixed layer 32, and the storage layer 17 and the second magnetization fixed layer are provided. The layer 32 constitutes an MTJ element.

  In the present embodiment, the intermediate layers above and below the memory layer 17, that is, the first insulating layer 16 and the second insulating layer 18 have different sheet resistance values. For example, the first insulating layer 16 is relatively Therefore, the second insulating layer 18 has a relatively low resistance.

  In order to achieve such a configuration, for example, materials having different insulating properties are used for the first insulating layer 16 and the second insulating layer 18, or oxidation time and nitridation time when forming the insulating layers 16 and 18 are used. The degree of oxidation or nitridation is varied by varying the above.

Since each of the ferromagnetic layers 13 and 15 of the first magnetization fixed layer 31 has a laminated ferrimagnetic structure, the magnetization M13 of the ferromagnetic layer 13 faces right and the magnetization M15 of the ferromagnetic layer 15 faces left. , Are opposite to each other.
The magnetization M19 of the ferromagnetic layer 19 of the second magnetization fixed layer 32 is rightward.
That is, the magnetization M15 of the ferromagnetic layer 15 closest to the storage layer 17 in the first magnetization fixed layer 31 is directed to the left, and the magnetization M19 of the ferromagnetic layer 19 of the second magnetization fixed layer 32 is directed to the right. Are in opposite directions.
Thus, in the magnetization fixed layers 31 and 32 sandwiching the storage layer 17, the magnetizations M15 and M19 of the ferromagnetic layers 15 and 19 closest to the storage layer 17 are opposite to each other, thereby increasing the spin injection efficiency. Since it can be increased, the amount of current required for reversing the direction of the magnetization M1 of the memory layer 17 by spin injection can be reduced.

  In particular, the use of CoFeB layers for the ferromagnetic layers 15 and 19 in contact with the insulating layers 16 and 18 serving as tunnel barriers of the magnetization fixed layers 31 and 32 increases the spin polarizability and improves the spin injection efficiency. can do. Thereby, the current for reversing the direction of the magnetization M1 of the storage layer 17 can be further reduced.

  However, it is not desirable to use a CoFeB layer having a boron B content of 15% or more for the ferromagnetic layer 13 in contact with the antiferromagnetic layer 12, and it is desirable to use a CoFe layer.

  In addition, it is desirable to use a CoFe layer rather than a CoFeB layer for the ferromagnetic layer 13 below the nonmagnetic layer 14 that constitutes the laminated ferrimagnetic pinned layer 31.

  Therefore, for example, the ferromagnetic layer on the side in contact with the insulating layer 16 serving as a tunnel barrier is a CoFeB layer, and the ferromagnetic layer on the nonmagnetic layer 14 side is a CoFe layer. Layer 15 may be configured.

  The memory element 3 of the present embodiment is manufactured by continuously forming the base layer 11 to the cap layer 21 in a vacuum apparatus, and then forming a pattern of the memory element 3 by processing such as etching. Can do.

  According to the above-described embodiment, in the magnetization fixed layers 31 and 32 sandwiching the storage layer 17 of the storage element 3, the magnetizations M15 and M19 of the ferromagnetic layers 15 and 19 closest to the storage layer 17 are opposite to each other. Therefore, the spin injection efficiency can be increased. Thereby, the amount of current required to reverse the direction of the magnetization M1 of the storage layer 17 by spin injection can be reduced.

  Further, according to the present embodiment described above, the intermediate layer between the storage layer 17 and the first magnetization fixed layer 31 below it is the first insulating layer 16, and the storage layer 17 and the first layer above it are the first layers. The intermediate layer between the two fixed magnetization layers 32 is the second insulating layer 18, and since both the intermediate layers 16 and 18 are also insulating layers, the spin current is suppressed from being attenuated and sufficient spin injection is performed. Efficiency can be obtained. Thereby, the spin injection efficiency can be further improved, and the amount of current necessary for reversing the direction of the magnetization M1 of the storage layer 17 by spin injection can be reduced.

That is, the amount of current necessary for recording information in the memory element 3 can be reduced, and power consumption can be reduced in a memory including the memory element 3.
Therefore, it is possible to realize a memory with low power consumption that has not been conventionally available.

Furthermore, according to the present embodiment, the area resistance values of the first insulating layer 16 and the second insulating layer 18 are different.
Thereby, even if the magnetoresistance change rate on the high resistance side is canceled out by the magnetoresistance change rate on the low resistance side, a large magnetoresistance change rate can be obtained in the entire memory element 3.

Thus, since the magnetoresistive change rate of the memory element 3 is sufficiently large, a high output can be obtained by reading the information recorded in the memory layer 17 of the memory element 3 using the magnetoresistive change. Therefore, information can be easily read out.
Thereby, in a memory including the memory element 3, for example, a current flowing through the memory element 3 when information is read is reduced to reduce power consumption at the time of reading, a circuit for detecting an output, etc. It becomes possible to simplify the configuration.

Next, as another embodiment of the present invention, a cross-sectional view of a memory element constituting a memory is shown in FIG.
In the memory element 30, the second magnetization fixed layer 32 has a laminated ferrimagnetic structure.
Specifically, the second magnetization fixed layer 32 has a configuration in which three ferromagnetic layers 22, 24, and 26 are stacked via nonmagnetic layers 23 and 25 and antiferromagnetically coupled.
Since each of the ferromagnetic layers 22, 24, and 26 of the second magnetization fixed layer 32 has a laminated ferrimagnetic structure, the magnetization M22 of the ferromagnetic layer 22 faces right, the magnetization M24 of the ferromagnetic layer 24 faces left, and is strong. The magnetization M26 of the magnetic layer 26 is directed to the right, and is opposite to each other.
As a result, the magnetic fluxes leaking from the ferromagnetic layers 22, 24, 26 of the second magnetization fixed layer 32 cancel each other.

Further, the magnetic fluxes from the respective ferromagnetic layers in the second magnetization fixed layer 32 are offset.
Specifically, in the second magnetization fixed layer 32, the product of unit volume saturation magnetization and film thickness (= area magnetization amount) of the ferromagnetic layers whose magnetizations are opposite to each other so that the combined magnetization becomes almost zero. ) Are equal, that is, the following relationship holds.
Ms22 · t22 + Ms26 · t26 = Ms24 · t24
(However, Ms22, Ms24, and Ms26 are unit volume saturation magnetizations of the ferromagnetic layers 22, 24, and 26, respectively, and t22, t24, and t26 are the film thicknesses of the ferromagnetic layers 22, 24, and 26, respectively.)

Further, in the present embodiment, the magnetization M15 of the ferromagnetic layer 15 closest to the storage layer 17 in the first magnetization fixed layer 31 is directed to the left, and the storage layer 17 is the most in the second magnetization fixed layer 32. The magnetization M22 of the near ferromagnetic layer 22 is rightward, and they are opposite to each other.
Thus, in the magnetization fixed layers 31 and 32 sandwiching the storage layer 17, the magnetizations M15 and M22 of the ferromagnetic layers 15 and 22 closest to the storage layer 17 are opposite to each other, thereby increasing the spin injection efficiency. Since it can be increased, the amount of current necessary for reversing the magnetization direction of the storage layer 17 by spin injection can be reduced.

Other configurations are the same as those of the memory element 3 shown in FIG.
That is, the first insulating layer 16 and the second insulating layer 18 have different area resistance values, similar to the memory element 3 of the previous embodiment shown in FIG.

Further, a memory having a structure similar to that of the memory illustrated in FIG. 1 can be formed using the memory element 30 of this embodiment.
That is, the memory element 30 is arranged near the intersection of two types of address wirings to form a memory, and a current in the vertical direction (stacking direction) is passed through the memory element 30 through the two types of address wirings, and the memory layer is formed by spin injection. The information can be recorded in the memory element 30 by reversing the direction of magnetization of 17.

According to the above-described present embodiment, in the magnetization fixed layers 31 and 32 sandwiching the storage layer 17 of the storage element 30, the ferromagnetic layers 15 and 22 closest to the storage layer 17, respectively, as in the previous embodiment. Since the magnetizations M15 and M22 are in opposite directions, the spin injection efficiency can be increased. Thereby, the amount of current required to reverse the direction of the magnetization M1 of the storage layer 17 by spin injection can be reduced.
The intermediate layer between the storage layer 17 and the first magnetization fixed layer 31 below it is the first insulating layer 16, and between the storage layer 17 and the second magnetization fixed layer 32 above it. Since the intermediate layer is the second insulating layer 18 and each of the intermediate layers 16 and 18 is also an insulating layer, it is possible to suppress the decay of the spin current and obtain a sufficient spin injection efficiency. Thereby, the spin injection efficiency can be further improved, and the amount of current necessary for reversing the direction of the magnetization M1 of the storage layer 17 by spin injection can be reduced.

In other words, the amount of current necessary for recording information in the memory element 30 can be reduced, and power consumption can be reduced in a memory including the memory element 30.
Therefore, it is possible to realize a memory with low power consumption that has not been conventionally available.

  Furthermore, according to the present embodiment, the area resistance values of the first insulating layer 16 and the second insulating layer 18 are different as in the previous embodiment. Thereby, even if the magnetoresistance change rate on the high resistance side is canceled out by the magnetoresistance change rate on the low resistance side, a large magnetoresistance change rate can be obtained in the entire memory element 30.

Thus, since the magnetoresistive change rate of the memory element 30 is sufficiently large, a high output can be obtained by reading the information recorded in the memory layer 17 of the memory element 30 using the magnetoresistive change. Therefore, information can be easily read out.
Accordingly, in a memory including the memory element 30, for example, a current flowing through the memory element 30 when information is read is reduced to reduce power consumption at the time of reading, a circuit for detecting an output, etc. It becomes possible to simplify the configuration.

  In the description of each embodiment described above, the first insulating layer 16 below the memory layer 17 has a relatively high resistance, and the second insulating layer 18 above the memory layer 17 has a relatively low resistance. Although described as a configuration having a resistance, an insulating layer below the storage layer may have a relatively low resistance, and an insulating layer above the storage layer may have a relatively high resistance.

(Example)
Here, in the structure of the memory element of the present invention, the material and film thickness of each layer were specifically selected, and the characteristics were examined.
Actually, as shown in FIGS. 1 and 8, the memory includes a semiconductor circuit for switching in addition to the memory element. Here, for the purpose of examining the magnetoresistive characteristics of the memory layer, the memory is stored. The study was performed using a wafer on which only elements were formed.

(Membrane structure 1: Sample 1)
First, a 300 nm thick thermal oxide film is formed on a 0.575 mm thick silicon substrate, and a Ta (3 nm) / Al (60 nm) laminated film is previously formed thereon as a lower electrode layer. The memory element 3 having the configuration shown in FIG. 2 was formed above.
Specifically, in the memory element 3 having the configuration shown in FIG. 2, the base film 11 is a Ta film having a thickness of 3 nm, the antiferromagnetic layer 12 is a PtMn film having a thickness of 30 nm, and the first magnetization fixed layer 31 is configured. The ferromagnetic layer 13 to be formed is a CoFe film having a thickness of 2 nm, the nonmagnetic layer 14 constituting the first magnetization fixed layer 31 having a laminated ferrimagnetic structure is the Ru film having a thickness of 0.8 nm, and the first magnetization fixed layer 31 is configured. The ferromagnetic layer 15 is a CoFeB film having a thickness of 2 nm, the first insulating layer 16 serving as a tunnel insulating layer is an aluminum oxide film obtained by oxidizing an Al film having a thickness of 0.5 nm, and the storage layer 17 is a CoFeB film having a thickness of 2 nm. The second insulating layer 18 to be a tunnel insulating layer is an aluminum oxide film obtained by oxidizing an Al film having a thickness of 0.5 nm, and the ferromagnetic layer 19 constituting the second magnetization fixed layer 32 is a CoFe film having a thickness of 2.5 nm. The film and antiferromagnetic layer 20 have a thickness of 30 nm. tMn film, the cap layer 21 by selecting the Ta film having a thickness of 5 nm, to form each layer.
That is, the memory element 3 was manufactured with the material and film thickness of each layer as the following configuration (film configuration 1).
Membrane configuration 1:
Ta (3nm) / PtMn (30nm) / CoFe (2nm) / Ru (0.8nm) / CoFeB (2nm) / Al (0.5nm) -Ox / CoFeB (3nm) / Al (0.5nm) -Ox / CoFe (2.5 nm) / PtMn (30nm) / Ta (5nm)
In the above film configuration, the PtMn composition whose alloy composition is not shown is Pt50Mn50 (atomic%).
Each layer other than the insulating layers 16 and 18 made of an aluminum oxide film was formed using a DC magnetron sputtering method.
The insulating layers 16 and 18 made of an aluminum oxide (Al—O _x ) film are formed by first depositing a metal Al film at a predetermined thickness by a DC sputtering method, and then filling the chamber with a predetermined pressure to fill the chamber with a predetermined pressure. The metal Al layer was oxidized by leaving it for a period of time. After that, it was evacuated again to a high vacuum of 1 × 10 ⁻⁷ to 1 × 10 ⁻⁸ Torr, and the next layer was formed.
The resistance values of the first insulating layer 16 and the second insulating layer 18 were adjusted by setting the chamber gas pressure to 10 Torr and the oxidation time to 600 seconds.
Further, after each layer of the memory element 3 was formed, heat treatment was performed at 10 kOe · 270 ° C. for 4 hours in a heat treatment furnace in a magnetic field, and ordered heat treatment was performed on the PtMn films of the antiferromagnetic layers 12 and 20.

  Next, after masking the word line portion by photolithography, selective etching was performed by Ar plasma on the laminated film other than the word line to form the word line (lower electrode). At this time, except for the word line portion, the substrate was etched to a depth of 5 nm.

  Thereafter, a mask of the pattern of the memory element 3 was formed by an electron beam drawing apparatus, and selective etching was performed on the laminated film to form the memory element 3. Except for the memory element 3 portion, etching was performed up to the Al layer of the lower electrode layer.

As the size of the memory element is reduced, Δ = KuV / kT (Ku is the anisotropic energy, V is the volume of the magnetic material, k is the Boltzmann constant, and T is the temperature) becomes too small. Due to the problem of the thermal fluctuation resistance of the magnetic material, the magnetization direction becomes unstable, and the magnetization direction holding characteristic is insufficient. On the other hand, if the size of the memory element is made too large, the above Δ becomes too large, so the spin torque necessary for magnetization reversal becomes large, a larger current density is required, and the area is large. A larger current needs to flow through the memory element.
Therefore, the pattern of the memory element was an elliptical shape having a short axis of 70 nm and a long axis of 170 nm.
The voltage at which the tunnel insulating layer breaks depends on the material and the forming conditions, and depends on the size of the memory element to be measured. It was in the range of approximately 1.0 to 1.2 V for an elliptical storage element of 170 μm.

Next, the portions other than the memory element 3 portion were insulated by sputtering of Al ₂ O ₃ having a thickness of about 100 nm.
Thereafter, a contact on the upper surface of the memory element 3 was formed by lift-off.
Next, an upper electrode layer having a sufficiently low resistance of Cr (20 nm) / Cu (100 nm) / Au (100 nm) is formed, and a bit line and a measurement pad portion to be the upper electrode are formed using photolithography. Thus, a sample of the memory element was manufactured and used as Sample 1.

(Membrane structure 2: Sample 2 to Sample 7)
The ferromagnetic layer 19 constituting the upper second magnetization pinned layer 32 is a laminated film of a CoFeB film having a film thickness of 1.0 nm and a CoFe film having a film thickness of 2.0 nm, and the other structure is the same as that of the film structure 1 Thus, a memory element was manufactured.
That is, a memory element was manufactured by setting the material and film thickness of each layer to the following configuration (film configuration 2).
Membrane configuration 2:
Ta (3nm) / PtMn (30nm) / CoFe (2nm) / Ru (0.8nm) / CoFeB (2nm) / Al (0.5nm) -Ox / CoFeB (3nm) / Al (0.5nm) -Ox / CoFeB (1.0 nm) / CoFe (2.0 nm) / PtMn (30 nm) / Ta (5 nm)

And in this film | membrane structure 2, each sample of the memory element of the samples 2-6 which produced the conditions (pressure or time) of the oxidation which each forms an insulating layer was produced.
In sample 2, as in sample 1, the first insulating layer 16 and the second insulating layer 18 were both oxidized for 600 seconds at a pressure of 10 Torr.
In Sample 3, the first insulating layer 16 was oxidized at a pressure of 10 Torr for 1800 seconds, and the second insulating layer 18 was oxidized at a pressure of 10 Torr for 300 seconds. That is, as compared with sample 2, the oxidation time of the first insulating layer 16 was increased to increase the resistance value, and the oxidation time of the second insulating layer 18 was shortened to decrease the resistance value.
In the sample 4, the first insulating layer 16 was oxidized at a pressure of 10 Torr for 1800 seconds, and the second insulating layer 18 was oxidized at a pressure of 10 Torr for 600 seconds. That is, as compared with Sample 2, the oxidation time of the first insulating layer 16 was lengthened to increase the resistance value.
In Sample 5, the first insulating layer 16 was oxidized at a pressure of 10 Torr for 600 seconds, and the second insulating layer 18 was oxidized at a pressure of 0.5 Torr for 600 seconds. That is, as compared with Sample 2, the pressure of the second insulating layer 18 was reduced to reduce the resistance value.
In sample 6, the first insulating layer 16 was oxidized at a pressure of 10 Torr for 600 seconds, and the second insulating layer 18 was oxidized at a pressure of 0.1 Torr for 600 seconds. That is, as compared with Sample 2, the pressure of the second insulating layer 18 was reduced to reduce the resistance value.

Further, the metal Al layer forming the second insulating layer 18 is slightly thinned to a film thickness of 0.45 nm with respect to the film structure 2, and the other structure is the same as that of the film structure 2 to manufacture a memory element. Sample 7 was obtained.
That is, in Sample 7, the material and film thickness of each layer have the following configuration (film configuration 2X).
Membrane configuration 2X:
Ta (3nm) / PtMn (30nm) / CoFe (2nm) / Ru (0.8nm) / CoFeB (2nm) / Al (0.5nm) -Ox / CoFeB (3nm) / Al (0.45nm) -Ox / CoFeB (1.0 nm) / CoFe (2.0 nm) / PtMn (30 nm) / Ta (5 nm)
Since the first insulating layer 16 is thinner in the sample 7 than in the sample 2, the resistance value is also lower.

(Membrane structure 3: Sample 8)
By reversing the configuration of the layers 13, 14, 15 of the lower first magnetization fixed layer 31 and the configuration of the layers 19 of the upper second magnetization fixed layer 32, the thickness of the magnetic layer is further changed, The magnetic layer of the lower magnetization fixed layer has a thickness of 2 nm, and the two magnetic layers of the upper magnetization fixed layer have a thickness of 2.5 nm. Further, the lower first insulating layer 16 is oxidized at a pressure of 10 Torr for 600 seconds, the upper second insulating layer 18 is oxidized at a pressure of 5 Torr for 600 seconds, and the other structure is the same as that of the film structure 1, Was prepared as a sample 8.
That is, a memory element was manufactured with the material and film thickness of each layer as the following configuration (film configuration 3).
Membrane configuration 3:
Ta (3nm) / PtMn (30nm) / CoFe (2nm) / Al (0.5nm) -Ox / CoFeB (3nm) / Al (0.5nm) -Ox / CoFe (2.5nm) / Ru (0.8nm) / CoFe ( 2.5nm) / PtMn (30nm) / Ta (5nm)
In this sample 8, the resistance value is lowered by reducing the pressure of oxidation of the upper second insulating layer 18.

(Membrane structure 4: Samples 9 to 11)
Instead of producing the memory element 3 shown in FIG. 2, the memory element 30 shown in FIG. 3 was produced.
Specifically, in the memory element 30 shown in FIG. 3, the magnetic layer 22 constituting the upper second magnetization fixed layer 32 is composed of a CoFeB film having a thickness of 1.0 nm and a CoFe film having a thickness of 2.0 nm. The nonmagnetic layers 23 and 25 constituting the second magnetization pinned layer 32 of the laminated film and the laminated ferri structure are the Ru film having a film thickness of 0.8 nm, and the magnetic layer 24 constituting the second magnetization pinned layer 32 is the film thickness x. The CoFe film (nm) and the magnetic layer 26 constituting the second magnetization fixed layer 32 are selected as CoFe films having a film thickness of 2.5 nm, and the other layers are made of the same material and film thickness as the film structure 1, and each layer Formed. The lower first insulating layer 16 was oxidized at a pressure of 10 Torr for 600 seconds, and the upper second insulating layer 18 was oxidized at a pressure of 5 Torr for 600 seconds.
That is, the memory element 30 was manufactured by setting the material and film thickness of each layer to the following configuration (film configuration 4).
Membrane configuration 4:
Ta (3nm) / PtMn (30nm) / CoFe (2nm) / Ru (0.8nm) / CoFeB (2nm) / Al (0.5nm) -Ox / CoFeB (3nm) / Al (0.5nm) -Ox / CoFeB (1.0 nm) / CoFe (2.0nm) / Ru (0.8nm) / CoFe (xnm) / Ru (0.8nm) / CoFe (2.5nm) / PtMn (30nm) / Ta (5nm)

And in this film | membrane structure 4, each sample of the memory element of the sample 9-the sample 11 which changed the film thickness x (nm) of the magnetic layer 24 of the middle of the 2nd magnetization fixed layer 32 of the upper layer was produced, respectively.
In sample 9, the thickness x of the magnetic layer 24 was 5 nm.
In Sample 10, the thickness x of the magnetic layer 24 was 4 nm.
In sample 11, the film thickness x of the magnetic layer 24 was 3 nm.

(Membrane structure 5: Sample 12)
The upper second insulating layer 18 is formed of a 1.2 nm-thickness MgO (magnesium oxide) film, and the other configuration is the same as the film configuration 4 to manufacture the memory element 30. did. The MgO film was formed by directly depositing an oxide by RF sputtering using an MgO target.
The first insulating layer 16 was oxidized for 600 seconds at a pressure of 10 Torr. Further, the thickness of the magnetic layer 24 of the magnetization fixed layer 32 was 4 nm (same as that of the sample 10).
That is, in the sample 12, the material and film thickness of each layer have the following configuration (film configuration 5).
Membrane configuration 5:
Ta (3nm) / PtMn (30nm) / CoFe (2nm) / Ru (0.8nm) / CoFeB (2nm) / Al (0.5nm) -Ox / CoFeB (3nm) / MgO (1.2nm) / CoFeB (1nm) / CoFe (2.5nm) / Ru (0.8nm) / CoFe (4nm) / Ru (0.8nm) / CoFe (2.5) / PtMn (30nm) / Ta (5nm)

(Comparative example)
Samples 1 to 12 described above are the configurations of the present invention, that is, the samples of the examples. On the other hand, as comparative examples, samples of memory elements having configurations other than the configurations of the present invention were produced.

(Membrane structure 6: Sample 13)
Up to the memory layer 17 was formed in the same manner as in the film configuration 1, and a memory element was manufactured as a configuration in which a cap layer was formed thereon. That is, it is a configuration of a normal spin injection storage element in which the magnetization fixed layer is provided only on the lower layer side of the storage layer.
That is, a memory element was manufactured with the material and film thickness of each layer as the following configuration (film configuration 6).
Membrane configuration 6:
Ta (3nm) / PtMn (30nm) / CoFe (2nm) / Ru (0.8nm) / CoFeB (2nm) / Al (0.5nm) -Ox / CoFeB (3nm) / Ta (5nm)
This was used as a sample of the memory element of Sample 13.

(Membrane structure 7: Sample 14)
A memory element was manufactured with the material and film thickness of each layer as the following configuration (film configuration 7).
Membrane configuration 7:
Ta (3nm) / CoFeB (3nm) / Al (0.5nm) -Ox / CoFe (2.5nm) / Ru (0.8nm) / CoFe (5nm) / Ru (0.8nm) / CoFe (2.5nm) / PtMn (30nm ) / Ta (5nm)
The aluminum oxide film was oxidized for 600 seconds at a pressure of 10 Torr.
This was used as a sample of the memory element of Sample 14.
The memory element of Sample 14 has a configuration in which the magnetization fixed layer is provided only on the upper layer side of the storage layer, and the magnetization fixed layer has a laminated ferrimagnetic structure including three magnetic layers and a nonmagnetic layer therebetween. ing.

(Membrane structure 2: Sample 15)
In the film configuration 2, the upper second insulating layer 18 was oxidized at a pressure of 50 Torr for 600 seconds, and the others were fabricated in the same manner as in the sample 2, and a memory element was prepared as a sample 15.
In the memory element of Sample 15, the resistance value is increased by increasing the oxidation pressure of the second insulating layer 18.

(Membrane structure 8: Sample 16)
The upper second magnetization fixed layer 32 is formed by two CoFe films having a film thickness of 2.5 nm and a Ru film having a film thickness of 0.8 nm therebetween, and the other structure is the same as the film structure 4. A memory element was manufactured and used as Sample 16. The first insulating layer 16 was oxidized for 600 seconds at a pressure of 10 Torr, and the second insulating layer was oxidized for 600 seconds at a pressure of 5 Torr.
That is, in the sample 16, the material and film thickness of each layer have the following configuration (film configuration 8).
Membrane configuration 8:
Ta (3nm) / PtMn (30nm) / CoFe (2nm) / Ru (0.8nm) / CoFeB (2nm) / Al (0.5nm) -Ox / CoFeB (3nm) / Al (0.5nm) -Ox / CoFe (2.5 nm) / Ru (0.8nm) / CoFe (2.5nm) / PtMn (30nm) / Ta (5nm)
In the storage element of Sample 16, the two magnetization fixed layers above and below the storage layer each have a laminated ferrimagnetic structure including two magnetic layers and a nonmagnetic layer therebetween.

The characteristics of the memory elements of the above samples were evaluated as follows.
Prior to the measurement, a magnetic field was externally applied to the storage element.

(Measurement of area resistance and resistance change rate)
The bias voltage applied to the word line terminal and the bit line terminal is adjusted to 10 mV, the direction of magnetization of the storage layer is reversed by an external magnetic field, the area resistance value of the entire storage element is measured, and resistance-external The relationship between magnetic fields was investigated.
Then, the resistance change rate is calculated from the resistance value (high resistance) in the high resistance state and the resistance value (low resistance) in the low resistance state using the formula (high resistance-low resistance) / low resistance. did.

(Measurement of reverse current value and TMR ratio)
The resistance value of the memory element was measured by changing the amount of current flowing through the memory element at a room temperature of 25 ° C., and a resistance-current curve was obtained from the measurement result. In addition, the measurement which obtains this resistance-current curve was performed about the electric current of both polarities (plus direction and minus direction).

Here, an example of a resistance-current curve is shown in FIG.
As shown in FIG. 6, when a certain current or more is applied, the state changes from the high resistance state to the low resistance state or vice versa, and it can be confirmed that the magnetization is reversed.

From this resistance-current curve, a current value at which the resistance value changes was obtained, and this was set as an inversion current value for reversing the direction of magnetization. The inversion current value was obtained for the bipolar current.
In the measurement of the reversal current, the threshold value at which the magnetization direction reverses causes an offset that varies depending on the external magnetic field. In order to eliminate this offset, (1) in the above-described measurement of the rate of change in resistance, the offset magnetic field of the RH loop is obtained in advance from the relationship between the resistance and the external magnetic field, and the inversion is performed while applying the offset magnetic field from the outside. Two methods are conceivable: measuring the current, and (2) measuring the dependence of the reversal current on the external magnetic field while changing the applied magnetic field from the outside. Here, the measurement was performed by employing the method (1).
Further, although it depends on the resistance value of the memory element, it is known that the tunnel insulating layer breaks down at a bias voltage of about 1.0 to 1.2 V. Therefore, the upper limit of the applied current is 0.8 V It was set as the current value which applied.
And the reversal current density was computed from the average value of the reversal current value (absolute value) of both polarity of + and-.

  As a measurement result, first, the area resistance value of the memory element in the low resistance state and the resistance change rate of the memory element of each sample are shown in Table 1. Each measured value in Table 1 is an average value of values obtained by measuring 200 memory elements manufactured on each sample wafer.

  Table 2 shows the reversal current value and reversal current density of each sample. Each measured value in Table 2 is an average value of values obtained by measuring 10 memory elements.

  Hereinafter, based on the results of Tables 1 and 2, the operational effects of the configuration of the memory element of the present invention will be considered.

First, comparing sample 1 as an example of the present invention with sample 13 as a comparative example, sample 1 has two MTJ elements formed by providing fixed magnetization layers above and below the storage layer, respectively. On the other hand, in Sample 13, only one MTJ element is configured by providing a magnetization fixed layer only on the lower layer side of the storage layer.
The rate of change in resistance is 24.1% in sample 1 and 42.2% in sample 13. The rate of change in resistance is lower in sample 1, and the rate of change in resistance is offset by two MTJ elements. You can see that
However, the magnetization reversal current density is 4.6 × 10 ⁶ (A / cm ² ) in the sample 1 and 6.5 × 10 ⁶ (A / cm ² ) in the sample 13, and the sample 1 is smaller. .
Therefore, by configuring two MTJ elements with the storage layer sandwiched as in sample 1, it is possible to reduce the reversal current and reverse the magnetization direction of the storage layer with a smaller current.

However, in Sample 1, since the formation conditions of the two insulating layers 16 and 18 are the same, if the same tunnel barrier is formed by these insulating layers 16 and 18, as shown in FIG. The resistance change rate of the entire element should not be obtained.
Therefore, sample 1 is compared with sample 14 in which only a single MTJ element is configured by providing a magnetization fixed layer only on the upper layer side of the storage layer.
In sample 14, the sheet resistance value was 6.3 Ωμm ² and the resistance change rate was 26.6%. That is, the sheet resistance value is smaller than that of sample 1, and the resistance change rate is slightly larger.
Further, when the sample 14 and the sample 13 are compared, the reversal current value is about the same, but the area resistance value and the resistance change rate are greatly different. The cause of this is not necessarily clear, but the composition of the magnetic layer sandwiching the insulating layer above and below is different (sample 13 is an amorphous CoFeB film on both the top and bottom, sample 14 is an amorphous CoFeB film with a lower layer and an upper layer) Since it is a crystalline CoFe film), the film formation state of the insulating layer is different from that of the magnetization fixed layer (sample 13 is a laminated ferrimagnetic structure of two magnetic layers, and sample 14 is This is considered to be a laminated ferrimagnetic structure of three magnetic layers.
Also in the first insulating layer 16 and the second insulating layer 18 of the sample 1, the compositions of the magnetic layers sandwiching the insulating layers 16 and 18 are different, and the configurations of the two magnetization fixed layers 31 and 32 are different. . For this reason, even if the insulating layers 16 and 18 are formed under the same conditions, it is presumed that the resistance values of the MTJ elements are different.
Accordingly, since the resistance values of the two MTJ elements are different from each other and the resistance change rate is slightly different, the resistance change rates of the two MTJ elements are not offset in Sample 1, and the resistance change rate of the entire memory element is increased. It is thought that it was obtained.

Next, sample 2 will be described.
In Sample 2, a CoFeB film is disposed on the second insulating layer 18 side of the barrier in the second magnetization fixed layer 32 that is the upper layer of the storage layer.
This sample 2 is compared with the inversion current density of 4.6 × 10 ⁶ (A / cm ² ) of the sample 1 in which the CoFe film is arranged on the second insulating layer 18 side of the barrier of the second magnetization fixed layer 32. Thus, the reversal current density is reduced to 2.7 × 10 ⁶ (A / cm ² ).
The reason why the reversal current is reduced in this way is that spin injection magnetization reversal is possible at a lower current density if a magnetic layer (CoFeB film) with high spin polarizability and high spin injection efficiency is arranged at the interface with the barrier. It is estimated that
Therefore, it can be said that forming the CoFeB film in contact with the insulating layer of the barrier is more preferable than the CoFe film in terms of reducing the reversal current.

Next, Samples 3 to 7 as examples of the present invention and Sample 15 as a comparative example are compared. These samples are obtained by changing the combination of the formation conditions of the two insulating layers 16 and 18 in the same film configuration 2 as the sample 2.
First, in Sample 3 and Sample 4, the resistance value of the lower first insulating layer 16 is made larger, and the resistance value of the upper second insulating layer 18 is relative to the first insulating layer 16. It was made small. The resistance change rate of sample 3 is 33%, and the resistance change rate of sample 4 is 32.2%, both of which exceed the value of sample 2.
Therefore, for the purpose of increasing the rate of change in resistance when reading information from the storage element, the resistance value of the other barrier is different from that of the other barrier as in sample 3, as compared to sample 2. It is desirable that the difference is large.
Next, in Samples 5 and 6, the lower barrier formation conditions are the same as in Sample 2, and the oxidation pressure is reduced so that the resistance value of the upper barrier is smaller than in Sample 2. The resistance values of Sample 5 and Sample 6 are almost the same as those of Sample 2. The lower the barrier barrier resistance value, the smaller the resistance value of the memory element.
Although the reversal current density does not reach that of sample 2, it is smaller than that of sample 1, and a current reduction effect is observed.
Next, in sample 7, the resistance value of the upper barrier is reduced by reducing the thickness of the metal Al layer before oxidation. In Sample 7, the same resistance change rate and reverse current density as in Samples 5 and 6 were obtained.
Next, in the sample 15 of the comparative example, the pressure condition for the oxidation of the upper second insulating layer 18 is made stronger and the resistance values of the upper and lower barriers are adjusted to be the same. The magnetization reversal current density is 4.1 × 10 ⁶ (A / cm ² ), which is not inferior to that of sample 2, but the resistance change rate is 3.4%, which is 23 of sample 2 which is an example of the present invention. It is significantly lower than 1%. That is, in the memory element of Sample 15, since the resistance change rate is small, the output at the time of reading information becomes small and it is difficult to read.

Next, Sample 8 and Sample 9 of the example are compared with Sample 16 of the comparative example.
In the sample 8, the lower first magnetization fixed layer 31 is composed of one ferromagnetic layer, and the upper second magnetization fixed layer 32 is a laminate in which two ferromagnetic layers are laminated via a nonmagnetic layer. It has a ferri structure. In Sample 9, the lower first magnetization fixed layer 31 has a laminated ferrimagnetic structure of two ferromagnetic layers, and the upper magnetization fixed layer 32 has a laminated ferrimagnetic structure of three ferromagnetic layers. In each sample, the magnetization directions of the magnetic layers 15 and 19 in contact with the insulating layers 16 and 18 of the barrier are fixed antiparallel by the antiferromagnetic layers 11 and 20.
On the other hand, the sample 16 of the comparative example has a laminated ferrimagnetic structure in which both the lower magnetization fixed layer and the upper magnetization fixed layer are two ferromagnetic layers, so that the magnetic layer in contact with the insulating layer of the barrier by the antiferromagnetic layer. The magnetization direction of the layers is fixed in parallel.

In these three types of samples 8, 9, and 16, as shown in Table 1, a resistance change rate of a certain degree or more can be obtained.
However, the magnetization reversal current density is 4.3 and 2.3 × 10 ⁶ (A / cm ² ) in the sample 8 and the sample 9 of the embodiment, respectively, while the barrier side of the two magnetization fixed layers is In the sample 16 of the comparative example in which the magnetization direction of the magnetic layer is fixed in parallel, it is as large as 7.4 × 10 ⁶ (A / cm ² ), and the effect of reducing the reversal current is not seen.
This is because the effect of improving the spin injection efficiency cannot be obtained because the magnetization directions of the two magnetization fixed layers provided above and below the storage layer are not antiparallel via the tunnel barrier.

Therefore, in order to improve the efficiency of spin injection, it is necessary that the magnetization directions of the magnetic layers closest to the storage layer are fixed antiparallel in the two upper and lower magnetization fixed layers of the storage layer. I understand.
Such a configuration is conceivable in addition to the configuration of each sample of the example. In the two magnetization fixed layers, the condition is satisfied if the number of magnetic layers separated by the nonmagnetic layer is an odd number in one magnetization fixed layer and an even number in the other magnetization fixed layer. At this time, as in the magnetic layer 19 (lamination of the CoFeB film and the CoFe film) of the second magnetization fixed layer 32 of the film configuration 2, a plurality of magnetic layers that are directly laminated without a nonmagnetic layer interposed therebetween Considered as a single magnetic layer.

Next, Sample 2 and Samples 9 to 11 of the example of the present invention are compared with Sample 13 of the comparative example.
In the samples 2, 9, 10, and 11 of each example, as shown in Table 2, the magnetization reversal is compared with the magnetization reversal current 6.5 × 10 ⁶ (A / cm ² ) of the sample 13 of the comparative example. The current is decreasing.
Here, in sample 2, the lower first magnetization fixed layer 31 has a laminated ferrimagnetic structure of two ferromagnetic layers 13 and 15, and the upper second magnetization fixed layer 32 has a one-phase ferromagnetic layer 19. It is composed of As a result, in the lower first magnetization fixed layer 31, the leakage magnetic field from the end face of the magnetic layer processed into the memory element is canceled by the two laminated ferrimagnetic layers 13, 15, but the upper first layer In the second magnetization pinned layer 32, since there is only one magnetic layer 19, the leakage magnetic field from the end face of the magnetic layer is not canceled.
In the RH loop using the external magnetic field, the shift amount increases as the leakage magnetic field increases and the storage element size decreases.
As described above, the shift due to the leakage magnetic field also causes the shift of the magnetization reversal current, so the smaller the shift amount of the RH loop, the better.

Here, the result of measuring the RH loop of the memory element of Sample 2 is shown in FIG. In addition, the vertical axis | shaft of FIG. 7 is made into TMR ratio.
FIG. 7 shows that the RH loop is shifted to the positive side of the magnetic field.

  Here, the shift magnetic field of the RH loop was measured for samples 2, 9, 10, and 11 of the above-described embodiments. The measurement results are shown in Table 3.

From Table 3, it can be seen that the shift magnetic field is smaller in the other three samples 9, 10 and 11 as compared with sample 2.
In general, when comparing the antiferromagnetic coupling of the single-layered ferromagnetic layer and the antiferromagnetic layer with the antiferromagnetic coupling of the laminated ferrimagnetic structure, the antiferromagnetic coupling of the laminated ferrimagnetic structure is more magnetized. The fixing strength in the direction can be increased.

  From these points, as in Samples 9 to 11, by using a laminated ferrimagnetic structure for the upper and lower magnetization fixed layers of the storage layer, the shift of the RH loop can be reduced and larger. This is advantageous in that the magnetization fixed strength can be obtained.

Next, in these three samples 9, 10, and 11, the upper magnetization fixed layer 32 has a laminated ferrimagnetic structure of three ferromagnetic layers 22, 24, and 26, and the three ferromagnetic layers 22, 24, and 26 are formed. Among these, the direction of the magnetizations M22 and M26 of the other magnetic layers 22 and 26 (rightward direction) is the thickness of the magnetic layer (CoFe film) 24 in which the direction of the magnetization M24 (leftward direction) is opposite. The degree of canceling the leakage magnetic field is changed by changing to 5 nm, 4 nm, and 3 nm.
As described above, the magnitude of the loop shift varies depending on the size of the memory element, but in the results shown in Table 3, the sample 9 has the smallest loop shift.

From these results, it can be seen that a configuration with as little leakage magnetic field as possible is more preferable as the memory element.
The configuration of the memory element having a small leakage magnetic field is not limited to the sample 9 in the embodiment, and other configurations are possible.
The storage element with a small leakage magnetic field is configured such that a plurality of ferromagnetic layers are laminated with a nonmagnetic layer in each magnetization fixed layer of two magnetization fixed layers provided above and below the storage layer. For the area magnetization indicated by (film thickness) × (unit volume saturation magnetization) of each ferromagnetic layer, the total area magnetization Σ ( Mstp) is substantially equal to the sum Σ (Mstm) of the area magnetization of the ferromagnetic layer whose magnetization direction is fixed to the other. And about these sum total (SIGMA) (Mstp) and (SIGMA) (Mstm),
Σ (Mstp) = xΣ (Mstm), 0.8 <x <1.2
It is preferable to satisfy.
Usually, in the magnetization fixed layer having the laminated ferrimagnetic structure, the magnetization directions of the respective magnetic layers are alternately reversed. Therefore, the sums Σ (Mstp) and Σ (Mstm) of the area magnetization amounts are respectively odd-numbered magnetic layers. Corresponds to the sum of the area magnetization amounts of the even-numbered magnetic layers.

Next, a suitable material used for the tunnel barrier of the memory element of the present invention will be described using the results of the sample 12 of the example.
In the sample 12, an aluminum oxide film is used for the lower first insulating layer 16, and an MgO film is used for the upper second insulating layer 18. These materials are generally used as a tunnel insulating layer of an MTJ element.
In the sample 12, a resistance change rate of 37.2% was obtained, the reversal current density was 3.4 × 10 ⁶ (A / cm ² ), and 6.5 × 10 ⁶ of the sample 13 as a comparative example. Compared with (A / cm ² ), an effect of reducing the reversal current is obtained.
Therefore, it can be seen that MgO can be used as the material of the tunnel barrier of the present invention as in the sample 12.

  Further, as described above, as long as the two barriers each exhibit a sufficient rate of change in magnetoresistance and there is a difference in the resistance value of the tunnel junction, either one or both of the two tunnel barriers may have AlOx. Instead of MgO, it is possible to use.

  The present invention is not limited to the above-described embodiment, and various other configurations can be taken without departing from the gist of the present invention.

1 is a schematic configuration diagram (perspective view) of a memory according to an embodiment of the present invention. FIG. 2 is a cross-sectional view of the memory element in FIG. 1. It is sectional drawing of the memory element of other embodiment of this invention. It is a figure explaining schematic structure of a memory element which has two magnetic tunnel junction elements. It is a figure which shows the relationship between the ratio of the resistance value of each magnetic tunnel junction element, and the resistance change rate of a memory element. It is a figure which shows an example of the current-resistance characteristic of a memory element. 6 is a diagram illustrating an RH loop of a memory element of Sample 2. FIG. It is a schematic block diagram (perspective view) of a memory using magnetization reversal by spin injection. It is sectional drawing of the memory of FIG. It is the perspective view which showed the structure of the conventional MRAM typically.

Explanation of symbols

3, 30 Memory element, 11 Underlayer, 12, 20 Antiferromagnetic layer, 13, 15, 19, 22, 24, 26 Ferromagnetic layer, 14, 23, 25 Nonmagnetic layer, 16 First insulating layer, 18 Second insulating layer, 17 storage layer, 21 cap layer, 31 first magnetization fixed layer, 32 second magnetization fixed layer, MTJ1, MTJ2 MTJ element

Claims (10)

It has a storage layer that holds information according to the magnetization state of the magnetic material,
A magnetization fixed layer is provided above and below the storage layer via an intermediate layer, respectively.
Each of the intermediate layers consists of an insulating layer,
In the magnetization fixed layers above and below the storage layer, the magnetization directions of the ferromagnetic layers closest to the storage layer are opposite to each other,
By flowing a current in the stacking direction, the magnetization direction of the storage layer changes, and information is recorded on the storage layer.
The memory element, wherein two intermediate resistance values of the intermediate layer above and below the memory layer are different.   The fixed magnetization layer above and below the storage layer has a structure in which a plurality of ferromagnetic layers are stacked via a nonmagnetic layer, and the (film thickness) × (unit volume saturation magnetization) of the ferromagnetic layer With respect to the indicated area magnetization amount, in each of the magnetization fixed layers, the sum of the area magnetization amounts of the ferromagnetic layers whose magnetization is fixed in one direction and the ferromagnetic layers whose magnetization is fixed in the other direction The memory element according to claim 1, wherein a total sum of the area magnetization amounts is substantially equal.   2. The memory element according to claim 1, wherein in each of the magnetization fixed layers above and below the memory layer, the ferromagnetic layer in contact with the intermediate layer is a CoFeB layer.   2. The magnetization fixed layer above and below the storage layer, wherein an antiferromagnetic layer is provided on a side opposite to the storage layer, and the ferromagnetic layer in contact with the antiferromagnetic layer is a CoFe layer. Item 2. The memory element according to Item 1.   At least one of the magnetization fixed layers above and below the storage layer has a structure in which a plurality of ferromagnetic layers are stacked via a nonmagnetic layer, and a ferromagnetic layer in contact with the nonmagnetic layer is provided The memory element according to claim 1, wherein the memory element is a CoFe layer. A storage element having a storage layer for retaining information by the magnetization state of the magnetic material;
Two types of wiring intersecting each other,
In the storage element, a magnetization fixed layer is provided above and below the storage layer via an intermediate layer, respectively, each of the intermediate layers is made of an insulating layer, and in the magnetization fixed layer above and below the storage layer, The directions of magnetization of the ferromagnetic layers closest to the storage layer are opposite to each other, and by passing a current in the stacking direction, the magnetization direction of the storage layer changes, and the information of the information on the storage layer changes. Recording is performed, and the area resistance values of the two intermediate layers above and below the storage layer are different from each other,
The memory is characterized in that the memory element is arranged near an intersection of the two types of wiring and between the two types of wiring, and the current in the stacking direction flows through the memory element through the two types of wiring.   The storage element has a structure in which the fixed magnetization layer above and below the storage layer has a structure in which a plurality of ferromagnetic layers are stacked via a nonmagnetic layer, and the (film thickness) × (unit of ferromagnetic layer) For each of the magnetization fixed layers, the sum of the area magnetization amounts of the ferromagnetic layers whose magnetization is fixed in one direction and the magnetization is fixed in the other direction. The memory according to claim 6, wherein the total area magnetization amount of the ferromagnetic layers is substantially equal.   7. The memory according to claim 6, wherein in the storage element, in the fixed magnetization layer above and below the storage layer, the ferromagnetic layer in contact with the intermediate layer is a CoFeB layer.   In the storage element, an antiferromagnetic layer is provided on the opposite side of the magnetization fixed layer above and below the storage layer, and the ferromagnetic layer in contact with the antiferromagnetic layer is a CoFe layer The memory according to claim 6.   In the storage element, at least one of the magnetization fixed layers above and below the storage layer has a structure in which a plurality of ferromagnetic layers are stacked via a nonmagnetic layer, and is in contact with the nonmagnetic layer. The memory according to claim 6, wherein the ferromagnetic layer is a CoFe layer.

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