JP2006134963A - Receiving device and testing device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a receiving device wherein high frequency performance is tested by using a testing device without high frequency output function, and multiple receiving devices are simultaneously arranged on a wafer by using a semiconductor process. <P>SOLUTION: A receiving set 11 incorporates a high frequency signal generator 41. As a result, even if a conventional testing device 12 for digital and analog circuit is used instead of an expensive testing device which can output a high frequency signal, the high frequency signal characteristics in a wafer stage is tested, to reduce the generation of defective products in the examination after a package assembly, and to suppress and lower the inspection cost occupied in the manufacturing cost. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a receiving apparatus and a test apparatus that receive a high-frequency signal formed on a wafer using a semiconductor process.

  When a recent SOC (system-on-chip) semiconductor integrated circuit is tested in a production stage using a test apparatus, DC characteristics and AC characteristics are measured.

  Here, the test apparatus used in that case can generally handle a digital signal and a high-speed analog signal, but cannot output a high-frequency signal. That is, in the case of an SOC semiconductor integrated circuit, an analog signal to be input is at most several tens of MHz, and in the SOC semiconductor circuit, it operates at a frequency equal to or higher than that of a high-frequency signal, but it is limited to the semiconductor circuit. . Therefore, the test apparatus does not require means for generating such a high frequency signal.

  In addition, this test equipment can perform tests equivalent to the actual operation of the product, including the digital and analog units, even at the wafer stage. Therefore, after inspection, the wafer is divided into individual semiconductor integrated circuits into packages. In the inspection after assembling, there is almost no occurrence of circuit malfunction in the semiconductor integrated circuit itself, and the defect rate generated after assembling the divided chips into a package is low. As a result, the semiconductor integrated circuit that has passed the test at the wafer stage operates as a non-defective product even when it is almost packaged, and therefore, the loss in the manufacturing process is minimized.

On the other hand, in the case of a semiconductor integrated circuit that handles high-frequency signals, in the test system as shown in FIG.
A high-frequency signal processing system including a high-frequency variable gain unit, a frequency conversion unit, a local signal unit, a BB (baseband) variable gain unit, a passband limiting unit, and an output amplifier unit;
A local signal system that divides the output of the local signal unit by a prescaler unit (frequency divider), adds to the PLL (phase-locked loop) unit, and stabilizes the oscillation frequency of the local signal unit;
A crystal oscillation unit for generating a reference signal for comparison with the signal divided by the prescaler unit;
A PLL unit and an external control I / F unit that generates a control signal for controlling the high-frequency signal generation unit according to the present invention are configured from the outside of the receiving apparatus.

  The receiver has a power source, GND, RFAGC voltage, BBAGC voltage, high-frequency signal input, baseband signal output, charge pump current output, tuning voltage input, external control signal, oscillation input, oscillation output, and lock detection through a connection unit. Connected to each signal terminal.

  Here, since the test of the high-frequency signal processing system is not performed in the configuration of FIG. 24, the RFAGC voltage and the BBAGC voltage are fixed to the GND level on the connection portion.

  A signal is not applied to the high-frequency signal input terminal T10 during the operation test, but a DC-cut capacitor and series for the purpose of achieving high-frequency matching in order to prevent unnecessary operations. An RF input termination unit composed of a resistor having the same resistance value as the input impedance of T10 is connected.

  Between the charge pump current terminal and the tuning voltage terminal, an integral type loop filter unit for converting a change in the charge pump current into a change in the tuning voltage is inserted.

  A signal from the measurement signal generation unit of the test apparatus is added to the external control signal terminal, and the PLL unit is controlled via the external control I / F unit to set the oscillation frequency of the local signal unit, that is, the frequency of the received signal To do.

  A crystal oscillator is normally connected to the oscillation input terminal, but in a wafer stage test, a clock signal having the same frequency as the desired reference frequency is directly supplied from the measurement signal generator.

  The lock detection signal terminal outputs a lock detection signal from the PLL unit and is connected to the output signal measurement unit of the test apparatus.

  Since the baseband signal output terminal does not perform the test of the high frequency signal processing system, nothing is connected in the open state in the wafer stage test.

  The power supply terminal and the GND terminal supply a voltage and current sufficient to operate the receiving device from the variable voltage power supply unit.

  In the test apparatus, the measurement signal generation unit, the output signal measurement unit, and the variable voltage power supply unit are connected to a common input / output signal bus from the test control unit, and the program of the memory unit is also connected to the input / output signal bus. Follow the test.

As a known technique, there is a technique such as that disclosed in Patent Document 1.
JP 2002-232498 A (publication date August 16, 2002)

  However, as described above, since the test apparatus generally cannot output a high-frequency signal, in the conventional configuration described above, when the operation test at the wafer stage is performed with a conventional test apparatus for digital and analog circuits, a high-frequency signal is output. The test for inputting signals cannot be performed. That is, since a high-frequency signal cannot be applied to the high-frequency signal input terminal, the high-frequency variable gain unit, frequency conversion unit, baseband (BB) variable gain unit, passband limiting unit, and output buffer unit cannot be tested.

  Therefore, only the analog part that operates with DC characteristics at the wafer stage and some high-frequency signals is tested, and the passed chip is divided and assembled into a package, then the high-frequency signals necessary for the test are input from the actual high-frequency signal input However, even if the operation of the high-frequency variable gain unit, frequency conversion unit, baseband (BB) variable gain unit, passband limiting unit, and output buffer unit is checked, it will be rejected due to a complete malfunction or insufficient characteristics. As compared with the case where the wafer is rejected at the wafer stage, the loss including the processing cost of the wafer and the assembly cost of the package increases the manufacturing cost of the semiconductor integrated circuit.

  In addition, with the spread of portable devices, there is a strong demand for reducing the area and capacity of tuner units incorporating receivers, and the receivers assembled with semiconductor integrated circuits in packages are not mounted on the tuner units, but directly on the tuner units. There is a demand for mounting the semiconductor integrated circuit as it is. In this case, since a large number of components other than the semiconductor integrated circuit are mounted on the receiving device itself, if the defect rate of the semiconductor integrated circuit itself is high, a high frequency signal characteristic test after mounting the semiconductor integrated circuit on the receiving device If the product is rejected, the cost of parts becomes enormous, and it becomes difficult to keep the price of the final product low.

  In addition, by introducing a test apparatus that can handle high-frequency signals, tests with high-frequency signals can be performed, but the test apparatus itself is expensive, and basically all wafers are inspected at the wafer stage. The test time per test apparatus becomes longer. Therefore, in order to produce a large number of semiconductor integrated circuits, a lot of expensive test equipment is required, which greatly increases the manufacturing cost.

  The present invention has been made in view of the above problems, and an object of the present invention is to provide a high-frequency signal receiving device that is simultaneously realized on a wafer using a semiconductor process, and at least a part of the high-frequency output function. An object of the present invention is to realize a receiving apparatus and a testing apparatus that can test high-frequency performance using a testing apparatus that does not include the above.

  In order to solve the above-described problems, a receiving apparatus according to the present invention is a receiving apparatus which is formed on a wafer using a semiconductor process and receives a high frequency signal through a receiving signal path. A high-frequency signal generation unit that generates a high-frequency signal for testing when the test is performed and sends the high-frequency signal from the output end of the high-frequency signal generation unit to the input end of the reception signal path. Yes.

  With the above configuration, at the time of the test at the wafer stage, such a high-frequency signal is generated by the high-frequency signal generation unit when a test high-frequency signal is sent to the receiving apparatus. Then, a high-frequency signal is output from the high-frequency signal generation unit, is sent to the input end of the reception signal path, is subjected to signal processing during normal reception on the reception signal path, and is output from the reception device. The output signal is received by a test device outside the receiving device, and various test processes can be performed.

  Therefore, when a high-frequency signal is sent to the receiving device during a test at the wafer stage, it is not necessary to provide an external test device for at least a part of the circuit that generates such a high-frequency signal.

  Therefore, a high-frequency signal receiving device that is simultaneously implemented on a wafer using a semiconductor process and that does not have at least a part of the high-frequency output function is used to test the high-frequency performance of the receiving device. There is an effect that can be.

  Note that the operation of generating a high-frequency signal in the high-frequency signal generation unit is performed on the test device side outside the reception device via, for example, an external control I / F (interface) unit inside the reception device. Can do.

  In addition, a high-frequency signal is generated by a high-frequency signal generator, an output signal (for example, a baseband signal) is output from the receiving device, and a test process is performed by receiving the output signal on the test device side outside the receiving device. can do.

  Note that all of the high-frequency signal generation unit may be formed on the reception device, or a part of the high-frequency signal generation unit may be formed on the reception device and the rest may be formed on another part, for example, a test device. Good. When formed in the test apparatus, it may be formed in a boundary region (connecting portion) between the receiving apparatus and the receiving apparatus when the receiving apparatus and the testing apparatus are connected for the test.

  The receiving apparatus according to the present invention is characterized in that, in addition to the above configuration, the entire high-frequency signal generating unit is formed on the receiving apparatus.

  With the above configuration, the entire high-frequency signal generator is formed on the receiving device. Therefore, when a high-frequency signal is sent to the receiving device during a test at the wafer stage, it is not necessary to provide an external test device with a circuit that generates such a high-frequency signal. Therefore, in addition to the effects of the above-described configuration, a plurality of high-frequency signal receivers simultaneously implemented on a wafer using a semiconductor process and testing high-frequency performance using a test apparatus that does not have a high-frequency output function. It is possible to realize a receiving device that can be used.

  The receiving apparatus according to the present invention is characterized in that, in addition to the above-described configuration, the high-frequency signal generating unit and the input end of the receiving signal path are connected via a disconnectable wiring.

  With the above configuration, the high-frequency signal generation unit and the input end of the reception signal path are connected to each other through a disconnectable wiring. Therefore, by completely disconnecting the high-frequency signal generator from the original high-frequency signal input line after the wafer stage test is completed, the influence of the high-frequency signal generator for testing during normal operation in the product state can be reduced. Can be eliminated. Therefore, in addition to the effects of the above-described configuration, there is an effect that the influence of the high-frequency signal generating unit for the test during the normal operation in the product state can be easily eliminated.

  In addition to the above configuration, the receiving device according to the present invention is configured such that the output end of the high-frequency signal generator and the input end of the received signal path are connected via a wiring on the test device. It is a feature.

  With the above configuration, the output terminal of the high-frequency signal generator and the input terminal of the reception signal path are connected via the wiring on the test apparatus. Therefore, in this case, even after the receiving apparatus is cut out from the wafer and assembled into a package after the wafer stage test, the high-frequency signal characteristics can be tested again using the high-frequency signal generator. Therefore, in addition to the effects of the above-described configuration, there is an effect that it is possible to increase test opportunities and contribute to quality improvement.

  In addition to the above configuration, the receiving apparatus according to the present invention is configured so that the output terminal of the high-frequency signal generator and the input terminal of the reception signal path divide a plurality of receiving apparatuses on the same wafer. It is characterized by being connected via a wiring on a blank area.

  With the above configuration, the output end of the high-frequency signal generation unit and the input end of the reception signal path are connected via wiring on a blank area for dividing a plurality of reception devices on the same wafer. . Therefore, after the wafer stage test is completed, when dividing into individual semiconductor integrated circuits, the wiring connecting the high-frequency signal generating unit and the high-frequency gain variable unit is automatically cut outside the semiconductor integrated circuit. Therefore, a dedicated process for cutting the wiring becomes unnecessary. Therefore, in addition to the effect of the above configuration, there is an effect that the receiving device can be manufactured more easily.

  The receiving apparatus according to the present invention is characterized in that, in addition to the above configuration, the output end of the high-frequency signal generator and the input end of the reception signal path are adjacent to each other.

  With the above configuration, the output end of the high-frequency signal generator and the input end of the reception signal path are adjacent to each other. In particular, in the case where a plurality of electrode pads are provided around the wafer for electrical connection with the outside, the electrode pads for the output terminal of the high-frequency signal generator and the input terminals for the reception signal path are used. The electrode pads are adjacent to each other. Therefore, the wiring connecting the two is the shortest. Therefore, in addition to the effect of the above configuration, it is possible to suppress the power consumption due to the resistance derived from the wiring and to minimize the interference with other wirings and terminals.

  The receiving apparatus according to the present invention is characterized in that, in addition to the above configuration, an output level detection unit that detects an output level of the high-frequency signal generation unit is provided.

  With the above configuration, an output level detector that detects the output level of the high-frequency signal generator is provided. Therefore, by installing a means for detecting the output level from the high-frequency signal generator, the level of the high-frequency output signal can be read from the test device, and the test can be performed with the high-frequency signal rising normally. It becomes. Therefore, in addition to the effect of the above configuration, there is an effect that a more reliable test can be easily performed.

  In addition to the above-described configuration, the receiving device according to the present invention includes a terminal to which the high-frequency signal generation unit is input an output signal from the resonator provided on the test device for oscillation. It is characterized by that.

  With the above configuration, the high-frequency signal generation unit includes a terminal that is provided on the test apparatus and receives an output signal from a resonator for oscillation. Therefore, at the time of testing, if the resonator on the test apparatus is connected to the high-frequency signal generator, the high-frequency signal generator can generate and output a high-frequency signal without any problem. Therefore, in addition to the effect of the above-described configuration, there is an effect that the area of the high-frequency signal generation unit occupying on the receiving device can be reduced.

  In addition to the above configuration, the receiving device according to the present invention includes the high-frequency signal generation unit including an oscillation circuit and a PLL unit that stabilizes an oscillation frequency output from the oscillation circuit, and the PLL unit includes: A terminal for outputting an input signal to a loop filter unit provided on the test apparatus is provided, and the oscillation circuit includes a terminal for inputting an output signal from the loop filter unit.

  With the above configuration, the high-frequency signal generation unit includes an oscillation circuit and a PLL unit that stabilizes the oscillation frequency output from the oscillation circuit. The receiving apparatus and the test apparatus can be configured to be connected in the order of the PLL section, the loop filter section, and the oscillation circuit during the wafer stage test. Therefore, in addition to the effect of the above configuration, particularly when the measurement frequency is limited and the frequency stability is required, the frequency can be remarkably stabilized and a favorable test can be performed. .

  In addition to the above-described configuration, the high-frequency signal generator includes an oscillation circuit, and a frequency divider that converts the oscillation frequency output from the oscillation circuit to a low frequency and outputs the frequency to the outside The frequency divider includes a terminal for outputting an input signal to a PLL unit provided on the test apparatus, and the oscillation circuit is provided on the test apparatus to receive a signal from the PLL unit. A terminal is provided for receiving an output signal from the input loop filter unit.

  With the above configuration, the high-frequency signal generation unit includes an oscillation circuit and a frequency divider that converts the oscillation frequency output from the oscillation circuit to a low frequency and outputs the frequency to the outside. The receiving device and the test device can be configured to be connected in the order of the PLL unit, the loop filter unit, the oscillation circuit, and the frequency divider during the wafer stage test. Therefore, in addition to the effect of the above configuration, particularly when the measurement frequency is limited and the frequency stability is required, the frequency can be remarkably stabilized and a favorable test can be performed. .

  In addition to the above-described configuration, the receiving device according to the present invention includes a portion provided in the high-frequency signal generating unit and provided on the receiving device in a peripheral portion of the receiving device. It is a feature.

  With the above configuration, a portion of the high-frequency signal generation unit that is provided on the reception device is formed in a peripheral portion of the reception device. Therefore, in addition to the effect by the above configuration, there is an effect that the output of the high-frequency signal generation unit can be given to the receiving apparatus in an optimum state.

  In addition to the above-described configuration, the receiving device according to the present invention includes a portion provided in the high-frequency signal generation unit, the portion provided on the receiving device being formed at a corner portion of the receiving device. It is a feature.

  With the above configuration, a portion of the high-frequency signal generator that is provided on the receiver is formed at a corner of the receiver. Therefore, in addition to the effects of the above configuration, the influence (interference) on the high-frequency signal input of the receiving device when a part of the circuit elements of the high-frequency signal generating unit is external can be reduced, and a good test There is an effect that can be performed.

  According to another aspect of the present invention, there is provided a test apparatus for testing a receiving apparatus which is formed on a wafer using a semiconductor process and receives a high-frequency signal through a reception signal path. At least a part of a high-frequency signal generator that generates a high-frequency signal for testing when testing the receiving device in stages and sends the high-frequency signal from the output end of the high-frequency signal generator to the input end of the reception signal path is provided. The test apparatus includes a test control unit that controls on / off of the output of the high-frequency signal with respect to the high-frequency signal generation unit when the receiver is tested at the wafer stage.

  With the above configuration, at the time of a test at the wafer stage, such a high-frequency signal is generated by a high-frequency signal generator inside the receiving device when a high-frequency signal for testing is sent to the receiving device. Then, a high-frequency signal is output from the high-frequency signal generation unit, is sent to the input end of the reception signal path, is subjected to signal processing during normal reception on the reception signal path, and is output from the reception device. The output signal is received by a test device outside the receiving device, and various test processes can be performed.

  Therefore, when a high-frequency signal is sent to the receiving device during a test at the wafer stage, it is not necessary to provide an external test device for at least a part of the circuit that generates such a high-frequency signal.

  Therefore, a high-frequency signal receiving device that is simultaneously implemented on a wafer using a semiconductor process and that does not have at least a part of the high-frequency output function is used to test the high-frequency performance of the receiving device. There is an effect that can be.

  Note that the operation of generating a high-frequency signal in the high-frequency signal generation unit is performed on the test device side outside the reception device via, for example, an external control I / F (interface) unit inside the reception device. Can do.

  In addition, a high-frequency signal is generated by a high-frequency signal generator, an output signal (for example, a baseband signal) is output from the receiving device, and a test process is performed by receiving the output signal on the test device side outside the receiving device. can do.

  Note that all of the high-frequency signal generation unit may be formed on the reception device, or a part of the high-frequency signal generation unit may be formed on the reception device and the rest may be formed on another part, for example, a test device. Good. When formed in the test apparatus, it may be formed in a boundary region (connecting portion) between the receiving apparatus and the receiving apparatus when the receiving apparatus and the testing apparatus are connected for the test.

  In addition to the above configuration, the test apparatus according to the present invention includes a resonator that outputs a signal for the high-frequency signal generation unit to oscillate.

  With the above configuration, the high-frequency signal generator includes a resonator that outputs a signal for oscillation. Therefore, at the time of testing, if the resonator on the test apparatus is connected to the high-frequency signal generator, the high-frequency signal generator can generate and output a high-frequency signal without any problem. Therefore, in addition to the effect of the above-described configuration, there is an effect that the area of the high-frequency signal generation unit occupying on the receiving device can be reduced.

  In addition to the above configuration, the test apparatus according to the present invention is characterized in that the resonator includes a passive element whose parameter for determining a resonance frequency is variable by the test apparatus.

  With the above configuration, the resonator includes an element whose parameter for determining the resonance frequency is variable by the test apparatus. Therefore, the frequency of the high-frequency signal output from the high-frequency signal generator can be automatically adjusted on the test apparatus side. Therefore, in addition to the effect of the above configuration, there is an effect that the test can be easily performed by switching to high-frequency signals of various frequencies.

  In addition to the above configuration, the test apparatus according to the present invention is characterized in that the passive element is a variable capacitor.

  With the above configuration, the passive element is a variable capacitor. Therefore, a control signal is applied from the outside of the receiving device, that is, from the test device, the capacitance of the passive element is changed according to the level of the signal voltage, the resonance frequency is changed, and the output signal of the high frequency signal generator is changed. The frequency can be changed. Therefore, in addition to the effects of the above-described configuration, the high-frequency signal generator can output a continuous high-frequency signal over a wide range, and can be easily switched by high-frequency signals of various frequencies for testing. There is an effect.

  In addition to the above configuration, the test apparatus according to the present invention includes a terminal to which an output signal from a PLL unit included in the high frequency signal generation unit of the reception device is input, and a high frequency signal generation unit of the reception device. And a loop filter section having a terminal for outputting an input signal to the oscillation circuit.

  With the above configuration, the high-frequency signal generation unit includes an oscillation circuit and a PLL unit that stabilizes the oscillation frequency output from the oscillation circuit. The receiving apparatus and the test apparatus can be configured to be connected in the order of the PLL section, the loop filter section, and the oscillation circuit during the wafer stage test. Therefore, in addition to the effect of the above configuration, particularly when the measurement frequency is limited and the frequency stability is required, the frequency can be remarkably stabilized and a favorable test can be performed. .

  In addition to the above-described configuration, the test apparatus according to the present invention includes a PLL unit to which an output signal from a frequency divider included in the high-frequency signal generation unit of the reception device is input, and an output signal from the PLL unit. And a loop filter unit having a terminal for outputting an input signal to an oscillation circuit included in the high-frequency signal generation unit of the receiving apparatus.

  With the above configuration, the high-frequency signal generation unit includes an oscillation circuit and a frequency divider that converts the oscillation frequency output from the oscillation circuit to a low frequency and outputs the frequency to the outside. The receiving device and the test device can be configured to be connected in the order of the PLL unit, the loop filter unit, the oscillation circuit, and the frequency divider during the wafer stage test. Therefore, in addition to the effect of the above configuration, particularly when the measurement frequency is limited and the frequency stability is required, the frequency can be remarkably stabilized and a favorable test can be performed. .

  As described above, the receiving apparatus according to the present invention generates a high-frequency signal for testing when the testing apparatus tests the receiving apparatus at the wafer stage, and receives the high-frequency signal from the output terminal of the high-frequency signal generator. This is a configuration including at least a part of a high-frequency signal generation unit that is sent to the input end of the signal path.

  The test apparatus according to the present invention generates a high-frequency signal for testing when the receiver performs a test of the receiver at the wafer stage in the test apparatus, and outputs the high-frequency signal to the output terminal of the high-frequency signal generator. At least a part of the high-frequency signal generator that sends the signal to the input end of the reception signal path, and the test apparatus transmits the high-frequency signal to the high-frequency signal generator when the receiver is tested at the wafer stage. It is the structure provided with the test control part which controls on / off of an output.

  As a result, when a high-frequency signal is sent to the receiving device during a test at the wafer stage, it is not necessary to provide an external test device for at least a part of the circuit that generates such a high-frequency signal. Therefore, a high-frequency signal receiving device that is simultaneously implemented on a wafer using a semiconductor process and that does not have at least a part of the high-frequency output function is used to test the high-frequency performance of the receiving device. There is an effect that can be.

  The receiving apparatus according to the present embodiment receives a high frequency signal (RF (Radio Frequency) signal). In the present embodiment, the “high frequency signal” refers to a signal such as a television broadcast. Examples of such television broadcasting include digital television broadcasting (for example, satellite broadcasting). Therefore, this receiving apparatus can be used as a receiving apparatus (digital broadcast receiving apparatus) for receiving such a high-frequency signal.

  The receiving apparatus according to the present embodiment is formed on a wafer as a semiconductor integrated circuit.

  In the present embodiment, the test is to check whether each circuit of the receiving device has a malfunction. The test is divided into a test performed on the receiving device at the wafer stage and a test performed on the receiving device after the wafer is divided into individual semiconductor integrated circuits and assembled into a package. Unless otherwise noted, it shall refer to the former.

  Specifically, in the test, a high-frequency signal prepared in advance for the test is sent to the reception signal path of the reception apparatus in the same way as in normal operation, and the output signal output from the output terminal of the reception signal path is the test apparatus. This is done by checking whether the signal is normal. Therefore, in the present embodiment, any high-frequency signal meeting such a purpose can be used as appropriate. The reception signal path refers to a path for receiving, processing, and outputting a high-frequency signal as usual, and specifically, various configurations are conceivable.

  As shown in FIG. 1, the receiving device 11 according to the present embodiment has a form in which a plurality of receiving devices 11 are connected at the wafer stage, for example, as shown in FIG. Then, with respect to the receiving device 11, from above, the receiving device 11 is fitted into a hole that is open so that the receiving device 11 fits, and the two are connected to perform various tests (inspections). It has become. In the test apparatus 12, a region around the hole is referred to as a connection portion 12a. The connection unit 12 a is an area that is in direct contact with the receiving device 11.

As shown in FIG. 1, the receiving device 11 according to the present embodiment is
A high-frequency signal processing system (reception signal path) including a high-frequency variable gain unit 21, a frequency conversion unit 22, a local signal unit 24, a BB (baseband) variable gain unit 24, a passband limiting unit 25, and an output amplifier unit 26; ,
A local signal system that divides the output of the local signal unit 23 by a prescaler unit 27 (frequency divider), adds the output to the PLL unit 28, and stabilizes the oscillation frequency of the local signal unit 23;
A high-frequency signal generator 41 for realizing the present invention;
A crystal oscillation unit 29 for generating a reference signal for comparison with the signal divided by the prescaler unit 27;
The external control I / F unit 30 is configured to generate a control signal for controlling the PLL unit 28 and the high-frequency signal generation unit 41 according to the present invention from the outside of the receiving device 11.

  The terminal of the receiving device 11 is connected to a power source, GND, RFAGC (high frequency auto gain control) voltage, BBAGC (baseband auto gain control) voltage, high frequency by connection electrodes for contact from the connection portion 12a of the test device 12. It is connected to each terminal of signal input, baseband signal output, charge pump current output, tuning voltage input, external control signal, oscillation input, oscillation output and lock detection signal. That is, the connection electrodes E1 to E12 are respectively baseband signal output terminal T1, GND terminal T2, power supply terminal T3, lock detection signal terminal T4, oscillation output signal terminal T5, oscillation signal input terminal T6, external control signal terminal T7, BBAGC. The voltage terminal T8, the RFAGC voltage terminal T9, the high frequency signal input terminal T10, the tuning voltage input terminal T11, and the charge pump current output terminal T12 are connected.

  In the test apparatus 12, the measurement signal generation unit 73, the output signal measurement unit 74, and the variable voltage power supply unit 75 are connected to a common input / output signal bus from the test control unit 71, and are also connected to the input / output signal bus. The test is performed in accordance with the program stored in the memory unit 72.

  That is, the test apparatus 12 includes a test control unit 71 that functions as a central control unit, a memory unit that stores various data, a measurement signal generation unit 73 that generates a measurement signal for testing and supplies the measurement signal to the reception device 11, and a reception An output signal measuring unit 74 that receives and measures a test output signal output from the device 11 and a variable voltage power source unit 75 that supplies power to the receiving device 11 are provided. The test apparatus 12 can test digital and analog circuits using these members as in the prior art. Note that these members are the same as those shown in FIG. 24 and can be appropriately formed using a known technique, and thus detailed description thereof is omitted here.

  The high frequency signal input terminal T10 of the receiving device 11 has the same input impedance as that of the high frequency signal input terminal T10 connected in series with a DC cut capacitor for the purpose of achieving high frequency matching during an operation test. An RF input termination unit 81 composed of a resistor having a resistance value is connected. The RF input terminal portion 81 is formed on the connection portion 12 a of the test apparatus 12.

  Between the charge pump current output terminal T12 and the tuning voltage input terminal T11, an integral type loop filter unit 82 for converting a change in the charge pump current into a change in the tuning voltage is inserted. The loop filter unit 82 is formed on the connection unit 12 a of the test apparatus 12.

  A signal from the measurement signal generation unit 73 of the test apparatus 12 is applied to the external control signal terminal T7, and the PLL unit 28 is controlled via the external control I / F unit 30, and the oscillation frequency of the local signal unit 23, that is, Set the frequency of the received signal. In addition, the oscillation operation of the high-frequency signal generator 41 is controlled.

  Although a crystal oscillator is normally connected to the oscillation input terminal T6, a clock signal having the same frequency as the desired reference frequency is directly supplied from the measurement signal generator 73 in the wafer stage test.

  The oscillation signal from the crystal oscillation unit 29 is output to the oscillation output signal terminal T5 and is connected to the output signal measurement unit 74 of the test apparatus.

  The lock detection signal from the PLL unit 28 is output to the lock detection signal terminal T4 and connected to the output signal measurement unit 74 of the test apparatus.

  A level corresponding to the frequency and level of the output signal from the high-frequency signal generator 41 is output to the baseband signal output terminal T1 and input to the output signal measuring unit 74 of the test apparatus 12.

  The power supply terminal T3 and the GND terminal T2 supply a voltage and current sufficient to operate the receiving device 11 from the variable voltage power supply unit 75.

  The high-frequency signal generator 41 generates a high-frequency signal for testing inside the receiver when the test apparatus 12 tests the receiver 11 at the wafer stage, and receives the high-frequency signal from the output terminal of the high-frequency signal generator. It is sent to the input end of the signal path.

  Here, in the configuration of FIG. 1, the entire high-frequency signal generator 41 is formed on the receiving device 11. As will be described later, a configuration in which a part of the high-frequency signal generator 41 is formed on the receiving device 11 and the rest is formed on the test device 12 may be employed.

  The high-frequency signal generator 41 can be divided into a region constituted by passive elements such as capacitors and inductors and a region constituted by active elements such as transistors, and the former constitutes a resonator and the like. The latter is referred to as a high frequency signal output unit.

  For example, as shown in FIG. 12 to be described later, the high-frequency signal generation unit 41 may include a resonator 51 for oscillating and a high-frequency signal output unit 60 that is a part other than the resonator 51. That is, the high-frequency signal output unit 60 is a part of the high-frequency signal generation unit 41 and is connected to the output terminal of the resonator 51 to generate a high-frequency signal, and the generated high-frequency signal is input to the input end of the reception signal path. This is a part sent to the high-frequency variable gain unit 21 to send to In the high-frequency signal generation unit 41, only the high-frequency signal output unit 60 may be formed on the receiving device 11, and the rest may be formed on the test device 12.

  In FIG. 1, a test apparatus 12 tests a receiving apparatus according to the flowchart of FIG. These processes are automatically performed by the test apparatus 12.

  The test procedure is set in the memory unit 72 in advance. After the test is started, first the operation settings in the test apparatus are initialized (steps S1 and S2), and then the coordinates are moved in a predetermined order on the wafer (step S3), one by one, or a connection part having the same structure If multiple testers are provided, the test is performed simultaneously or sequentially.

  After the connection electrode of the connection unit contacts the terminal of the receiving device (step S4), first, a necessary voltage value is set in the variable voltage power supply unit, and then the power is supplied to the receiving device (step S5).

  After supplying power, the receiver waits for a time during which the operation of the receiving apparatus becomes stable (step S6), and then a signal necessary for measurement is supplied from the high frequency signal generator and the measurement signal generator (step S7).

  After supplying the signal, after waiting for time until the operation of the receiving apparatus is stabilized again (step S8), the output signal of the receiving apparatus is then measured by the output signal measuring unit (step S9).

  The measured value is immediately compared with the standard value of the memory unit 72 (step S10), and pass / fail is determined (step S11).

  If there are multiple measurement items, change the signal output from the high-frequency signal generator or measurement signal generator, wait for the same time until the operation of the receiver is stabilized, and then receive the signal at the output signal measurement unit. The output signal of the device is measured and compared with the standard value of the memory unit to determine pass / fail. If a failure is determined in the pass / fail determination, the measurement is stopped even during the measurement, and marking indicating that the semiconductor integrated circuit is defective is performed (step S12).

  These procedures are performed for all the semiconductor integrated circuits existing in the testable area on the wafer.

  According to the above procedure, in this configuration, it is possible to carry out a wafer stage test including the high frequency signal processing system on the receiving device.

  According to the configuration of the present embodiment, the maximum performance of the test apparatus 12 capable of testing conventional digital and analog circuits can be maximized, and a large range of test apparatus for high-frequency signals can be used without introducing a large-scale test apparatus. By performing the operation for the high frequency signal at the wafer stage, it is possible to reduce the manufacturing cost in the case of manufacturing the high frequency signal receiving device using the semiconductor integrated circuit.

  In the comparative example shown in FIG. 23, a test signal source 239, a test signal supply 223, and a self-diagnosis 240 are mounted in a semiconductor integrated circuit. With this configuration, it is possible to perform an operation test using a high-frequency signal at the wafer stage by mounting a circuit necessary for the test using a high-frequency signal on the semiconductor integrated circuit. However, it is necessary to implement all the means for generating the signals necessary for the test on the semiconductor integrated circuit, and depending on the signal conditions required for the test, the circuit scale becomes too large, resulting in an increase in the area of the semiconductor integrated circuit. End up.

  On the other hand, in the configuration of the present embodiment, the high-frequency signal generator 41 is included in the receiver, but the output signal when a high-frequency signal is applied using a member that controls on / off of the high-frequency signal generator or the high-frequency signal generator is used. A member for measuring the signal is not provided in the receiving apparatus, and a high-frequency signal test can be performed using a member provided in a conventional testing apparatus for digital and analog circuits outside the receiving apparatus. In this way, it is not necessary to realize all means for generating a signal necessary for the test on the semiconductor integrated circuit. Therefore, the circuit scale can be prevented from becoming too large, and an increase in the semiconductor integrated circuit area can be prevented.

  A modification of the configuration of the receiving apparatus is shown in FIG. In the case of the configuration of FIG. 1, the output signal of the high-frequency signal generator is still connected to the input of the high-frequency variable gain unit even after the test is completed. In the configuration of FIG. 3, a cutting region using a wiring layer as close as possible to the surface in advance so as to be cut in the middle of the wiring connecting the high-frequency signal generating unit 41 and the high-frequency input signal line of the high-frequency variable gain unit 21. The wiring 42 which can be cut | disconnected is provided.

  After completion of the test, the severable wiring 42 is cut by irradiating the severable wiring 42, which is a wiring line in the cutting region, with a beam of light having a high energy and high density, such as a laser beam, which can be narrowed down to the μm unit. Thus, the connection between the high-frequency signal generating unit and the high-frequency variable gain unit can be physically and completely disconnected after the test is completed. Therefore, it is possible to eliminate the influence of the high-frequency signal generation unit for testing in a product state.

  A modification of the configuration of the receiving apparatus is shown in FIG. In the case of this configuration, the output of the high-frequency signal generating unit 41 is configured to be input again to the high-frequency signal input terminal T10 through the connection unit 12a via the high-frequency signal output terminal T13. In this case, the high-frequency signal characteristics can be tested again using the high-frequency signal generator 41 even after being assembled into a package after the wafer stage test.

  Moreover, the modification of the structure of the said receiver is shown in FIG. 5 and FIG. FIG. 5 shows a state before the individual chips (receiving device 11) are divided from the wafer, and FIG. 6 shows a state after the division.

  In the case of this configuration, the output of the high-frequency signal generation unit is connected to the high-frequency signal input of the high-frequency variable gain unit 21 through a wiring on the wafer as in the configuration of FIG. (Receiver 11) once passes through the external chip dividing blank area 13 and returns to the inside of the semiconductor integrated circuit. That is, the high-frequency signal output terminal T13 of the high-frequency signal generation unit 41 first passes through the second region 14b on the receiving device 11 in the high-frequency signal connection wiring 14, and the third region on the chip dividing blank region 13 as well. And again passes through the first region 14a on the receiving device 11 and enters the high-frequency signal input terminal T10 of the high-frequency variable gain unit 21.

  In the case of the configuration of FIGS. 5 and 6, when the wafer stage test is completed, when dividing into individual semiconductor integrated circuits, the wiring connecting the high-frequency signal generating unit and the high-frequency variable gain unit is external to the semiconductor integrated circuit. Since it is automatically cut, a dedicated process for cutting the wiring as in the configuration of FIG. 3 becomes unnecessary.

  Moreover, the modification of the structure of the said receiver is shown in FIG.7 and FIG.8.

  7, in the case of FIGS. 4, 5, and 6, the terminal position (pad (Pad) electrode P <b> 2) of the output signal from the high-frequency signal generator 41 and the input signal to the high-frequency variable gain unit 21. Since the terminal positions (pad electrodes P1) are adjacent to each other, the wiring connecting the high-frequency signal generating unit 41 and the high-frequency variable gain unit 21 is the shortest and interference with other wirings and terminals is also minimized. Is possible.

  In the example of FIG. 8, the high-frequency signal generator 41 and the high-frequency variable gain unit 21 are the same as those in FIG. 1, and are directly connected without a pad electrode. The high-frequency signal input terminal T10 of the high-frequency variable gain unit 21 is connected to the pad electrode P1. The pad electrode P3 connected from the other high-frequency signal portion by the wiring 14d is an effective arrangement for the configuration of FIG. 9 to the configuration of FIG.

  In the configuration of FIG. 8, the terminal position (pad electrode P3) of the input signal to the high-frequency signal generating unit 41 and the terminal position (pad electrode P1) of the input signal to the high-frequency variable gain unit 21 are adjacent to each other. Similarly to the configuration of FIG. 7, the wiring connecting the high-frequency signal generating unit 41 and the high-frequency variable gain unit 21 is the shortest, and interference with other wirings and terminals can be minimized.

  FIG. 9 shows a modified example of the configuration of the receiving apparatus. As for the present configuration, as in the case of FIG. 3, in the layout configuration in which the connection destination of the high-frequency signal generating unit and the high-frequency variable gain unit is provided with a cutting region that can be cut in advance, the output level of the signal Is laid out in the receiving device 11 and the output level detecting unit 43 is monitored by the test device 12, so that the signal level state of the high frequency signal generating unit 41 is stable. It is possible to determine whether or not the level necessary for the measurement to perform the test has been reached. The level required for the measurement means that the signal level is equal to or higher than a measurable threshold value and the value is in a stable state (level fluctuation is within a certain level). Note that the measurable threshold and stability criteria may be determined as appropriate by the manufacturer in consideration of the specifications of the receiving device 11 and the like.

  In order to perform the above control, the output level detected by the output level detection unit 43 is input to the output signal measurement unit 74 of the test apparatus 12 through the output level output terminal T14 and the connection electrode E14. .

  A configuration example of the output level detection unit 43 is shown in FIG. That is, the output level detection unit 43 includes a detection circuit 43a and a high input resistance DC amplifier 43b.

The detection circuit 43a
A coupling capacitor Cd1 for taking out a part of the output of the high-frequency signal generator and separating the detection circuit 43a from the high-frequency signal line in a DC manner;
An inductor Ld1 for flowing a direct current through the detection diode Dd1,
A detection diode Dd1 that rectifies a high-frequency signal and extracts a DC component (generally, a Schottky barrier diode having a small forward voltage) is used;
A load resistor Rd1 for extracting a DC potential;
The capacitor Cd2 is used to cut the high frequency component and smooth the detected DC component. A filter is formed by the load resistor Rd1 and the capacitor Cd2.

  The high input resistance DC amplifier 43b has a high input impedance that suppresses the influence on the characteristics of the detection circuit 43a (for example, the input stage of the DC amplifier is configured by a field effect transistor FET, and almost no input current flows, that is, the input impedance is high. In this case, the DC voltage from the detection circuit 43a is amplified.

  In the detection circuit 43a, the detection diode Dd1 is turned on when the high-frequency signal input from the high-frequency signal generating unit 41 is a positive potential, and the detection diode Dd1, the load resistance Rd1, GND, the inductor Ld1, and the detection diode Dd1 A direct current of forward current Id flows through the path. On the other hand, when the potential of the high-frequency signal input from the high-frequency signal generator 41 is negative, the detection diode Dd1 is turned off and the current Id does not flow.

  The current Id rectified by the detection diode Dd1 appears as a DC potential at both ends of the load resistor Rd1, and is smoothed by the capacitor Cd2. This DC voltage is a very low voltage of about several mV when the output level of the high-frequency signal generator is minus several tens of dBm, so it is amplified by a high input impedance DC amplifier and amplified to the required signal level. Output.

  Note that the high-frequency signal output from the high-frequency signal generator 41 according to the present invention is a CW (continuous wave) signal and is not subjected to amplitude modulation, and thus there is no need to pay particular attention to the time constant of the resistor and the capacitor. However, in the case of a modulated signal, if the time constant is not properly selected, the signal level output cannot follow the change in amplitude, and therefore a correct signal level output cannot be obtained. However, if the time constant is too long, the time from when the high frequency signal input is applied until the signal level output is stabilized becomes longer. Therefore, the time constant may be determined in consideration of the test time.

  According to the configuration of the present embodiment, the level of the high-frequency signal from the high-frequency signal generating unit 41 can be read by the test apparatus 12 by installing means for detecting the output level from the high-frequency signal generating unit 41. It becomes possible to perform a test in a state where the high-frequency signal has risen normally.

  In addition, in this structure, it is also possible to use a structure in which connection is made with normal wiring as shown in FIG.

  FIG. 11 shows a modification of the configuration of the receiving device. In this configuration, the resonator 51 required to oscillate in the high-frequency signal generating unit 41 is provided outside the receiving device 11, that is, to the connection unit 12 a included in the test device 12. That is, the resonator 51 is connected to the resonance signal input terminal T15 of the high-frequency signal output unit 60 through the connection electrode E15. In this way, by providing some circuit elements of the high-frequency signal generating unit 41 outside the receiving device 11, the area of the high-frequency signal generating unit 41 on the receiving device 11, that is, on the semiconductor integrated circuit, is reduced. Is possible.

  A configuration example of the high-frequency signal output unit 60 is shown in FIG. That is, the oscillation circuit 61 oscillates at the resonance frequency of the resonator 51. The output of the oscillation circuit 61 is input to the buffer circuit 62. The buffer circuit 62 serves as a buffer so that the oscillation frequency does not fluctuate due to external influences. The output of the buffer circuit 62 is provided with a switch circuit 63 for avoiding the influence on the circuit under test when the high frequency signal output of the high frequency signal generator 41 is unnecessary.

  The switch circuit 63 is controlled by an ON / OFF control signal supplied from the external control I / F unit 30. When the high-frequency signal output is turned ON, an oscillation signal is output from the oscillation circuit 61, and the oscillation signal output is a buffer circuit. 62 is applied to the signal input of the circuit under test. When the high-frequency signal output is turned off, the oscillation signal output from the oscillation circuit 61 is stopped, and the output impedance of the switch circuit 63 is sufficiently higher than the impedance of the circuit under measurement. Will not be affected.

  A modification of the configuration of the receiving apparatus is shown in FIG. In this configuration, the capacitor of the resonator 52 provided outside is combined with a plurality of fixed capacitance capacitors so that it can be switched by the capacitance switching unit 52a. The capacity switching control is automatically controlled by the test apparatus 12 using a signal from the measurement signal generator of the test apparatus.

  As described above, in this configuration, as in the configuration of FIG. 11, some circuit elements of the high-frequency signal generation unit 41 are provided outside the receiving device 11, thereby occupying the receiving device 11, that is, the semiconductor integrated circuit. The area of the high-frequency signal generator 41 can be reduced.

  The switching information of the capacity is stored in advance in the memory unit 72 of the test apparatus 12, and the test apparatus 12 automatically performs the switching according to the measurement procedure based on the switching information. The test apparatus 12 switches the capacitance to change the frequency of the high-frequency output signal, and at the same time, changes the local signal frequency of the semiconductor integrated circuit to control the baseband signal output to be a desired frequency for inspection. I do. In this case, the signal to be detected is the frequency of the baseband signal output.

  Before starting the test, the tester measures the reference semiconductor integrated circuit (semiconductor integrated circuit that has been inspected in advance and the result is known) with a test apparatus, and the capacitance switching is performed correctly. Confirm that the accuracy of the changing frequency is within a certain range, and calibrate the test equipment.

  Thereafter, the inspection is automatically performed by the test apparatus until the end of the inspection.

  In addition, if the characteristics of the semiconductor integrated circuit to be tested (variation in element constants, variation in the physical dimensions of the wiring layer, etc.) are large due to this calibration, the frequency of the high-frequency signal output will be greatly shifted or the output level will be small. Therefore, selection can be performed at the initial stage of the test, and the test time can be shortened.

  More details are as follows.

An example of the internal structure of the memory unit is shown in FIG. That is, (n-1) pieces of data are prepared. For example, the first data includes a capacitance C ₁ , a local frequency f _LO1 , a measurement power P _BO1 , a measurement frequency f _BO1 , a measurement error frequency f _DIF1 , and an allowable error frequency f _DIFmax1 . And the measurement result with respect to the data is also stored. FIG. 15 shows the frequency measurement procedure.

  That is, initialization is set (step S21), and a capacitance C corresponding to the frequency to be measured is acquired (step S22). This capacity C is a value stored in the memory unit 72.

It is checked whether or not the measurement is finished (step S23). If the measurement is not finished, the local signal frequency _fLO is set (step S24). This frequency is a value stored in the memory unit 72.

The baseband signal output level P _BO and frequency f _BO are measured (step S25). This is measured by the output signal measurement unit. Then, the result is stored in the memory unit 72.

The absolute value error f _DIF between the reference frequency f _BS and the measurement frequency f _BO stored in the memory unit 72 is calculated by the following equation (step S26). That is,
f _DIF = | f _BO −f _BS |
It is. This calculation is performed by the test apparatus 12.

The allowable error frequency f _DIFmax stored in the memory unit 72 is compared with the error frequency f _DIF to obtain the value of the following equation (step S27). That is,
f _DIFmax −f _DIF
It is. This calculation is performed by the test apparatus 12.

  The test apparatus 12 determines whether the value of this expression is positive or negative (step S28), and if it is positive or zero, writes the test result “Pass” in the memory unit 72 (step S29). If negative, the test result “Fail” is written in the memory unit 72 (step S30).

  According to this configuration, the frequency of the high-frequency output signal from the high-frequency signal generating unit can be arbitrarily set by changing the constant (capacitance) of the resonator 52 that is a circuit element external to the receiving device 11 in the capacitance switching unit 52a. It becomes possible to set to.

  Similarly, the inductor may be switched instead of the capacitor. Further, the capacitor and the inductor may be switched.

  FIG. 16 shows a modification of the configuration of the receiving apparatus. This configuration is a configuration example in which a variable capacitance element is used instead of switching a plurality of fixed capacitors as the capacitor of the resonator as in the configuration of FIG. Otherwise, the configuration is the same as in FIG. Moreover, the point which the test apparatus 12 controls automatically is the same as the case of FIG.

  As described above, in this configuration, as in the configuration of FIG. 11, some circuit elements of the high-frequency signal generation unit 41 are provided outside the receiving device 11, thereby occupying the receiving device 11, that is, the semiconductor integrated circuit. The area of the high-frequency signal generator 41 can be reduced.

  In the resonator 53, a DC blocking capacitor C32 and an inductor L11 are connected in parallel, and a variable capacitance capacitor C31 is connected in series to the DC blocking capacitor C32. Further, as a countermeasure against high-frequency wraparound, a resistor R31 and a capacitor C33 are connected, and a variable capacitor C31 is connected to the measurement signal generator 73 of the test apparatus 12 via both. By sending a control signal from the measurement signal generator 73, the capacitance of the variable capacitor C31 is changed.

  Thus, in this configuration, the variable capacitance value is realized by the variable capacitance capacitor. The variable capacitor is a capacitive element whose capacitance is variable according to the level of a signal voltage applied from the outside, and a known configuration can be applied as appropriate, and thus detailed description thereof is omitted. As a result, the frequency of the high-frequency output signal from the high-frequency signal generator can be continuously varied over a wide range.

  Therefore, it is possible to arbitrarily set the frequency of the high-frequency output signal from the high-frequency signal generator by changing the constants of such external circuit elements.

  At this time, if the switching of the inductor is combined, the high-frequency signal generation unit can output a continuous high-frequency signal over a wider range.

  FIG. 17 shows a modification of the configuration of the receiving apparatus. In this configuration, a dedicated prescaler unit 66 and a PLL unit 67 are provided in order to stabilize the frequency of the high-frequency signal output from the high-frequency signal generator 41 with high accuracy. The high frequency signal generator 41 is also provided with an oscillation circuit 65. In this case, a loop filter unit 68 is also required separately for connection. That is, the output signal terminal T17 is connected to the PLL unit 67 and the loop filter unit 68 via the connection electrode E17, and the input signal terminal T16 is connected to the loop filter unit 68 via the connection electrode E16. The output unit and the oscillation circuit 65 are connected. The prescaler unit 66, the PLL unit 67, and the oscillation circuit 65 are formed on the receiving device 11. The loop filter portion 68 is formed on the connection portion 12a.

  As described above, in this configuration, as in the configuration of FIG. 11, some circuit elements of the high-frequency signal generation unit 41 are provided outside the receiving device 11, thereby occupying the receiving device 11, that is, the semiconductor integrated circuit. The area of the high-frequency signal generator 41 can be reduced.

  This configuration is particularly implemented when the measurement frequency is limited and frequency stability is required.

  Here, since the loop filter unit 68 is provided in the connection unit of the test apparatus 12, the area of the high-frequency signal generation unit occupying the receiving apparatus can be reduced accordingly. Unlike this, the loop filter unit 68 can also be provided in the receiving device 11.

  A modification of the configuration of the receiving apparatus is shown in FIG. This configuration has the same frequency stability as the configuration of FIG. 17, but only the PLL unit 67 dedicated to the high-frequency signal generating unit 41 is external to the receiving device 11 and only the prescaler unit 66 is incorporated. That is, the prescaler portion 66 and the PLL portion 67 are connected to the output signal terminal T17 via the connection electrode E17, and the output of the loop filter portion 68 is connected to the input signal terminal T16 via the connection electrode E16. And the oscillation circuit 65 are connected. The prescaler unit 66 and the oscillation circuit 65 are formed on the receiving device 11. The receiver 11 loop filter unit 68 and the PLL unit 67 are formed on the connection unit 12a.

  The prescaler unit 66 is built in because when the high frequency signal frequency of the high frequency signal generator 41 is high, the prescaler unit 66 divides the frequency to lower the specific frequency, thereby reducing the PLL unit 67 provided in the connection unit 12a. This is because the operating frequency can be lowered.

  As described above, in this configuration, as in the configuration of FIG. 11, some circuit elements of the high-frequency signal generation unit 41 are provided outside the receiving device 11, thereby occupying the receiving device 11, that is, the semiconductor integrated circuit. The area of the high-frequency signal generator 41 can be reduced.

That is, the configuration of FIG.
As with the configuration of FIG. 17, by providing a dedicated prescaler unit and PLL unit, the frequency of the high-frequency signal output to the high-frequency signal generating unit can be stabilized with high accuracy,
Unlike the configuration of FIG. 17, the PLL unit of the high-frequency signal generation unit is exposed to the outside in the same manner as the resonator necessary for the oscillation unit of the high-frequency signal generation unit is externally output in FIGS. 17 to 16. It is possible to reduce the area of the high-frequency signal generator that occupies the receiving device.

  FIG. 19 shows a modification of the configuration of the receiving apparatus. This figure shows the arrangement of the high-frequency signal generator 41 in the case of the configuration of FIG. 1 or the configuration of FIG. As shown in the figure, the high-frequency signal generator 41 is disposed in the periphery of the semiconductor integrated circuit (receiver 11), and the high-frequency signal output of the high-frequency signal generator 41 is the high-frequency signal input terminal T10 of the high-frequency variable gain unit 21. To the pad electrode P1.

  Furthermore, since the space between the high-frequency signal generator 41 and the pad electrode P1 of the high-frequency signal input terminal is wide, if this portion is cut using a laser beam after the test at the wafer stage, the high-frequency signal is generated. The high frequency signal output of the unit 41 can be completely separated from the high frequency signal input of the high frequency variable gain unit 21.

  A modification of the configuration of the receiving apparatus is shown in FIG. This figure shows the arrangement of the high-frequency signal generator 41 in the case of FIG. As shown in the figure, the high-frequency signal output of the high-frequency signal generator 41 is connected to a dedicated pad electrode P2, which is completely separated from the high-frequency signal input terminal T10 of the high-frequency variable gain unit 21 at the wafer stage. It has become.

  19 and 20, the mounting position of the high-frequency signal generator 41 on the semiconductor integrated circuit is set as the peripheral portion, so that the output of the high-frequency signal generator 41 is optimal for the receiving device 11. It becomes possible to give.

  A modification of the configuration of the receiving apparatus is shown in FIG. As shown in the figure, the high frequency signal generator 41 is disposed at a corner of the semiconductor integrated circuit, and the high frequency signal output is connected to the pad electrode P1 of the high frequency signal input terminal T10 of the high frequency variable gain unit. Yes. The pad electrode P3 connected by wiring from the other high-frequency signal generator 41 is an effective arrangement for the configuration of FIG. 9 to the configuration of FIG.

  That is, in order to avoid interference between the high-frequency output signal and the high-frequency signal output level of FIG. 9 and a signal (referred to as a connection signal) input from the resonator of FIGS. It is considered effective to consider that the paths (wirings) do not line up with the high-frequency signal, the high-frequency signal output level, and the connection signal with the resonator on the same side of the circuit.

  That is, by setting the mounting position of the high frequency signal generating unit 41 on the semiconductor integrated circuit as a corner portion, the high frequency of the receiving device 11 when the resonator that is a part of the circuit element of the high frequency signal generating unit 41 is external. It is possible to reduce the influence on the signal input.

  FIG. 22 shows a modification of the configuration of the receiving apparatus. This figure shows the arrangement of the high-frequency signal generators in the case of FIG. As shown in the figure, the high-frequency signal output of the high-frequency signal generating unit 41 is connected to a dedicated pad electrode P2, and the high-frequency signal input terminal T10 (pad electrode P1) of the high-frequency variable gain unit 21 is at the wafer stage. It is completely separated. The pad electrode P3 connected by wiring from the other high-frequency signal generator 41 is an effective arrangement for the configuration of FIG. 9 to the configuration of FIG.

  21 and 22, the mounting position of the high-frequency signal generator 41 on the semiconductor integrated circuit is a corner, so that the resonator that is a part of the circuit element of the high-frequency signal generator 41 is externally provided. It is possible to reduce the influence on the high-frequency signal input of the receiving device 11 at this time.

  In the comparative example shown in FIG. 23, as described above, the test signal source 239, the test signal supply 223, and the self-diagnosis 240 are mounted in the semiconductor integrated circuit. Therefore, there is a concern about the influence of the test signal supply 223 itself being inserted into the high-frequency signal line. 3, 4, 5, 7, 9, 20, and 22, the high frequency signal generator is provided on the semiconductor integrated circuit. After the test is completed, the high-frequency signal generator is completely separated from the signal line during normal operation, so that it is possible to prevent the characteristics of the product from being affected.

  The present invention is not limited to the above-described embodiments, and various modifications can be made within the scope of the claims, and embodiments obtained by appropriately combining technical means disclosed in different embodiments. Is also included in the technical scope of the present invention.

The receiving apparatus according to the present invention is
A high frequency variable gain section for amplifying a high frequency signal;
A frequency converter that converts a high frequency signal to an intermediate frequency signal;
A passband limiter for attenuating unwanted signals from the intermediate frequency signal;
A baseband (BB) variable gain section for amplifying the intermediate frequency signal;
An output amplifier section that amplifies the intermediate frequency signal to a level capable of digital signal processing;
A local signal unit for generating a local signal necessary for the frequency conversion unit;
A PLL unit that arbitrarily sets the frequency of the local signal and stabilizes the local signal frequency;
A prescaler unit that divides the high-frequency signal of the local signal unit to a frequency operable by the PLL unit;
A crystal oscillation unit that generates a signal serving as a reference of the PLL unit with a high-precision crystal oscillator;
A high-frequency signal generator that generates a high-frequency signal for performance testing and can be controlled from the outside,
In a receiving device realized on a semiconductor integrated circuit including an external control I / F unit that extracts a signal for controlling a PLL unit and other settable means from an external control signal,
When performing an operation test at the wafer stage before separating the receiver into individual semiconductors,
A power supply for the receiver, GND, an input signal and an output signal terminal, and a connection unit for connecting to a power supply required for an operation test, GND, an input signal and an output signal;
The connection unit includes a loop filter unit that converts a charge pump current output from the PLL unit into a tuning voltage that is applied to the local signal unit, and
An RF input termination unit that terminates the high-frequency signal input terminal T10,
A variable voltage power supply unit that provides a power supply voltage necessary for the receiver via the connection unit;
Via the connection unit, a control signal input of the high-frequency signal generation unit of the receiver, an RFAGC voltage of the high-frequency variable gain unit, a BBAGC voltage of the BB variable gain unit, and an external control I / F unit A measurement signal generator that gives signals necessary for measurement to an external control signal, an oscillation input of the crystal oscillation unit, and
Output for measuring the lock detection signal output from the PLL unit, the baseband output signal output from the baseband output amplifier, and the oscillation output output from the crystal oscillation unit via the connection unit A signal measurement unit;
A memory unit for storing test procedures and test standard values;
By using a test apparatus including a test control unit that controls the variable voltage power source unit, the measurement signal generation unit, and the output signal measurement unit according to the contents of the memory unit,
Even if the test apparatus does not include high-frequency signal generation means, the high-frequency performance of the receiver can be tested at the wafer stage by adding the output of the high-frequency signal generator to the high-frequency signal input terminal T10 of the receiver. It may be configured.

  According to the above configuration, even if a conventional test apparatus for digital and analog circuits is used without using an expensive test apparatus capable of outputting a high-frequency signal, high-frequency signal characteristics can be tested at the wafer stage. It becomes possible, and it becomes possible to reduce generation | occurrence | production of the unacceptable goods in the test after a package assembly, and can suppress the cost of the inspection which occupies for a manufacturing cost low.

  In the receiving apparatus according to the present invention, in the above configuration, the output signal from the high-frequency signal generation unit is preliminarily provided in the receiving apparatus by the high-frequency signal input terminal T10 or the metal signal in a manufacturing process of a semiconductor process. It may be configured to be connected to a signal line from the high-frequency signal input terminal T10 to the high-frequency variable gain amplification unit, and to cut the metal wiring by heat treatment after passing the test.

  According to the above configuration, the high-frequency signal generator can completely eliminate the influence on the normal operation by completely disconnecting from the original high-frequency signal input line after the wafer test is completed.

  In the receiving apparatus according to the present invention, the output signal from the high-frequency signal generation unit is connected to a high-frequency output terminal and connected to the high-frequency signal input terminal of the high-frequency variable gain unit via the connection unit. You may comprise.

  Further, in the receiving apparatus according to the present invention, in the above-described configuration, the output signal from the high-frequency signal generating unit is a blank area for cutting the outer periphery of the semiconductor circuit that realizes the receiving apparatus formed in plural on the same wafer. The semiconductor circuit may be separated by a cutting process when the semiconductor circuits are separated after the test is completed.

  Further, in the above configuration, the receiving device according to the present invention may be configured such that the high-frequency signal input terminal T10 and the high-frequency signal output terminal of the receiving device are arranged adjacent to each other.

  In the receiving apparatus according to the present invention, in the configuration described above, the receiving apparatus includes means for detecting an output level of a high-frequency signal output from the high-frequency signal generating unit and notifying the outside of the receiving apparatus of the output level. An output level detection unit provided, and the test apparatus detects the output level of the high-frequency signal generation unit by the measurement circuit unit of the test apparatus, whereby the high-frequency signal level of the high-frequency signal generation unit becomes stable. It may be configured so that it can be detected.

  In the receiving device according to the present invention, in the above configuration, the high-frequency signal generator has a part or all of passive elements constituting a resonator of an oscillation circuit that generates a high-frequency signal outside the receiving device. Thus, the area of the high-frequency signal generator on the receiving device may be reduced.

  According to said structure, the circuit scale which occupies on a semiconductor integrated circuit can be reduced by enabling a part of circuit of a high frequency signal generation part to be adjusted from the outside.

  Moreover, the receiving apparatus according to the present invention may be configured such that, in the above configuration, a constant of a passive element provided outside the receiving apparatus can be varied as necessary.

  Further, the receiving apparatus according to the present invention may be configured such that, in the above configuration, when the passive element provided outside the receiving apparatus is a capacitor, a variable capacitance element capable of electrically changing the capacitance is used. Good.

  Further, the receiving apparatus according to the present invention may be configured such that, in the above configuration, the high-frequency signal generation unit includes an oscillation circuit and a PLL unit that stabilizes the oscillation frequency.

  Further, the receiving device according to the present invention may be configured such that, in the above configuration, the high-frequency signal generator includes an oscillation circuit and a frequency divider for converting the oscillation frequency to a low frequency and outputting the same to the outside. Good.

  Moreover, the receiving apparatus according to the present invention may be configured such that, in the above configuration, the high-frequency signal generating unit of the receiving apparatus is arranged in a peripheral part of the chip.

  Moreover, the receiving apparatus according to the present invention may be configured such that, in the above configuration, the high-frequency signal generating unit of the receiving apparatus is disposed at a corner portion of the chip.

  The present invention can also be applied to applications such as a receiving device that receives a high-frequency signal and is formed on a wafer simultaneously using a semiconductor process.

It is a block diagram which shows one structural example of the receiver which concerns on this invention, and a test device. It is a flowchart which shows the test procedure in a test apparatus. It is a block diagram which shows one structural example of the receiver which concerns on this invention, and a test device. It is a block diagram which shows one structural example of the receiver which concerns on this invention, and a test device. It is a figure which shows the mode of the receiver before dividing | segmenting the chip | tip of a receiver. It is a figure which shows the mode of the receiver after dividing | segmenting the chip | tip of a receiver. It is a block diagram which shows one structural example of the receiver which concerns on this invention, and a test device. It is a block diagram which shows one structural example of the receiver which concerns on this invention, and a test device. It is a block diagram which shows one structural example of the receiver which concerns on this invention, and a test device. It is a block diagram which shows one structural example of an output amplifier part. It is a block diagram which shows one structural example of the receiver which concerns on this invention, and a test device. It is a circuit diagram which shows one structural example of a high frequency signal generation part. It is a block diagram which shows one structural example of the receiver which concerns on this invention, and a test device. It is a figure which shows the content of a memory part. It is a flowchart which shows the measurement procedure of a frequency. It is a block diagram which shows one structural example of the receiver which concerns on this invention, and a test device. It is a block diagram which shows one structural example of the receiver which concerns on this invention, and a test device. It is a block diagram which shows one structural example of the receiver which concerns on this invention, and a test device. It is a block diagram which shows the example of 1 structure of the receiver which concerns on this invention. It is a block diagram which shows the example of 1 structure of the receiver which concerns on this invention. It is a block diagram which shows the example of 1 structure of the receiver which concerns on this invention. It is a block diagram which shows the example of 1 structure of the receiver which concerns on this invention. It is a block diagram which shows the structural example of the receiver which concerns on a comparative example. It is a block diagram which shows the structural example of the conventional receiver and a test device.

Explanation of symbols

11 Receiving device 12 Test device 12a Connection unit 13 Chip division blank region 14 High frequency signal connection wiring 14a First region 14b Second region 14c Third region 14d Wiring 21 High frequency variable gain unit 22 Frequency conversion unit 23 Local signal unit 24 BB Variable gain unit 25 Passband limiting unit 26 Output amplifier unit 27 Prescaler unit (frequency divider)
28 PLL unit 29 Crystal oscillation unit 30 External control I / F unit 41 High frequency signal generation unit 42 Cutable wiring 43 Output level detection unit 43a Detection circuit 43b High input resistance DC amplifier 51, 52, 53 Resonator 52a Capacitance switching unit 60 High-frequency signal output unit 61, 65 Oscillation circuit 62 Buffer circuit 63 Switch circuit 66 Prescaler unit 67 PLL unit 68 Loop filter unit 71 Test control unit 72 Memory unit 73 Measurement signal generation unit 74 Output signal measurement unit 75 Variable voltage power supply unit 81 RF input Termination part 82 Loop filter part E1-E17 Connection electrode P1-P3 Pad electrode T1 Baseband signal output terminal T2 GND terminal T3 Power supply terminal T4 Lock detection signal terminal T5 Oscillation output signal terminal T6 Oscillation input signal terminal T7 External control signal terminal T8 BBAGC Voltage terminal T9 RFAGC voltage terminal T 0 High-frequency signal input terminal T11 Tuning voltage input terminal T12 Charge pump current output terminal T13 High-frequency signal output terminal T14 Signal level output terminal T15 Resonant signal output terminal T16 Oscillator circuit input terminal T17 PLL unit output terminals Ld1, L11 Inductor Cd1 Coupling capacitor Dd1 Detection Diode Cd2, C11, C31, C32, C33 Capacitor Rd1, R31 Resistance Id Current

Claims (18)

In a receiving device that is formed on a wafer using a semiconductor process and receives a high-frequency signal in a receiving signal path,
At least a high-frequency signal generator that generates a high-frequency signal for testing when testing the receiver at the wafer stage in the test apparatus and sends the high-frequency signal from the output end of the high-frequency signal generator to the input end of the reception signal path A receiving device comprising a part.   The receiving apparatus according to claim 1, wherein all of the high-frequency signal generating unit is formed on the receiving apparatus.   The receiving apparatus according to claim 1, wherein the high-frequency signal generator and the input end of the reception signal path are connected via a disconnectable wiring.   The receiving apparatus according to claim 1, wherein an output end of the high-frequency signal generation unit and an input end of the reception signal path are connected via a wiring on a test apparatus.   The output terminal of the high-frequency signal generator and the input terminal of the reception signal path are connected to each other via a wiring on a blank area for dividing a plurality of reception devices on the same wafer. The receiving device according to claim 1.   6. The receiving apparatus according to claim 4, wherein an output end of the high-frequency signal generation unit and an input end of the reception signal path are adjacent to each other.   The receiving apparatus according to claim 1, further comprising an output level detection unit that detects an output level of the high-frequency signal generation unit. The high frequency signal generator is
The receiving apparatus according to claim 1, further comprising: a terminal provided on the test apparatus for receiving an output signal from a resonator for oscillation. The high-frequency signal generation unit includes an oscillation circuit and a PLL unit that stabilizes an oscillation frequency output from the oscillation circuit.
The PLL unit includes a terminal for outputting an input signal to a loop filter unit provided on the test apparatus,
The receiving apparatus according to claim 1, wherein the oscillation circuit includes a terminal to which an output signal from the loop filter unit is input. The high frequency signal generator includes an oscillation circuit, and a frequency divider that converts the oscillation frequency output from the oscillation circuit to a low frequency and outputs the frequency to the outside.
The frequency divider includes a terminal for outputting an input signal to a PLL unit provided on the test apparatus,
2. The receiving apparatus according to claim 1, wherein the oscillation circuit includes a terminal that is provided on the test apparatus and that receives an output signal from a loop filter unit that receives a signal from the PLL unit. .   2. The receiving device according to claim 1, wherein a portion of the high-frequency signal generating unit provided on the receiving device is formed in a peripheral portion of the receiving device.   2. The receiving apparatus according to claim 1, wherein a portion of the high-frequency signal generating unit provided on the receiving apparatus is formed at a corner of the receiving apparatus. In a test apparatus for testing a receiver that is formed on a wafer using a semiconductor process and receives a high-frequency signal in a receive signal path,
The receiving device generates a high frequency signal for testing when the receiving device tests the receiving device at the wafer stage, and sends the high frequency signal from the output end of the high frequency signal generator to the input end of the reception signal path. Comprising at least part of the signal generator,
The test equipment is
A test apparatus, comprising: a test control unit that controls on / off of the output of the high-frequency signal to the high-frequency signal generation unit when performing a test of the receiving device at a wafer stage.   The test apparatus according to claim 13, further comprising a resonator that outputs a signal for the high-frequency signal generator to oscillate. The resonator is
The test apparatus according to claim 14, further comprising a passive element whose parameter for determining a resonance frequency is variable by the test apparatus.   The test apparatus according to claim 15, wherein the passive element is a variable capacitor.   A loop filter having a terminal to which an output signal from a PLL unit included in the high-frequency signal generator of the receiving device is input and a terminal from which an input signal to the oscillation circuit provided in the high-frequency signal generator of the receiving device is output The test apparatus according to claim 13, further comprising a section. A PLL unit to which an output signal from a frequency divider included in the high-frequency signal generation unit of the receiver is input;
A loop filter unit having a terminal to which an output signal from the PLL unit is input and a terminal to output an input signal to an oscillation circuit included in the high-frequency signal generation unit of the receiving device is provided. Item 14. The test apparatus according to Item 13.

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