JP2006134150A - Non-contact ic card - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To realize a non-contact IC card for surely executing an instruction according to the status of a power source without providing any internal power source. <P>SOLUTION: A CPU 10 determines whether or not the voltage level of a driving voltage to be supplied from a power source part 34 is a reference voltage level or less. Then, when it is decided that the voltage level of the driving voltage is the reference voltage level or less, the CPU 10 decides whether or not a necessary voltage level corresponding to a reception command 74 is "high" by a command table 72. When it is decided that the necessary voltage level is "high", the CPU 10 switches a power saving mode. Concretely, the CPU 10 controls a clock generating part 20 to switch a clock frequency from F1(high frequency) to F2(low frequency), and decreases a processing speed at the time of executing a command. Thus, it is possible to execute the command by decreasing power consumption even when the voltage level of the driving voltage is low at the time of executing the command. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a contactless IC card that receives driving power and executes a command.

  In recent years, IC cards configured with a CPU, a nonvolatile memory, and the like have been widely used. The IC card receives a command (command) transmitted from an external device such as an IC card reader / writer (hereinafter abbreviated as “reader / writer”) and executes the command.

  There are two types of communication methods for IC cards: contact type and non-contact type. The contact type IC card is driven by power supplied from the reader / writer via the contact terminal of the card, and receives commands by performing data communication with the reader / writer via the contact terminal.

  On the other hand, a non-contact type IC card receives an electromagnetic wave (power wave) that is driving power transmitted from a reader / writer with a coil antenna or the like, and generates driving power by electromagnetic induction by the reception to drive the IC card. The IC card and the reader / writer perform data communication with each other by modulating electromagnetic waves with commands and various data.

  As such a contact type and non-contact type IC card, an IC card using both the contact type and the non-contact type disclosed in Patent Document 1 is known. This IC card is an IC card having a contact part (contact terminal) and a non-contact part (coil antenna), and determines which of the contact part and the non-contact part is used and A clock signal having a corresponding frequency is input to the microcomputer.

Also, a non-contact type IC card as in Patent Document 2 is known in which when the drive power supplied from the outside at the time of command execution is insufficient, an internal power supply compensates for the insufficient power.
Japanese Patent Laid-Open No. 11-353441 JP-A-8-55198

  However, the IC cards described in Patent Documents 1 and 2 have the following problems. That is, in the IC card of Patent Document 1, when a contact portion is used, power supply from an external device or the like is electrically reliably performed, but when a non-contact portion is used, power is generated by electromagnetic waves. Therefore, when the electromagnetic wave reception state is poor, the power supply may be reduced. For this reason, when the power necessary for executing the command is not supplied, the operation may become unstable due to power shortage when the command is executed.

  On the other hand, an IC card having an internal power supply, such as the IC card of Patent Document 2, can compensate for the power shortage during command execution. However, it is not preferable to provide an internal power supply for an IC card that is required to be small and thin, and there is a problem peculiar to the battery such that maintenance is deteriorated because the battery needs to be replaced. .

  The present invention has been made in view of the above-described problems, and an object of the present invention is to realize a non-contact type IC card that can execute instructions according to the state of the power supply without providing an internal power supply. It is to be.

In order to solve the above problems, the invention described in claim 1
In a non-contact IC card that receives driving power and executes a command,
Determining means for determining the power required to execute the instruction;
Clock signal generation means for generating a clock signal having a frequency according to the determination result of the determination means;
Instruction executing means for executing the instruction at a processing speed according to the frequency of the clock signal generated by the clock signal generating means;
It is characterized by having.

The invention according to claim 2 is the non-contact type IC card according to claim 1,
The determination means includes
Command execution power determination means for determining whether or not power required for execution of the command is greater than or equal to a reference power;
The clock signal generation means includes
When the command execution power determination unit determines that the power necessary for execution of the command is equal to or higher than a reference power, the command execution power determination unit includes a first power saving switching unit that performs control to reduce the frequency of the clock signal. It is said.

The invention according to claim 3 is the contactless IC card according to claim 1 or 2,
Drive power determination means for determining the received drive power;
The clock signal generation means includes
It has a drive power determination frequency changing means for generating a clock signal having a frequency according to the determination result by the drive power determination means.

Invention of Claim 4 is a non-contact-type IC card as described in any one of Claims 1-3,
The drive power determination means includes
Drive power reference determination means for determining whether or not the received drive power has reached a reference power;
The clock signal generation means includes
And a second power saving switching unit that performs control to lower the frequency of the clock signal when the received driving power is determined not to have reached the reference power by the power reference determination unit. .

The invention according to claim 5 is the non-contact type IC card according to claim 1,
The determination means includes
Command execution power determination means for determining whether or not power required for execution of the command is greater than or equal to a reference power;
Drive power reference determination means for determining whether or not the received drive power has reached a reference power;
The clock signal generation means includes
The command execution power determination means determines that the power required for execution of the command is greater than or equal to a reference power, and the drive power reference determination means determines that the received drive power has not reached the reference power. In this case, a third power saving switching means for performing control to lower the frequency of the clock signal is provided.

The invention according to claim 6 is the non-contact type IC card according to claim 2,
The determination means includes
Drive power determination means for determining whether the received drive power satisfies the power required for execution of the command;
The clock signal generation means includes
When it is determined by the drive power determination means that the received drive power does not satisfy the power necessary for execution of the command, according to the shortage of the received drive power with respect to the power required for execution of the command It has 4th power saving switching means which performs control which lowers | hangs the frequency of the said clock signal, It is characterized by the above-mentioned.

The invention of claim 7 is the non-contact type IC card according to claim 2,
The determination means includes
Drive power determination means for determining whether the received drive power satisfies the power required for execution of the command;
The clock signal generation means includes
High-speed processing for performing control to increase the frequency of the clock signal according to the magnitude of the driving power when the driving power determination means determines that the received driving power satisfies the power necessary for execution of the command It has a switching means.

  According to the first aspect of the present invention, the instruction execution unit executes the instruction at a processing speed according to the frequency of the clock signal generated according to the determination result of the determination unit. The frequency of the clock signal can be changed by an instruction to be executed. For this reason, the power consumption at the time of instruction execution can be controlled by appropriately changing the processing speed for executing the instruction. Therefore, by appropriately controlling the power consumption according to the command, it is possible to realize a non-contact IC card that can reliably execute the command without providing an internal power supply.

  According to the second aspect of the present invention, it is natural that the same effect as the first aspect of the invention can be obtained, and the instruction execution means has that the power required for executing the instruction is equal to or higher than the reference power. If it is determined, control is performed to reduce the frequency of the clock signal. For this reason, power consumption can be suppressed by reducing the processing speed when executing an instruction that requires more power than the reference power. Therefore, the power consumption can be appropriately controlled according to the instruction to be executed.

  According to the third aspect of the present invention, the same effect as that of the first or second aspect of the invention can be obtained, and the frequency of the clock signal generated according to the determination result of the drive power determination means Instructions are executed at a processing speed according to The frequency of the clock signal can be changed according to the received driving power. For this reason, the power consumption at the time of command execution can be appropriately controlled by changing the processing speed for executing the command according to the received drive power.

  According to the invention described in claim 4, it is needless to say that the same effect as that of any one of claims 1 to 3 can be obtained. If the frequency does not reach, control is performed to lower the frequency of the clock signal. For this reason, since the instruction is executed according to the low-frequency clock signal, the processing speed at the time of executing the instruction is reduced and the power consumption can be suppressed. Therefore, a non-contact type IC card that reliably executes a command in accordance with the received drive power is realized without providing an internal power supply.

  According to the fifth aspect of the invention, the same effect as that of the first aspect of the invention can be obtained, and the power required for the instruction executed by the instruction execution power determination means is equal to or higher than the reference power. If it is determined and the driving power reference determining means determines that the driving power has not reached the reference power, the frequency of the clock signal is lowered. That is, when the driving power does not reach the reference power and the power is insufficient to execute the command, the frequency of the clock signal is lowered. Accordingly, since power consumption during execution of the instruction can be suppressed, the instruction can be reliably executed even when the driving power is insufficient.

  According to the invention described in claim 6, it is of course determined that the same effect as that of the invention described in claim 2 can be obtained, and that the received drive power does not satisfy the power necessary for executing the instruction. In this case, control is performed to reduce the frequency of the clock signal in accordance with the shortage of the received drive power with respect to the power required for execution of the instruction. For this reason, the lower the driving power is than the power necessary for executing the instruction, the greater the degree of lowering the clock frequency. Therefore, even if the driving power is small, the instruction can be reliably executed by appropriately changing the clock frequency according to the instruction.

  According to the seventh aspect of the invention, the same effect as that of the second aspect of the invention can of course be obtained, and it is determined that the received drive power satisfies the power necessary for executing the instruction. In addition, control is performed to increase the clock frequency in accordance with the driving power. For this reason, if the driving power is large, the degree of increasing the clock frequency becomes large, so that high-speed instruction processing is possible.

[First Embodiment]
First, a non-contact type IC card of the present invention is driven by receiving an electromagnetic wave (power wave) transmitted by a reader / writer RW, and the first embodiment is applied to an IC card 1 that executes a command. This will be described in detail with reference to FIGS.

  FIG. 1 is a block diagram illustrating an example of a functional configuration of the IC card 1. According to the figure, the IC card 1 includes a CPU (Central Processing Unit) 10, a clock generation unit 20, an I / F unit 30, a ROM (Read Only Memory) 40, and a RAM (Random Access Memory) 50. And a memory control unit 60 that controls reading and writing of data in an EEPROM (electrically erasable programmable Read Only Memory) 70.

  The CPU 10 receives a command transmitted from the reader / writer RW via the I / F unit 30 and reads a program corresponding to the command from the ROM 40. Then, processing based on the read program is executed at a processing speed according to the frequency of the clock signal output from the clock generation unit 20 to input / output data to / from each functional unit. Thereby, the CPU 10 realizes an instruction execution means for executing an instruction (command).

  The clock generation unit 20 includes a crystal oscillator, a PLL (Phase Locked Loop) circuit, and the like, and generates a clock signal having a variable frequency and outputs it to the CPU 10 to realize a clock generation unit. In particular, in the present embodiment, the frequency of the clock signal (hereinafter referred to as “clock frequency”) is switched to either the first frequency F1 or the second frequency F2 based on the control of the CPU 10, and the switching is performed. A clock signal having a predetermined frequency is generated and output to the CPU 10.

  Here, the clock generation unit 20 generates and outputs a clock signal having the clock frequency F1 in the initial state. The clock frequency F1 is set higher than the clock frequency F2. When the CPU 10 switches the IC card 1 to the power saving mode, the clock frequency generated by the clock generation unit 20 is switched to F2, and the processing speed of the CPU 10 is reduced, thereby suppressing power consumption during command execution.

  The I / F unit 30 is a functional unit that performs data communication with the reader / writer RW and generation of electric power from the electromagnetic wave. As illustrated in a block diagram illustrating an example of the functional configuration in FIG. A power supply unit 34 and a transmission / reception unit 36 are provided.

  The antenna unit 32 includes a coil antenna, a tuning capacitor, and the like, receives electromagnetic waves transmitted from the reader / writer RW, causes electromagnetic induction, and generates AC voltage (received signal).

  The power supply unit 34 includes a rectifier circuit, a smoothing capacitor, and the like, and supplies a voltage to each unit constituting the IC card 1. Specifically, the AC voltage generated by the antenna unit 32 is rectified in a rectifier circuit, and then converted into a DC voltage by a smoothing capacitor to generate a DC voltage and supply the voltage to each unit. However, the method of generating and supplying the voltage in the power supply unit 34 is not limited to this, and a known technique may be adopted as appropriate.

  The transmission / reception unit 36 includes a modulation circuit, a demodulation circuit, a control unit, and the like. When data is output from the CPU 10, the data is modulated and an electromagnetic wave including the data is transmitted to the IC card reader / writer RW via the antenna unit 32. When a reception signal is output from the antenna unit 32, the reception signal is demodulated and data included in the reception signal is output to the CPU 10.

  The ROM 40 stores data, programs, and the like for realizing various functions related to the operation of the IC card 1. According to the figure, the ROM 40 stores a command execution program 42 for realizing command execution processing (see FIG. 4). When the drive voltage supplied from the power supply unit 34 exceeds a predetermined level, the CPU 10 starts command execution processing and waits for reception of a command. Then, after executing the received command, the command execution process is terminated, but if the drive voltage satisfies a predetermined level, the command execution process is started again, and the reception of the command is awaited. The ROM 40 stores a program corresponding to a command executed by the CPU 10, but illustration thereof is omitted.

  The RAM 50 is a storage area that temporarily holds various programs executed by the CPU 10, data related to the execution of these programs, and the like.

  The memory control unit 60 includes a writing circuit 62 and a reading circuit 64. The writing circuit 62 writes the data output from the CPU 10 to the EEPROM 70, and the reading circuit 64 reads the data stored in the EEPROM 70 and outputs it to the CPU 10. Based on the control of the CPU 10, the memory control unit 60 drives either the writing circuit 62 or the reading circuit 64 to read / write data from / to the EEPROM 70.

  The EEPROM 70 is a readable and writable nonvolatile memory, and stores various data. According to FIG. 1, the EEPROM 70 stores a command table 72 and a received command 74.

  The command table 72 is a data table that stores a command name of a command that can be executed by the CPU 10 and a necessary voltage level in association with each other, as shown in an example of the data configuration in FIG. The necessary voltage level is a voltage level necessary for executing the command indicated by the command name in the IC card 1. In this embodiment, “high” is required for a command name that requires a voltage level higher than the reference voltage level to execute the command, and “low” is required for a command name that can be executed at a voltage level lower than the reference voltage level. Corresponding as a voltage level.

  The reception command 74 is a command transmitted from the reader / writer RW. The CPU 10 interprets the data demodulated by the transmission / reception unit 36 of the I / F unit 30, and if any of the command names stored in the command table 72 is included in the data, the CPU 10 selects the command name. The received command 74 is stored in the EEPROM 70 via the writing circuit 62.

  The CPU 10 executes the command of the reception command 74, but as indicated by the command table 72, the required voltage level differs depending on the command. For this reason, there may occur a case where the drive voltage generated and supplied by the power supply unit 34 is insufficient to execute the command.

  Therefore, the CPU 10 determines that the voltage level of the drive voltage supplied from the power supply unit 34 is a predetermined voltage level (hereinafter referred to as “reference voltage level”) even though the voltage level required for the command to be executed is high. If the IC card 1 is determined not to reach, the IC card 1 is switched to the power saving mode.

  When the CPU 10 is switched to the power saving mode, the CPU 10 controls the clock generation unit 20 to switch the clock frequency from F1 to F2, thereby reducing the processing speed during command execution. As a result, even when the drive voltage is low, the command can be executed while reducing the power consumption.

  Next, a specific operation of the IC card 1 will be described using the flowchart of FIG. When the drive voltage capable of executing the command execution process is supplied from the power supply unit 34, the CPU 10 starts the command execution process and waits until a command is received (step A1).

  If it is determined that the command is received by interpreting the data transmitted from the reader / writer RW (step A1: Yes), the command is stored in the EEPROM 70 as the received command 74.

  Next, the CPU 10 determines the voltage level of the drive voltage supplied from the power supply unit 34 (step A3). The determination process in step A3 corresponds to drive power determination means and drive power reference determination means.

  When it is determined that the drive voltage supplied from the power supply unit 34 exceeds the reference voltage level (step A5: Yes), the command of the reception command 74 is executed (step A15). Then, after transmitting an end response to the reader / writer RW via the I / F unit 30 (step A17), the command execution process is ended.

  The execution of the command in step A15 is performed according to the clock signal having the clock frequency F1 generated and output by the clock generator 20. At this time, since the voltage level of the drive voltage is equal to or higher than the reference voltage level, the CPU 10 can execute a command at a high speed at a processing speed according to the clock frequency F1.

  If it is determined in step A5 that the supply voltage is equal to or lower than the reference voltage level (step A5: Yes), the CPU 10 further indicates that the required voltage level corresponding to the same command name as the received command 74 is “high” in the command table 72. It is determined whether or not there is (step A7). The determination process in step A5 corresponds to a determination unit and an instruction execution power determination unit.

  When the CPU 10 determines that the required voltage level for the received command 74 is not “high”, that is, the voltage level necessary for executing the command does not reach the reference voltage level (step A7: No), the CPU 10 proceeds to the process of step A15. Migrate and execute the command.

  At this time, the supply voltage has not reached the reference voltage level, but since a drive voltage higher than the reference voltage level is not required to execute the reception command 74, the command can be executed even with a supply voltage lower than the reference voltage level. is there. Therefore, it is possible to execute a command without switching the clock frequency.

  On the other hand, when it is determined that the required voltage level for the received command 74 is “high”, that is, the voltage level necessary for executing the command has reached the reference voltage level (step A7: Yes), the clock frequency is changed from F1 to F2. , And shift to the power saving mode by lowering the frequency to perform the processing of steps A9 to A13.

  First, the CPU 10 controls the clock generation unit 20 to switch the clock frequency from F1 to F2 (step A9). Then, the CPU 10 executes the command of the reception command 74 at a processing speed according to the clock frequency F2 of the clock signal (step A11), returns the clock frequency to F1 (step A13), and proceeds to step A17. The first, second, and third power saving switching means and the drive power determination time frequency changing means are realized by this clock frequency switching control.

  Therefore, when a command with a high required voltage level must be executed even though the supply voltage does not satisfy the reference voltage level, the clock frequency is lowered to reduce the power consumption during command execution. As a result, it is possible to prevent the drive voltage from becoming insufficient when the command is executed and the operation to become unstable, and the command can be executed reliably even in a situation where the supply voltage is low.

  In the command execution process, the initial clock frequency is set to F1. For example, when the command is received while waiting for reception of the command at a low clock frequency as in the save mode, the determination in steps A5 and A7 is performed. The clock frequency may be switched to F1 or F2 according to processing. In step A13, the clock frequency is restored to F1, but the frequency is not restored in step A13, and the clock frequency is switched appropriately after receiving the command with the clock frequency F2. It is good.

  In addition, when the drive voltage does not satisfy the required voltage level of the reception command 74, the clock frequency is lowered to reduce power consumption. For example, the reception of the command is waited at the low clock frequency, When the drive voltage satisfies the required voltage level of the reception command 74, the reception command 74 may be executed with the clock frequency increased. In this case, instead of generating a clock frequency corresponding to the reception command 74, for example, a clock frequency corresponding to a processing speed that can be executed at the voltage level of the drive voltage is generated to realize high-speed processing of the reception command 74. It is good as well. Thereby, a high-speed processing switching unit is realized.

[Second Embodiment]
Next, a second embodiment when applied to an IC card 1000 to which the non-contact type IC card of the present invention is applied will be described. In the first embodiment described above, the operation of the IC card 1 has been described as being executed by the CPU 10 in a software manner. However, in the second embodiment, the operation of the IC card 1000 is associated with each functional unit constituting the card. To achieve hardware. In the following description, the same components as the functional configuration of the IC card 1 shown in FIGS. 1 and 2 described above are denoted by the same reference numerals, and the description thereof is omitted.

  FIG. 5 is a block diagram illustrating an example of a functional configuration of the IC card 1000. As shown in the figure, the IC card 1000 includes a CPU 100, a clock generation unit 200, an I / F unit 300, a ROM 40, a RAM 50, and a memory control unit 60 that controls reading and writing of data to and from the EEPROM 70. Composed.

  The clock generation unit 200 generates a clock signal having the clock frequency F1 or F2 and outputs the generated clock signal to the CPU 100 in the same manner as the clock generation unit 20 of the first embodiment described above. The switching of the clock frequency is controlled by the transmission / reception unit 360. Based on.

  FIG. 6 is a block diagram illustrating an example of a functional configuration of the I / F unit 300. According to the figure, the I / F unit 300 includes an antenna unit 32, a power supply unit 340, and a transmission / reception unit 360.

  The power supply unit 340 generates a DC voltage from the AC voltage generated in the antenna unit 32 and supplies the DC voltage to each unit constituting the IC card 1000. In the second embodiment, the voltage level of the generated DC voltage is a reference level. It is determined whether or not it is equal to or lower than the voltage level (corresponding to the process of step A5 in FIG. 4). When it is determined that the voltage is equal to or lower than the reference voltage level, the power supply unit 340 outputs the low voltage determination signal s1 to the transmission / reception unit 360. Thus, by performing the process corresponding to the process of step A5 of the first embodiment, in the second embodiment, the power supply unit 340 realizes the drive power determination unit and the drive power reference determination unit.

  The transmission / reception unit 360 has the same function as the transmission / reception unit 360 of the first embodiment, but further includes a control unit 370. The control unit 370 includes a nonvolatile memory (not shown), and stores a command table 72 and a reception command 74 in the memory.

  In the second embodiment, the control unit 370 of the transmission / reception unit 360 demodulates data received from the reader / writer RW, and stores the received command 74 if the command name is included in the data (step A1 in FIG. 4). Equivalent to the process). The control unit 370 causes the CPU 10 to execute the command of the reception command 74 by outputting the reception command 74 to the CPU 10.

  However, when the control unit 370 causes the CPU 10 to execute a command, the required voltage level corresponding to the same command name as the reception command 74 is “high”, and the power supply unit 340 outputs the low voltage determination signal s1. In this case, the frequency switching signal s2 is output to the clock generation unit 200. Thus, by performing the process corresponding to the process of step A5 of the first embodiment, in the second embodiment, the control unit 370 of the transmission / reception unit 360 realizes a determination unit and an instruction execution power determination unit. Become.

  The clock generation unit 200 determines whether or not the frequency switching signal S2 is input from the transmission / reception unit 360. If it is determined that the frequency switching signal S2 is input, the clock generation unit 200 switches the clock frequency from F1 to F2 and shifts to the power saving mode. Therefore, the clock generator 200 implements first and second power saving switching means.

  The clock generation unit 200 outputs a clock signal having the clock frequency F2 to the CPU 100 for a certain period (for example, an average time required for command execution). During this time, the command of the reception command 74 is executed at a processing speed according to the CPU 100 clock frequency F2.

  The clock generation unit 200 outputs the clock signal having the clock frequency F2 for a certain period, and then returns the clock frequency to F1 (processing corresponding to steps A9 to A13 in FIG. 4).

  As described above, the command execution process of the first embodiment described above can be realized in hardware in each functional unit constituting the IC card 100. Therefore, also in 2nd Embodiment, the effect similar to 1st Embodiment mentioned above can be acquired.

  As described above, according to the present embodiment, when a command having a high required voltage level is executed, if the drive voltage supplied from the power supply unit is less than the reference voltage level, the frequency of the clock signal generated by the clock generation unit is set. Switch from F1 (high frequency) to F2 (low frequency). Thereby, it is possible to reduce the processing speed of the CPU and suppress power consumption during command execution. For this reason, when a command having a high required voltage level is executed, it is possible to prevent the operation from becoming unstable due to insufficient supply voltage. Therefore, even if a command consumes a large amount of power, an IC card that can reliably execute the command is realized by placing the IC card in the power saving mode.

[Modification]
In the above-described embodiment, the clock frequency has been described as being set to either F1 or F2. However, the settable frequency is not limited to this, and, for example, 10 stages of clock frequencies F1 to F10 are possible. May be settable.

  In this case, in the command table 72, the required voltage level for the command name is provided in 10 levels L1 to L10. Then, the required voltage level L1 is set to a voltage level at which all commands can be surely executed, and is set to be lower step by step in the order of L2, L3... L10.

  Also, F1 is set to the initial clock frequency, and the frequency is set in a stepwise manner in the order of F2, F3... F10. Here, the required voltage level and the clock frequency are associated with each other such as L1 and F1, L2 and F2,..., L10 and F10. At this time, each clock frequency is set to a frequency at which a command can be reliably executed with a driving voltage of a corresponding required voltage level.

  If the IC card 1 determines that the drive voltage supplied by the power supply unit 34 is lower than the necessary voltage level corresponding to the command to be executed (reception command 74), the IC card 1 associates the clock voltage with the necessary voltage level. Generate and output a clock signal with the specified clock frequency.

  For example, it is assumed that the required voltage level corresponding to the command to be executed is L4 and the voltage level of the drive voltage supplied from the power supply unit 34 is lower than L4. In this case, the clock generation unit 20 generates a clock signal having a clock frequency F4 associated with the necessary voltage level L4 and outputs the clock signal to the CPU 10.

  Therefore, the clock frequency can be finely controlled according to the command to be executed and the voltage level of the drive voltage, and the processing speed can be appropriately controlled according to the command to be executed.

  In addition, when the voltage level of the drive voltage supplied by the power supply unit 34 is less than the required voltage level corresponding to the command to be executed, the magnitude of the difference between the required voltage level and the voltage level of the drive voltage, that is, The degree to which the clock frequency is lowered may be changed according to the shortage of the drive voltage. As a result, the fourth power saving switching means is realized. Therefore, the lower the voltage level of the drive voltage is, the lower the clock frequency is. As a result, the command can be executed even when the drive voltage is small, and stable operation can be expected.

  Moreover, although it demonstrated as switching the frequency of the clock signal which the clock generation part 20 produces | generates, it concerns on the input / output to the memory control part 60 of CPU10 according to the objective of the command and the process and operation | movement of IC card 1, for example. The clock frequency switching target, such as the clock frequency of the driving clock and the clock frequency of the driving clock required for the memory control unit 60 to drive the writing circuit 62 and the reading circuit 64, may be changed as appropriate.

The block diagram which shows an example of a function structure of the non-contact-type IC card in 1st Embodiment. The block diagram which shows an example of a function structure of the I / F part in 1st Embodiment. The figure which shows an example of a data structure of a command table. The flowchart for demonstrating command execution processing. The block diagram which shows an example of a function structure of the non-contact-type IC card in 2nd Embodiment. The block diagram which shows an example of a function structure of the I / F part in 2nd Embodiment.

Explanation of symbols

1 IC card 10 CPU
20 Clock generation unit 30 I / F unit 32 Antenna unit 34 Power supply unit 36 Transmission / reception unit 40 ROM
42 Command execution program 50 RAM
60 Memory Control Unit 62 Write Circuit 64 Read Circuit 70 EEPROM
72 Command table 74 Receive command

Claims (7)

In a non-contact IC card that receives driving power and executes a command,
Determining means for determining the power required to execute the instruction;
Clock signal generation means for generating a clock signal having a frequency according to the determination result of the determination means;
Instruction executing means for executing the instruction at a processing speed according to the frequency of the clock signal generated by the clock signal generating means;
A non-contact type IC card comprising: The determination means includes
Command execution power determination means for determining whether or not power required for execution of the command is greater than or equal to a reference power;
The clock signal generation means includes
When the command execution power determination unit determines that the power necessary for execution of the command is equal to or higher than a reference power, the command execution power determination unit includes a first power saving switching unit that performs control to reduce the frequency of the clock signal. The non-contact type IC card according to claim 1. Drive power determination means for determining the received drive power;
The clock signal generation means includes
3. The non-contact type IC card according to claim 1, further comprising a driving power determination frequency changing unit that generates a clock signal having a frequency corresponding to a determination result by the driving power determination unit. The drive power determination means includes
Drive power reference determination means for determining whether or not the received drive power has reached a reference power;
The clock signal generation means includes
And a second power saving switching unit configured to perform control to lower the frequency of the clock signal when the received driving power is determined not to reach the reference power by the power reference determination unit. The non-contact type IC card according to any one of claims 1 to 3. The determination means includes
Command execution power determination means for determining whether or not power required for execution of the command is greater than or equal to a reference power;
Drive power reference determination means for determining whether or not the received drive power has reached a reference power;
The clock signal generation means includes
The command execution power determination means determines that the power required for execution of the command is greater than or equal to a reference power, and the drive power reference determination means determines that the received drive power has not reached the reference power. 2. The contactless IC card according to claim 1, further comprising a third power saving switching unit that performs control to reduce a frequency of the clock signal. The determination means includes
Drive power determination means for determining whether the received drive power satisfies the power required for execution of the command;
The clock signal generation means includes
When it is determined by the drive power determination means that the received drive power does not satisfy the power necessary for execution of the command, according to the shortage of the received drive power with respect to the power required for execution of the command 3. The non-contact type IC card according to claim 2, further comprising a fourth power saving switching unit that performs control to reduce the frequency of the clock signal. The determination means includes
Drive power determination means for determining whether the received drive power satisfies the power required for execution of the command;
The clock signal generation means includes
High-speed processing for performing control to increase the frequency of the clock signal according to the magnitude of the driving power when the driving power determination means determines that the received driving power satisfies the power necessary for execution of the command The contactless IC card according to claim 2, further comprising a switching unit.

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