JP2006115594A - Malfunction preventing circuit - Google Patents

Malfunction preventing circuit Download PDF

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JP2006115594A
JP2006115594A JP2004299512A JP2004299512A JP2006115594A JP 2006115594 A JP2006115594 A JP 2006115594A JP 2004299512 A JP2004299512 A JP 2004299512A JP 2004299512 A JP2004299512 A JP 2004299512A JP 2006115594 A JP2006115594 A JP 2006115594A
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voltage
power supply
malfunction prevention
circuit
monitoring
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Nobuyuki Hiasa
信行 日朝
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Fuji Electric Co Ltd
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Fuji Electric Device Technology Co Ltd
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    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

<P>PROBLEM TO BE SOLVED: To provide a malfunction preventing circuit having an accurate and flexible operation threshold voltage and a suppressable standby current. <P>SOLUTION: A monitored voltage is a power supply voltage divided by a plurality of monitored voltage generating resistors 12, 13, 14 connected between a power supply terminal VCC and the ground GND in series. A zener diode 15 and a resistor 16 are connected to the resistors 12, 13, 14 in parallel, and connected between the power supply terminal VCC and the ground GND in series. A reference voltage is a voltage applied to the resistor 16. A comparator 11 compares the monitored voltage with the reference voltage, detects a low voltage state, and outputs a malfunction preventing signal for preventing a malfunction of a switching power supply regulating IC not shown in the figure during the low voltage state. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

本発明は誤動作防止回路に関し、特にスイッチング電源制御回路の誤動作を防止する誤動作防止回路に関する。   The present invention relates to a malfunction prevention circuit, and more particularly to a malfunction prevention circuit for preventing malfunction of a switching power supply control circuit.

スイッチング電源装置は、商用電源または直流電源を入力とし、半導体の高速スイッチング作用を利用して高周波電力に変換したのち、制御・整流して所定の安定した直流を得る電源装置であり、小型・軽量で高効率を特徴としていることから、情報機器や通信機器などの電子機器の電源として使用されている。   A switching power supply is a power supply that uses a commercial power supply or a DC power supply as input, converts it to high-frequency power using the high-speed switching action of a semiconductor, and then controls and rectifies it to obtain a predetermined stable DC. Since it is characterized by high efficiency, it is used as a power source for electronic equipment such as information equipment and communication equipment.

このスイッチング電源装置を制御するスイッチング電源制御ＩＣ（以下単にＩＣと略す場合もある。）において、電源電圧がある程度上昇しているが内部回路の信号が確定しないような状態のとき、ＩＣによっては信号を出力し電源セットの誤動作、あるいは破壊を招く恐れがあった。   In a switching power supply control IC (hereinafter sometimes simply referred to as “IC”) that controls the switching power supply device, when the power supply voltage has risen to some extent but the signal of the internal circuit is not fixed, depending on the IC, May cause malfunction or destruction of the power supply set.

これを回避するために、現在のスイッチング電源制御ＩＣは、ほとんどの場合、電源電圧が内部回路の信号が確定しないような低い電圧のときに、ＩＣの動作を停止させる誤動作防止回路であるＵＶＬＯ（Under Voltage LockOut）回路を内蔵している。   In order to avoid this, in most cases, the current switching power supply control ICs are UVLO (s) that are malfunction prevention circuits that stop the operation of the IC when the power supply voltage is low enough that the signal of the internal circuit is not fixed. Built-in Under Voltage LockOut circuit.

ＵＶＬＯ回路は、電源電圧との依存性がなく、ＩＣ内部の基準となる電圧と、電源電圧とを比較することで低電源電圧状態を検出し、低電源電圧状態のときは、ＵＶＬＯ回路の出力を反転させてＩＣの動作を停止させる。   The UVLO circuit has no dependency on the power supply voltage and detects the low power supply voltage state by comparing the reference voltage inside the IC with the power supply voltage. In the low power supply voltage state, the output of the UVLO circuit Is reversed to stop the operation of the IC.

以下、従来の誤動作防止回路の例をいくつか説明する。
図４〜図７は、従来の誤動作防止回路の回路図である。
図４の誤動作防止回路２０は、基準電圧と、監視対象となる電源電圧（以下監視電圧という。）とを比較する比較器２１を有する。比較器２１の正入力端子は、定電流源２２を介して電源端子ＶＣＣ及び、ｎチャネル型ＭＯＳＦＥＴ（Metal-Oxide Semiconductor Field Effect Transistor）（以下ＮＭＯＳと称する。）２３を介して接地端子（以下ＧＮＤという。）に接続されている。ＮＭＯＳ２３のゲートは、自身のドレインと接続されている。一方、負入力端子は、電源端子ＶＣＣとＧＮＤ間に直列に接続した抵抗２４、２５、２６のうち、抵抗２４と抵抗２５との間に接続されている。また、比較器２１の出力端子は出力端子ＯＵＴと接続されるとともに、ＮＭＯＳ２７のゲートに接続される。ＮＭＯＳ２７のドレインは、抵抗２５と抵抗２６との間に接続され、ソースはＧＮＤに接続されている。 Several examples of conventional malfunction prevention circuits will be described below.
4 to 7 are circuit diagrams of conventional malfunction prevention circuits.
The malfunction prevention circuit 20 in FIG. 4 includes a comparator 21 that compares a reference voltage with a power supply voltage to be monitored (hereinafter referred to as a monitoring voltage). The positive input terminal of the comparator 21 is connected to a power supply terminal VCC via a constant current source 22 and a ground terminal (hereinafter referred to as GND) via an n-channel MOSFET (Metal-Oxide Semiconductor Field Effect Transistor) (hereinafter referred to as NMOS) 23. Connected). The gate of the NMOS 23 is connected to its own drain. On the other hand, the negative input terminal is connected between the resistor 24 and the resistor 25 among the resistors 24, 25, and 26 connected in series between the power supply terminal VCC and GND. The output terminal of the comparator 21 is connected to the output terminal OUT and also connected to the gate of the NMOS 27. The drain of the NMOS 27 is connected between the resistors 25 and 26, and the source is connected to GND.

このような誤動作防止回路２０では、ＮＭＯＳ２３の閾値を基準電圧とし、電源端子ＶＣＣからの電源電圧を抵抗２４、２５、２６により抵抗分圧した電圧を監視電圧とし、これらを比較器２１にて比較している。そして監視電圧が基準電圧以下の場合には、ＩＣの誤動作を防止するためにハイレベルの誤動作防止信号を出力端子ＯＵＴより出力し、ＩＣ内における誤動作防止回路２０以外の全ての回路、または一部を除いた回路の動作を停止させる。監視電圧が基準電圧を上回ると、ＩＣの動作を開始させるために出力端子ＯＵＴからロウレベルの信号を出力する。誤動作防止回路２０では、比較器２１の負入力端子へ入力される抵抗２４、２５、２６により分圧される電源電圧の分圧ポイントを変えることで、比較器２１の出力が反転するときの閾値電圧（以下動作閾値電圧という。）を自由に設定できる。しかし、ＮＭＯＳ２３の製造ばらつきによって動作閾値電圧もばらつく問題があった。   In such a malfunction prevention circuit 20, the threshold voltage of the NMOS 23 is used as a reference voltage, the voltage obtained by dividing the power supply voltage from the power supply terminal VCC by resistors 24, 25 and 26 is used as a monitoring voltage, and these are compared by the comparator 21. is doing. When the monitoring voltage is equal to or lower than the reference voltage, a high-level malfunction prevention signal is output from the output terminal OUT in order to prevent malfunction of the IC, and all or a part of the circuits other than the malfunction prevention circuit 20 in the IC. The operation of the circuit except for is stopped. When the monitoring voltage exceeds the reference voltage, a low level signal is output from the output terminal OUT to start the operation of the IC. In the malfunction prevention circuit 20, the threshold value when the output of the comparator 21 is inverted by changing the voltage dividing point of the power supply voltage divided by the resistors 24, 25, and 26 input to the negative input terminal of the comparator 21. The voltage (hereinafter referred to as the operation threshold voltage) can be set freely. However, there is a problem that the operation threshold voltage varies due to manufacturing variations of the NMOS 23.

また、図５の誤動作防止回路３０は、電源電圧を検出する部分と、比較する部分とをツェナーダイオード３１、３２によって代用した回路である。誤動作防止回路３０において、ツェナーダイオード３１のカソードは電源端子ＶＣＣに、アノードはツェナーダイオード３２のカソードに接続している。ツェナーダイオード３２のアノードは、抵抗３３を介してＧＮＤに接続している。また、ツェナーダイオード３２のアノードは、ＮＭＯＳ３４のゲートに接続している。ＮＭＯＳ３４のドレインは抵抗３５を介してｐチャネル型ＭＯＳＦＥＴ（以下ＰＭＯＳと称する。）３６のドレインと接続しており、ＮＭＯＳ３４のソースはＧＮＤに接続している。ＮＭＯＳ３６は、ＮＭＯＳ３７とともにカレントミラー回路を構成している。ＰＭＯＳ３６のソースは電源端子ＶＣＣと、ゲートは自身のドレインと接続している。ＰＭＯＳ３６のドレインは更にＰＭＯＳ３７のゲートと接続している。ＰＭＯＳ３７は、ソースを電源端子ＶＣＣに、ドレインはＮＭＯＳ３８のドレインに接続されている。ＮＭＯＳ３８のソースはＧＮＤに、ゲートは、ＮＭＯＳ３４のドレインと抵抗３５の間に接続されている。ＰＭＯＳ３７のドレインは、更にインバータ３９を介して出力端子ＯＵＴに接続されている。また、インバータ３９の出力は、ＰＭＯＳ４０のゲートに入力されている。ＰＭＯＳ４０のソースは電源端子ＶＣＣに、ドレインは、ツェナーダイオード３１のアノードと、ツェナーダイオード３２のカソードとの間に接続されている。   In addition, the malfunction prevention circuit 30 of FIG. 5 is a circuit in which a portion for detecting a power supply voltage and a portion for comparison are replaced by Zener diodes 31 and 32. In the malfunction prevention circuit 30, the Zener diode 31 has a cathode connected to the power supply terminal VCC and an anode connected to the cathode of the Zener diode 32. The anode of the Zener diode 32 is connected to GND through a resistor 33. The anode of the Zener diode 32 is connected to the gate of the NMOS 34. The drain of the NMOS 34 is connected to the drain of a p-channel MOSFET (hereinafter referred to as PMOS) 36 via a resistor 35, and the source of the NMOS 34 is connected to GND. The NMOS 36 and the NMOS 37 constitute a current mirror circuit. The source of the PMOS 36 is connected to the power supply terminal VCC, and the gate is connected to its own drain. The drain of the PMOS 36 is further connected to the gate of the PMOS 37. The PMOS 37 has a source connected to the power supply terminal VCC and a drain connected to the drain of the NMOS 38. The source of the NMOS 38 is connected to GND, and the gate is connected between the drain of the NMOS 34 and the resistor 35. The drain of the PMOS 37 is further connected to the output terminal OUT via the inverter 39. Further, the output of the inverter 39 is input to the gate of the PMOS 40. The source of the PMOS 40 is connected to the power supply terminal VCC, and the drain is connected between the anode of the Zener diode 31 and the cathode of the Zener diode 32.

この誤動作防止回路３０では、ツェナーダイオード３１、３２のブレークダウン電圧で基準となる電圧が決まり、抵抗３３に印加される電圧（ＮＭＯＳ３４のゲート電位）が監視電圧となる。   In this malfunction prevention circuit 30, the reference voltage is determined by the breakdown voltage of the Zener diodes 31 and 32, and the voltage applied to the resistor 33 (the gate potential of the NMOS 34) becomes the monitoring voltage.

このような誤動作防止回路３０によれば、ツェナーダイオード３１、３２はブレークダウン電圧が印加されるまで電流を流さないので、ＩＣのスタンバイ状態、すなわち電源電圧が低い状態で、誤動作防止回路３０が働いて他の回路に停止信号が出力されているスタンバイ時でのＩＣの消費電流（スタンバイ電流）の発生を防止することができる。また、製造ばらつきが比較的少ないツェナーダイオード３１、３２を用いていることから、誤動作防止回路３０の動作閾値電圧のばらつきも抑えることができる。しかし、ツェナーダイオード３１、３２のデバイス特性を用いていることから、動作閾値電圧を段階的にしか設定できないという問題があった。   According to such a malfunction prevention circuit 30, the Zener diodes 31 and 32 do not pass a current until a breakdown voltage is applied. Therefore, the malfunction prevention circuit 30 operates in a standby state of the IC, that is, in a state where the power supply voltage is low. Thus, it is possible to prevent generation of IC consumption current (standby current) during standby in which a stop signal is output to another circuit. In addition, since the Zener diodes 31 and 32 with relatively small manufacturing variations are used, variations in the operation threshold voltage of the malfunction prevention circuit 30 can be suppressed. However, since the device characteristics of the Zener diodes 31 and 32 are used, there is a problem that the operation threshold voltage can be set only in steps.

図６の誤動作防止回路５０は、基準電圧を入力する比較器５１の正入力端子には、図４のＮＭＯＳ２３の代わりにＩＣ内部に基準電圧発生回路５２を用意し、その出力信号である基準電圧Ｖｒｅｆを入力する。比較器５１の負入力端子は、図４と同様に、電源端子ＶＣＣとＧＮＤ間に直列に接続した抵抗５３、５４、５５のうち、抵抗５３と抵抗５４との間に接続されている。比較器５１の出力端子は出力端子ＯＵＴと接続されるとともに、ＮＭＯＳ５６のゲートに接続される。ＮＭＯＳ５６のドレインは、抵抗５４と抵抗５５との間に接続され、ソースはＧＮＤに接続されている。   In the malfunction prevention circuit 50 of FIG. 6, a reference voltage generation circuit 52 is prepared in the IC instead of the NMOS 23 of FIG. 4 at the positive input terminal of the comparator 51 for inputting the reference voltage, and the reference voltage as an output signal thereof is provided. Enter Vref. As in FIG. 4, the negative input terminal of the comparator 51 is connected between the resistor 53 and the resistor 54 among the resistors 53, 54, and 55 connected in series between the power supply terminal VCC and GND. The output terminal of the comparator 51 is connected to the output terminal OUT and to the gate of the NMOS 56. The drain of the NMOS 56 is connected between the resistors 54 and 55, and the source is connected to GND.

このような誤動作防止回路５０では、基準電圧発生回路５２による基準電圧Ｖｒｅｆを用いたため、動作閾値電圧のばらつきは抑えることができ、図４と同様に抵抗分圧により監視電圧を設定しているので、動作閾値電圧の設定自由度が高い。しかし、基準電圧発生回路５２として、バンドギャップリファレンス回路など常時電流を消費する回路を使わざるを得ないために、スタンバイ電流が、例えば、数μＡ〜数百μＡ程度と、多くなる問題があった。また、基準電圧を発生する回路ブロックが必要になってくるため、回路規模の増大につながる問題もある。   In such a malfunction prevention circuit 50, since the reference voltage Vref by the reference voltage generation circuit 52 is used, variation in the operation threshold voltage can be suppressed, and the monitoring voltage is set by resistance voltage division as in FIG. The degree of freedom in setting the operation threshold voltage is high. However, since a circuit that constantly consumes current, such as a band gap reference circuit, must be used as the reference voltage generation circuit 52, there is a problem that the standby current increases to, for example, several μA to several hundred μA. . Further, since a circuit block for generating a reference voltage is required, there is a problem that leads to an increase in circuit scale.

また、例えば、特許文献１に開示されている図７の誤動作防止回路６０は、比較器６１の正入力端子には図６の基準電圧発生回路５２に相当する基準電源６２を接続している。また、電源端子ＶＣＣとＧＮＤ間に直列に接続されたツェナーダイオード６３、６４、抵抗６５、６６を有している。ここで、ツェナーダイオード６３のカソードは電源端子ＶＣＣに、アノードはツェナーダイオード６４のカソードに接続している。ツェナーダイオード６４のアノードは、抵抗６５、６６を介してＧＮＤに接続している。比較器６１の負入力端子は、この抵抗６５、６６の間に接続されている。また、比較器６１の出力端子は出力端子ＯＵＴと接続されるとともに、ＰＭＯＳ６７のゲートに接続される。ＰＭＯＳ６７のドレインは電源端子ＶＣＣに接続され、ソースはツェナーダイオード６３のアノードに接続されている。   For example, in the malfunction prevention circuit 60 of FIG. 7 disclosed in Patent Document 1, a reference power supply 62 corresponding to the reference voltage generation circuit 52 of FIG. 6 is connected to the positive input terminal of the comparator 61. Further, Zener diodes 63 and 64 and resistors 65 and 66 are connected in series between the power supply terminals VCC and GND. Here, the cathode of the Zener diode 63 is connected to the power supply terminal VCC, and the anode is connected to the cathode of the Zener diode 64. The anode of the Zener diode 64 is connected to GND via resistors 65 and 66. The negative input terminal of the comparator 61 is connected between the resistors 65 and 66. The output terminal of the comparator 61 is connected to the output terminal OUT and also connected to the gate of the PMOS 67. The drain of the PMOS 67 is connected to the power supply terminal VCC, and the source is connected to the anode of the Zener diode 63.

このような誤動作防止回路６０では、基準電圧が基準電源６２から発生されているため、図６の誤動作防止回路５０と同様に、動作閾値電圧のばらつきは抑えることができ、図４と同様に抵抗６５、６６の抵抗分圧により監視電圧を設定しているので、動作閾値電圧の設定自由度が高い。しかし、これも図６と同様に基準電源６２により、スタンバイ電流が多くなる問題がある。   In such a malfunction prevention circuit 60, since the reference voltage is generated from the reference power source 62, the variation in the operation threshold voltage can be suppressed as in the malfunction prevention circuit 50 of FIG. Since the monitoring voltage is set by the resistance voltage division of 65 and 66, the operation threshold voltage can be set with a high degree of freedom. However, this also has a problem that the standby current increases due to the reference power supply 62 as in FIG.

なお、上記では説明を省略したが、スイッチング電源制御ＩＣの動作が開始すると消費電流が増加して電源電圧が下降して、動作閾値電圧を下回り、スイッチング動作が停止することを防止するために、図４〜図７の誤動作防止回路２０、３０、５０、６０において、ＮＭＯＳ２７、５６、ＰＭＯＳ４０、６７は、出力が反転することによってオンまたはオフして動作閾値電圧を切り替える。これにより、電源電圧上昇時の動作閾値電圧と、下降時の動作閾値電圧を異なるものとするヒステリシス特性を実現している。
特開２００４−８０８５９号公報（段落番号〔００１０〕，〔００１１〕，図１，図７） Although the description is omitted above, in order to prevent the switching operation from stopping when the operation of the switching power supply control IC starts, the current consumption increases and the power supply voltage decreases and falls below the operation threshold voltage. In the malfunction prevention circuits 20, 30, 50, 60 of FIGS. 4 to 7, the NMOSs 27, 56 and the PMOSs 40, 67 are turned on or off when the output is inverted to switch the operation threshold voltage. This realizes a hysteresis characteristic that makes the operation threshold voltage when the power supply voltage rises different from the operation threshold voltage when it falls.
JP 2004-80859 A (paragraph numbers [0010], [0011], FIGS. 1 and 7)

上記のように、従来の誤動作防止回路は、動作閾値電圧精度、動作閾値電圧設定自由度及びスタンバイ電流のいずれかに問題があったので、電源電圧範囲、誤動作防止回路の動作閾値電圧及びばらつき許容範囲などを考慮しながら、スイッチング電源制御ＩＣを搭載する電源セットの用途に応じて使い分けなければならなかった。   As described above, the conventional malfunction prevention circuit has a problem in any one of the operation threshold voltage accuracy, the operation threshold voltage setting freedom, and the standby current. Therefore, the power supply voltage range, the operation threshold voltage of the malfunction prevention circuit, and the variation tolerance Considering the range, etc., it was necessary to use properly according to the application of the power supply set equipped with the switching power supply control IC.

本発明はこのような点に鑑みてなされたものであり、動作閾値電圧精度がよく、動作閾値電圧設定自由度が高く、スタンバイ電流を抑制可能な誤動作防止回路を提供することを目的とする。   The present invention has been made in view of the above points, and an object of the present invention is to provide a malfunction prevention circuit that has high operation threshold voltage accuracy, high operation threshold voltage setting flexibility, and can suppress standby current.

本発明では上記問題を解決するために、スイッチング電源制御回路の誤動作を防止する誤動作防止回路において、電源端子と接地端子間に直列に接続した複数の監視電圧生成用抵抗と、前記監視電圧生成用抵抗と並列に接続し、前記電源端子と前記接地端子間に直列に接続したツェナーダイオードと基準電圧生成用抵抗と、複数の前記監視電圧生成用抵抗により抵抗分圧した電源電圧を監視電圧とし、前記基準電圧生成用抵抗に印加される電圧を基準電圧とし、前記監視電圧と前記基準電圧とを比較して低電圧状態を検出し、前記低電圧状態の場合には前記スイッチング電源制御回路の誤動作を防止する誤動作防止信号を出力する比較器と、を有することを特徴とする誤動作防止回路が提供される。   In the present invention, in order to solve the above problem, in a malfunction prevention circuit for preventing malfunction of the switching power supply control circuit, a plurality of monitoring voltage generating resistors connected in series between a power supply terminal and a ground terminal, and the monitoring voltage generating resistor Connected in parallel with a resistor, a Zener diode connected in series between the power supply terminal and the ground terminal, a resistance for generating a reference voltage, and a power supply voltage divided by a plurality of the monitoring voltage generating resistors as a monitoring voltage, The voltage applied to the reference voltage generating resistor is used as a reference voltage, the monitoring voltage is compared with the reference voltage to detect a low voltage state, and in the case of the low voltage state, the switching power supply control circuit malfunctions. And a comparator for outputting a malfunction prevention signal for preventing the malfunction.

上記の構成によれば、電源端子と接地端子間に直列に接続した複数の監視電圧生成用抵抗により抵抗分圧した電源電圧を監視電圧とし、監視電圧生成用抵抗と並列に接続し電源端子と接地端子間に直列に接続したツェナーダイオードと基準電圧生成用抵抗のうち基準電圧生成用抵抗に印加される電圧を基準電圧として、比較器は両者を比較して低電圧状態を検出し、低電圧状態の場合にはスイッチング電源制御回路の誤動作を防止する誤動作防止信号を出力する。   According to the above configuration, the power supply voltage divided by a plurality of monitoring voltage generating resistors connected in series between the power supply terminal and the ground terminal is used as the monitoring voltage, and connected in parallel with the monitoring voltage generating resistor. Of the Zener diode connected in series between the ground terminals and the reference voltage generating resistor, the voltage applied to the reference voltage generating resistor is used as a reference voltage, and the comparator compares the two to detect a low voltage state. In the state, a malfunction prevention signal for preventing malfunction of the switching power supply control circuit is output.

本発明は、複数の監視電圧生成用抵抗により抵抗分圧した電源電圧を監視電圧としているので、自由度が高く動作閾値電圧を設定できる。また、製造ばらつきの少ない素子であるツェナーダイオードを用いて基準電圧を生成しているので良い動作閾値電圧精度を得ることができる。また、基準電圧を発生する回路ブロックの必要がなく、複数の監視電圧生成用抵抗によりスタンバイ電流を抑制でき、回路規模の増大も招かない。   According to the present invention, the power supply voltage divided by a plurality of monitoring voltage generating resistors is used as the monitoring voltage, so that the operation threshold voltage can be set with a high degree of freedom. Further, since the reference voltage is generated using a Zener diode which is an element with little manufacturing variation, a good operation threshold voltage accuracy can be obtained. Further, there is no need for a circuit block for generating a reference voltage, and a standby current can be suppressed by a plurality of monitoring voltage generating resistors, so that the circuit scale does not increase.

以下、本発明の実施の形態を図面を参照して詳細に説明する。
図１は、本実施の形態の誤動作防止回路の回路図である。
本実施の形態の誤動作防止回路１０は、図示しないスイッチング電源制御ＩＣの誤動作を防止するための回路であり、監視電圧と基準電圧とを比較する比較器１１と、電源端子ＶＣＣとＧＮＤ間に直列に接続した複数の監視電圧生成用の抵抗１２、１３、１４と、抵抗１２、１３、１４と並列に接続し、かつ電源端子ＶＣＣとＧＮＤ間に直列に接続したツェナーダイオード１５と抵抗１６とを有している。 Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
FIG. 1 is a circuit diagram of a malfunction prevention circuit according to the present embodiment.
The malfunction prevention circuit 10 of the present embodiment is a circuit for preventing malfunction of a switching power supply control IC (not shown), and is connected in series between a comparator 11 that compares a monitoring voltage and a reference voltage, and between a power supply terminal VCC and GND. A plurality of monitoring voltage generating resistors 12, 13, 14 connected to, and a Zener diode 15 and a resistor 16 connected in parallel with the resistors 12, 13, 14 and connected in series between the power supply terminals VCC and GND. Have.

ここでは、比較器１１の負入力端子は抵抗１２と抵抗１３との間に接続されており、抵抗分圧された電源電圧が監視電圧として入力される。また、正入力端子はツェナーダイオード１５のアノードと抵抗１６間に接続され、抵抗１６に印加される電圧が基準電圧として入力される。比較器１１は監視電圧と基準電圧を比較して低電圧状態を検出し、低電圧状態の場合には図示しないスイッチング電源制御ＩＣの誤動作を防止する誤動作防止信号を出力する。具体的には、監視電圧と基準電圧が一致した電圧を動作閾値電圧とし、監視電圧が基準電圧よりも高い場合に、誤動作防止信号（ロウレベルの信号である）を出力する。   Here, the negative input terminal of the comparator 11 is connected between the resistor 12 and the resistor 13, and the power source voltage divided by the resistor is input as the monitoring voltage. The positive input terminal is connected between the anode of the Zener diode 15 and the resistor 16, and the voltage applied to the resistor 16 is input as a reference voltage. The comparator 11 compares the monitoring voltage with the reference voltage to detect a low voltage state, and outputs a malfunction prevention signal for preventing malfunction of a switching power supply control IC (not shown) in the case of the low voltage state. Specifically, a voltage at which the monitoring voltage and the reference voltage match is set as the operation threshold voltage, and when the monitoring voltage is higher than the reference voltage, a malfunction prevention signal (a low level signal) is output.

誤動作防止回路１０は、更にＮＭＯＳ１７を有している。ＮＭＯＳ１７は、ゲートを比較器１１の出力端子と接続し、ドレインを抵抗１３と抵抗１４の間に接続し、ソースをＧＮＤと接続している。ＮＭＯＳ１７は、比較器１１の出力に応じて、監視電圧生成用の抵抗１２、１３、１４による抵抗分圧比を切り替えることで、ヒステリシス特性を実現している。具体的には、電源電圧上昇時の閾値電圧を、下降時の閾値電圧より高くしている。   The malfunction prevention circuit 10 further includes an NMOS 17. The NMOS 17 has a gate connected to the output terminal of the comparator 11, a drain connected between the resistors 13 and 14, and a source connected to GND. The NMOS 17 realizes a hysteresis characteristic by switching the resistance voltage dividing ratio by the monitoring voltage generating resistors 12, 13, and 14 in accordance with the output of the comparator 11. Specifically, the threshold voltage when the power supply voltage is raised is set higher than the threshold voltage when it is lowered.

以下、本実施の形態の誤動作防止回路１０の動作を説明する。
図２は、本実施の形態の誤動作防止回路の動作を示す図である。
縦軸が電圧、横軸が電源電圧（ＶＣＣ電圧）である。 Hereinafter, the operation of the malfunction prevention circuit 10 of the present embodiment will be described.
FIG. 2 is a diagram illustrating the operation of the malfunction prevention circuit according to the present embodiment.
The vertical axis represents voltage, and the horizontal axis represents power supply voltage (VCC voltage).

電源電圧と、比較器１１の正入力端子の電圧（基準電圧）及び負入力端子の電圧（監視電圧）を示している。
電源電圧（直線Ａ）の上昇時、比較器１１の正入力である基準電圧（直線Ｂ）は、ツェナーダイオード１５のブレークダウン電圧（ツェナー電圧と図示している）分立ち上がりがシフトして、電源電圧と同じ傾きで立ち上がる。これは、ブレークダウン電圧が印加された後、抵抗１６に電流が流れ始め、基準電圧となる電圧が印加されるためである。一方、比較器１１の負入力である監視電圧（直線Ｃ）は、抵抗１２、１３、１４により抵抗分圧した電圧のため、０Ｖから電源電圧に応じて立ち上がり、その傾きは電源電圧の傾きよりも緩やかになる。 The power supply voltage, the voltage at the positive input terminal of the comparator 11 (reference voltage), and the voltage at the negative input terminal (monitoring voltage) are shown.
When the power supply voltage (straight line A) rises, the reference voltage (straight line B), which is the positive input of the comparator 11, shifts the rising edge by the breakdown voltage of the zener diode 15 (shown as a zener voltage). Stands up with the same slope as the voltage. This is because a current starts to flow through the resistor 16 after the breakdown voltage is applied, and a voltage serving as a reference voltage is applied. On the other hand, the monitoring voltage (straight line C), which is the negative input of the comparator 11, is a voltage divided by the resistors 12, 13, and 14, and therefore rises from 0V in accordance with the power supply voltage, and its slope is greater than the slope of the power supply voltage. Will also be moderate.

このように、正負両入力電圧は立ち上がり電圧及び直線の傾きが異なるために、あるポイントで交差することになる。そのポイントが電源電圧上昇時の動作閾値電圧となり、比較器１１の出力が反転する。比較器１１は、この動作閾値電圧に達する前、すなわち、監視電圧が基準電圧よりも高い場合には、低電圧状態であるとしてロウレベルの誤動作防止信号を出力端子ＯＵＴから図示しないスイッチング電源制御ＩＣに出力する。これにより、図示しないスイッチング電源制御ＩＣの、誤動作防止回路１０以外の回路の全てまたは一部を除いた回路の動作が停止する。   Thus, the positive and negative input voltages intersect at a certain point because the rising voltage and the slope of the straight line are different. The point becomes the operation threshold voltage when the power supply voltage rises, and the output of the comparator 11 is inverted. Before reaching the operation threshold voltage, that is, when the monitoring voltage is higher than the reference voltage, the comparator 11 sends a low-level malfunction prevention signal from the output terminal OUT to the switching power supply control IC (not shown) as being in a low voltage state. Output. As a result, the operation of the circuit excluding all or a part of the switching power supply control IC (not shown) other than the malfunction prevention circuit 10 is stopped.

電源電圧が上昇して動作閾値電圧に達すると、比較器１１の出力は反転してハイレベルとなる。これにより、図示しないスイッチング電源制御ＩＣの動作を開始させる。また、このときＮＭＯＳ１７がオンすることで、監視電圧を決めている電源電圧を抵抗分圧する抵抗分圧比が切り替わる。具体的には、抵抗１３とＮＭＯＳ１７が直列に接続される。そのため、比較器１１の負入力端子には、抵抗１３とＮＭＯＳ１７に印加される電圧が監視電圧として入力される。そのため、図２のように監視電圧が下がり、その後は直線Ｄに従って変化するようになる。   When the power supply voltage rises and reaches the operation threshold voltage, the output of the comparator 11 is inverted and becomes a high level. Thereby, the operation of a switching power supply control IC (not shown) is started. At this time, when the NMOS 17 is turned on, the resistance voltage dividing ratio for dividing the power supply voltage that determines the monitoring voltage is switched. Specifically, the resistor 13 and the NMOS 17 are connected in series. Therefore, the voltage applied to the resistor 13 and the NMOS 17 is input to the negative input terminal of the comparator 11 as a monitoring voltage. For this reason, the monitoring voltage decreases as shown in FIG.

次に、電源電圧が下降すると、基準電圧は直線Ｂに従って下降し、監視電圧は直線Ｄに従って下降する。このとき直線Ｂと直線Ｄの傾きが異なるために、あるポイントで交差することになる。このポイントが電源電圧下降時の動作閾値電圧となり、比較器１１の出力が反転し、誤動作防止信号であるロウレベルの信号が出力端子ＯＵＴから出力される。またこの際、ＮＭＯＳ１７がオフすることから、監視電圧を決めている電源電圧の抵抗分圧比が切り替わる。具体的には抵抗１３と抵抗１４に印加される電圧が、監視電圧として比較器１１の負入力端子に入力される。そのため、図２のように監視電圧が上がり、その後は直線Ｃに従って変化するようになる。このようなヒステリシス特性を持たせ、電源電圧上昇時の動作閾値電圧を、下降時の動作閾値電圧より高くしたことにより、図示しないスイッチング電源制御ＩＣの動作開始時の消費電流の増加に伴う電源電圧の下降で、動作閾値電圧以下になり、すぐに誤動作防止信号が出力されないようにしている。   Next, when the power supply voltage decreases, the reference voltage decreases according to the straight line B, and the monitoring voltage decreases according to the straight line D. At this time, since the slopes of the straight line B and the straight line D are different, they intersect at a certain point. This point becomes the operation threshold voltage when the power supply voltage drops, the output of the comparator 11 is inverted, and a low level signal that is a malfunction prevention signal is output from the output terminal OUT. At this time, since the NMOS 17 is turned off, the resistance voltage dividing ratio of the power supply voltage that determines the monitoring voltage is switched. Specifically, a voltage applied to the resistor 13 and the resistor 14 is input to the negative input terminal of the comparator 11 as a monitoring voltage. For this reason, the monitoring voltage rises as shown in FIG. By having such a hysteresis characteristic, the operation threshold voltage when the power supply voltage is raised is higher than the operation threshold voltage when the power supply voltage is lowered, so that the power supply voltage accompanying an increase in current consumption at the start of the operation of the switching power supply control IC (not shown) As a result, the operation threshold voltage is not exceeded and the malfunction prevention signal is not immediately output.

図３は、誤動作防止回路の各特性を示す図である。
ここでは、比較のため、本実施の形態の誤動作防止回路１０の特性とともに、図４から図７で示した従来の誤動作防止回路の特性を示している。 FIG. 3 is a diagram illustrating each characteristic of the malfunction prevention circuit.
Here, for comparison, characteristics of the conventional malfunction prevention circuit shown in FIGS. 4 to 7 are shown together with characteristics of the malfunction prevention circuit 10 of the present embodiment.

まず、動作閾値電圧精度については、図４で示した従来の誤動作防止回路２０では、基準電圧を、ＮＭＯＳ２３を用いて生成していたため±２０％程度と精度が悪い。一方、本実施の形態の誤動作防止回路１０では、基準電圧を、比較的製造ばらつきの少ない素子であるツェナーダイオード１５を用いて生成しているので、±６％程度のよい精度が得られる。   First, regarding the operation threshold voltage accuracy, in the conventional malfunction prevention circuit 20 shown in FIG. 4, the reference voltage is generated using the NMOS 23, so that the accuracy is about ± 20%. On the other hand, in the malfunction prevention circuit 10 of the present embodiment, the reference voltage is generated by using the Zener diode 15 that is an element with relatively little manufacturing variation, so that a good accuracy of about ± 6% can be obtained.

次に動作閾値電圧設定自由度であるが、図５で示した従来の誤動作防止回路３０では、ツェナーダイオード３１、３２のデバイス特性を用いているために、段階的にしか動作閾値電圧を設定できない。一方、本実施の形態の誤動作防止回路１０では、監視電圧を電源電圧から抵抗分圧によって生成するので動作閾値電圧を無段階に設定でき自由度が高い。   Next, regarding the operational threshold voltage setting degree of freedom, the conventional malfunction prevention circuit 30 shown in FIG. 5 uses the device characteristics of the Zener diodes 31 and 32. Therefore, the operational threshold voltage can be set only in stages. . On the other hand, in the malfunction prevention circuit 10 of this embodiment, since the monitoring voltage is generated from the power supply voltage by resistance voltage division, the operation threshold voltage can be set steplessly and has a high degree of freedom.

最後にスタンバイ電流について説明する。図６、図７で示した従来の誤動作防止回路５０、６０では、基準電圧を発生させるためにバンドギャップリファレンス回路など常時電流を消費する回路を使わざるを得ないために、スタンバイ電流は、数μＡ〜数百μＡ程度と多くなる。また、基準電圧を発生する回路ブロックが必要になってくるため、回路規模の増大につながる問題もある。一方、本実施の形態の誤動作防止回路１０では、基準電圧を発生する回路ブロックの必要がなく、抵抗１２、１３、１４によりスタンバイ電流を抑制できるので、抵抗値を大きくすることで、数μＡ〜数十μＡ程度と、少なくできる。また、回路規模の増大も招かない。   Finally, the standby current will be described. In the conventional malfunction prevention circuits 50 and 60 shown in FIGS. 6 and 7, a circuit that always consumes current, such as a band gap reference circuit, must be used to generate a reference voltage. It increases to about μA to several hundred μA. Further, since a circuit block for generating a reference voltage is required, there is a problem that leads to an increase in circuit scale. On the other hand, in the malfunction prevention circuit 10 of the present embodiment, there is no need for a circuit block that generates a reference voltage, and the standby current can be suppressed by the resistors 12, 13, and 14, so that by increasing the resistance value, several μA to It can be reduced to about several tens of μA. Further, the circuit scale is not increased.

以上のように、本実施の形態の誤動作防止回路１０によれば、回路規模の増大を招くことなく、動作閾値電圧精度、動作閾値電圧設定自由度及びスタンバイ電流、いずれの項目を満足する特性を実現でき、従来のように、図４〜図７のような回路を、スイッチング電源制御ＩＣを搭載する電源セットの用途に応じて使い分ける必要もなくすことができる。   As described above, according to the malfunction prevention circuit 10 of the present embodiment, the characteristics satisfying any of the items, that is, the operation threshold voltage accuracy, the operation threshold voltage setting freedom and the standby current, without increasing the circuit scale. As in the prior art, the circuits as shown in FIGS. 4 to 7 can be eliminated depending on the use of the power supply set equipped with the switching power supply control IC.

本実施の形態の誤動作防止回路の回路図である。It is a circuit diagram of a malfunction prevention circuit of the present embodiment. 本実施の形態の誤動作防止回路の動作を示す図である。It is a figure which shows operation | movement of the malfunction prevention circuit of this Embodiment. 誤動作防止回路の各特性を示す図である。It is a figure which shows each characteristic of a malfunction prevention circuit. 従来の誤動作防止回路の回路図である。It is a circuit diagram of a conventional malfunction prevention circuit. 従来の誤動作防止回路の回路図である。It is a circuit diagram of a conventional malfunction prevention circuit. 従来の誤動作防止回路の回路図である。It is a circuit diagram of a conventional malfunction prevention circuit. 従来の誤動作防止回路の回路図である。It is a circuit diagram of a conventional malfunction prevention circuit.

符号の説明Explanation of symbols

１０ 誤動作防止回路
１１ 比較器
１２、１３、１４、１６ 抵抗
１５ ツェナーダイオード
１７ ＮＭＯＳ
ＶＣＣ 電源端子
ＧＮＤ 接地端子
ＯＵＴ 出力端子
10 Malfunction Prevention Circuit 11 Comparator 12, 13, 14, 16 Resistor 15 Zener Diode 17 NMOS
VCC Power supply terminal GND Ground terminal OUT Output terminal

Claims (3)

スイッチング電源制御回路の誤動作を防止する誤動作防止回路において、
電源端子と接地端子間に直列に接続した複数の監視電圧生成用抵抗と、
前記監視電圧生成用抵抗と並列に接続し、前記電源端子と前記接地端子間に直列に接続したツェナーダイオードと基準電圧生成用抵抗と、
複数の前記監視電圧生成用抵抗により抵抗分圧した電源電圧を監視電圧とし、前記基準電圧生成用抵抗に印加される電圧を基準電圧とし、前記監視電圧と前記基準電圧とを比較して低電圧状態を検出し、前記低電圧状態の場合には前記スイッチング電源制御回路の誤動作を防止する誤動作防止信号を出力する比較器と、
を有することを特徴とする誤動作防止回路。 In the malfunction prevention circuit that prevents malfunction of the switching power supply control circuit,
A plurality of monitoring voltage generating resistors connected in series between the power supply terminal and the ground terminal;
A zener diode and a reference voltage generating resistor connected in parallel with the monitoring voltage generating resistor and connected in series between the power supply terminal and the ground terminal,
A power supply voltage divided by a plurality of monitoring voltage generating resistors is used as a monitoring voltage, a voltage applied to the reference voltage generating resistor is used as a reference voltage, and the monitoring voltage is compared with the reference voltage to obtain a low voltage. A comparator that detects a state and outputs a malfunction prevention signal that prevents malfunction of the switching power supply control circuit in the case of the low voltage state;
A malfunction prevention circuit comprising: 前記監視電圧と前記基準電圧が一致した電圧を閾値電圧とし、前記比較器は、前記監視電圧が前記基準電圧よりも高い場合に前記誤動作防止信号を出力することを特徴とする請求項１記載の誤動作防止回路。   2. The malfunction prevention signal according to claim 1, wherein a voltage at which the monitoring voltage and the reference voltage coincide with each other is set as a threshold voltage, and the comparator outputs the malfunction prevention signal when the monitoring voltage is higher than the reference voltage. Malfunction prevention circuit. 前記比較器の出力に応じて、前記監視電圧生成用抵抗による抵抗分圧比を切り替える電界効果トランジスタを有し、前記電源電圧の上昇時の前記閾値電圧を、下降時の前記閾値電圧より高くしたことを特徴とする請求項２記載の誤動作防止回路。
A field effect transistor that switches a resistance voltage dividing ratio by the monitoring voltage generating resistor according to the output of the comparator, and the threshold voltage when the power supply voltage is increased is higher than the threshold voltage when the power supply voltage is decreased The malfunction prevention circuit according to claim 2.
JP2004299512A 2004-10-14 2004-10-14 Malfunction preventing circuit Pending JP2006115594A (en)

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Cited By (18)

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Publication number Priority date Publication date Assignee Title
JP2008004038A (en) * 2006-06-26 2008-01-10 Ricoh Co Ltd Voltage regulator
WO2008149915A1 (en) * 2007-06-05 2008-12-11 Ricoh Company, Ltd. Switching regulator and operations control method thereof
US8174802B2 (en) 2007-06-05 2012-05-08 Ricoh Company, Ltd. Switching regulator and operations control method thereof
JP2009201183A (en) * 2008-02-19 2009-09-03 Spansion Llc Voltage comparator and electronic system
US20090268360A1 (en) * 2008-04-25 2009-10-29 Hitachi, Ltd. Protection circuit
US8558527B2 (en) 2010-05-17 2013-10-15 Fuji Electric Co., Ltd. Switching power supply system provided with under voltage lock out circuit
KR101210738B1 (en) 2011-01-13 2012-12-10 엘지이노텍 주식회사 Sequence regulation circuit in a television
US9348398B2 (en) 2013-07-01 2016-05-24 Motorola Solutions, Inc. Method and apparatus for distinguishing momentary loss of battery contact from an undervoltage condition
CN106602503A (en) * 2016-10-19 2017-04-26 邯郸学院 Embedded multifunctional mining electrical equipment protection device
CN108155634A (en) * 2016-12-05 2018-06-12 意法半导体股份有限公司 Current limiter, corresponding intrument and method
US10547171B2 (en) 2016-12-05 2020-01-28 Stmicroelectronics S.R.L. Current limiter, corresponding device and method
JP2019003561A (en) * 2017-06-19 2019-01-10 株式会社デンソーウェーブ I/o module
US10522230B2 (en) 2017-07-25 2019-12-31 Samsung Electronics Co., Ltd. Nonvolatile memory device having a recovery operation conditioned on an operation mode, operation method thereof, and storage device including the same
KR20190091930A (en) * 2018-01-30 2019-08-07 엘에스산전 주식회사 The Apparatus to Remove Output Voltage Slope Phenomenon of Switcher Power Converter in PLC Module
US10635123B2 (en) 2018-01-30 2020-04-28 Lsis Co., Ltd. Device for eliminating slope in output voltage of switcher power converter in PLC module
KR102534636B1 (en) * 2018-01-30 2023-05-18 엘에스일렉트릭(주) The Apparatus to Remove Output Voltage Slope Phenomenon of Switcher Power Converter in PLC Module
US11507123B2 (en) 2019-07-08 2022-11-22 Ablic Inc. Constant voltage circuit
JP7473435B2 (en) 2020-09-25 2024-04-23 新電元工業株式会社 Discharge Circuit

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