JP2006090735A - Method of controlling electronic equipment - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of controlling electronic equipment capable of effectively utilize a battery as much as possible by precisely estimating the remaining amount of the battery at the time of alleviating the excessive current consumption at the time of using the built in auxiliary electric source. <P>SOLUTION: The method comprises a built-in electric source for auxiliary use, a charging control circuit for charging the built-in electric source, a voltage detection circuit for detecting the voltage of the built-in electric source, an artificial load for connecting with the battery, a voltage detection circuit for detecting the voltage of the battery, and a system control circuit. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to an external power source that is a primary battery that can be attached to and detached from an electronic device, a secondary battery, or an AC adapter, and an auxiliary secondary battery that is built in the electronic device, or a built-in power source that is a large-capacity capacitor. The present invention relates to a method for controlling an electronic device that is driven from the outside.

Conventionally, as a battery remaining amount detecting means for driving an electronic device from a battery, for example, as disclosed in Patent Document 1, a predetermined load test coefficient is applied to a voltage drop due to a pseudo load in consideration of an operation state of the electronic device. There is a method of predicting a voltage drop during operation of an electronic device by a calculation means according to the situation, and determining a remaining battery level by comparing with a predetermined threshold.
JP 2001-339630 A

  The conventional battery remaining amount detection means is still operable, for example, when an auxiliary power supply for the purpose of suppressing battery consumption is connected and using the same load test coefficient as when not connected. Nevertheless, it is conceivable to stop the operation of the electronic device or limit the operating environment.

  The present invention has been made under such a background, and its problem is to switch and control a plurality of load test coefficients for the same mode according to an input or a built-in power supply. Therefore, the battery can be used as effectively as possible.

  The invention described in claims 1 to 8 provides a method for controlling an electronic device capable of effectively using a battery as much as possible according to the supply status of the input power in an electronic device that can be driven from a plurality of input power sources. The primary purpose is to do things.

  In the invention described in claim 9 of the present application, the user can arbitrarily use the auxiliary power source capacity built in the electronic device and use the battery according to the supply status of the input power source. The second object is to provide a method for controlling an electronic device that can be effectively used effectively.

  The present invention can solve the above problems by providing the following configuration.

  (1) Driving from a plurality of input power sources is possible. Power consumption in various modes is multiplied by a voltage drop when a constant current is supplied from the input power source to the pseudo load by a load test coefficient corresponding to the various modes. In an electronic apparatus provided with a prediction means for predicting power consumption in the various modes based on the multiplied value, the same mode has a plurality of load test coefficients, and a plurality of load tests according to the supply status of the input power supply. An electronic device control method for controlling by switching coefficients.

(2) In the electronic device that is driven from a first external power source that is a primary battery that can be attached to and detached from the electronic device or the secondary battery 1, the electronic device is a secondary battery built in the electronic device. A secondary battery 2 or a built-in power source that is a large-capacity capacitor;
A voltage detection circuit 1 for detecting a battery voltage value of the first external power source;
A pseudo load 1 connected to the first external power source;
A voltage detection circuit 2 for detecting the voltage of the internal power supply;
A charge control circuit 1 for charging the built-in power supply from the first external power supply;
SW1 that enters and exits when power is supplied from the first external power source to the electronic device;
SW2 that enters and exits when power is supplied from the built-in power source to the electronic device;
It is composed of a SW control circuit 1 for controlling the SW1 and SW2.
When power is supplied to the electronic device only from the first external power source, the power consumption in various modes of the electronic device is connected to the pseudo load from the first external power source by connecting the pseudo load 1. A load test coefficient 1 for predicting power consumption in the various modes based on a multiplication value obtained by multiplying a voltage drop when the constant current is supplied by a coefficient corresponding to the various modes;
When power is supplied to the electronic device from the first external power source and the built-in power source, the power consumption in the various modes of the electronic device is connected to the pseudo load by connecting the pseudo load 1 to the first load. By switching the load test coefficient 2 for predicting the power consumption in the various modes based on the multiplication value obtained by multiplying the voltage drop when the constant current is supplied from the external power source by the coefficient corresponding to the various modes. A method for controlling an electronic device, wherein the remaining battery level of the first external power source is predicted.

(3) In the electronic device driven from a first external power source that is a primary battery or a secondary battery 1 that can be attached to and detached from the electronic device, the electronic device is an auxiliary two built-in in the electronic device. A secondary battery 2 or a built-in power source that is a large-capacity capacitor;
A second external power source for supplying power to the electronic device from an AC power source;
A voltage detection circuit 1 for detecting a battery voltage value of the first external power source;
A pseudo load 1 connected to the first external power source;
A voltage detection circuit 2 for detecting the voltage of the internal power supply;
Voltage detection means 3 for detecting the voltage of the second external power supply;
A charge control circuit 1 for charging the built-in power supply from the first external power supply;
SW1 that enters and exits when power is supplied from the first external power source to the electronic device;
SW2 that enters and exits when power is supplied from the built-in power source to the electronic device;
SW3 that is turned on when supplying power to the electronic device from the second external power source;
It is composed of a SW control circuit 2 for controlling the SW1, SW2, and SW3.
When power is supplied to the electronic device only from the first external power source, the power consumption in various modes of the electronic device is connected to the pseudo load from the first external power source by connecting the pseudo load 1. A load test coefficient 1 for predicting power consumption in the various modes based on a multiplication value obtained by multiplying a voltage drop when the constant current is supplied by a coefficient corresponding to the various modes;
When power is supplied to the electronic device from the first external power source and the built-in power source, the power consumption in the various modes of the electronic device is connected to the pseudo load by connecting the pseudo load 1 to the first load. By switching the load test coefficient 2 for predicting the power consumption in the various modes based on the multiplication value obtained by multiplying the voltage drop when the constant current is supplied from the external power source by the coefficient corresponding to the various modes. A method for controlling an electronic device, wherein the remaining battery level of the first external power source is predicted.

  (4) The method for controlling an electronic device according to (3), further comprising a charge control circuit 2 for charging the internal power supply from the second external power supply.

  (5) The method for controlling an electronic device according to (3) or (4), further comprising a charge control circuit 3 for charging the first external power supply from the second external power supply.

(6) In the electronic device that is driven from a first external power source that is a primary battery that can be attached to and detached from the electronic device or the secondary battery 1, the electronic device is a secondary battery built in the electronic device. A secondary battery 2 or a built-in power source that is a large-capacity capacitor;
A second external power source for supplying power to the electronic device from an AC power source;
A voltage detection circuit 1 for detecting a battery voltage value of the first external power source;
A pseudo load 1 connected to the first external power source;
A voltage detection circuit 2 for detecting the voltage of the internal power supply;
Voltage detection means 3 for detecting the voltage of the second external power supply;
A charge control circuit 2 for charging the internal power supply from the second external power supply;
SW1 that enters and exits when power is supplied from the first external power source to the electronic device;
SW2 that enters and exits when power is supplied from the built-in power source to the electronic device;
SW3 that is turned on when supplying power to the electronic device from the second external power source;
It is composed of a SW control circuit 2 for controlling the SW1, SW2, and SW3.
When power is supplied to the electronic device only from the first external power source, the power consumption in various modes of the electronic device is connected to the pseudo load from the first external power source by connecting the pseudo load 1. A load test coefficient 1 for predicting power consumption in the various modes based on a multiplication value obtained by multiplying a voltage drop when the constant current is supplied by a coefficient corresponding to the various modes;
When power is supplied to the electronic device from the first external power source and the built-in power source, the power consumption in the various modes of the electronic device is connected to the pseudo load by connecting the pseudo load 1 to the first load. By switching the load test coefficient 2 for predicting the power consumption in the various modes based on the multiplication value obtained by multiplying the voltage drop when the constant current is supplied from the external power source by the coefficient corresponding to the various modes. A method for controlling an electronic device, wherein the remaining battery level of the first external power source is predicted.

(7) In the electronic device that is driven from a first external power source that is a primary battery that can be attached to and detached from the electronic device or the secondary battery 1, the electronic device is a secondary battery built in the electronic device. A secondary battery 2 or a built-in power source that is a large-capacity capacitor;
A second external power source for supplying power to the electronic device from an AC power source;
A voltage detection circuit 1 for detecting a battery voltage value of the first external power source;
A pseudo load 1 connected to the first external power source;
A voltage detection circuit 2 for detecting the voltage of the internal power supply;
Voltage detection means 3 for detecting the voltage of the second external power supply;
A charge control circuit 2 for charging the internal power supply from the second external power supply;
A charge control circuit 3 for charging the first external power source from the second external power source;
SW1 that enters and exits when power is supplied from the first external power source to the electronic device;
SW2 that enters and exits when power is supplied from the built-in power source to the electronic device;
SW3 that is turned on when supplying power to the electronic device from the second external power source;
It is composed of a SW control circuit 2 for controlling the SW1, SW2, and SW3.
When power is supplied to the electronic device only from the first external power source, the power consumption in various modes of the electronic device is connected to the pseudo load from the first external power source by connecting the pseudo load 1. A load test coefficient 1 for predicting power consumption in the various modes based on a multiplication value obtained by multiplying a voltage drop when the constant current is supplied by a coefficient corresponding to the various modes;
When power is supplied to the electronic device from the first external power source and the built-in power source, the power consumption in the various modes of the electronic device is connected to the pseudo load by connecting the pseudo load 1 to the first load. By switching the load test coefficient 2 for predicting the power consumption in the various modes based on the multiplication value obtained by multiplying the voltage drop when the constant current is supplied from the external power source by the coefficient corresponding to the various modes. A method for controlling an electronic device, wherein the remaining battery level of the first external power source is predicted.

  (8) The method for controlling an electronic device according to any one of (2) to (7), further comprising a pseudo load 2 connected to the internal power source.

  (9) The method for controlling an electronic device according to any one of (2) to (8), wherein the internal power supply can be changed to an arbitrary capacity.

  According to the present invention, an electronic device predicts whether a built-in secondary battery or a large-capacity capacitor can cover a transient large current during operation of the electronic device with charges stored by charging. In accordance with the result, it is possible to detect the appropriate remaining battery level. Therefore, by providing this electronic device control method, as in the past, in the battery remaining amount detection means, for example, when an auxiliary power supply for the purpose of suppressing battery consumption is connected, it is not connected If the same load test coefficient is used, avoiding problems such as misjudging that the electronic device cannot be driven or limiting the operating environment even if the remaining battery level is sufficient to drive the electronic device. Can be used effectively.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

  FIG. 1 is a drawing that best represents the features of the present invention. As shown in FIG. 1, an external power source 100 such as a primary battery and a secondary battery, an external power source 101 such as an AC power source, an external power source, and an electronic device. Connector 102, 103, 104, 105 for connecting the power supply, a built-in power supply 106 built in the electronic device, a charge control circuit 107 for charging the built-in power supply 106 from the external power supply 100 or the external power supply 101, SW 108 that is turned on when power is supplied from the external power source 100 to the electronic device, SW 109 that is turned on when power is supplied from the external power source 101 to the electronic device, and SW 110 that is turned on when power is supplied from the built-in power source 106 to the electronic device. D converted from the voltage of the external power source 100, the external power source 101, or the built-in power source 106 to a voltage required inside the electronic device / DC converter 111, voltage detection circuit 112 for detecting the voltage value of external power supply 100, voltage detection circuit 113 for detecting the voltage value of external power supply 101, and voltage value of built-in power supply 106 Voltage detection circuit 114, pseudo load 115 connected to external power supply 100, pseudo load 116 connected to built-in power supply 106, SW control circuit 117 for controlling SW 108, SW 109 and SW 110, and system control circuit 118 for electronic equipment It is related with the electronic device comprised from.

  Reference numeral 100 denotes an external power source that can be attached to and detached from an electronic device, such as a primary battery such as an alkaline battery or a lithium battery, or a secondary battery such as a NiCd battery, a NiMh battery, or a lithium battery.

  106, when a large current is consumed transiently during operation of an electronic device, the load on the external power supply 100 is reduced by covering the transient large current with the charge accumulated in the built-in power supply, and the battery can be used. A secondary battery or a large-capacity capacitor that is built in an electronic device in advance and used in an auxiliary manner for effective use. In addition to being equipped as standard, the capacity can be arbitrarily selected, replaced, and added by the user from a line-up prepared in advance, similar to the memory of a personal computer.

  Reference numeral 107 denotes a circuit for charging the internal power supply 106 from the external power supply 100 or the external power supply 101, and the timing, charging time, and charging current at the time of charging are controlled by the system control circuit 118. For example, charging is performed in a low current consumption mode in which a transient large current does not occur, charging is performed with low constant current control so that the load on the external power supply 100 does not increase, and the time required for full charging by the voltage detection circuit 113 Or charging until the end of the low current consumption mode in which charging to the built-in power supply is permitted. With this control, the system control circuit 118 determines the charge accumulated in the built-in power supply 106.

  Reference numeral 108 denotes a SW that is turned on when power is supplied from the external power source 100 to the electronic device. When power is supplied from the external power source 101 or the built-in power source, the SW is turned off, or the DC / DC converter 111 is switched from the external power source 100. The current is allowed to flow only in one direction and not in the opposite direction, and is controlled by the SW control circuit 117.

  Reference numeral 109 denotes a SW that is turned on when power is supplied from the external power source 101 to the electronic device. When power is supplied from the external power source 100 or the built-in power source, the SW is turned off, or the DC / DC converter 111 is switched from the external power source 101. The current is allowed to flow only in one direction and not in the opposite direction, and is controlled by the SW control circuit 117.

  110 is a SW that is turned on when power is supplied from the built-in power supply 106 to the electronic device, and is used only when a limited block of the electronic device or a specific load pattern is connected. The SW is configured to be turned off during device operation, and is controlled by the SW control circuit 117. In addition, when power is supplied from the external power source 101, the SW is always turned off and controlled by the SW control circuit 117.

  Reference numeral 112 denotes an A / D converter that measures the battery voltage of the external power supply 100, converts the voltage value of the connected external power supply 100 into a digital value, and sends data to the system control circuit 118.

  Reference numeral 114 denotes an A / D converter that measures the battery voltage of the built-in power supply 106, converts the voltage value of the built-in power supply 106 into a digital value, and sends data to the system control circuit 118.

  Reference numeral 113 denotes detection means for detecting whether or not the external power supply 101 is connected. Similarly to 112 and 114, the A / D converter circuit configuration or a circuit configuration that turns on / off at a certain threshold value.

  Reference numeral 115 denotes a pseudo load connected to the external power supply 100, which is a constant current load circuit for the external power supply 100. When a circuit that consumes a large amount of current in an electronic device is operated, it is necessary to avoid an unstable operation due to insufficient power while the circuit is being driven. For this purpose, a pseudo load 115 of a constant current load circuit set to a predetermined value in advance is connected to the external power supply 100, and the voltage drop at that time is measured by the voltage detection circuit 112. The voltage drop is predicted as shown below.

  (Voltage drop of external power supply 100) = (Voltage drop due to pseudo load 115) × (Load test coefficient A1). The load test coefficient A1 is determined by how many times the power of the circuit to be moved corresponds to the power consumption when the pseudo load 115 is connected. The load test coefficient value is set for each circuit operation that consumes a large amount of current when the electronic device is moved, and is stored in a nonvolatile memory or the like.

  If the calculation result for predicting the voltage drop falls below a voltage value necessary for operating the circuit, a protection process is performed such that the next circuit drive is not performed.

  A pseudo load 116 connected to the built-in power supply 106 is a constant current load circuit for the built-in power supply 106. As described above, it is necessary to determine whether or not the accumulated electric charge can be covered in the power supply at the time of transient large current consumption. For this purpose, a pseudo load 116, which is a constant current load circuit set to a predetermined value in advance, is connected to the built-in power source 106, and the voltage drop at that time is measured by the voltage detection circuit 114, thereby making a transient transition. The voltage drop of the built-in power supply when supplying a large current is predicted as shown in the following equation.

  (Voltage drop of built-in power supply 106) = (Voltage drop due to pseudo load 116) × (Load test coefficient B). The load test coefficient B is determined according to how many times the power consumed when a transient large current is covered by the built-in power supply is equivalent to the power consumed when the pseudo load 116 is connected. The load test coefficient value is set for each load pattern that transiently consumes a large current when the electronic device is moved, and is stored in a nonvolatile memory or the like.

  Here, the load test coefficient for the external power supply 100 described above is the load test coefficient A when the calculation result for predicting the voltage drop of the built-in power supply 106 exceeds the voltage value necessary to cover a transient large current. The test coefficient A1 is set separately as the load test coefficient A2 when the calculation result for predicting the voltage drop of the built-in power supply 106 falls below the voltage value necessary to cover the transient large current. And stored in a non-volatile memory or the like.

  Next, an image processing apparatus will be described as an embodiment of the present invention.

  FIG. 2 is a block diagram illustrating a schematic configuration of the image processing apparatus. Elements common to those in FIG. 1 are denoted by the same reference numerals.

  In the figure, reference numeral 200 denotes an image processing apparatus. Reference numeral 10 denotes a photographing lens, 12 denotes a shutter having a diaphragm function, 14 denotes an image sensor that converts an optical image into an electrical signal, and 16 denotes an A / D converter that converts an analog signal output from the image sensor 14 into a digital signal.

  A timing generation circuit 18 supplies a clock signal and a control signal to the image sensor 14, the A / D converter 16, and the D / A converter 26, and is controlled by the memory control circuit 22 and the system control circuit 118.

  An image processing circuit 20 performs predetermined pixel interpolation processing and color conversion processing on the data from the A / D converter 16 or the data from the memory control circuit 22.

  Further, the image processing circuit 20 performs predetermined calculation processing using the captured image data, and the system control circuit 118 controls the exposure control means 40 and the distance measurement control means 42 based on the obtained calculation result. TTL (through-the-lens) AF (autofocus) processing, AE (automatic exposure) processing, and EF (flash pre-emission) processing are performed.

  Further, the image processing circuit 20 performs predetermined arithmetic processing using captured image data, and also performs TTL AWB (auto white balance) processing based on the obtained arithmetic result.

  A memory control circuit 22 controls the A / D converter 16, the timing generation circuit 18, the image processing circuit 20, the image display memory 24, the D / A converter 26, the memory 30, and the compression / decompression circuit 32.

  The data of the A / D converter 16 is written into the image display memory 24 or the memory 30 via the image processing circuit 20 and the memory control circuit 22 or the data of the A / D converter 16 is directly passed through the memory control circuit 22. It is.

  Reference numeral 24 denotes an image display memory, 26 denotes a D / A converter, 28 denotes an image display unit including a TFT LCD, and the image data for display written in the image display memory 24 passes through the D / A converter 26. Displayed by the image display unit 28.

  If the image data captured using the image display unit 28 is sequentially displayed, the electronic viewfinder function can be realized.

  Further, the image display unit 28 can arbitrarily turn on / off the display according to an instruction from the system control circuit 118. When the display is turned off, the power consumption of the image processing apparatus 200 can be greatly reduced. I can do it.

  Further, the image display unit 28 is coupled to the main body of the image processing apparatus 200 by a rotatable hinge unit, and an electronic finder function, a reproduction display function, and various display functions can be used by setting a free orientation and angle. Is possible.

  The display portion of the image display unit 28 can be stored toward the image processing apparatus 200. In this case, the storage state is detected by an image display unit open / close detection means (not shown), and the image display unit 28 is detected. Display operation can be stopped.

  Reference numeral 30 denotes a memory for storing captured still images and moving images, and has a sufficient storage capacity to store a predetermined number of still images and a predetermined time of moving images. Thereby, even in the case of continuous shooting or panoramic shooting in which a plurality of still images are continuously shot, it is possible to write a large amount of images to the memory 30 at high speed.

  The memory 30 can also be used as a work area for the system control circuit 118.

  Reference numeral 32 denotes a compression / decompression circuit that compresses and decompresses image data by adaptive discrete cosine transform (ADCT) or the like, reads an image stored in the memory 30, performs compression processing or decompression processing, and stores the processed data in the memory 30. Write to.

  Reference numeral 40 denotes exposure control means for controlling the shutter 12 having a diaphragm function, and has a flash light control function in cooperation with the flash 404.

  Reference numeral 42 denotes distance measurement control means for controlling the focusing of the taking lens 10.

  The exposure control means 40 and the distance measurement control means 42 are controlled using the TTL method, and the system control circuit 118 uses the exposure control means 40 and the distance measurement based on the calculation result obtained by calculating the captured image data by the image processing circuit 20. Control is performed on the control means 42.

  Reference numeral 44 denotes zoom control means for controlling zooming of the taking lens 10, and reference numeral 46 denotes barrier control means for controlling the operation of the protection means 202 which is a barrier. Reference numeral 48 denotes a connector, which is also called an accessory shoe, and includes an electrical contact with the flash device 400 and a mechanical fixing means.

  Reference numeral 118 denotes a system control circuit that controls the entire image processing apparatus 200, and reference numeral 52 denotes a memory that stores constants, variables, programs, and the like for operation of the system control circuit 118.

  Reference numeral 54 denotes a display unit such as a liquid crystal display device or a speaker that displays an operation state or a message using characters, images, sounds, or the like in accordance with execution of a program in the system control circuit 118. One or a plurality of places are provided near the portion where they are easily visible, and are configured by a combination of, for example, an LCD, an LED, a sound generation element, and the like.

  The display unit 54 has a part of its functions installed in the optical viewfinder 204. Among the display contents of the display unit 54, what is displayed on the LCD or the like includes single shot / continuous shooting display, self-timer display, compression rate display, number of recorded pixels, number of recorded pixels, number of remaining images that can be captured, shutter Speed display, Aperture value display, Exposure compensation display, Flash display, Red-eye reduction display, Macro shooting display, Buzzer setting display, Clock battery level display, Battery level display, Error display, Multi-digit number information display and recording There are an attachment / detachment state display of the media 300 and 310, a communication I / F operation display, a date / time display, and the like.

  Among the display contents of the display unit 54, what is displayed in the optical viewfinder 204 includes in-focus display, camera shake warning display, flash charge display, shutter speed display, aperture value display, exposure correction display, and the like.

  Reference numeral 56 denotes an electrically erasable / recordable nonvolatile memory such as an EEPROM. Reference numerals 60, 62, 64, 66, 68 and 70 are operation means for inputting various operation instructions of the system control circuit 118, and may be a single unit such as a switch, a dial, a touch panel, pointing by line-of-sight detection, a voice recognition device, or the like. Consists of multiple combinations.

  Here, a specific description of these operating means will be given.

  Reference numeral 60 denotes a mode dial switch, which can switch and set various function modes such as power-off, automatic shooting mode, shooting mode, panoramic shooting mode, playback mode, multi-screen playback / erase mode, and PC connection mode.

  Reference numeral 62 denotes a shutter switch SW1, which is turned ON during the operation of a shutter button (not shown), and performs AF (auto focus) processing, AE (auto exposure) processing, AWB (auto white balance) processing, EF (flash pre-flash) processing, and the like. Instruct to start operation.

  Reference numeral 64 denotes a shutter switch SW2, which is turned on when an operation of a shutter button (not shown) is completed, and an exposure process for writing a signal read from the image sensor 14 to the memory 30 via the A / D converter 16 and the memory control circuit 22. Development processing using operations in the image processing circuit 20 and the memory control circuit 22, and recording processing for reading out image data from the memory 30, compressing in the compression / decompression circuit 32, and writing the image data in the recording medium 300 or 310. Instructs the start of a series of processing operations.

  Reference numeral 66 denotes an image display ON / OFF switch that can set ON / OFF of the image display unit 28. With this function, when taking an image using the optical viewfinder 204, it is possible to save power by cutting off the current supply to the image display unit including a TFT LCD or the like.

  68 is a single shooting / continuous shooting switch. When the shutter switch SW2 is pressed, a single shooting mode is set in which one frame is shot, and a continuous shooting mode in which shooting is continuously performed while the shutter switch SW2 is pressed. And can be set.

  Reference numeral 70 denotes an operation unit composed of various buttons, a touch panel, etc., a menu button, a set button, a macro button, a multi-screen playback page break button, a flash setting button, a single shooting / continuous shooting / self-timer switching button, a menu moving plus (+). Button, menu move minus (-) button, playback image move plus (+) button, playback image move (-) minus button, shooting image selection button, exposure compensation button, date / time setting button, panorama mode shooting and playback A selection / switching button for setting selection and switching of various functions when executing, a determination / execution button for setting determination and execution of various functions when performing shooting and playback in panorama mode, etc. Image display ON / OFF switch to set ON / OFF, image data shot immediately after shooting Quick review ON / OFF switch for setting a quick review function for automatically reproducing data, a switch for selecting a compression rate of JPEG compression, or a switch for selecting a CCD RAW mode in which an image sensor signal is digitized and recorded on a recording medium. A compression mode switch, a playback mode, a multi-screen playback / erase mode, a PC connection mode, and other playback mode switches that can be set for each function mode. There is a playback switch for instructing the start of a playback operation that is read from 310 and displayed by the image display unit 28.

  Reference numeral 80 denotes power supply control means, which is composed of a charge control circuit, SW, SW control circuit, DC / DC converter, voltage detection circuit, pseudo load, etc., as described in detail in FIG. Power supply, charging to the built-in power supply, SW switching control, and detection of the remaining power supply are performed.

  100 is an external power source such as a primary battery or secondary battery, 101 is an external power source such as an AC power source, 102, 103, 104, and 105 are connection connectors for connecting the external power source and the electronic device, and 106 is built in the electronic device. Built-in power supply.

  90 and 94 are connectors, an interface with a recording medium such as a memory card or a hard disk, 92 and 96 have a function of connecting to a recording medium such as a memory card or a hard disk, and 98 is a recording medium attachment / detachment detecting means. The connector 92 and / or 96 has a function of detecting whether or not the recording medium 300 or 310 is attached.

  In the present embodiment, the description is given assuming that there are two systems of interfaces and connectors for attaching the recording medium. Of course, the interface and the connector for attaching the recording medium may have a single or a plurality of systems and any number of systems. Moreover, it is good also as a structure provided with combining the interface and connector of a different standard.

  The interface and connector may be configured using a PCMCIA card, a CF (Compact Flash (registered trademark)) card, or the like that conforms to a standard.

  When the interfaces 90 and 94 and the connectors 92 and 96 are configured using a PCMCIA card, a CF (Compact Flash (registered trademark)) card, or the like that conforms to the standard, a device determination unit set in the standard Thus, the connected device can be determined.

  A protection unit 202 is a barrier that prevents the imaging unit from being stained or damaged by covering the imaging unit including the lens 10 of the image processing apparatus 200. Reference numeral 204 denotes an optical viewfinder, which can take an image using only the optical viewfinder without using the electronic viewfinder function of the image display unit 28.

  In addition, some functions of the display unit 54 such as an in-focus display, a camera shake warning display, a flash charge display, a shutter speed display, an aperture value display, and an exposure correction display are installed in the optical viewfinder 204. .

  The image display unit open / close detection means (not shown) can detect whether or not the image display unit 28 is in a storage state in which the display part of the image display unit 28 is stored in the image processing apparatus 200. Here, if it is detected that it is in the storage state, it is possible to stop the display operation of the image display unit 28 and prohibit unnecessary power consumption.

  A communication unit 210 has various communication functions such as RS232C, USB, IEEE1394, P1284, SCSI, modem, LAN, and wireless communication.

  Reference numeral 212 denotes a connector for connecting the image processing apparatus 200 to another device by the communication unit 210 or an antenna in the case of wireless communication.

  Reference numeral 300 denotes a recording medium such as a memory card or a hard disk. The recording medium 300 includes a recording unit 302 composed of a semiconductor memory, a magnetic disk, or the like, an interface 304 with the image processing apparatus 200, and a connector 306 that connects to the image processing apparatus 200.

  Reference numeral 310 denotes a recording medium such as a memory card or a hard disk. The recording medium 310 includes a recording unit 312 composed of a semiconductor memory, a magnetic disk, and the like, an interface 314 with the image processing apparatus 200, and a connector 316 that connects to the image processing apparatus 200.

  Reference numeral 400 denotes a flash device. Reference numeral 402 denotes a connector for connecting to an accessory shoe of the image processing apparatus 200.

  A flash 404 has an AF auxiliary light projecting function and a flash light control function.

  Next, the operation of this embodiment will be described with reference to FIGS.

  3 to 5 are flowcharts of the main routine of the image processing apparatus 200 according to the present embodiment. The program according to the flowchart is stored in the storage device in the memory 52 and operated, whereby the control according to the present embodiment is performed. The method can be realized.

  The operation of the image processing apparatus 200 will be described with reference to FIG. Upon power-on such as battery replacement, the system control circuit 118 initializes flags, control variables, and the like (step S101), and initializes the image display on the image display unit 28 to an OFF state (step S102).

  The system control circuit 118 determines the setting position of the mode dial 60, and if the mode dial 60 is set to power OFF (step S103), the display of each display unit is changed to the end state, and the protection unit 202 The image processing apparatus 200 including the image display unit 28 is recorded by the power control unit 80 by closing the barrier and protecting the imaging unit, recording necessary parameters, setting values, and setting modes including flags and control variables in the nonvolatile memory 56. After performing a predetermined end process such as shutting off unnecessary power sources of each unit (step S105), the process returns to step S103.

  If the mode dial 60 is set to the photographing mode (step S103), the process proceeds to step S106. If the mode dial 60 has been set to another mode (step S103), the system control circuit 118 executes processing corresponding to the selected mode (step S104), and returns to step S103 when the processing is completed. .

  In the shooting mode, the system control circuit 118 determines whether or not the recording medium is connected to the connectors 92 and 96 that connect the recording medium (step S106). If the recording medium is not connected, the display unit 54 is used to display an image. After a predetermined warning display is performed with or (step S107), a flag indicating no recording medium is set (step S108), and the process proceeds to step S131. If a recording medium is connected, the process proceeds directly to step S131.

  If the shutter switch SW1 has not been pressed (step S131), the process returns to step S103. If the shutter switch SW1 is pressed (step S131), the system control circuit 118 performs a distance measurement process to focus the photographing lens 10 on the subject, and performs a photometry process to determine an aperture value and a shutter time (step S131). Step S132). In the photometric process, the flash is set if necessary. The details of the distance measurement / photometry processing (step S132) are not related to the gist of the present invention, and will be omitted.

  If the flag indicating no recording medium is set, the shooting and recording operation cannot be performed (step S133). If the flag indicating that there is no recording medium is set, a predetermined warning display (S130) is performed using an image or sound using the display unit 54, and then the process returns to step S103.

  If the shutter switch SW2 is not pressed (step S134) and the shutter switch SW1 is also released (step S135), the process returns to step S103. If the shutter switch SW2 is pressed (step S134), the system control circuit 118 performs a load test process (step S136). Details of the load test process (S136) will be described later with reference to FIG.

  If the load test is NG (step S137), a predetermined warning display (step S138) is performed by an image or sound using the display unit 54, and then an end process (step S139) is performed, and the process returns to step S103.

  If the load test is OK (step S137), the system control circuit 118 passes through the image sensor 14, the A / D converter 16, the image processing circuit 20, and the memory control circuit 22, or from the A / D converter. The image data written in the memory 30 using the exposure processing for directly writing the captured image data in the memory 30 via the memory control circuit 22 and the image processing circuit 20 in addition to the memory control circuit 22 if necessary. Then, a photographing process including a developing process for performing various processes is read out (step S140).

  The details of the photographing process S140 are not related to the gist of the present invention, and will be omitted. The system control circuit 118 reads out part of the image data written in a predetermined area of the memory 30 via the memory control circuit 22 and performs WB (white balance) integration calculation processing, OB ( Optical black) Integration calculation processing is performed, and the calculation result is stored in the internal memory of the system control circuit 118 or the memory 52.

  Then, the system control circuit 118 reads out the captured image data written in a predetermined area of the memory 30 using the image processing circuit 20 as necessary in addition to the memory control circuit 22, and also the internal memory of the system control circuit 118. Alternatively, various development processes including an AWB (auto white balance) process, a gamma conversion process, and a color conversion process are performed using the calculation result stored in the memory 52 (step S141). Note that the details of the development processing S141 are omitted because they are not related to the gist of the present invention.

  Then, the system control circuit 118 reads the image data written in the predetermined area of the memory 30 and performs image compression processing according to the set mode by the compression / decompression circuit 32 (step S142), and the image storage buffer of the memory 30 Image data that has been photographed and completed a series of processing is written in the empty image portion of the area.

  The system control circuit 118 reads the image data stored in the image storage buffer area of the memory 30, and the recording medium 300 such as a memory card or a compact flash (registered trademark) card via the interface 90 or 94 and the connector 92 or 96. Alternatively, a recording process for writing to 310 is performed (step S143).

  Note that while writing image data to the recording medium 300 or 310, a recording medium writing operation display such as blinking an LED is performed on the display unit 54 in order to clearly indicate that the writing operation is being performed. When the recording operation on the recording medium is completed, the process returns to step S103.

  FIG. 6 is a flowchart showing details of the load test S136 in FIG. The system control circuit 118 determines whether the built-in power supply is connected or not by the voltage detection circuit 114 (step S150). If the built-in power supply is connected, a transient large current is generated when the actual circuit is operated. If there is a transient large current, the system control circuit 118 uses the voltage detection circuit 114 to measure the voltage value before connecting the pseudo load 116 to the built-in power supply 106. (Step S152). Thereafter, the pseudo load 116 is connected to the built-in power source 106 (step S153), and the voltage value after the pseudo load 116 is connected to the built-in power source 106 is again measured by the voltage detection circuit 114 (step S154). When the measurement is finished, the pseudo load 116 is disconnected (step S155). Here, the load test coefficient B is read from the nonvolatile memory 56 and set (step S156). When the load test coefficient B is set, the voltage drop is calculated from the following calculation formula (step S157).

Voltage drop of pseudo load 1 = voltage before pseudo load connection 1−voltage after pseudo load connection 1
Voltage drop at peak current = pseudo load voltage drop 1 x load test factor B
Here, the voltage drop 1 of the pseudo load is a value obtained by subtracting the value of step S154 from the value of step S152, and the voltage 1 before pseudo load connection is the value of step S152, and the voltage 1 after pseudo load connection. Is the value in step S154, and the voltage drop at the peak current is a voltage drop when the internal power supply 106 covers a transient large current. If the calculation result of the voltage drop at the peak current is not more than a predetermined value (step S158), the system control circuit 118 measures the voltage value before connecting the pseudo load 115 to the external power supply 100 by the voltage detection circuit 112. (Step S159). Thereafter, the pseudo load 115 is connected to the external power source 100 (step S160), and the voltage value after the pseudo load 115 is connected to the external power source 100 is again measured by the voltage detection circuit 112 (step S161). When the measurement is finished, the pseudo load is disconnected (step S162). Here, the load test coefficient A1 is read from the nonvolatile memory 56 and set (step S163). When the load test coefficient A1 is set, the voltage drop is calculated from the following calculation formula (step S164).

Pseudo load voltage drop 2 = voltage before pseudo load connection 2-voltage after pseudo load connection 2
Voltage drop of recording process = voltage drop of pseudo load 2 × load test coefficient A1
Here, the voltage drop 2 of the pseudo load is a value obtained by subtracting the value of step S161 from the value of step S159, and the voltage 2 before pseudo load connection is the value of step S159, and the voltage 2 after pseudo load connection. Is the value of step S161. If the calculation result of the voltage drop in the recording process is equal to or less than a predetermined value (step S165), the load test OK flag is set (step S166), and the process returns to process step S137.

  Next, in step S150, if the internal power supply is not connected, the system control circuit 118 measures the voltage value before connecting the pseudo load 115 to the external power supply 100 by the voltage detection circuit 112 (step S168). Thereafter, the pseudo load 115 is connected to the external power source 100 (step S169), and the voltage value after the pseudo load 115 is connected to the external power source 100 is again measured by the voltage detection circuit 112 (step S170). When the measurement is finished, the pseudo load is disconnected (step S171). Here, the load test coefficient A2 is read from the nonvolatile memory 56 and set (step S172). When the load test coefficient A2 is set, the voltage drop is calculated from the following calculation formula (step S173).

Pseudo load voltage drop 3 = voltage before pseudo load connection 3-voltage after pseudo load connection 3
Voltage drop of recording process = voltage drop of pseudo load 3 × load test coefficient A2
Here, the voltage drop 3 of the pseudo load is a value obtained by subtracting the value of step S170 from the value of step S168, and the voltage before pseudo load connection 3 is the value of step S168, and the voltage after pseudo load connection 3 Is the value of step S170. If the calculation result of the voltage drop in the recording process is equal to or less than a predetermined value (step S174), the load test OK flag is set (step S175), and the process returns to process step S137.

  Next, in step S151, if there is no transient large current, the process proceeds to step S168.

  Next, in step S158, if the calculation result of the voltage drop at the peak current is greater than or equal to a predetermined value, the process proceeds to step S168.

  In step S165, if the calculation result of the voltage drop in the recording process is equal to or greater than a predetermined value, the load test NG flag is set (step S167), and the process returns to process step S137.

  In step S174, if the calculation result of the voltage drop in the recording process is equal to or greater than a predetermined value, the load test NG flag is set (step S176), and the process returns to process step S137.

  The present invention is not limited to the electronic device according to the above-described embodiment, and may be applied to a system including a plurality of devices or an apparatus including a single device. A storage medium storing software program codes for realizing the functions of the above-described embodiments is supplied to a system or apparatus, and a computer (or CPU or MPU) of the system or apparatus reads and executes the program codes stored in the storage medium. Needless to say, it will be completed by doing.

  In this case, the program code itself read from the storage medium realizes the functions of the above-described embodiments, and the storage medium storing the program code constitutes the present invention. As a storage medium for supplying the program code, for example, a floppy (registered trademark) disk, hard disk, optical disk, magneto-optical disk, CD-ROM, CD-R, magnetic tape, nonvolatile memory card, ROM is used. Can do. In addition, by executing the program code read by the computer, not only the functions of the above-described embodiments are realized, but also the OS running on the computer based on the instruction of the program code performs the actual processing. Needless to say, a case where the function of the above-described embodiment is realized by performing part or all of the processing is also included.

  Furthermore, after the program code read from the storage medium is written to the memory provided in the function expansion board inserted in the computer or the function expansion unit connected to the computer, the program code is expanded based on the instruction of the next program code. It goes without saying that the functions of the above-described embodiments may be realized by performing some or all of the actual processing by the CPU or the like provided on the expansion board or the expansion unit.

1 is a block diagram of an electronic device that best represents the features of the present invention. 1 is a block diagram illustrating a schematic configuration of an image processing apparatus according to an embodiment of the present invention. 3 is a flowchart of a main routine of the image processing apparatus according to the embodiment. FIG. 4 is a continuation flowchart of FIG. 3. FIG. 4 is a continuation flowchart of FIG. 3. It is a flowchart which shows the detail of the load test in FIG.

Explanation of symbols

80 Power source control means 100, 101 External power source 102, 103, 104, 105 Connector 106 Built-in power source 107 Charge control circuit 108, 109, 110 SW
111 DC / DC converters 112, 113, 114 Voltage detection circuits 115, 116 Pseudo load 117 SW control circuit 118 System control circuit

Claims (9)

Multiplier value that can be driven from multiple input power supplies, and multiply power consumption in various modes by the load test coefficient corresponding to the various modes to the voltage drop when a constant current is supplied from the input power supply to the pseudo load. In an electronic device provided with a predicting means for predicting power consumption in the various modes based on the same mode, having a plurality of load test coefficients in the same mode,
A method of controlling an electronic device, wherein a plurality of load test coefficients are switched and controlled according to a supply status of the input power. In the electronic device that is driven from a first external power source that is a primary battery that is detachable from the electronic device or a secondary battery 1, the electronic device is an auxiliary secondary battery 2 built in the electronic device. Or a built-in power supply that is a large-capacity capacitor;
A voltage detection circuit 1 for detecting a battery voltage value of the first external power source;
A pseudo load 1 connected to the first external power source;
A voltage detection circuit 2 for detecting the voltage of the internal power supply;
A charge control circuit 1 for charging the built-in power supply from the first external power supply;
SW1 that enters and exits when power is supplied from the first external power source to the electronic device;
SW2 that enters and exits when power is supplied from the built-in power source to the electronic device;
It is composed of a SW control circuit 1 for controlling the SW1 and SW2.
When power is supplied to the electronic device only from the first external power source, the power consumption in various modes of the electronic device is connected to the pseudo load from the first external power source by connecting the pseudo load 1. A load test coefficient 1 for predicting power consumption in the various modes based on a multiplication value obtained by multiplying a voltage drop when the constant current is supplied by a coefficient corresponding to the various modes;
When power is supplied to the electronic device from the first external power source and the built-in power source, the power consumption in the various modes of the electronic device is connected to the pseudo load by connecting the pseudo load 1 to the first load. By switching the load test coefficient 2 for predicting the power consumption in the various modes based on the multiplication value obtained by multiplying the voltage drop when the constant current is supplied from the external power source by the coefficient corresponding to the various modes. A method for controlling an electronic device, wherein the remaining battery level of the first external power source is predicted. In the electronic device that is driven from a first external power source that is a primary battery that is detachable from the electronic device or a secondary battery 1, the electronic device is an auxiliary secondary battery 2 built in the electronic device. Or a built-in power supply that is a large-capacity capacitor;
A second external power source for supplying power to the electronic device from an AC power source;
A voltage detection circuit 1 for detecting a battery voltage value of the first external power source;
A pseudo load 1 connected to the first external power source;
A voltage detection circuit 2 for detecting the voltage of the internal power supply;
Voltage detection means 3 for detecting the voltage of the second external power supply;
A charge control circuit 1 for charging the built-in power supply from the first external power supply;
SW1 that enters and exits when power is supplied from the first external power source to the electronic device;
SW2 that enters and exits when power is supplied from the built-in power source to the electronic device;
SW3 that is turned on when supplying power to the electronic device from the second external power source;
It is composed of a SW control circuit 2 for controlling the SW1, SW2, and SW3.
When power is supplied to the electronic device from only the first external power source, the power consumption in various modes of the electronic device is connected to the pseudo load from the first external power source by connecting the pseudo load 1. A load test coefficient 1 for predicting power consumption in the various modes based on a multiplication value obtained by multiplying a voltage drop at the time of supplying a constant current by a coefficient corresponding to the various modes;
When power is supplied from the first external power source and the built-in power source to the electronic device, power consumption in the various modes of the electronic device is connected to the pseudo load by connecting the pseudo load 1 to the first load. By switching a load test coefficient 2 for predicting power consumption in the various modes based on a multiplication value obtained by multiplying a voltage drop when a constant current is supplied from an external power source by a coefficient corresponding to the various modes. A method for controlling an electronic device, wherein the remaining battery level of the first external power source is predicted.   The method of controlling an electronic device according to claim 3, further comprising a charge control circuit (2) for charging the internal power supply from the second external power supply.   5. The method of controlling an electronic device according to claim 3, further comprising a charge control circuit 3 for charging the first external power supply from the second external power supply. In the electronic device that is driven from a first external power source that is a primary battery that is detachable from the electronic device or a secondary battery 1, the electronic device is an auxiliary secondary battery 2 built in the electronic device. Or a built-in power supply that is a large-capacity capacitor;
A second external power source for supplying power to the electronic device from an AC power source;
A voltage detection circuit 1 for detecting a battery voltage value of the first external power source;
A pseudo load 1 connected to the first external power source;
A voltage detection circuit 2 for detecting the voltage of the internal power supply;
Voltage detection means 3 for detecting the voltage of the second external power supply;
A charge control circuit 2 for charging the internal power supply from the second external power supply;
SW1 that enters and exits when power is supplied from the first external power source to the electronic device;
SW2 that enters and exits when power is supplied from the built-in power source to the electronic device;
SW3 that is turned on when supplying power to the electronic device from the second external power source;
It is composed of a SW control circuit 2 for controlling the SW1, SW2, and SW3.
When power is supplied to the electronic device only from the first external power source, the power consumption in various modes of the electronic device is connected to the pseudo load from the first external power source by connecting the pseudo load 1. A load test coefficient 1 for predicting power consumption in the various modes based on a multiplication value obtained by multiplying a voltage drop when the constant current is supplied by a coefficient corresponding to the various modes;
When power is supplied to the electronic device from the first external power source and the built-in power source, the power consumption in the various modes of the electronic device is connected to the pseudo load by connecting the pseudo load 1 to the first load. By switching the load test coefficient 2 for predicting the power consumption in the various modes based on the multiplication value obtained by multiplying the voltage drop when the constant current is supplied from the external power source by the coefficient corresponding to the various modes. A method for controlling an electronic device, wherein the remaining battery level of the first external power source is predicted. In the electronic device that is driven from a first external power source that is a primary battery that is detachable from the electronic device or a secondary battery 1, the electronic device is an auxiliary secondary battery 2 built in the electronic device. Or a built-in power supply that is a large-capacity capacitor;
A second external power source for supplying power to the electronic device from an AC power source;
A voltage detection circuit 1 for detecting a battery voltage value of the first external power source;
A pseudo load 1 connected to the first external power source;
A voltage detection circuit 2 for detecting the voltage of the internal power supply;
Voltage detection means 3 for detecting the voltage of the second external power supply;
A charge control circuit 2 for charging the internal power supply from the second external power supply;
A charge control circuit 3 for charging the first external power source from the second external power source;
SW1 that enters and exits when power is supplied from the first external power source to the electronic device;
SW2 that enters and exits when power is supplied from the built-in power source to the electronic device;
SW3 that is turned on when supplying power to the electronic device from the second external power source;
It is composed of a SW control circuit 2 for controlling the SW1, SW2, and SW3.
When power is supplied to the electronic device only from the first external power source, the power consumption in various modes of the electronic device is connected to the pseudo load from the first external power source by connecting the pseudo load 1. A load test coefficient 1 for predicting power consumption in the various modes based on a multiplication value obtained by multiplying a voltage drop when the constant current is supplied by a coefficient corresponding to the various modes;
When power is supplied to the electronic device from the first external power source and the built-in power source, the power consumption in the various modes of the electronic device is connected to the pseudo load by connecting the pseudo load 1 to the first load. By switching the load test coefficient 2 for predicting the power consumption in the various modes based on the multiplication value obtained by multiplying the voltage drop when the constant current is supplied from the external power source by the coefficient corresponding to the various modes. A method for controlling an electronic device, wherein the remaining battery level of the first external power source is predicted.   The method of controlling an electronic device according to claim 2, further comprising a pseudo load 2 connected to the internal power source.   The method for controlling an electronic device according to claim 2, wherein the internal power source can be changed to an arbitrary capacity.

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