JP2006060751A - Output device, differential output device, semiconductor laser modulation driving apparatus, image forming apparatus and electronic equipment - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To adjust output impedance to a desired value in simple configuration regardless of element dispersion, and further to deal with high-speed signal transmission. <P>SOLUTION: There is provided an impedance matching unit 3P or 3N which includes an impedance adjusting section and a dummy circuit section including the same configuration as the impedance adjusting section for determining an adjustment value matched to characteristic impedance of a transmission line and sets the determined adjustment value to the impedance adjusting section to adjust output impedance to be matched to the characteristic impedance, so that the output impedance of an output unit can be properly adjusted and matched to the characteristic impedance of the transmission line. At the same time, there are provided a switch transistor 2P, 2N of which ON/OFF is controlled for the purpose of switching an output to H level or L level and a constant current driving unit 4P, 4N for superimposing a constant current on the output, thereby accelerating the output and also dealing with the high-speed signal transmission. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to an output device, a differential output device, a semiconductor laser modulation driving device, an image forming apparatus, and an electronic apparatus in high-speed electrical signal transmission, and more particularly, between integrated circuits (ICs) or printed circuit boards (PCBs). Output device, differential output device, which has an impedance matching section to prevent impedance mismatch between the transmission line and the transmission section, which cause signal waveform distortion in electrical signal transmission, and outputs thereof The present invention relates to a semiconductor laser modulation driving apparatus, an image forming apparatus, and an electronic apparatus using the apparatus.

  When transmitting an output signal of an electronic circuit such as an output driver of an integrated circuit to a transmission line, the output impedance of the circuit and the characteristic impedance of the transmission line are matched in order to eliminate waveform distortion of the transmission signal due to reflection. . As this impedance matching method, a method of terminating by a termination resistor has been conventionally used.

  However, with simple termination resistors, there are variations in process, and impedance matching cannot be performed accurately. As transmission speed increases, waveform distortion and signal attenuation due to impedance mismatch are becoming more and more problematic. In order to achieve more accurate impedance matching, a termination resistor is used as a variable resistor, a transmission line voltage is monitored, a transition time from an L level to an H level is compared with a reference time, and the result is fed back to the variable resistor. There exists patent document 1 as a proposal example. Japanese Patent Application Laid-Open No. 2004-133826 discloses a method for impedance matching in order to prevent waveform distortion in electrical signal transmission between the semiconductor laser driving unit and the semiconductor laser control unit.

JP 2003-8421 A JP 2002-324937 A

  However, as the signal transmission speed is increased, it is conceivable that when a comparator or the like is connected to the output terminal for monitoring the transmission signal, the output waveform is distorted due to the capacity, which hinders the improvement of the transmission speed. In addition, for the time measurement and voltage comparison, the impedance matching circuit may be enlarged and the current consumption may be increased. Further, if the output device is a simple switch circuit, the switching speed is determined by the product CR time constant of the output impedance R and the output additional capacitor C, and the speed cannot be increased further. Further, there may be a problem associated with higher speed such that a desired output swing cannot be transmitted due to signal attenuation due to the inductor component of the output terminal.

  An object of the present invention is to make it possible to adjust the output impedance of an output unit to a desired value regardless of element variations with a simple configuration and to cope with high-speed signal transmission.

  According to the first aspect of the present invention, in the output device for outputting a transmission signal to the transmission line, the dummy circuit for obtaining an adjustment value matching the characteristic impedance of the transmission line, including the same configuration as the impedance adjustment unit and the impedance adjustment unit. An impedance matching unit that adjusts the output impedance to match the characteristic impedance by setting the adjustment value obtained by the dummy circuit unit in the impedance adjustment unit, and the impedance matching unit. A switch transistor connected in series and controlled to be turned on / off to switch the output to H level or L level, and a constant current driving unit that outputs a constant current superimposed on the output.

  According to a second aspect of the present invention, in the output device according to the first aspect, the impedance adjustment unit includes a variable resistance unit capable of adjusting a combined resistance value.

  According to a third aspect of the present invention, in the output device according to the second aspect, the variable resistance section includes a plurality of resistors and a plurality of transistors.

  According to a fourth aspect of the present invention, in the output device according to the third aspect, the variable resistance unit connects a plurality of the resistors in parallel, and selects the resistance by using the transistor as a switch, thereby obtaining a desired impedance. Adjust to impedance.

  According to a fifth aspect of the present invention, in the output device according to the second aspect, the variable resistance unit is formed by connecting one resistance and one resistance transistor in series, and adjusts the gate voltage of the resistance transistor. As a result, the combined impedance is adjusted to a desired impedance.

  According to a sixth aspect of the present invention, in the output device according to any one of the second to fifth aspects, the dummy circuit section includes a dummy variable resistance section having the same configuration and the same size as the variable resistance section, the switch transistor, A dummy transistor connected in series with the dummy variable resistor unit in the same size, a dummy current source for passing a current through a series connection of the dummy variable resistor unit and the dummy transistor, and the dummy variable resistor unit and the dummy transistor A comparator that compares an output voltage with a reference voltage when a current is passed through the series connection.

  According to a seventh aspect of the present invention, in the output device according to any one of the second to fifth aspects, the dummy circuit section includes a dummy variable resistance section having the same configuration as the variable resistance section and having a different size, the switch transistor, A dummy transistor having a different size and connected in series to the dummy variable resistor unit, a dummy current source for passing a current through a series connection of the dummy variable resistor unit and the dummy transistor, and the dummy variable resistor unit and the dummy transistor A comparator that compares an output voltage with a reference voltage when a current is passed through the series connection.

  According to an eighth aspect of the present invention, in the output device according to any one of the second to fifth aspects, the dummy circuit section includes a dummy variable resistance section having the same configuration and the same size as the variable resistance section, the switch transistor, A dummy transistor connected in series to the dummy variable resistor unit with the same size, a dummy current source for passing a current through the serial connection of the dummy variable resistor unit and the dummy transistor, and a resistance value of the dummy variable resistor unit are adjusted An operational amplifier.

  According to a ninth aspect of the present invention, in the output device according to any one of the second to fifth aspects, the dummy circuit section includes a dummy variable resistance section having the same configuration as the variable resistance section and having a different size, the switch transistor, A dummy transistor having a different size and connected in series to the dummy variable resistor unit, a dummy current source for passing a current through the serial connection of the dummy variable resistor unit and the dummy transistor, and a resistance value of the dummy variable resistor unit are adjusted. An operational amplifier.

  According to a tenth aspect of the present invention, in the output device according to any one of the first to ninth aspects, the constant current driving unit feeds a constant current from a power supply voltage to an output terminal connected to the transmission line.

  According to an eleventh aspect of the present invention, in the output device according to any one of the first to ninth aspects, the constant current driving unit draws a constant current from the output terminal connected to the transmission line to the GND.

  The invention according to claim 12 is the output device according to any one of claims 1 to 9, wherein the constant current driving unit feeds a constant current from a power supply voltage to an output terminal connected to the transmission line, or A constant current is drawn from the output terminal to GND.

  According to a thirteenth aspect of the present invention, in the output device according to any one of the first to twelfth aspects, the constant current driving unit is configured to control signals between an on state that generates a constant current and an off state that does not generate a constant current. Can be switched freely.

  According to a fourteenth aspect of the present invention, in the output device according to the thirteenth aspect, the constant current driving unit is in an on / off state at the moment when the switch transistor drives the output from the H level to the L level or from the L level to the H level. Are switched.

  According to a fifteenth aspect of the present invention, in the output device according to any one of the first to fourteenth aspects, data transmission is performed by on / off control of the switch transistor, and emphasis / de-emphasis is performed by a constant current of the constant current driving unit. Perform the function.

  According to a sixteenth aspect of the present invention, in the output device according to any one of the first to fifteenth aspects, the constant current driving unit is capable of changing a value of a constant current to be generated.

  According to a seventeenth aspect of the present invention, in the differential output device that performs signal transmission with two outputs of the normal rotation output and the reverse output, the output device according to any one of claims 1 to 16 is used for the normal rotation output and the reverse output. Prepare for each.

  The invention according to claim 18 is a semiconductor laser modulation driving apparatus comprising a semiconductor laser driving means and a semiconductor laser modulation means each constituted by separate chips, wherein the semiconductor laser modulation means includes the semiconductor laser modulation means and the semiconductor laser. An output device according to any one of claims 1 to 16 or a differential output device according to claim 17 which performs electrical signal transmission with a driving means.

  According to a nineteenth aspect of the present invention, in the image forming apparatus including a semiconductor laser that performs optical writing for forming an electrostatic latent image on the photosensitive member, the semiconductor laser is driven. Equipment.

  According to a twentieth aspect of the present invention, in an electronic device including an integrated circuit or a printed circuit board that controls each unit, the electric signal transmission between the integrated circuits or between the printed circuit boards is performed. An output device or a differential output device according to claim 17 is provided.

  According to the first aspect of the present invention, the impedance adjustment unit and the dummy circuit unit that has the same configuration as the impedance adjustment unit and obtains an adjustment value that matches the characteristic impedance of the transmission line are obtained. By setting the adjustment value in the impedance adjustment unit, it has an impedance matching unit that adjusts the output impedance to match the characteristic impedance, so without connecting a monitor comparator to the output terminal, The output impedance of the output section can be adjusted appropriately to match the characteristic impedance of the transmission line, and connected to the impedance matching section in series and controlled to turn on / off to switch the output to H level or L level. Constant current drive that superimposes a constant current on the output together with the switch transistor Since comprises, but may be faster output, it is possible for high-speed signal transmission.

  According to the invention described in claims 2 to 9, the invention described in claim 1 can be realized with a simple configuration. In addition, according to the seventh or ninth aspect of the invention, the constant current caused by the dummy current source can be reduced by increasing the combined resistance value on the dummy circuit side, so that the power consumption can be reduced. it can.

  According to the invention described in claims 10 to 14, the constant current drive unit supplies current to the output terminal or draws current from the output terminal to GND. Can be provided. In particular, according to the fourteenth aspect of the present invention, the constant current switching timing is adjusted at the time when the data transitions from the H level to the L level or from the L level to the H level, so that the supply of electric charges to the output terminal and the output terminal are performed. The speed of pulling in can be increased, and the speed of data switching can be increased.

  According to the fifteenth aspect of the present invention, in consideration of attenuation of the output voltage due to the inductor component of the output terminal, the output voltage is previously increased by superimposing the constant current from the constant current driving unit at the time of data switching. An emphasis function and a de-emphasis function that reduces the output voltage of the second and subsequent data by subtracting a constant current with the constant current drive when the same data continues, and an output device that supports high speed Can be provided.

  According to the invention of claim 16, by making the current value of the constant current drive section variable, the swing amount of the output voltage can be adjusted, and the emphasis amount and the de-emphasis amount are adjusted. You can also

  According to the seventeenth aspect of the invention, even in differential signal transmission, the output impedance of the output unit can be corrected with a simple configuration, and it is possible to cope with a higher speed.

  According to the eighteenth aspect of the present invention, since the output device according to the first to sixteenth aspects or the differential output device according to the seventeenth aspect is provided, the semiconductor laser modulation exhibiting the effects of the first to the seventh aspects of the present invention. A drive device can be provided.

  According to the nineteenth aspect of the present invention, since the semiconductor laser modulation driving device according to the eighteenth aspect is provided, an image forming apparatus having the effect of the eighteenth aspect can be provided.

  According to the invention described in claim 20, since the output device according to claims 1 to 16 or the differential output device according to claim 17 which performs electrical signal transmission between integrated circuits or between printed circuit boards is provided, these claims are provided. The electronic device which has the effect of the invention of claim | item 1 thru | or 17 can be provided.

  The best mode for carrying out the present invention will be described with reference to the drawings.

  FIG. 1 is a circuit diagram illustrating a basic configuration example of an output unit of an output device in high-speed electrical signal transmission according to the present embodiment. The output unit of the output device of the present embodiment corresponds to, for example, an output unit in an integrated circuit (IC chip), and the output terminal 1 is connected to a transmission line (not shown). Switch transistors 2P and 2N having a P-type FET and an N-type FET configured to be turned on / off by a predetermined control signal in order to switch the data output to "1" (H level) or "0" (L level); Current amount for superimposing and outputting a constant current to the impedance matching sections 3P and 3N for P and N for adjusting the output impedance of the output section to match the characteristic impedance of the transmission line, and the output terminal 1 And variable current sources (constant current drive units) 4P and 4N. These current sources 4P and 4N are also turned on and off by a predetermined control signal. In other words, switching between an on state in which a constant current is generated and an off state in which a constant current is not generated is freely performed.

  Here, these connection relationships will be described. First, the switch transistor 2P, the impedance matching unit 3P, the impedance matching unit 3N, and the switch transistor 2N are connected in series between the power supply voltage VCC and the ground GND, and the connection midpoint between the impedance matching units 3P and 3N is output. Connected to terminal 1. Further, current sources 4P and 4N are connected in series between the power supply voltage VCC and the ground GND, and a connection midpoint between these current sources 4P and 4N is connected to the output terminal 1. That is, the current source 4P is provided in parallel to the series circuit of the switch transistor 2P and the impedance matching unit 3P, and the current source 4N is provided in parallel to the series circuit of the impedance matching unit 3N and the switch transistor 2N.

  In such a configuration, data “1” or “0” can be output from the output terminal 1 by turning on and off the switch transistors 2P and 2N. Here, at the time of data output, only one of the switch transistors 2P and 2N is turned on. In the impedance matching units 3P and 3N, the output impedance of the output device can be set to a desired value with the configuration described later. The variable current source 4P feeds a constant current from the power supply voltage VCC to the output terminal 1, and the variable current source 4N draws a constant current from the output terminal 1 to the ground GND. These current sources 4P and 4N can switch a constant current by an on / off signal. By switching this current at the time of transition from “1” (H level) to “0” (L level) or “0” (L level) to “1” (H level) (switch transistors 2P, 2N can be adjusted to ON / OFF), the speed of charge supply and pull-in to the output terminal 1 can be increased, and the data switching speed can be increased. In addition, in consideration of the attenuation of the output voltage due to the inductor component of the output terminal 1, a function of increasing the output voltage in advance by superimposing a constant current from the current source 4P during data switching (emphasis function: Emphasis function) Can be given. In addition, when the same data continues, it is possible to provide a function (de-emphasis function: de-Emphasis function) for reducing the output voltage of the second and subsequent data by subtracting the current with the current source 4N. Further, by making the current values of the current sources 4P and 4N variable, the swing amount of the output voltage can be adjusted, and the emphasis amount and de-emphasis amount can be adjusted.

  FIG. 2 is a block diagram illustrating a schematic configuration example of the impedance matching units 3P and 3N. The impedance matching units 3P and 3N are each composed of a pair of variable resistance units 5P and 5N and dummy circuit units 6P and 6N as impedance adjusting units. In the dummy circuit units 6P and 6N, a selection signal or an adjustment value is set as an adjustment value so that the series impedance (output impedance) of each of the variable resistance units 5P and 5N and the switch transistors 2P and 2N becomes a desired impedance (characteristic impedance of the transmission line). The gate voltage of the transistor is generated, and the adjustment value is set in the variable resistor units 5P and 5N to correct the resistance values (respective combined impedances) of the variable resistor units 5P and 5N.

  FIG. 3 is a circuit diagram showing an example of a configuration example of the variable resistance unit 5N. The variable resistance unit 5N of the present embodiment includes a parallel circuit of a plurality of resistors R1, R10, R11, R12, and R13, and an N-type FET configuration transistor Q10 connected in series to the resistors R10, R11, R12, and R13. , Q11, Q12, and Q13, and these transistors Q10, Q11, Q12, and Q13 are configured to be on / off controlled by corresponding selection signals c10, c11, c12, and c13. The transistor R1 to which no transistor is connected functions as a reference resistor. Therefore, in the variable resistance unit 5N, the transistors Q10, R11, R12, and R13 are connected in parallel to the resistor R1 using the selection signals c10, c11, c12, and c13 so that the arbitrary resistors R10, R11, R12, and R13 are connected in parallel. The variation of the resistance value (impedance value) of the reference resistor R1 can be corrected by adjusting the combined resistance value (synthetic impedance value) to a desired value by controlling on / off of Q11, Q12, and Q13. It becomes possible.

  FIG. 4 is a circuit diagram showing an example of a configuration example of the dummy circuit section 6N corresponding to such a variable resistance section 5N. The dummy circuit section 6N has the same configuration as the variable resistance section 5N and the same size as the dummy variable resistance section 7N (the same reference numerals are used for the resistors and transistors, and are indicated by a dash symbol ') and the switch transistor 2N. A dummy transistor 8N connected in series to the dummy variable resistor portion 7N in size, and a dummy current source 9N having a constant current source configuration for supplying a predetermined constant current to the series circuit of the dummy variable resistor portion 7N and the dummy transistor 8N; The comparator 10N compares the output voltage when a predetermined constant current is passed through the series circuit of the dummy variable resistor portion 7N and the dummy transistor 8N with a predetermined reference voltage.

  In such a configuration, the dummy transistor 8N is turned on when the dummy circuit portion 6N operates. Then, a preset constant current is supplied from the dummy current source 9N to the dummy variable resistor portion 7N, and the output voltage is compared with the reference voltage in the comparator 10N, and the result is output. Selection signals c10, c11, c12, c13 for the transistors Q10 ', Q11', Q12 ', Q13' take binary values of H level or L level. The selection signal selection signals c10, c11, c12, and c13 are sequentially incremented so that the combined resistance value of the resistors R1 ′, R10 ′, R11 ′, R12 ′, and R13 ′ decreases from small to large, or from large to small. A selection signal when the result changes is set in a register or the like. At this time, the combined resistance is a value determined by the current value and the reference voltage. For example, if the current value supplied from the dummy current source 9N is set to 5 mA and the reference voltage is set to 250 mV, the combined resistance is 50Ω. By applying the applicable selection signal at this time to the selection signals c10, c11, c12, and c13 in the variable resistor unit 5N shown in FIG. 3, the output impedance of the output unit when the switch transistor 2N is turned on is set to a desired value. Can be set to impedance.

  In the configuration of the dummy circuit unit 6N shown in FIG. 4, the resistance values (sizes) of the resistors R1 ′ to R13 ′ in the dummy variable resistor unit 7N and the size of the dummy transistor 8N are respectively set to the resistances in the variable resistor unit 5N. The resistance value (size) of R1 to R13 is different from the size of the switch transistor 2N, and the combined resistance value of the dummy circuit section 6N is made larger than the combined resistance value of the variable resistance section 5N, thereby the current value of the dummy current source 9N. Can be reduced. At this time, the ratio of the resistance values of the resistors R1 'to R13' in the dummy circuit portion 6N and the on-resistance value between the source and drain of the dummy transistor 8N is set to the resistance value of the resistors R1 to R13 in the variable resistor portion 5N and the switch. The ratio of the on-resistance value between the source and drain of the transistor 2N must be the same.

  FIG. 5 is a circuit diagram illustrating an example of a configuration example of the variable resistance unit 5P. The variable resistor portion 5P of the present embodiment is the same as that of the variable resistor portion 5N, and is connected in series to a parallel circuit of a plurality of resistors R2, R20, R21, R22, and R23 and resistors R20, R21, R22, and R23. P-type FET transistors Q20, Q21, Q22, and Q23 connected to each other, and these transistors Q20, Q21, Q22, and Q23 are on / off controlled by corresponding selection signals c20, c21, c22, and c23. It is configured as follows. The transistor R2 to which no transistor is connected functions as a reference resistor. Therefore, in the variable resistor unit 5P, the transistors Q20, R21, R22, R23 are connected in parallel to the resistor R2 using the selection signals c20, c21, c22, c23. The variation of the resistance value (impedance value) of the reference resistor R2 can be corrected by adjusting the combined resistance value (synthetic impedance value) to a desired value by controlling on / off of Q21, Q22, and Q23. It becomes possible.

  FIG. 6 is a circuit diagram showing an example of a configuration example of the dummy circuit unit 6P corresponding to such a variable resistance unit 5P. This dummy circuit section 6P has the same configuration as the variable resistance section 5P and the same size as the switch transistor 2P, and the dummy variable resistance section 7P (the same reference numerals are used for the resistors and transistors and indicated by a dash symbol '). A dummy transistor 8P connected in series to the dummy variable resistor unit 7P in size, and a dummy current source 9P having a constant current source configuration for supplying a predetermined constant current to the series circuit of the dummy variable resistor unit 7P and the dummy transistor 8P; The comparator 10P compares the output voltage when a predetermined constant current is passed through the series circuit of the dummy variable resistor portion 7P and the dummy transistor 8P with a predetermined reference voltage.

  In such a configuration, the dummy transistor 8P is turned on when the dummy circuit portion 6P operates. Then, a preset constant current is passed from the dummy variable resistor portion 7N to the dummy current source 9P, and the output voltage is compared with the reference voltage in the comparator 10P and the result is output. The selection signals c20, c21, c22, c23 for the transistors Q20 ', Q21', Q22 ', Q23' take binary values of H level or L level. The selection signal selection signals c20, c21, c22, c23 are sequentially incremented so that the combined resistance value of the resistors R2 ′, R20 ′, R21 ′, R22 ′, R23 ′ decreases from small to large or from large to small. The selection signal at the time when changes in the value is set in a register or the like. At this time, the combined resistance has a value determined by the current value and the reference voltage as in the case of FIG. By applying the applicable selection signal at this time to the selection signals c20, c21, c22, and c23 in the variable resistor unit 5P shown in FIG. 5, the output impedance of the output unit when the switch transistor 2P is turned on is set to a desired value. Can be set to impedance.

  In the configuration of the dummy circuit portion 6P shown in FIG. 6, the resistance values (sizes) of the resistors R2 'to R23' in the dummy variable resistor portion 7P and the size of the dummy transistor 8P are respectively set in the resistance in the variable resistor portion 5P. The resistance value (size) of R2 to R23 is different from the size of the switch transistor 2P, and the combined resistance value of the dummy circuit section 6P is made larger than the combined resistance value of the variable resistance section 5P, thereby the current value of the dummy current source 9P. Can be reduced. At this time, the ratio of the resistance values of the resistors R2 'to R23' in the dummy circuit portion 6P and the on-resistance value between the source and drain of the dummy transistor 8P is set to the resistance value of the resistors R2 to R23 in the variable resistor portion 5P and the switch. The ratio of the on-resistance value between the source and drain of the transistor 2P must be the same.

  FIG. 7 is a circuit diagram illustrating another example of the configuration example of the variable resistor portion 5N. In another configuration example, the variable resistance unit 5N includes a series circuit including one resistor R3 and a resistance transistor Q3 having an N-type FET configuration. That is, the resistance transistor Q3 is used as a resistor to correct the variation in the resistance value of the resistor R3, the resistance value is adjusted by changing the gate voltage Vcont, and the combined resistance of the resistor R3 and the resistor transistor R3 ( (Combined impedance) is adjusted to a desired impedance.

  FIG. 8 is a circuit diagram showing a configuration example of a dummy circuit section 6N corresponding to the variable resistance section 5N shown in FIG. This dummy circuit section 6N includes a dummy variable resistance section 11N (the same reference numerals are used for resistors and transistors, and are indicated by a dash symbol ') and the same size and configuration as the variable resistance section 5N shown in FIG. A dummy transistor 12N connected in series to the dummy variable resistor unit 11N with the same configuration and size as the transistor 2N, and a constant current source configuration for supplying a predetermined constant current to the series circuit of the dummy variable resistor unit 11N and the dummy transistor 12N An operational amplifier that adjusts and controls the gate voltage Vcont for the transistor Q3 ′ based on the output voltage when a predetermined constant current is passed through the series circuit of the dummy current source 13N, the dummy variable resistor portion 11N, and the dummy transistor 12N. Operational amplifier) 14N.

  In such a configuration, the dummy transistor 12N is turned on when the dummy circuit portion 6N operates. Then, a preset constant current is supplied from the dummy current source 13N to the dummy variable resistor unit 11N, and the output voltage is input to the operational amplifier 14N. Negative feedback is applied to the reference voltage so as to make an imaginary short, and the gate voltage Vcont is controlled. Thus, the resistance value of the transistor Q3 'is adjusted. The combined resistance at the time of an imaginary short is a value determined by the current value of the dummy current source 13N and the reference voltage. The gate voltage Vcont applicable at this time is input to the resistance transistor Q3 as the gate voltage Vcont in the variable resistance section 5N shown in FIG. 7, so that the output impedance of the output section when the switch transistor 2N is turned on is desired. (Characteristic impedance of the transmission line) can be set.

  In the configuration of the dummy circuit unit 6N shown in FIG. 8, the resistance value (size) of the resistor R3 ′ in the dummy variable resistor unit 11N and the size of the dummy transistor 12N are respectively set to the resistance of the resistor R3 in the variable resistor unit 5N. The value (size) is different from the size of the switch transistor 2N, and the current value of the dummy current source 13N can be reduced by making the combined resistance value of the dummy circuit section 6N larger than the combined resistance value of the variable resistance section 5N. it can. At this time, the ratio of the resistance value of the resistor R3 'in the dummy circuit portion 6N and the on-resistance value between the source and drain of the dummy transistor 12N is determined by the ratio of the resistance value of the resistor R3 in the variable resistor portion 5N to the source value of the switch transistor 2N. It must be the same as the ratio of the on-resistance value between the drains.

  FIG. 9 is a circuit diagram illustrating another example of the configuration example of the variable resistance unit 5P. In another configuration example, similarly to the case of FIG. 7, the variable resistance portion 5P is formed of a series circuit of a resistance transistor Q4 having a P-type FET configuration and one resistor R4. In other words, the resistance transistor Q4 is used as a resistor to correct variation in the resistance value of the resistor R4, the resistance value is adjusted by changing the gate voltage Vcont, and the combined resistance of the resistor R4 and the resistance transistor R4 ( (Combined impedance) is adjusted to a desired impedance.

  FIG. 10 is a circuit diagram showing a configuration example of a dummy circuit unit 6P corresponding to the variable resistance unit 5P shown in FIG. This dummy circuit section 6P includes a dummy variable resistance section 11P (the same reference numerals are used for resistors and transistors, and are indicated by a dash symbol ') and the same size and configuration as the variable resistance section 5P shown in FIG. A dummy transistor 12P connected in series to the dummy variable resistor unit 11P with the same configuration and size as the transistor 2P, and a constant current source configuration for supplying a predetermined constant current to the series circuit of the dummy variable resistor unit 11P and the dummy transistor 12P Operational amplifier for adjusting and controlling the gate voltage Vcont for the transistor Q4 ′ based on the output voltage when a predetermined constant current is passed through the series circuit of the dummy current source 13P, the dummy variable resistor section 11P and the dummy transistor 12P. Operational amplifier) 14P.

  In such a configuration, the dummy transistor 12P is turned on when the dummy circuit portion 6P operates. Then, a preset constant current is supplied from the dummy variable resistor section 11P to the dummy current source 13P, the output voltage is input to the operational amplifier 14P, negative feedback is applied so as to be an imaginary short circuit with the reference voltage, and the gate voltage Vcont is controlled. Thus, the resistance value of the transistor Q4 'is adjusted. The combined resistance at the time of an imaginary short is a value determined by the current value of the dummy current source 13P and the reference voltage. The gate voltage Vcont applicable at this time is input to the resistance transistor Q4 as the gate voltage Vcont in the variable resistor section 5P shown in FIG. 9, so that the output impedance of the output section when the switch transistor 2P is turned on is desired. (Characteristic impedance of the transmission line) can be set.

  In the configuration of the dummy circuit unit 6P shown in FIG. 10, the resistance value (size) of the resistor R4 ′ in the dummy variable resistor unit 11P and the size of the dummy transistor 12P are respectively set to the resistance of the resistor R4 in the variable resistor unit 5P. The value (size) is different from the size of the switch transistor 2P, and the current value of the dummy current source 13P can be reduced by making the combined resistance value of the dummy circuit section 6P larger than the combined resistance value of the variable resistance section 5P. it can. At this time, the ratio of the resistance value of the resistor R4 ′ in the dummy circuit portion 6P and the on-resistance value between the source and drain of the dummy transistor 12P is set to the resistance value of the resistor R4 in the variable resistor portion 5P and the source value of the switch transistor 2P. It must be the same as the ratio of the on-resistance value between the drains.

  FIG. 11 is a circuit diagram illustrating an example of a configuration example of a current source (constant current driving unit) 4P having a variable current amount. The current source 4P with variable current amount of the present embodiment includes a constant current source 21, a transistor Q5 having a P-type FET connected in series to the constant current source 21, and a gate commonly connected to the transistor Q5. A plurality of transistors Q50, Q51, Q52, and Q53 constituting a current mirror circuit together with the transistor Q5, and these transistors Q50, Q51, Q52, and Q53 are connected in series and are selectively selected by selection signals s60, s61, s62, and s63, respectively. It is composed of switching transistors Q60, Q61, Q62, and Q63 that are on / off controlled.

  With such a configuration, the switching transistors Q60, Q61, Q62, and Q63 are turned on and off based on the selection signals s60, s61, s62, and s63, thereby turning on and off the output of the current source 4P. The value of the constant current output from the current source 4P is varied by appropriately changing the transistors Q50, Q51, Q52, and Q53 or turning on a plurality of transistors.

  FIG. 12 is a circuit diagram showing another example of the configuration example of the current source (constant current drive unit) 4P with variable current amount. In this example, a plurality of current mirror circuits are separately formed by using transistors Q70a, Q70b, Q71a, Q71b of P-type FET configuration, and their outputs are OR-connected, and the constant current source 22 for each current mirror circuit. , 23 and switching transistors Q70c, Q70d, Q71c, Q71d of P-type FETs that perform on / off control of the operation of these current mirror circuits based on selection signals s70, s71.

  With such a configuration, the current transistor 4P is turned on / off by turning on / off the switching transistors Q70c, Q70d, Q71c, Q71d based on the selection signals s70, s71, and at the same time, the current mirror circuit is operated. The value of the constant current output from the current source 4P is varied by appropriately changing or operating both current mirror circuits simultaneously.

  FIG. 13 is a circuit diagram showing an example of a configuration example of a current source (constant current driving unit) 4N having a variable amount of current. The current source 4N having a variable current amount according to the present embodiment includes a constant current source 24, an N-type FET transistor Q8 connected in series to the constant current source 24, and a gate commonly connected to the transistor Q8. A plurality of transistors Q80, Q81, Q82, and Q83 that constitute a current mirror circuit together with the transistor Q8, and these transistors Q80, Q81, Q82, and Q83 are connected in series and are selectively selected by selection signals s90, s91, s92, and s93, respectively. It is composed of switching transistors Q90, Q91, Q92, and Q93 that are on / off controlled.

  With such a configuration, the switching transistors Q90, Q91, Q92, and Q93 are turned on and off based on the selection signals s90, s91, s92, and s93, thereby turning on and off the output of the current source 4N. The value of the constant current output from the current source 4N is varied by appropriately changing the transistors Q90, Q91, Q92, and Q93 or turning on a plurality of transistors.

  FIG. 14 is a circuit diagram showing another example of the configuration example of the current source (constant current drive unit) 4N with variable current amount. In this example, a plurality of current mirror circuits are formed separately using transistors Q100a, Q100b, Q101a, Q101b of N-type FET configuration, and their outputs are OR-connected, and a constant current source 25 for each current mirror circuit. 26 and switching transistors Q100c, Q100d, Q101c, Q101d of an N-type FET configuration that controls the operation of these current mirror circuits based on selection signals s100, s101.

  With such a configuration, the current transistor 4N is operated at the same time as the output of the current source 4N is turned on / off by controlling the switching transistors Q100c, Q100d, Q101c, Q101d based on the selection signals s100, s101. The value of the constant current output from the current source 4N is varied by appropriately changing or operating both current mirror circuits simultaneously.

  Supplying or drawing charge to the output terminal 1 by matching the switching timing of the current source 4P or 4N having the variable current amount having the above-described configuration when the data transitions from the H level to the L level or from the L level to the H level. Speed of data switching can be increased. Further, in consideration of the attenuation of the output voltage due to the inductor component of the output terminal 1, a function (emphasis function) for increasing the output voltage in advance is provided by superimposing a constant current from the current source 4P during data switching. be able to. Also, when the same data continues, a function (de-emphasis function) for reducing the output voltage of the second and subsequent data can be provided by drawing current with the current source 4N. Also, by making the current value of the current source 4P or 4N variable, the swing amount of the output voltage can be adjusted, and the emphasis amount and de-emphasis amount can be adjusted.

  FIG. 15 is a schematic circuit diagram showing an application example to a differential output circuit that performs signal transmission with two systems of a normal output and an inverted output. That is, in the case of the differential transmission method, output circuits 31a and 31b having exactly the same configuration are prepared as shown in FIG. 15, for example, assigned so that the output circuit 31a is for normal output and the output circuit 31b is for inverted output. The output terminals 1 may be combined so that only the polarities of the outputs are different so that the output from the output terminal 1 becomes the normal output P and the inverted output N.

  FIG. 16 is a schematic block diagram showing an application example to a semiconductor laser modulation driving apparatus as an application example of the output circuit as described above. In this case, the semiconductor laser modulation driving device 41 includes, for example, a semiconductor laser driving means 42 that actually drives a semiconductor laser (not shown) to emit light, and a modulation signal corresponding to image data or the like for the semiconductor laser driving means 42. And a semiconductor laser control means 43 for outputting. These semiconductor laser driving means 42 and semiconductor laser control means 43 are constituted by, for example, an IC chip and are connected by transmission lines 44a and 44b for signal transmission between them.

  Here, between the output part of the semiconductor laser control means 43 and the transmission lines 44a and 44b, the output devices 45a and 45b (the output devices 31a and 31b for the differential output circuit) configured as described above may be provided. Is provided.

  As a result, it is possible to transmit a modulation signal with little reflection from the semiconductor laser control means 43 side to the semiconductor laser drive means 42 side accurately and at high speed.

  FIG. 17 is a perspective view including a control system configuration showing an application example to an image forming apparatus having a raster scanning type writing system. First, a semiconductor laser 51 that emits laser light modulated and controlled based on a laser modulation / driving signal is provided. The laser light from the semiconductor laser 51 is converted into a parallel light beam by a collimator lens 52 and beam-shaped by a cylinder lens 53. The light enters one mirror surface of the polygon mirror 54. This laser light is deflected and scanned in the main scanning direction as the polygon mirror 54 rotates at high speed, and is irradiated onto the surface of the rotating photoreceptor 58 through the fθ lens 55, the folding mirror 56, the toroidal lens 57, and the like. At this time, since the photosensitive member 58 has been uniformly charged, an electrostatic latent image is formed by being irradiated by laser beam deflection scanning, and is transferred onto a transfer sheet through a development process, a transfer process, and the like. .

  In such an image forming apparatus, a write control signal generation unit 46 that generates image data, a load pulse, and the like based on the image density signal, an image clock generation unit and a pulse generation unit 47 that generate a modulation signal based on the image data, and the like. A semiconductor laser modulation driving device 41 comprising: a semiconductor laser control means 43 having a semiconductor laser control means 43; and a semiconductor laser driving means 42 for receiving a modulation signal from the semiconductor laser control means 43 and outputting a laser modulation / drive signal to the semiconductor laser 51. It is a structural example provided. Note that the writing start position in the main scanning direction is detected by the horizontal synchronization sensor 59, input to the writing control signal generation unit 46, and outputs an LD modulation signal in accordance with the horizontal synchronization signal and the image signal. Here, as described with reference to FIG. 16, the output devices 45a and 45b of the present invention are mounted on the output portion of the semiconductor laser control means 43 having the IC chip configuration, whereby the modulation signal is transmitted accurately and at high speed with little reflection. It becomes possible.

  In the above description, the application example to the image forming apparatus has been described. However, the present invention is not limited to the application to the image forming apparatus, and transmission is performed between integrated circuits in an electronic device including an integrated circuit (IC chip) that controls each unit. If electrical signal transmission is performed via a line, it can be similarly applied to the output unit. This is not limited to the case where an integrated circuit (IC chip) for controlling each part is provided, but an output when electric signal transmission is performed via a transmission line between PCBs when a printed wiring board (PCB) for controlling each part is provided. The same applies to the case of parts.

It is a circuit diagram which shows the basic structural example of the output part of the output device in the high-speed electric signal transmission of one embodiment of this invention. It is a block diagram which shows the schematic structural example of an impedance matching part. It is a circuit diagram which shows an example of a structural example of one variable resistance part. It is a circuit diagram which shows an example of a structural example of the dummy circuit part corresponding to the said variable resistance part. It is a circuit diagram which shows an example of a structural example of the other variable resistance part. It is a circuit diagram which shows an example of a structural example of the dummy circuit part corresponding to the said variable resistance part. It is a circuit diagram which shows the other example of a structural example of one variable resistance part. It is a circuit diagram which shows an example of a structural example of the dummy circuit part corresponding to the said variable resistance part. It is a circuit diagram which shows the other examples of the structural example of the other variable resistance part. It is a circuit diagram which shows an example of a structural example of the dummy circuit part corresponding to the said variable resistance part. It is a circuit diagram which shows an example of a structural example of one current source of variable current amount. It is a circuit diagram which shows the other example of the structural example of the current source. It is a circuit diagram which shows an example of a structural example of the other current source of variable current amount. It is a circuit diagram which shows the other example of the structural example of the current source. It is a schematic circuit diagram which shows the example of application to the differential output circuit which performs signal transmission with the output of 2 systems | sets, a normal output and an inversion output. It is a schematic block diagram which shows the example of application to a semiconductor laser modulation drive device. It is a perspective view including a control system configuration showing an application example to an image forming apparatus having a raster scanning type writing system.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Output terminal 2P, 2N Switch transistor 3P, 3N Impedance matching part 4P, 4N Constant current drive part 5P, 5N Variable resistance part, Impedance adjustment part 6P, 6N Dummy circuit part 7P, 7N Dummy variable resistance part 8P, 8N Dummy transistor 9P , 9N Dummy current source 10P, 10N Comparator 11P, 11N Dummy variable resistor section 12P, 12N Dummy transistor 13P, 13N Dummy current source 14P, 14N Operational amplifier 41 Semiconductor laser modulation drive unit 42 Semiconductor laser drive unit 43 Semiconductor laser control unit 44a , 44b Transmission lines 45a, 45b Output device 51 Semiconductor laser 58 Photoconductor

Claims (20)

In an output device that outputs a transmission signal to a transmission line,
An impedance adjustment unit and a dummy circuit unit that has the same configuration as the impedance adjustment unit and obtains an adjustment value that matches the characteristic impedance of the transmission line, and the adjustment value obtained by the dummy circuit unit is stored in the impedance adjustment unit. An impedance matching unit that adjusts the output impedance to match the characteristic impedance by setting;
A switch transistor connected in series to the impedance matching unit and controlled to be turned on / off to switch the output to H level or L level;
A constant current drive unit that outputs a constant current superimposed on the output;
An output device comprising:   The output device according to claim 1, wherein the impedance adjustment unit includes a variable resistance unit capable of adjusting a combined resistance value.   The output device according to claim 2, wherein the variable resistance unit includes a plurality of resistors and a plurality of transistors.   The output device according to claim 3, wherein the variable resistance unit adjusts the combined impedance to a desired impedance by connecting the plurality of resistors in parallel and selecting the resistor using the transistor as a switch. .   The variable resistor section is formed by connecting one resistor and one resistor transistor in series, and adjusting the combined impedance to a desired impedance by adjusting the gate voltage of the resistor transistor. The output device according to claim 2. The dummy circuit section is
A dummy variable resistor portion having the same configuration and the same size as the variable resistor portion;
A dummy transistor having the same size as the switch transistor and connected in series to the dummy variable resistor section;
A dummy current source for causing a current to flow in a series connection between the dummy variable resistance portion and the dummy transistor;
A comparator that compares an output voltage with a reference voltage when a current is passed through the serial connection of the dummy variable resistor section and the dummy transistor;
The output device according to claim 2, further comprising: The dummy circuit section is
A dummy variable resistor portion having a different configuration and the same configuration as the variable resistor portion;
A dummy transistor different in size from the switch transistor and connected in series to the dummy variable resistor section;
A dummy current source for causing a current to flow in a series connection between the dummy variable resistance portion and the dummy transistor;
A comparator that compares an output voltage with a reference voltage when a current is passed through the serial connection of the dummy variable resistor section and the dummy transistor;
The output device according to claim 2, further comprising: The dummy circuit section is
A dummy variable resistor portion having the same configuration and the same size as the variable resistor portion;
A dummy transistor having the same size as the switch transistor and connected in series to the dummy variable resistor section;
A dummy current source for causing a current to flow in a series connection between the dummy variable resistance portion and the dummy transistor;
An operational amplifier for adjusting the resistance value of the dummy variable resistor section;
The output device according to claim 2, further comprising: The dummy circuit section is
A dummy variable resistor portion having a different configuration and the same configuration as the variable resistor portion;
A dummy transistor different in size from the switch transistor and connected in series to the dummy variable resistor section;
A dummy current source for causing a current to flow in a series connection between the dummy variable resistance portion and the dummy transistor;
An operational amplifier for adjusting the resistance value of the dummy variable resistor section;
The output device according to claim 2, further comprising:   10. The output device according to claim 1, wherein the constant current driving unit feeds a constant current from a power supply voltage to an output terminal connected to the transmission line. 11.   10. The output device according to claim 1, wherein the constant current driving unit draws a constant current to GND from an output terminal connected to the transmission line. 11.   10. The constant current driving unit, wherein a constant current is supplied from a power supply voltage to an output terminal connected to the transmission line, or a constant current is drawn from the output terminal to GND. An output device according to any one of the above.   13. The output according to claim 1, wherein the constant current driving unit is switchable by a control signal between an on state in which a constant current is generated and an off state in which a constant current is not generated. apparatus.   14. The output device according to claim 13, wherein the constant current drive unit is switched between an on / off state at a moment when the switch transistor drives an output from H level to L level or from L level to H level. .   The output device according to claim 1, wherein data transmission is performed by on / off control of the switch transistor, and an emphasis / de-emphasis function is performed by a constant current of the constant current driving unit.   The output device according to claim 1, wherein the constant current driving unit is capable of changing a value of a constant current to be generated. In a differential output device that performs signal transmission with two outputs, a normal output and an inverted output,
A differential output device comprising the output device according to any one of claims 1 to 16 for each of a normal output and an inverted output. In a semiconductor laser modulation drive apparatus comprising a semiconductor laser drive means and a semiconductor laser modulation means each constituted by a separate chip,
The output device according to any one of claims 1 to 16, or the differential output device according to claim 17, wherein the semiconductor laser modulation means performs electrical signal transmission between the semiconductor laser modulation means and the semiconductor laser driving means. A semiconductor laser modulation driving apparatus comprising: In an image forming apparatus including a semiconductor laser that performs optical writing for forming an electrostatic latent image on a photoreceptor,
19. An image forming apparatus comprising the semiconductor laser modulation driving device according to claim 18 for driving the semiconductor laser. In electronic devices equipped with integrated circuits and printed circuit boards that control each part,
An electronic apparatus comprising the output device according to any one of claims 1 to 16 or the differential output device according to claim 17, which performs electrical signal transmission between the integrated circuits or between printed circuit boards.

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