JP2006014079A - Digital signal processor and digital signal processing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a digital signal processor capable of reducing a deterioration in information such as sound/image caused by the influence of jitter and controlling a transmission rate even when a data amount dynamically changes. <P>SOLUTION: An input-output circuit 26 extracts a coded video and sound signal stored in a memory 18 in synchronization with a DCLK 12 and transmits the signal to a decoder 15 as a coded video and sound signal 16. A transmission rate controller 27 compares time information STC generated by being synchronized with a clock DCLK 12 asynchronous with a clock PCLK 4 used in a disk player 1 with a PCR (program clock reference)28. The transmission rate controller 27 generates a transmission rate control instruction to control the transmission rate of the disk player 1 on the basis of the comparison result and supplies the transmission rate control instruction as instruction data to the data input-output circuit 26. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a digital signal processing apparatus and a digital signal processing method for acquiring and decoding a data stream composed of a plurality of data packets transmitted from a device capable of controlling a transmission rate from outside via a predetermined transmission path.

  The MPEG2 (Moving Picture Experts Group) standard is an international standard system suitable for broadcasting and communication media. MPEG2 is defined by the international standard ISO / IEC13818-1. In the MPEG2 compression system, a packet multiplexing system is used, and signals such as video, audio, and additional data are divided into units called packets. Time-division multiplexing is realized by sequentially switching and connecting the packets of video and audio.

  A packet header is added to the packet, which contains information for identifying individual signals, packet size, information for reproducing the clock at the time of encoding (PCR: Program Clock Reference), and time information for synchronous playback (PTS: Presentation Time Stamp) is described. In the MPEG2 compression method, there is a concept of STC (System Time Clock) as a time management unit.

  One of MPEG2 multiplexing systems is Transport Stream (TS). MPEG-TS is assumed to be applied to environments where data transmission errors occur, such as broadcasting and communication networks. PCR (Program Clock Reference) is used to reproduce the reference time at the time of encoding with the STC of the decoder. ) Information is included in the packet header and transmitted.

  When MPEG-TS packets are transmitted, for example, via the IEEE (The Institute of Electrical and Electronics Engineers) 1394 bus line, the receiver side uses the PCR information to reproduce the transmitter clock, and performs processing such as recording and playback. Yes.

  However, there is a quantization error when recording PCR, and due to the time lag that occurs during IEEE1394 bus line transmission, the clock reproduced on the receiver side has a clock fluctuation called jitter. The sound / image recorded / reproduced deteriorates due to the influence of.

  There are Japanese Patent Application No. 2000-619897 (W000 / 72552) and Japanese Patent Application Laid-Open No. 2002-354051 as methods for reducing the influence of this jitter. of Isochronous Data Flow ”is published as the official standard of the 1394 Trade Association.

  In these methods, data received by the receiver is temporarily held in a temporary storage element such as a memory, and the data held in the temporary storage element is read out according to the clock of the receiver, and processing such as recording / reproduction is performed. That is, the clock can be desynchronized between the transmission side and the reception side. The receiver reads data based on, for example, a master clock generated by a crystal oscillator, so that it is possible to suppress the effects of quantization errors when recording the PCR and time lag that occurs during IEEE1394 bus line transmission. Therefore, the influence of jitter can be reduced as much as possible.

  By the way, even in a data transmission / reception system based on the above method, it is necessary to control the amount of transmission data on the transmission side in order to always keep the amount of data held in the temporary storage element on the reception side. Therefore, the remaining amount of data held in the temporary storage element is periodically checked, a transmission rate control command is issued from the receiver to the transmitter according to the remaining amount, and the amount of transmission data is determined according to the command on the transmitter side. A way to control is taken. For this reason, although the clock is desynchronized between the transmission side and the reception side, the transmission data amount can be controlled, and the data amount held in the temporary storage element or the like can always be controlled to be constant.

  FIG. 9 is a diagram showing a configuration of a video / audio reproduction system including a disk reproduction device 50 and a decoding device 60 to which the technique disclosed in Japanese Patent Application No. 2000-619897 (W000 / 72552) and Japanese Patent Application Laid-Open No. 2002-354051 is applied. It is. This video / audio reproduction system issues a transmission rate control command in accordance with the remaining amount of data held in a temporary storage element (memory 69), and controls the transmission data amount of the disk reproduction device 50.

  In the disk reproducing apparatus 50, a digital signal processor (DSP) 53 controls a motor driving unit, a spindle motor, etc. (not shown) to rotate and drive the optical disk 54, and includes an optical pickup, an RF amplifier, a signal processing apparatus, and the like. The encoded video / audio signal recorded on the optical disc 54 is output. At this time, the DSP 53 outputs an encoded video / audio signal 55 to the input / output circuit 56 in synchronization with the clock PCLK 52 generated by the crystal oscillation circuit 51 built in the disk reproducing device 50. Further, the DSP 53 can adjust the output rate of ± several% (for example, ± 1%) based on the transmission rate control information 57 instructed by the input / output circuit 56.

  The input / output circuit 56 performs parallel-serial conversion processing on the encoded video / audio signal 55 received from the DSP 53, adds predetermined data, performs bi-phase mark modulation, and outputs the result to the bus line B1. The input / output circuit 56 generates PTS and PCR from the PCLK 52, and when the video / audio signal is packetized, the PTS and PCR are superimposed on the packet and transmitted to the bus line B1. Further, the input / output circuit 56 monitors packets transmitted through the bus lines B1 and B2, and acquires a packet designated with the disk playback device 50 as a destination. The input / output circuit 56 decodes the acquired packet, and outputs the content to the DSP 53 as transmission rate control information 57 in the case of a transmission rate control command from the decoding device 60.

  The disc playback device 50 and the decryption device 60 are connected by a bus line B1 defined by the IEEE1394 interface method. In the case of the IEEE1394 interface method, the connection order may be any connection, and FIG. 9 shows an example. It is also possible to connect to another device (not shown) by another bus line B2.

  In the decryption device 60, the input / output circuit 61 monitors packets transmitted on the bus lines B1 and B2 and designates the decryption device 60 as a destination, like the input / output circuit 56 of the disc playback device 50. Get the packet. The input / output circuit 61 packetizes the disk playback device 50 out of the packets acquired from the bus lines B 1 and B 2 in synchronization with the clock DCLK 63 generated by the crystal oscillation circuit 62 built in the decoding device 60. The encoded video / audio signal thus obtained is acquired and stored in the memory 69. When the input / output circuit 61 receives the transmission rate control information 65 from the memory remaining amount monitor 64, the input / output circuit 61 generates a packet as a transmission rate control command to the disk playback device 50 and sends it to the bus line B1. The input / output circuit 61 takes out the encoded video / audio signal stored in the memory 69 in synchronization with the DCLK 63 and transmits it to the decoder 66 as an encoded video / audio signal 67.

  The memory remaining amount monitor 64 monitors the remaining amount of the memory 69, and the remaining amount of the memory 69 is less than a certain value (for example, 1/3 of the total amount of memory) in the transmission rate control information 65 at intervals of several seconds (for example, 1 second). In this case, an instruction is sent to increase the transmission rate by several percent (for example, 1%), and when the remaining amount of memory exceeds a certain value (for example, 2/3 of the total amount of memory), the transmission rate is decreased by several percent (for example, 1%). A command is sent out, otherwise it is sent to maintain the current transmission rate.

  The decoder 66 decodes the encoded video / audio signal 67 in synchronization with the DCLK 63 and outputs it as a decoded video / audio signal 68. The decoded video / audio signal 68 is converted into an analog signal by a digital / analog converter (not shown), and is sent to a video output device such as a television and an audio output device such as a speaker.

Here, the time until the packet whose transmission rate is actually controlled reaches the decoding device 60 after the remaining amount of the memory 69 reaches a certain value or less or exceeds a certain value is the maximum control delay time Dmax, transmission rate control. The maximum control delay time Dmax can be expressed by the following equation 1, where Dcommand is the interval at which the command is issued, and Dprocess is the time required to control the transmission rate after receiving the transmission rate control command in the disk playback device 50. it can.
Dmax = Dcommand + Dprocess (1)

If the minimum value of the memory remaining threshold is Mfast and the maximum value is Mslow for controlling the transmission rate so that the remaining amount of memory does not become excessive or insufficient, the minimum value Mfast of the remaining memory threshold and the remaining memory threshold The maximum value Mslow can be expressed by the following equations 2 and 3, where Mmax is the total memory and data_rate is the data amount per unit time.
Mfast = data_rate · Dmax (2)
Mslow = Mmax−data_rate · Dmax (3)

  In addition, as a method using a conventional technique, there is a transmission method using a serial bus protocol (SBP) 2. SBP2 is defined by the international standard ISO / IEC14776-232. SBP2 is an asynchronous transmission method used for reading and writing data to a hard disk connected to a personal computer or the like, and is said to be optimal for connection based on the IEEE1394 bus standard.

  FIG. 10 is a diagram showing a configuration of a video / audio reproduction system including a data transmission device 70 and a decoding device 80 to which a transmission method using the SBP2 protocol is applied.

  In the data transmission device 70, the CPU 72 monitors the remaining amount of the memory 76, and when it detects that the remaining amount of data in the memory 76 has decreased, controls the motor drive unit, spindle motor, and the like (not shown) as necessary. The encoded video / audio signal recorded on the optical disc 71 is input and temporarily stored in the memory 76. When the SBP 2 control signal 74 is input from the input / output circuit 75, the CPU 72 converts the encoded video / audio signal temporarily held in the memory 76 into the SBP 2 data signal format to the input / output circuit 75 as the SBP 2 data signal 73. Output.

  The input / output circuit 75 performs parallel-serial conversion processing on the SBP2 data signal 73 received from the CPU 72, adds predetermined data, performs biphase mark modulation, and outputs the result to the bus line B1. Further, the input / output circuit 75 monitors packets transmitted through the bus lines B1 and B2, and acquires packets designated with the data transmission device 70 as a destination. The input / output circuit 75 decodes the acquired packet, and outputs the content to the CPU 72 as the SPB2 control signal 74 in the case of the SBP2 control command from the decoding device 80.

  The data transmission device 70 and the decryption device 80 are connected by a bus line B1 defined by the IEEE1394 interface method. In the case of the IEEE1394 interface method, the connection order may be any connection, and FIG. 10 shows an example. It is also possible to connect to another device (not shown) by another bus line B2.

  In the decoding device 80, the input / output circuit 83 monitors packets transmitted through the bus lines B1 and B2, and obtains a packet designated with the decoding device 80 as a destination. The input / output circuit 83 synchronizes with the clock DCLK 82 generated by the crystal oscillation circuit 81 built in the decoding device 80, and the data transmission device 70 uses the packets sent from the bus lines B 1 and B 2. The converted SBP2 data is acquired and stored in the memory 89. In addition, when the input / output circuit 83 receives the transmission rate control information 84 from the remaining memory monitor 88, the input / output circuit 83 generates a packet as an SBP2 control command to the data transmission device 70 according to the content, and transmits the packet to the bus line B1. The input / output circuit 83 takes out the encoded video / audio signal stored in the memory 89 in synchronization with the DCLK 82 and transmits it to the decoder 86 as the encoded video / audio signal 85.

W000 / 72552 JP 2002-354051 A

  However, in the methods disclosed in Patent Document 1 and Patent Document 2, the data transmission amount is controlled in accordance with the data amount held in the temporary storage element. Therefore, the variable bit rate (Variable Bit Rate) employed in MPEG2 is used. : VBR), etc., when the amount of data changes dynamically, the data may be excessive or insufficient, so it cannot be used.

  Specifically, it is as follows. In the video / audio reproduction system having the configuration shown in FIG. 9, when the maximum control delay time Dmax is obtained, the decoding device 60 can investigate the interval Dcommand for issuing the transmission rate control command. The time Dprocess required from the reception of the transmission rate control command in the playback device 50 to the control of the transmission rate differs depending on the target disk playback device 50, so it is difficult to obtain an accurate Dmax.

  Further, when obtaining the minimum value Mfast of the remaining memory threshold and the maximum value Mslow of the remaining memory threshold, data such that the data amount data_rate per unit time is constant as can be seen from (Equation 2) and (Equation 3). It can be used only for the format. When the amount of data changes dynamically such as VBR (Variable Bit Rate) adopted in MPEG2, the amount of data per unit time data_rate is not constant, so the remaining memory threshold is such that the remaining amount of memory does not become excessive or insufficient. The minimum and maximum values cannot be determined. Therefore, the memory 69 may overflow / underflow and cannot be used.

  In addition, the SBP2 protocol applied in the system shown in FIG. 10 is an asynchronous transmission method and does not guarantee the continuity of the data to be transmitted. , Video and audio may be disturbed.

  The present invention has been made in view of the above circumstances, and even when the amount of data dynamically changes, it is possible to reduce deterioration of information such as sound and images caused by the influence of jitter and to control transmission rate. An object of the present invention is to provide a digital signal processing apparatus.

  In order to solve the above problems, the digital signal processing apparatus according to the present invention acquires a data stream composed of a plurality of packetized data transmitted from a device capable of controlling the transmission rate from the outside via a predetermined transmission path. In the digital signal processing apparatus for decoding, the clock generating means for generating a clock and the data stream transmitted from the device are acquired, and the plurality of packets are synchronized with the clock generated by the clock generating means. A packet comprising an encoded information signal in the encoded data is acquired and written to the storage means, and the encoding reference time information at the time of the encoding process in the device superimposed on the packet is extracted, and the predetermined data Data input / output means for outputting command data for control to the device via a transmission line; Decoding means for decoding and outputting the packet comprising the encoded information signal read from the storage means by the output means in synchronization with the clock, and a system generated in synchronization with the clock generated by the clock generation means Comparing the time information with the encoding reference time information taken out by the data input / output means, and generating a transmission rate control command for controlling the transmission rate of the device based on the comparison result, the data input / output And a transmission rate control means for supplying the means as the command data.

  In this digital signal processing device, the data input / output means obtains a data stream transmitted from a device capable of controlling the transmission rate from the outside, and a plurality of packetized data is synchronized with the clock generated by the clock generating means. A packet consisting of the encoded information signal is obtained, the encoding reference time information at the time of the encoding process in the device superimposed on the packet is taken out, and further transmitted to the device via the predetermined transmission path. Outputs command data for control. The transmission rate control means compares the system time information generated in synchronization with the clock generated by the clock generation means and the encoding reference time information extracted by the data input / output means, and based on the comparison result, A transmission rate control command for controlling the transmission rate of the device is generated and supplied to the data input / output means as the command data.

  In order to solve the above problems, the digital signal processing method according to the present invention obtains a data stream composed of a plurality of packetized data transmitted from a device capable of controlling the transmission rate from outside through a predetermined transmission path. In the digital signal processing method for decoding, a clock generation step for generating a clock, a data stream transmitted from the device is acquired, and the plurality of the plurality of data streams are synchronized with the clock generated by the clock generation step. The packet consisting of the encoded information signal of the packetized data is acquired and written to the storage means, and the encoding reference time information at the time of the encoding process in the device, which is superimposed on the packet, is extracted, and further A data input / output step for outputting command data for control to the device via a predetermined transmission line; A decoding step for decoding and outputting the packet comprising the encoded information signal read from the storage means in the data input / output step in synchronization with the clock, and generating in synchronization with the clock generated by the clock generation step The system time information is compared with the encoding reference time information taken out by the data input / output means, and a transmission rate control command for controlling the transmission rate of the device is generated based on the comparison result, and the data A transmission rate control step for supplying the input / output means as the command data.

  In this digital signal processing method, a data input / output process acquires a data stream transmitted from a device capable of controlling the transmission rate from the outside, and a plurality of packetized data is synchronized with the clock generated by the clock generation process. A packet consisting of the encoded information signal is obtained, the encoding reference time information at the time of the encoding process in the device superimposed on the packet is taken out, and further transmitted to the device via the predetermined transmission path. Outputs command data for control. The transmission rate control step compares the system time information generated in synchronization with the clock generated by the clock generation step and the encoding reference time information extracted by the data input / output step, and based on the comparison result, A transmission rate control command for controlling the transmission rate of the device is generated and supplied to the data input / output means as the command data.

  According to the digital signal processing apparatus of the present invention, the data input / output means acquires a data stream transmitted from a device capable of controlling the transmission rate from the outside, and a plurality of data streams are synchronized with the clock generated by the clock generating means. A packet consisting of the encoded information signal of the packetized data is obtained, the encoding reference time information at the time of the encoding process in the device superimposed on the packet is taken out, and further, via the predetermined transmission path System data information generated by the transmission rate control means in synchronization with the clock generated by the clock generation means, and the encoding standard extracted by the data input / output means. Compare with the time information, generate a transmission rate control command for controlling the transmission rate of the device based on the comparison result, Since the data is supplied as command data to the data input / output means, even when the amount of data changes dynamically, the deterioration of information such as voice and images caused by the influence of jitter is reduced, and the transmission rate can be controlled. .

  According to the digital signal processing method of the present invention, a data input / output process acquires a data stream transmitted from a device capable of controlling the transmission rate from the outside, and a plurality of data streams are synchronized with the clock generated by the clock generation process. A packet consisting of the encoded information signal of the packetized data is obtained, the encoding reference time information at the time of the encoding process in the device superimposed on the packet is taken out, and further, via the predetermined transmission path Output the command data for control to the device, and the transmission rate control process generates the system time information in synchronization with the clock generated by the clock generation process, and the encoding standard extracted by the data input / output process. Compare with the time information, generate a transmission rate control command for controlling the transmission rate of the device based on the comparison result, Since the data is supplied as command data to the data input / output means, even when the amount of data changes dynamically, the deterioration of information such as voice and images caused by the influence of jitter is reduced, and the transmission rate can be controlled. .

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. This embodiment is a video / audio playback system including a disk playback device and a decoding device. Here, a video / audio reproduction system using an optical disk medium is taken as an example, but other media such as a system using a tape medium, a semiconductor memory medium, and a hard disk medium may be used. Any system can be used as long as the transmission rate can be controlled in accordance with a transmission rate control command from the decoding apparatus.

  In this video / audio reproduction system, the decoding device transmits a plurality of packets transmitted from a disk reproduction device, which is a device capable of externally controlling the transmission rate, via a predetermined transmission line such as an IEEE1394 transmission line. 1 is an example of a digital signal processing apparatus that acquires and decodes a data stream composed of digitized data.

  First, the configuration of the disc reproducing apparatus 1 will be described with reference to FIG. In the disk reproducing apparatus 1, a digital signal processor (DSP) 5 controls a motor driving unit, a spindle motor, etc. (not shown) to rotate and drive the optical disk 6, and includes an optical pickup, an RF amplifier, a signal processing apparatus, and the like. The encoded video / audio signal recorded on the optical disc 6 is output. At this time, the DSP 5 outputs an encoded video / audio signal 7 to the input / output circuit 8 in synchronization with the clock PCLK 4 generated by the crystal oscillation circuit 3 built in the disk reproducing apparatus 1. The DSP 5 can adjust the output rate of ± several% (for example, ± 1%) based on the transmission rate control information 9 instructed by the input / output circuit 8.

  The input / output circuit 8 performs parallel-serial conversion processing on the encoded video / audio signal 7 received from the DSP 5, adds predetermined data, performs bi-phase mark modulation, and outputs the result to the bus line B 1. Further, the input / output circuit 8 generates PTS and PCR from PCLK4, and superimposes the PTS and PCR on the packet when the packetized video / audio signal is transmitted to the bus line B1. For this reason, the input / output circuit 8 also has a function of a multiplexing device. The function of the multiplexing device will be described later. Further, the input / output circuit 8 monitors packets transmitted through the bus lines B1 and B2, and obtains a packet designated with the disk reproducing apparatus 1 as a destination. The input / output circuit 8 decodes the acquired packet and, in the case of a transmission rate control command from the decoding device 2, outputs the content as transmission rate control information 9 to the DSP 5.

  The disc playback device 1 and the decryption device 2 are connected by a bus line B1 defined by the IEEE1394 interface method. In the case of the IEEE1394 interface method, the connection order may be any connection, and FIG. 1 shows an example. It is also possible to connect to another device (not shown) by another bus line B2.

  In FIG. 1, a decoding device 2 includes a crystal oscillation circuit 11 that is a clock generation means for generating a clock, a data input / output circuit 26 that acquires a data stream transmitted from the disk reproducing device 1, and a data input / output circuit. A decoder 15 that decodes and outputs a packet made up of the encoded information signal (encoded video / audio signal) read out by H. 26 in synchronization with the clock, and system time information generated in synchronization with the clock. A transmission rate controller 27 that compares a certain STC with the PCR extracted from the packet by the data input / output circuit 26 and generates a transmission rate control command for controlling the transmission rate of the disk reproducing apparatus 1 based on the comparison result; Is provided.

  The crystal oscillation circuit 11 generates a highly accurate clock DCLK 12 that is asynchronous with the clock PCLK 4 from the crystal oscillation circuit 3 of the disk reproducing apparatus 1.

  The data input / output circuit 26 monitors packets transmitted through the bus lines B1 and B2, and acquires a packet designated with the decoding device 2 as a destination.

  The packetized video / audio signals sent to the bus line B1 constitute a transport stream. This is possible because the input / output circuit 8 of the disk reproducing apparatus 1 has the function of the multiplexing apparatus 30 shown in FIG.

  The input / output circuit 8 has the function of the multiplexing device 30 shown in FIG. 2 so that the video data 31, the audio data 32, the other data 33, and the like reproduced from the optical disk 6 by the DSP 5 or the like correspond to each other. Input into an encoding device, that is, an MPEG2 video encoding device 34, an audio encoding device 35, and another encoding device 36, and each encoded stream data (these are also referred to as elementary streams) 37, 38 and 39 are obtained.

  The MPEG2 video encoding device 34 compresses the video signal using compression techniques such as motion compensation prediction, discrete cosine transform DCT, quantization, and variable length encoding. Motion compensated prediction uses temporal redundancy to reduce the amount of information. Discrete cosine transform reduces the amount of information using spatial redundancy within the screen.

  The audio encoding device 35 encodes PCM audio data having a sampling frequency of 8 to 96 kHz. The number of channels and the bit rate can be arbitrarily selected. In the case of stereo 2ch, the bit rate is approximately within 200kbps.

  Further, the audio encoding device 35 may encode the direct stream data DSD composed of 1-bit audio signal obtained by ΔΣ modulation reproduced from an optical disc such as SACD, for example, according to a predetermined encoding method. Delta-sigma-modulated 1-bit audio signals have a very high sampling frequency and short data compared to the data format used in conventional digital audio (for example, the sampling frequency is 44.1 KHz and the data word length is 16 bits). It is characterized by a word length (for example, sampling frequency is 64 times 44.1 KHz and data word length is 1 bit), and the transmittable frequency band is wide. Further, even with a 1-bit signal by ΔΣ modulation, a high dynamic range can be ensured in an audio band that is low with respect to an oversampling frequency of 64 times. Utilizing this feature, it can be applied to high-quality recorders and data transmission. The ΔΣ modulation circuit itself is not a new technology in particular, and its circuit configuration is suitable for IC integration, and AD conversion accuracy can be obtained relatively easily. Circuit. The ΔΣ-modulated signal can be converted back to an analog audio signal by passing it through a simple analog low-pass filter.

  The multiplexing unit 40 multiplexes these elementary streams to generate a unified transport stream 41. In particular, in the method defined in MPEG2, at the time of this multiplexing, synchronization information such as PCR described later with respect to the time axis of the image and the sound signal is also recorded in the transport stream.

  The other encoding device 33 encodes, for example, information PSI necessary for transmission, digital storage media information DSMI, and the like. Information necessary for transmission is also called program specification information (Program Specific Information: PSI), which is essential information for MPEG2-TS transmission. The digital storage media information DSMI is information required when receiving a digital broadcast and recording it on a medium, for example.

  In the multiplexing unit 40, the stream data 37 from the MPEG2 video encoding device 34, the stream data 38 from the audio encoding device 35, and the stream data 39 from the other encoding devices 36 are registered in FIFO regardless of the type. To do. The transmission channel is divided into packet lengths, and each packet packet is sent to the transmission channel according to FIFO registration every time a packet slot arrives. Even if a packet slot arrives, if the FIFO registration is empty, an invalid data (NULL) packet is inserted. In this way, the multiplexing unit 40 forms the transport stream TS.

  FIG. 3 is a diagram illustrating the structure of the transport stream TS multiplexed by the multiplexing unit 40. The transport stream TS is configured by multiplexing transport packets having a fixed length of 188 bytes (bytes) as shown in FIG. FIG. 4B is a diagram illustrating the structure of a TS packet. It consists of 4-byte header (Hader) information and 184-byte (bytes) TS payload. As shown in FIG. 4C, the 8-bit synchronization signal (SyncByte) in the header information indicates the TS start code, and is used to detect the beginning of the TS packet by the MPEG decoder on the receiving device side. Used. The error indication (1 bit) indicates the presence or absence of a bit error in this TS packet. The unit start display (1 bit) indicates whether the payload starts from the beginning of the data unit of video, audio, or PSI. The priority indication (TS packet priority, 1 bit) indicates the importance of this TS packet. PID (Packet Identification, 13 bits) is a packet identifier and stream identification information. Scramble control (2 bits) indicates whether or not the payload portion is scrambled. The adaptation field (AF) control (2 bits) indicates the presence / absence of an adaptation field to be described later. The structure shown in FIG. 3 has no adaptation field. The cyclic counter (4 bits) determines whether or not a part of the packets having the same PID is partially discarded based on the continuity of the count information. The cyclic counter is always 0x0 for null packets. The TS payload contains video data, audio data, and PSI data. In the case of a NULL packet, the payload area is filled with 0xFF.

  FIG. 4 shows a TS packet structure with an adaptation field. The adaptation field control of the header information indicates that there is an adaptation field (FIG. 4B). The first 8 bits of the adaptation field indicate the adaptation field length. In the discontinuous display, it is indicated that the system clock is reset and new contents are obtained in the next packet having the same PID. The random access display indicates the start of a video sequence header or audio frame, and the entry point at the time of random access can be detected by this random access display. The stream priority indication indicates that an important part of the individual stream is in the payload of this packet. A flag is provided after the stream priority display, and an optional field of conditional coding is set by this flag. After this optional field, a stuffing byte that is invalid data is provided as necessary.

  In the optional field, as shown in FIG. 4C, a PCR field (48 bits) in which a PCR value as time reference information is set, an OPCR (Original Program Clock Referene) as an original program reference time, and editable. A splice countdown indicating the number of transport packets with the same PID up to a point is placed. In the 48-bit PCR field, PCRBase (33 bits), res (6 bits), and PCRExtension (9 bits) are described as shown in FIG. The PCR is set to 27 MHz, for example.

  PCR is time information arranged at a predetermined time interval in a plurality of consecutive packets. MPEG2-TS transmits a packet including time information PCR. The PCR includes time information referred to by the decoding device, and has a mechanism in which the time of the decoder can be set to an intended time on the encoder side. In MPEG2-TS, PCR is transmitted at regular intervals, and the interval is set to 0.1 seconds or less. That is, the PCR is transmitted at a constant interval while being a packet transmitted at a variable bit rate. In the multiplexing unit, PCRs are arranged in a plurality of consecutive packets constituting the transport stream at intervals of, for example, 0.03 seconds.

  The input / output circuit 26 then synchronizes with the clock DCLK12 generated by the crystal oscillation circuit 11 built in the device 2 and the packet reproduction device 1 uses the packets obtained from the bus lines B1 and B2. The encoded video / audio signal thus obtained is acquired, the PCR superimposed on the packet is taken out, and sent to the transmission rate controller 27 as the PCR 28.

  Further, the input / output circuit 26 stores the encoded video / audio signal extracted from the acquired packet in the memory 18. Further, when the transmission rate control information 14 is received from the transmission rate controller 27, the input / output circuit 26 generates a packet as a transmission rate control command to the disk reproducing apparatus 1 and sends it to the bus line B1. The input / output circuit 26 takes out the encoded video / audio signal stored in the memory 18 in synchronization with the DCLK 12 and transmits it to the decoder 15 as the encoded video / audio signal 16.

  The transmission rate controller 27 compares the PCR 28 with time information STC (System Time Clock) generated in synchronization with the clock DCLK 12 which is asynchronous with the clock PCLK 4 used in the disk reproducing apparatus 1.

  Then, the transmission rate controller 27 generates a transmission rate control command for controlling the transmission rate of the disk reproducing apparatus 1 based on the comparison result, and supplies it to the data input / output circuit 26 as command data. Specifically, the transmission rate controller 27 issues a command to the transmission rate control information 14 at intervals of several seconds (for example, 1 second). When the value obtained by subtracting STC from PCR (T = PCR-STC) is equal to or greater than the maximum value Tslow of the time threshold value, a command is sent to lower the transmission rate by several percent (for example, 1%) (SLOW). When the value obtained by subtracting STC from PCR (T = PCR-STC) is less than or equal to the minimum time threshold value Tfast, a command is sent to increase the transmission rate by several percent (for example, 1%) (FAST). In other cases, a command is sent to maintain the current transmission rate.

  FIG. 5 is a diagram for explaining the operation of the transmission rate controller 27 for controlling the transmission rate on the disc playback apparatus 1 side based on the value obtained by subtracting STC from PCR (T = PCR-STC). When the time difference T becomes equal to or greater than the maximum time threshold value Tslow at the elapsed time t1, the transmission rate controller 27 packetizes a transmission rate control command that lowers the transmission rate by, for example, 1% as the transmission rate control information 14, The signal is transmitted to the disc reproducing apparatus 1 through the circuit 26 and the bus line B1.

  In the disk reproducing apparatus 1, a packet transmitted through the bus line B1 is monitored by the input / output circuit 8, and a packet designated with the disk reproducing apparatus 1 as a destination is acquired. The input / output circuit 8 decodes the acquired packet and, in the case of a transmission rate control command from the decoding device 2, outputs the content as transmission rate control information 9 to the DSP 5. Since the transmission rate control information 9 is a transmission rate control command that lowers the transmission rate by, for example, 1%, the DSP 5 lowers the output rate by -1%. Thereby, the transmission rate controller 27 on the decoding device 2 side can grasp that the time difference T becomes smaller than the maximum value Tslow of the time threshold at the elapsed time t2.

  When the time difference T becomes equal to or less than the minimum value Tfast of the time threshold at the elapsed time t3, the transmission rate controller 27 packetizes a transmission rate control command that increases the transmission rate, for example, by 1%, as the transmission rate control information 14. The data is transmitted to the disk reproducing apparatus 1 through the input / output circuit 26 and the bus line B1.

  In the disk reproducing apparatus 1, a packet transmitted through the bus line B1 is monitored by the input / output circuit 8, and a packet designated with the disk reproducing apparatus 1 as a destination is acquired. The input / output circuit 8 decodes the acquired packet and, in the case of a transmission rate control command from the decoding device 2, outputs the content as transmission rate control information 9 to the DSP 5. Since the transmission rate control information 9 is a transmission rate control command for increasing the transmission rate by, for example, 1%, the DSP 5 increases the output rate by + 1%. Thereby, the transmission rate controller 27 on the decoding device 2 side can grasp that the time difference T becomes larger than the minimum value Tfast of the time threshold at the elapsed time t4.

  The decoder 15 decodes the encoded video / audio signal 16 in synchronization with the DCLK 12 and outputs it as a decoded video / audio signal 17. The decoded video / audio signal 17 is converted into an analog signal by a digital / analog converter (not shown) and sent to a video output device such as a television or an audio output device such as a speaker.

  As described above, the decoding device 2 compares the time difference between the received PCR and the STC based on the clock generated by the crystal oscillation circuit 3 in the decoding device 2 to be transmitted from the disk reproducing device 1. Even for video / audio data whose data amount changes dynamically, a transmission rate control signal can be sent to the disk playback apparatus 1, and thus the transmission rate of the disk playback apparatus 1 can be controlled. . In addition, the audio / video reproduction system including the disk reproduction apparatus 1 and the decoding apparatus 2 can reduce the influence of jitter caused by quantization error and bus line transmission.

Next, a method of calculating the minimum time threshold value Tfast and the maximum time threshold value Tslow will be described. When the maximum control delay time Dmax, the total memory amount is Mmax, and the maximum data amount per unit time is max_data_rate, the time threshold value Tfast and the time threshold value Tslow can be expressed by the following equations 4 and 5.
Tfast = Dmax (4)
Tslow = (Mmax / max_data_rate) −Dmax (5)

  Next, a processing procedure for obtaining the maximum control delay time Dmax will be described with reference to FIG. In FIG. 6, in order to obtain the maximum control delay time Dmax, the decoding device 2 first sets, as step S1, settings for performing transmission rate control based on the digital signal processing method of the present invention for the disk reproducing device 1. I do. Next, in step S2, the decoding device 2 determines whether or not transmission rate control based on the present invention has been set, and if not, sends a message indicating that the process has failed (for example, in a message ( Step S6) If set, proceed to step S3.

  When the decoding device 2 proceeds to the process of step S3, the decoding device 2 inquires about the time Dprocess required until the transmission rate is controlled after receiving the transmission rate control command to the disk reproducing device 1 in step S3. Do. That is, the decoding device 2 issues a command for inquiring the time Dprocess required from the time when the disk playback device 1 receives the transmission rate control command to the time when the transmission rate is controlled. If the inquiry is successful (step S4), the decryption device 2 can know the time Dprocess from the inquiry response received from the disc playback device 1. Then, the above-mentioned time Dprocess and the interval Dcommand for issuing the transmission rate control command known to itself are added according to the above equation 1, and the maximum control delay time Dmax is calculated (step S5).

  Next, a processing procedure for obtaining the maximum data amount max_data_rate per unit time will be described with reference to FIG. In FIG. 7, the decoding apparatus 2 first performs setting for performing transmission rate control by the digital signal processing method of the present invention on the disk reproducing apparatus 1 in step S11.

  Next, in step S12, the decoding apparatus 2 determines whether or not the setting for performing the transmission rate control has been made. If not, the decoding apparatus 2 sends a message indicating that the processing has failed, for example (step S12). S15) When set, the process proceeds to step S13.

  When the decrypting apparatus 2 proceeds to the process of step S13, it makes an inquiry about the maximum data amount max_data_rate per unit time in step S13. That is, the decoding device 2 issues a command for inquiring of the maximum data amount max_data_rate per unit time of the encoded video / audio signal packet to be transmitted to the disc playback device 1. If the inquiry is successful (step S14), the decryption device 2 can know the maximum data amount max_data_rate per unit time from the inquiry response received from the disc playback device 1.

  6 and 7 may be performed simultaneously. FIG. 8 shows an example of a processing procedure in which the processes of FIGS. 6 and 7 are combined.

  In FIG. 8, the decoding device 2 first performs setting for performing transmission rate control based on the digital signal processing method of the present invention on the disc playback device 1 in step S21. Next, in step S22, the decoding device 2 determines whether or not the transmission rate control has been set. If not, the decoding device 2 sends a message indicating that the processing has failed, for example, when it is set. Advances to step S23.

  When the decoding device 2 proceeds to the process of step S23, in step S23, an inquiry about the time Dprocess required until the transmission rate is controlled after receiving the transmission rate control command to the disk reproducing device 1 is received. I do. That is, the decoding device 2 issues a command for inquiring the time Dprocess required from the time when the disk playback device 1 receives the transmission rate control command to the control of the transmission rate to the disk playback device 1. Next, the decryption apparatus 2 proceeds to the process of step S24, and inquires the maximum data amount of max_data_rate per unit time in step S4. That is, the decoding device 2 issues a command for inquiring the maximum data amount max_data_rate per unit time of the encoded video / audio signal packet to be transmitted to the disc playback device 1. When the above two inquiries succeed (step S25), the decoding device 2 can know the time Dprocess from the inquiry response received from the disk reproducing device 1, and obtains the maximum control delay time Dmax from the above equation 1. I can do it. Also, the decryption device 2 can know the maximum data amount max_data_rate from the inquiry response received from the disc playback device 1.

  Further, another method for obtaining the maximum data amount max_data_rate per unit time in the decoding device 2 will be described. The maximum data amount max_data_rate per unit time can be obtained from the sum of the maximum data amount per unit time of each encoded video / audio signal.

In MPEG2, the maximum data amount max_data_rate _video per unit time of the encoded video signal is the following from the bit rate value (bit_rate_value) in the sequence header (Sequence header) and the bit rate extension (bit_rate_extension) in the sequence extension (Sequence extension). This can be expressed by Equation 6.
max_data_rate _video = bit_rate_value + bit_rate_extension · 400 (6)

  Similarly, for other encoded video and audio signals, the maximum data amount per unit time is obtained, and max_data_rate can be obtained by taking the sum of all the maximum data amounts.

In the present invention, the time threshold value Tfast and the time threshold value Tslow can be set to the same value. In this case, the transmission rate control command to the disk reproducing apparatus 1 is only a command for increasing the transmission rate and a command for decreasing the transmission rate. If the time threshold value Tfast and the time threshold value Tslow are set to the same value, the required total memory amount Mmax can be obtained by the following equation (7).
Mmax = 2Dmax · max_data_rate (7)

  As described above, by applying the present invention, in the video / audio reproduction system of the embodiment, the decoding device 2 which is an example of the digital signal processing device is synchronized with the clock generated by the crystal oscillation circuit 11. The system time information STC generated in this manner is compared with the PCR extracted from the packet by the data input / output circuit 26, and a transmission rate control command for controlling the transmission rate of the disk reproducing apparatus 1 based on the comparison result is provided. The data is generated and transmitted to the disc playback apparatus 1 via the data input / output circuit 26. PCR is transmitted at regular intervals even in packet transmission where the amount of data dynamically changes. For this reason, in the technique in which the data transmission amount is controlled according to the remaining amount of data held in a temporary storage element such as a memory as in Patent Document 1 and Patent Document 2, transmission rate control cannot be performed. Even if the amount of data changes, the present embodiment enables transmission rate control, so that the influence of jitter caused by quantization error and bus line transmission can be reduced, and the influence of jitter can be reduced. It is possible to reduce the deterioration of sound / image to be recorded / reproduced.

  The present invention is not only applied only when the amount of data changes dynamically. Of course, the PCR is also used for packet transmission at a fixed bit rate, and is arranged at a constant interval. Therefore, it is obvious that the present invention can be applied to packet transmission at a fixed bit rate. Also in this case, the PCR is not used for the clock recovery at the time of encoding on the decoding device side, but is used only for the transmission rate control by comparison with the STC. Therefore, it is possible to reduce the influence of jitter caused by the error and the transmission of the bus line, and it is possible to reduce the deterioration of audio / image to be recorded / reproduced due to the influence of the jitter.

1 is a block diagram of a video / audio reproduction system according to an embodiment of the present invention. It is a block diagram of a multiplexing apparatus. It is a figure which shows the structure of transport stream TS. It is a figure which shows TS packet structure with an adaptation field. It is a figure for demonstrating the operation | movement which a transmission rate controller controls the transmission rate by the side of a disc reproducing apparatus based on the value (T = PCR-STC) which subtracted STC from PCR. It is a flowchart which shows the process sequence which calculates | requires the maximum control delay time Dmax. It is a flowchart which shows the process sequence which calculates | requires the maximum data amount max_data_rate per unit time. It is a flowchart which shows the process sequence which calculates | requires simultaneously the maximum control delay time Dmax and the maximum data amount max_data_rate per unit time. It is a block diagram which shows the structure of the conventional video / audio reproduction system. It is a block diagram which shows the structure of the other conventional video / audio reproduction system.

Explanation of symbols

  1 disc playback device, 2 decoding device, 3 crystal oscillation circuit, 4 clock PCLK, 5 DSP, 6 optical disc, 7 encoded video / audio signal, 8 input / output circuit, 9 transmission rate control information, 11 crystal oscillation circuit, 12 clock DCLK, 14 transmission rate control information, 15 decoder, 16 encoded video / audio signal, 18 memory, 26 input / output circuit, 28 PCR

Claims (4)

In a digital signal processing apparatus that acquires and decodes a data stream composed of a plurality of packetized data transmitted from a device capable of controlling the transmission rate from the outside via a predetermined transmission path,
Clock generating means for generating a clock;
Acquire a data stream transmitted from the device, acquire a packet composed of encoded information signals of the plurality of packetized data in synchronization with the clock generated by the clock generation means, and store it in the storage means. A data input for writing and extracting the encoding reference time information superimposed on the packet at the time of the encoding process in the device and outputting the command data for control to the device via the predetermined transmission path. Output means;
Decoding means for decoding and outputting the packet comprising the encoded information signal read from the storage means by the data input / output means in synchronization with the clock;
The system time information generated in synchronization with the clock generated by the clock generation means and the encoding reference time information extracted by the data input / output means are compared, and the transmission rate of the device is controlled based on the comparison result. A digital signal processing apparatus comprising: a transmission rate control means for generating a transmission rate control command for performing the command and supplying the command data to the data input / output means as the command data.   The transmission rate control means generates a transmission rate control command for lowering the transmission rate when the difference between the encoding reference time information and the system time information is equal to or greater than the maximum value of the time threshold value, and sends it to the data input / output means. 2. The digital signal processing apparatus according to claim 1, wherein when the difference is equal to or less than a minimum value of a time threshold value, a transmission rate control command for increasing a transmission rate is generated and supplied to the data input / output means. In a digital signal processing method for acquiring and decoding a data stream composed of a plurality of packetized data transmitted from a device capable of controlling the transmission rate from outside via a predetermined transmission path,
A clock generation process for generating a clock;
Acquire a data stream transmitted from the device, acquire a packet composed of encoded information signals of the plurality of packetized data in synchronization with a clock generated by the clock generation step, and store it in a storage unit. A data input for writing and extracting the encoding reference time information superimposed on the packet at the time of the encoding process in the device and outputting the command data for control to the device via the predetermined transmission path. An output process;
A decoding step of decoding and outputting the packet comprising the encoded information signal read from the storage means in the data input / output step in synchronization with the clock;
The system time information generated in synchronization with the clock generated by the clock generation step is compared with the encoding reference time information extracted by the data input / output means, and the transmission rate of the device is controlled based on the comparison result. And a transmission rate control step of generating a transmission rate control command for performing the command and supplying the command to the data input / output means as the command data.   The transmission rate control step generates a transmission rate control command for lowering the transmission rate when the difference between the encoding reference time information and the system time information is equal to or greater than the maximum value of the time threshold value, and sends it to the data input / output step. 4. The digital signal processing method according to claim 3, wherein when the difference is equal to or less than a minimum value of a time threshold value, a transmission rate control command for increasing a transmission rate is generated and supplied to the data input / output step.

Images