JP2004522230A - Consumption leveling of static area in flash memory - Google Patents
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- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
- G06F12/023—Free address space management
- G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
- G06F12/0246—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
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- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
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- G06F2212/1032—Reliability improvement, data loss prevention, degraded operation etc
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- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/72—Details relating to flash memory management
- G06F2212/7211—Wear leveling
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
- G11C16/349—Arrangements for evaluating degradation, retention or wearout, e.g. by counting erase cycles
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Abstract
システムリソースの使用量を低減しつつフラッシュ媒体(12)のデータ記憶ユニットの消耗を平準化する方法。静的領域内の静的データを他の物理的位置へ移動させるプロセスを用いるアルゴリズムにより静的領域が静的なまま残らないことが保証される。フラッシュデータ・マネージャが書き込みまたは消去動作(10)を何度も繰り返した後で、最終的に全データユニットが選択されるまで順次選択するようなプロセス(11)により、データユニットを選択し、次いで選択されたデータユニットは自由ユニット位置へ移動され(16)、選択されたデータは消去される。A method for leveling the consumption of a data storage unit of a flash medium (12) while reducing the use of system resources. Algorithms that use the process of moving static data within the static region to other physical locations ensure that the static region does not remain static. After the flash data manager repeats the write or erase operation (10) many times, the data units are selected by a process (11) such that the data units are sequentially selected until all data units are finally selected, and then the data units are selected. The selected data unit is moved to the free unit location (16) and the selected data is erased.
Description
【0001】
【発明の分野】
本発明はフラッシュメモリにおける静的領域の消耗平準化を向上させる方法に関する。
【0002】
【関連技術の説明】
フラッシュメモリは不揮発性であって、電源がなくても記録されたデータを保存可能である。さらに、フラッシュメモリの消去および再書き込み可能な性能を利用するコンピュータ・プログラムにより、フラッシュメモリに保存されたデータを変更することができる。これらの基本性能によりフラッシュアレイはコンピュータシステムにおける標準的な記憶媒体、すなわちフラッシュディスクとしての役割を果たすようになった。当技術分野においてこれを実現する種々の方法が記載されており、このような方法は広範に利用されている。このような方法の例としては、Amir Banによる米国特許第5,404,485号(フラッシュファイルシステム)およびAmir Banによる米国特許第5,937,425号(ページモードフラッシュ技術向けに最適化されたフラッシュファイルシステム)があり、共に全文を本明細書に援用している。これら2件の特許は、ユニットへのデータの保存や消去を調停する等、フラッシュファイルシステムを管理するシステムおよび方法を記載している。しかし、これらの特許は頻繁に消去されるユニットと稀にしか消去されないユニットを区別しないため、消耗平準化の手段を提供しない。
【0003】
フラッシュ素子は通常、いくつかの連続したゾーンに分けられていて、それぞれ個別に消去可能である。このようなゾーンは当技術分野でユニット、ブロックまたはセクタ等さまざまな呼び方で知られているが、本明細書では明快にすべくユニット、あるいは消去ユニットと呼ぶことにする。
【0004】
フラッシュメモリ技術の限界は、ユニットを消去できる回数がフラッシュセルの物理特性により本質的に制限される点である。ユニットを繰り返し消去すればユニット内のセルが消耗し、消去された状態と書き込まれた状態を区別する機能の低下につながり、その結果ユニットの消去にかかる時間が長くなって、データの書き込みや消去に散発的な誤りが出現し、ついにはユニットの消去や書き込み機能が失なわれかねない。
【0005】
消耗の影響は本来統計的であり、フラッシュ素子が消耗に耐える性能は書き込み/消去耐性と呼ばれる数値を用いてフラッシュ素子のベンダーが表記している。この数値は、各フラッシュユニットが重大な誤動作を起こすことなく消去できる最小または平均回数である。ベンダーによる耐性回数は現在、数万〜100万回の範囲にある。
【0006】
耐性限界によりフラッシュディスクの寿命が制約される。可能な限り寿命が長いことが有利であるが、これはフラッシュディスクへのアクセスパターンに依存する。1個のユニットまたは少数のユニットへの書き込みを頻繁に繰り返せばまもなく誤動作が発現し、媒体の使用可能な寿命がすぐに尽きてしまう。一方、書き込みを媒体の全ユニットにわたり均等に分散させることができれば、各ユニットは消去に耐え得る最大回数近くまで持ち、その結果、誤動作の発現を可能な限り遅らせて、媒体の寿命を最長にできる。
【0007】
フラッシュディスク・マネージャは通常、自身に備わったアルゴリズムにより新規データを書き込む物理的位置を決める裁量を与えられており、異なるフラッシュユニットが必ず同じ回数消去されるよう設計された仕方で書き込まれたデータを配置するという事実を利用する。このような手順は当技術分野で消耗平準化として知られている。ある種のマネージャはユニットが消去された回数をそのユニット内のレジスタに記録して、各ユニットの消去回数の分散が所与の小さい定数を超えないことを保証するスキームを強制する。他のものは、対象ユニットの選択に無作為抽出を利用し、統計および大数の法則に依存してフラッシュ媒体全体にわたって消耗が均等に保たれるようにする。
【0008】
しかし、そのような消耗平準化方法に特有の問題として静的領域がある。静的領域とは、全くまたは殆ど変わらないデータを含むフラッシュ素子上の物理的位置である。このようなデータはオペレーティング・システムコードまたはアプリケーション/プログラムコードから構成されていてもよく、通常は一度インストールされたら全くまたは殆ど変わらない。フラッシュディスクのさまざま利用法において、このようなデータはフラッシュ媒体の主要な部分を占める。
【0009】
消耗平準化方法は、新規データを書き込む位置を選択する際に制御を行なうため、静的領域に生じる消耗には影響を及ぼさない。これらの領域には決して書き込みが行なわれないため、選択不可能である。フラッシュ媒体のアクティブなユニットには消耗平準化が有効であるのに対し、静的ユニット、すなわち静的領域のユニットは消耗が極めて少ないままである。これは、例えば静的領域が媒体の半分を占める場合、有効寿命が半分に減るため、フラッシュ媒体全体の寿命を著しく縮めることになる。
【0010】
さらに、静的領域には以下のような種々の問題がある:
1.ユニットによる長期間にわたるフラッシュディスク使用のパターン追跡を含む静的領域の識別。これは履歴管理を支援する制御構造およびアルゴリズムを必要とする困難なプロセスである。
2.静的ユニットから別の位置へのデータの移動は、データを新しい位置に書き込んで前の位置を消去するための時間をとる。これが頻繁に行なわれた場合、フラッシュディスクのスループットの低下させる性能オーバーヘッドが現れる。
3.静的領域が存在するにもかかわらず長時間にわたり、媒体全体にわたる消耗の平準化を保証すること。
【0011】
当分野におけるいくつかの実施例としては、本明細書に全文を援用するWellsらによる米国特許第5,341,339号はフラッシュEEPROMメモリにおける消耗平準化の方法を記載している。それによればフラッシュメモリ・アレイの寿命が著しく延びる。Wellsらによる発明の方法は、フラッシュメモリ・アレイの異なる部分のスイッチングを監視し、その後均等化する工程を提供する。本発明によれば、これらおよびその他の目的が、別々に消去可能なブロックに分けられたフラッシュEEPROMメモリ・アレイをクリアするプロセスにより実現され、そのプロセスで選択されたブロック上のすべての有効なデータは最初にアレイの他のブロックに書き込まれ、次いでそのブロックが消去され、本改良は、各ブロックが含む無効セクタの個数と各ブロックが受けたスイッチング動作の回数との比較に基づいてクリアすべき選択ブロックを決定する工程を含む。このようにして、記録用の予約ユニットの維持と、消耗平準化の維持が共に実現される。しかし、各ユニットの消去回数カウントの保持も含め、そのようなシステムを維持するには相当のシステムリソースを必要とする。さらに、Wellsは実際には静的領域を扱っていない。同氏は、クリア動作時に消去回数カウントに重みを与えることを示唆している。実際には、静的な領域ではクリアすべきものが無いため、これはパラメータに重みを設定するだけでは済まない。Wellsは、クリアを必要としないが静的であるユニットに対して“クリア”を強制する必須な工程を省いている。
【0012】
本明細書に全文を援用したAssarらによる米国特許第5,388,083号、第5,485,595号および第5,479,638号に、消耗平準化のためのフラッシュメモリ大容量記憶装置アーキテクチャの種々の適用例を記載している。これらの特許によれば、大容量記憶装置のどの部分も、他の部分よりも多い回数消去されないようアルゴリズムが提供される。これにより大容量記憶装置のどのブロックであっても、誤動作により他のブロックよりも早く使用不可になることが防止され、その結果大容量記憶装置全体の寿命が延びる。
【0013】
従って、カウンタは各ブロックの消去回数を追跡する。カウンタ用に書き込み可能最大回数も提供される。あるブロックの消去回数が最大値より1だけ小さい値に達すると、そのブロックは最後の1回消去されて、その時点で消去回数が最も少ない別のファイルが書き込まれる。そのブロックはまた、消去禁止フラグがセットされることによりそれ以上消去できなくなる。全ブロックが最大回数に達した後で、すべての消去回数カウンタおよび禁止フラグがクリアされて第二のアルゴリズムが繰り返される。このように、すべてのブロックは、他のどのブロックよりも際立って多い回数消去されることがなくなる。しかし、Wellsらの発明と同様に、本発明も精緻な監視および許可構造を維持するために相当のシステムリソースを必要とする。さらに本発明は、クリアを必要としないが静的であるユニットに対しクリアを強制する必須工程を省いている。
【0014】
このように、システムを最小限に抑えつつフラッシュ媒体の寿命を最大化させるべく静的領域を効果的かつ経済的に扱う、改良された消耗平準化アルゴリズムに対するニーズが広範に認識されており、かつそれを実現することが極めて有用である。
【0015】
【発明の概要】
本発明によれば、フラッシュ媒体の全ユニットにおける消耗平準化に影響する改良された方法を提供する。これは、静的領域を実際には静的のままにしておかず、消耗平準化を実現すべく同領域内にある静的データを他の物理的位置へ確実に移動させるアルゴリズムを提供することにより可能となる。
【0016】
本発明は以下の方法を提供する:
1.フラッシュデータ・マネージャにより所与の多数回書き込みまたは消去動作が行なわれる度に1回ずつ、以下の工程に従って本発明の消耗平準化方法を開始する。
2.最終的に全ユニットが選択されるまで順次選択する仕方で周期的に媒体のユニットを選択する。
3.選択されたユニットデータを別の自由ユニットへ移動して、選択されたユニットを消去する。
【0017】
本発明は添付の図面を参照して、実施例によってのみ説明される。
【0018】
【好適な実施態様の説明】
本発明はフラッシュ媒体における消耗平準化に影響する方法に関する。これは、システムリソースの使用を最小限に抑えつつ消耗平準化が実現されるべく、静的領域を実際には静的のままにしておかず、同領域内の静的データを確実に他の物理的位置に移動するアルゴリズムを提供することにより可能となる。
【0019】
以下の説明は、当業者が特定の用途とその必要条件に応じて本発明を実施および利用できるよう提示するものである。好適な実施態様に対する種々の変更は当業者には明らかであり、ここで規定する一般原理は他の実施態様にも適用できる。従って、本発明は例示および説明された特定の実施態様に限定されるものではなく、開示された原理および新規な特徴と整合する最も広い範囲に含まれる。
【0020】
具体的には、本発明はフラッシュメモリ素子内の静的ブロックの消耗平準化を向上させるべく利用可能である。
【0021】
従って、本発明は静的および非静的領域における消耗平準化の解決策を提供し、その消耗平準化は以下のように実現される:
i.どの領域が静的であるかを認識する必要がない。
ii.性能低下が極めて小さい。
iii.ユニット間の消耗の分散を小さくすべく効率的な消耗平準化を行なう。
【0022】
本発明に基づくシステムと方法の原理および動作は、図面および付随する説明を参照することでさらによく理解されよう。ただし、図面は説明目的のためにのみ提供されており、限定的な意図はない。図面からわかるように、本方法は以下のとおりである:
1.フラッシュデータ・マネージャによりある程度多くの回数の書き込みまたは消去動作が行なわれる度に少なくとも1回行なわれ、本発明の消耗平準化方法12を以下の工程に基づいて行なう。例えば、以下のようにユニット消去動作1000回につき1回行なってもよい:
a.書き込みまたは消去動作をカウントして(10)、カウントが1000等、所与の数の倍数になったら起動する。
b.各書き込みまたは消去動作に対して、成功確率が1000分の1等の所与の確率であるランダムプロセスを生成し(11)、引き続き消耗平準化方法を起動する。
2.最終的に全ユニットが選択されるまで順次選択する仕方で媒体内のユニットを選択する(15)。選択は以下のいずれかの方法である。
a.例えばユニットが物理的順序で最初から最後まで選択される等、特定の選択順序を設定して(13)、先行ユニットが最後のものでない限り選択されたユニットが先に選択されたユニットに続き、その場合次に選択されたユニットが最初の物理的順序になるようにする。
b.ランダムプロセスによりユニットを選択して(14)、各ユニットが選択される確率を等しくする。
3.選択されたユニットのデータを別の自由ユニットへ移動して(16)、選択されたユニットを消去する。
【0023】
多くのフラッシュ管理アルゴリズムにおいて、工程3はガーベージ・コレクション・アルゴリズム(米国特許第5,404,485号、第5,937,425号、および第5,341,339号に見られるように当技術分野で公知である)の一環として既に存在するため、これらのアルゴリズムにおいて、上述のプロシージャは既存のプロシージャを起動させる別のケースである。工程3は、選択されたユニットからデータを他所へ移動させたり、その動作を引き起こす効果を有する任意の類似のアルゴリズムであってよいことに留意されたい。例えば、優先順位付けのためにユニットのガーベージ・コレクションを行なうフラッシュマネージャにおいて、工程3は単に選択されたユニットの優先順位を上げて、次の移動の有力候補にするためだけでもよい。
【0024】
本方法の発生率が低いため、それによるオーバーヘッドは性能に重要な影響を及ぼさない。一方、発生率が低くても、各ユニットについて媒体寿命全期間にわたり数百回発生するならば、以下の理由で十分有効である:
a.媒体寿命全期間にわたりユニットが平均的に数百回適用されるべく選択された場合、全く選択されない確率は非常に低いために無視できる。
b.選択されている静的ユニットは、非静的ユニットになる確率が高い。その理由は、静的領域は1回しか書き込まれないのに対し、非静的領域は何度も書き込まれるため、非静的領域への書き込み回数は静的領域への書き込みよりはるかに多いからである。従って、自由になったユニットが後で非静的データにより満杯になることがあり得る。
c.選択された静的データは、元々非静的であった領域へ移動される確率が高い(自由ユニットはほぼ常に非静的領域に発生し、これの唯一の例外は、現行方法の稀な適用を通して起こることである)。
d.媒体寿命全期間にわたり各ユニットは平均的に数百回選択されるという事実は、各物理ユニットが統計的に、静的および非静的な役割を同じ割合で果たすことが期待できることを意味する。
【0025】
1個のユニットが100,000〜1,000,000回の書き込み/消去に耐え得ると仮定すれば、上述の例のように1000回消去する度に本方法を適用することは、各ユニットが平均的に100〜1000回選択されることになるため、ユニットの寿命全期間にわたり静的/非静的状態を入れ替える効果を発揮する。
【0026】
本方法により静的ユニットだけでなく、全ユニットが選択されることに留意されたい。既にアクティブなユニットを選択しても何ら有害でも有益でもない。既にアクティブなユニットを選択することによるオーバーヘッドは、プロシージャ全体のオーバーヘッドが小さいため問題にならず、媒体内の静的領域を識別するのに必要なオーバーヘッドと履歴管理が軽減される。
【0027】
【発明の利点】
本発明は、必要なシステムリソースを大幅に減少させながらフラッシュ素子内の静的のユニットを含む全ユニットの消耗平準化を向上させる方法を提供する。本方法は単純なアルゴリズムを適用することで動作可能であり、相当な消耗平準化の実行がユーザーにとり明白であって、システムオーバーヘッドへの影響は無視できる程度である。
【0028】
上述した本発明の実施態様は、例示と説明を目的として提示するものである。これが全てを尽くしている訳ではなく、また本発明を開示内容のとおりに限定することは意図していない。上述の開示内容から各種の変更や変形が可能であることに留意されたい。本発明の範囲は上の詳細な説明ではなく、添付の特許請求の範囲により限定されることを意図している。
【図面の簡単な説明】
【図1】本発明の方法の説明図である。[0001]
FIELD OF THE INVENTION
The present invention relates to a method for improving wear leveling of a static area in a flash memory.
[0002]
[Description of Related Technology]
The flash memory is nonvolatile, and can store recorded data without a power supply. Further, the data stored in the flash memory can be changed by a computer program utilizing the erasable and rewritable performance of the flash memory. These basic capabilities have allowed flash arrays to serve as standard storage media in computer systems, ie, flash disks. Various methods for accomplishing this have been described in the art, and such methods are widely used. Examples of such methods include U.S. Pat. No. 5,404,485 to Amir Ban (flash file system) and U.S. Pat. No. 5,937,425 to Amir Ban (optimized for page mode flash technology). Flash File System), both of which are incorporated herein in their entirety. These two patents describe a system and method for managing a flash file system, such as mediating the storage and erasure of data in a unit. However, these patents do not provide a means of wear leveling because they do not distinguish between frequently erased units and rarely erased units.
[0003]
Flash elements are typically divided into several contiguous zones, each of which can be individually erased. Such zones are known in the art by various names, such as units, blocks or sectors, but are referred to herein as units, or erase units, for clarity.
[0004]
A limitation of flash memory technology is that the number of times a unit can be erased is essentially limited by the physical characteristics of the flash cell. Repetitive erasure of a unit consumes cells in the unit and reduces the ability to distinguish between erased and written states, resulting in longer unit erasure times and the ability to write or erase data. Sporadic errors may occur, eventually erasing the unit's erase and write capabilities.
[0005]
The effect of wear is statistical in nature, and the performance of a flash device against wear is described by a flash device vendor using a numerical value called write / erase durability. This value is the minimum or average number of times each flash unit can be erased without causing a serious malfunction. Vendor tolerance counts currently range from tens of thousands to one million.
[0006]
The endurance limit limits the life of the flash disk. Advantageously, the lifetime is as long as possible, but this depends on the access pattern to the flash disk. Frequent repetition of writing to one unit or a small number of units will quickly cause a malfunction, and the useful life of the medium will soon expire. On the other hand, if the writing can be evenly distributed over all units of the medium, each unit can have up to near the maximum number of times that can endure erasure, thereby delaying the occurrence of malfunction as much as possible and maximizing the life of the medium .
[0007]
Flash disk managers are usually given the discretion to determine the physical location where new data is to be written, using their own algorithms, and write data written in a manner designed to ensure that different flash units are erased the same number of times. Take advantage of the fact that it is located. Such a procedure is known in the art as wear leveling. Some managers record the number of times a unit has been erased in a register within that unit, enforcing a scheme that ensures that the variance in the number of erases for each unit does not exceed a given small constant. Others make use of random sampling in the selection of target units, relying on statistics and a large number of laws to ensure that the wear is kept even across the flash media.
[0008]
However, a problem specific to such a wear leveling method is a static region. A static area is a physical location on a flash device that contains data that changes little or little. Such data may consist of operating system code or application / program code, and typically will not change at all or very little once installed. In various uses of flash disks, such data occupies a major portion of flash media.
[0009]
In the wear leveling method, since control is performed when selecting a position where new data is to be written, the wear leveling method does not affect wear occurring in the static area. Since these areas are never written, they cannot be selected. Consumption leveling is effective for active units of flash media, while static units, ie, units in the static area, remain extremely depleted. This significantly shortens the life of the entire flash medium, for example, if the static area occupies half of the medium, since the useful life is reduced by half.
[0010]
In addition, the static domain has various problems, such as:
1. Identification of static areas including pattern tracking of flash disk usage by the unit over time. This is a difficult process that requires control structures and algorithms to support history management.
2. Moving data from a static unit to another location takes time to write the data to a new location and erase the previous location. If this is done frequently, there will be performance overhead that will reduce the throughput of the flash disk.
3. To ensure leveling of wear across the media over time, despite the presence of static areas.
[0011]
As some examples in the art, U.S. Pat. No. 5,341,339 to Wells et al., Which is incorporated herein in its entirety, describes a method for wear leveling in flash EEPROM memory. This significantly extends the life of the flash memory array. The method of the invention by Wells et al. Provides the step of monitoring and then equalizing the switching of different portions of the flash memory array. In accordance with the present invention, these and other objects are achieved by a process for clearing a flash EEPROM memory array that has been divided into separately erasable blocks, wherein all valid data on the selected blocks is selected. Is first written to another block in the array, then the block is erased, and the improvement should be cleared based on a comparison of the number of invalid sectors each block contains and the number of switching operations each block has received Determining a selected block. In this way, the maintenance of the recording reservation unit and the maintenance of the wear leveling are both realized. However, maintaining such a system, including maintaining the erase count of each unit, requires considerable system resources. Further, Wells does not actually deal with static regions. He suggests weighting the erase count during the clear operation. Actually, there is nothing to be cleared in a static area, so this is not limited to setting weights for parameters. Wells omits the essential step of forcing a "clear" for units that do not require clearing but are static.
[0012]
U.S. Patent Nos. 5,388,083, 5,485,595 and 5,479,638 to Assar et al., Which are hereby incorporated by reference in their entirety, provide a flash memory mass storage device for wear leveling. Various applications of the architecture are described. According to these patents, an algorithm is provided so that no part of the mass storage device is erased more often than any other part. This prevents any block of the mass storage device from becoming unusable earlier than other blocks due to malfunction, thereby extending the life of the entire mass storage device.
[0013]
Thus, the counter keeps track of the number of erases for each block. A maximum number of writable times is also provided for the counter. When the erase count of a block reaches one less than the maximum value, the block is erased one last time and another file with the least erase count at that time is written. The block cannot be further erased by setting the erase prohibition flag. After all blocks have reached the maximum count, all erase counters and inhibit flags are cleared and the second algorithm is repeated. In this way, all blocks are not erased significantly more often than any other block. However, like the Wells et al. Invention, the present invention requires significant system resources to maintain a sophisticated monitoring and authorization structure. Further, the present invention eliminates the essential step of forcing a unit that does not need to be cleared but is clear to be static.
[0014]
Thus, the need for an improved wear leveling algorithm that effectively and economically handles static regions to maximize flash media life while minimizing the system is widely recognized, and It is extremely useful to achieve that.
[0015]
Summary of the Invention
According to the present invention, there is provided an improved method of affecting wear leveling in all units of flash media. This is done by providing an algorithm that does not actually keep the static area static, but instead ensures that static data within the area is moved to other physical locations to achieve wear leveling. It becomes possible.
[0016]
The present invention provides the following method:
1. Each time a given multiple write or erase operation is performed by the flash data manager, the wear leveling method of the present invention is started according to the following steps.
2. The units of the medium are periodically selected in a manner of sequentially selecting until all units are finally selected.
3. Move the selected unit data to another free unit and delete the selected unit.
[0017]
The invention will now be described, by way of example only, with reference to the accompanying drawings, in which:
[0018]
DESCRIPTION OF THE PREFERRED EMBODIMENTS
The present invention relates to a method for affecting wear leveling in flash media. This means that in order to achieve wear leveling while minimizing the use of system resources, the static area is not actually left static, but the static data in the area is reliably transferred to other physical areas. This is made possible by providing an algorithm for moving to a target position.
[0019]
The following description is presented to enable any person skilled in the art to make and use the invention according to the particular application and its requirements. Various modifications to the preferred embodiment will be apparent to those skilled in the art, and the general principles defined herein may be applied to other embodiments. Therefore, the present invention is not limited to the specific embodiments illustrated and described, but is to be accorded the widest scope consistent with the disclosed principles and novel features.
[0020]
In particular, the present invention can be used to improve wear leveling of static blocks in a flash memory device.
[0021]
Thus, the present invention provides a solution for wear leveling in static and non-static areas, which is achieved as follows:
i. There is no need to know which areas are static.
ii. Performance degradation is extremely small.
iii. Efficient wear leveling is performed to reduce dispersion of wear between units.
[0022]
The principles and operation of a system and method according to the present invention may be better understood with reference to the drawings and accompanying descriptions. However, the drawings are provided for illustrative purposes only and are not intended to be limiting. As can be seen from the drawing, the method is as follows:
1. Each time the flash data manager performs a certain number of write or erase operations at least once, the wear data leveling method 12 of the present invention is performed based on the following steps. For example, it may be performed once per 1000 unit erase operations as follows:
a. The writing or erasing operation is counted (10) and activated when the count reaches a multiple of a given number such as 1000.
b. For each write or erase operation, a random process with a given probability of success, such as 1/1000, is generated (11) and the wear leveling method is subsequently invoked.
2. Units in the medium are selected in a manner of sequentially selecting until all units are finally selected (15). The selection is one of the following methods.
a. Set a specific selection order (13), for example, units are selected from first to last in physical order, so that the selected unit follows the previously selected unit unless the preceding unit is the last one, In that case, the next selected unit will be in the first physical order.
b. Units are selected by a random process (14) to equalize the probability of each unit being selected.
3. The data of the selected unit is moved to another free unit (16), and the selected unit is deleted.
[0023]
In many flash management algorithms, step 3 involves a garbage collection algorithm (see US Pat. Nos. 5,404,485, 5,937,425, and 5,341,339). In these algorithms, the above-described procedure is another case of invoking an existing procedure, as it already exists as part of the existing procedure. Note that step 3 may be any similar algorithm that has the effect of moving data from the selected unit to another location or causing its operation. For example, in a flash manager performing garbage collection of units for prioritization, step 3 may simply be to increase the priority of the selected unit and make it a likely candidate for the next move.
[0024]
Because of the low incidence of the method, the overhead does not have a significant effect on performance. On the other hand, even if the occurrence rate is low, if it occurs several hundred times for the entire medium life of each unit, it is sufficiently effective for the following reasons:
a. If a unit is selected to be applied hundreds of times on average over the entire media life, the probability of not being selected at all is very low and can be ignored.
b. The selected static unit has a high probability of becoming a non-static unit. The reason is that the static area is written only once, whereas the non-static area is written many times, so the number of times of writing to the non-static area is much larger than that of writing to the static area. It is. Thus, a freed unit may later be filled with non-static data.
c. The selected static data is more likely to be moved to an area that was originally non-static (free units almost always occur in non-static areas; the only exception to this is the rare application of current methods. What happens through.)
d. The fact that each unit is selected hundreds of times on average over the life of the media means that each physical unit can be expected to play a static and non-static role in the same proportion, statistically.
[0025]
Assuming that one unit can withstand 100,000 to 1,000,000 write / erase operations, applying this method every 1000 erase operations as in the above example means that each unit is Since the selection is made 100 to 1000 times on average, the effect of switching the static / non-static state over the entire life of the unit is exhibited.
[0026]
Note that the method selects all units, not just static units. Selecting a unit that is already active is neither harmful nor beneficial. The overhead of selecting an already active unit is not a problem due to the small overhead of the entire procedure, and reduces the overhead and history management required to identify static areas in the media.
[0027]
Advantages of the invention
The present invention provides a method for improving wear leveling of all units, including static units in flash devices, while significantly reducing the required system resources. The method can be operated by applying a simple algorithm, the performance of considerable wear leveling is obvious to the user and the effect on system overhead is negligible.
[0028]
The above-described embodiments of the present invention have been presented for purposes of illustration and description. This is not exhaustive and is not intended to limit the invention as disclosed. It should be noted that various changes and modifications are possible from the above disclosure. It is intended that the scope of the invention be limited not by the above detailed description, but rather by the claims appended hereto.
[Brief description of the drawings]
FIG. 1 is an illustration of the method of the present invention.
Claims (7)
i.フラッシュデータ・マネージャによる特定回数の動作につき少なくとも1回、前記消耗平準化方法を起動する工程と、
ii.最終的に全ユニットが選択されるまで順次選択する仕方で、前記媒体内のユニットを選択する工程と、
iii.前記選択されたユニットのデータを前記媒体から前記媒体内の自由ユニットへ移動させて、前記選択されたユニットを消去する工程と
を含む方法。A method of leveling wear in a flash storage medium, comprising:
i. Activating the wear leveling method at least once for a specified number of operations by a flash data manager;
ii. Selecting units in the medium in a manner of sequentially selecting until all units are finally selected;
iii. Moving the data of the selected unit from the medium to a free unit in the medium to erase the selected unit.
a.消去動作回数をカウントして、前記カウントが所与の回数の倍数になった時点を判定する工程と、
b.書き込み動作回数をカウントして、前記カウントが所与の回数の倍数になった時点を判定する工程と、
c.所与の成功確率に基づいて、各消去動作に対するランダムプロセスを生成する工程と、
d.所与の成功確率に基づいて、各書き込み動作に対するランダムプロセスを生成する工程と
からなる群から選択された一つの方法で生成される、請求項1に記載の方法。The specific number of times is
a. Counting the number of erase operations to determine when the count is a multiple of a given number;
b. Counting the number of write operations to determine when the count is a multiple of a given number;
c. Generating a random process for each erase operation based on a given probability of success;
d. Generating a random process for each write operation based on a given probability of success.
i.特定の選択順序を設定する工程と、
ii.選択対象の各ユニットに対して等しい確率が与えられるように、ランダムプロセスによりユニットを選択する工程と
からなる群から選択された仕方で行なわれる、請求項1に記載の方法。The step of selecting the unit,
i. Setting a specific selection order;
ii. 2. The method of claim 1, wherein the method is performed in a manner selected from the group consisting of: selecting units by a random process such that equal probability is provided for each unit to be selected.
i.データを保存するフラッシュ記憶媒体と、
ii.前記フラッシュ記憶媒体内のどの消去ユニットも、前記フラッシュ記憶媒体の寿命の大半にわたり静的なままではないことを保証する、コンピュータにより実行可能なコードと
を含む機構。A mechanism for ensuring that no erase unit in the flash storage medium remains static for most of the life of the flash storage medium containing it,
i. A flash storage medium for storing data,
ii. Computer-executable code for ensuring that no erase unit in the flash storage medium remains static for most of the life of the flash storage medium.
i.データを保存するフラッシュ記憶媒体と、
ii.前記フラッシュ記憶媒体内のすべての消去ユニットが、前記フラッシュ記憶媒体の寿命の大半にわたり少なくとも1回の消去動作を受けることを保証する、コンピュータにより実行可能なコードと
を含む機構。A mechanism for ensuring that all erase units in a flash storage medium undergo at least one erase operation during a majority of the life of the flash storage medium including the flash unit,
i. A flash storage medium for storing data,
ii. Computer-executable code for ensuring that all erase units in the flash storage medium undergo at least one erase operation for a majority of the life of the flash storage medium.
Applications Claiming Priority (2)
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US09/870,315 US6732221B2 (en) | 2001-06-01 | 2001-06-01 | Wear leveling of static areas in flash memory |
PCT/US2002/015238 WO2002099646A1 (en) | 2001-06-01 | 2002-05-15 | Wear leveling of static areas in flash memory |
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JP2003502693A Pending JP2004522230A (en) | 2001-06-01 | 2002-05-15 | Consumption leveling of static area in flash memory |
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US (1) | US6732221B2 (en) |
JP (1) | JP2004522230A (en) |
KR (1) | KR20030020435A (en) |
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- 2002-05-15 JP JP2003502693A patent/JP2004522230A/en active Pending
- 2002-05-15 KR KR10-2003-7001529A patent/KR20030020435A/en not_active Application Discontinuation
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Also Published As
Publication number | Publication date |
---|---|
US6732221B2 (en) | 2004-05-04 |
KR20030020435A (en) | 2003-03-08 |
IL155186A0 (en) | 2003-11-23 |
TWI264007B (en) | 2006-10-11 |
WO2002099646A1 (en) | 2002-12-12 |
TW200406769A (en) | 2004-05-01 |
US20020184432A1 (en) | 2002-12-05 |
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