JP2004299018A - SUPER-SMOOTH CRYSTAL FACE FORMING METHOD BY POLISHING OF SiC SINGLE CRYSTAL SUBSTRATE OR THE LIKE - Google Patents

SUPER-SMOOTH CRYSTAL FACE FORMING METHOD BY POLISHING OF SiC SINGLE CRYSTAL SUBSTRATE OR THE LIKE Download PDF

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JP2004299018A
JP2004299018A JP2003097341A JP2003097341A JP2004299018A JP 2004299018 A JP2004299018 A JP 2004299018A JP 2003097341 A JP2003097341 A JP 2003097341A JP 2003097341 A JP2003097341 A JP 2003097341A JP 2004299018 A JP2004299018 A JP 2004299018A
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polishing
single crystal
smooth
ultra
crystal substrate
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Osamu Etatsu
修 江龍
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Japan Science and Technology Agency
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Japan Science and Technology Agency
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  • Grinding-Machine Dressing And Accessory Apparatuses (AREA)
  • Grinding And Polishing Of Tertiary Curved Surfaces And Surfaces With Complex Shapes (AREA)
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Abstract

<P>PROBLEM TO BE SOLVED: To solve the problem that the characteristic required in the device forming on the surface or growth of a single crystal film can not be obtained because the crystal surface is not obtained, in the material where the crystal surface cannot sufficiently be obtained by the thermal, chemical and mechanical surface treatment. <P>SOLUTION: In this super-smooth crystal face forming method for a single crystal substrate, a single crystal substrate consisting of SiC, nitrides and oxides of group III or a dielectric body to be polished derivative with a rotary buff polishing method or an ultrasonic vibration polishing method, by using an alkaline aqueous polishing liquid adjusted to pH7 to 10, containing 5 to 40 wt.% of colloidal silica to water to peel off the defective layer whose crystallinity of the surface part is not single crystal, to form a super smooth crystal face consisting of the interface of a crystalline part and a defective layer part. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

【0001】
【発明の属する技術分野】
本発明は、化学研磨や機械研磨が困難な硬質な単結晶材料を研磨して超平滑結晶面を形成する方法に関する。
【0002】
【従来の技術】
半導体ウエハは、通常、円柱状の半導体単結晶ブロックをダイヤモンドソーなどにより所定の厚みのウエハに切り出して作製されているが、切断加工面には、マイクロクラックや転位などを含む加工変質層が発生するので、(1)面取り、(2)両面ラッピング、(3)化学研磨、(4)ポリッシング、(5)洗浄などの一連の仕上げ加工を行い、ウエハ表面の加工変質層や凹凸を無くして平坦度の高い鏡面を形成している。また、半導体基板表面の絶縁性酸化被膜や金属膜の除去のためにもポリッシングが行われる。
【0003】
SiやII−VI族化合物半導体結晶材料、SiOなどの絶縁性酸化被膜では、このポリッシング工程としては、コロイダルシリカを分散したアルカリ性水性研磨スラリーを回転式片面研磨装置などの研磨パッドと被加工物との間に供給しながら化学機械研磨(CMP)する方法がよく知られている(特許文献1〜6)。
【0004】
しかし、SiCはSiよりも遥かに化学的に安定で非反応性物質であり、ダイヤモンドに次ぐ硬質材料であり、Si結晶基板などと同様なコロイダルシリカを用いたCMP法による研磨は困難であり、例えば、ダイヤモンド砥粒を用いて研磨する方法が採用されてきた(特許文献7、8)。また、硬質材料であるGaNに代表されるIII族窒化物も同様にダイヤモンド砥粒を用いる研磨法が好ましいとされてきた(特許文献9)。
【0005】
SiC単結晶表面の加工変質層などの残留欠陥を除去するために、化学機械的方法に代えて、プラズマを用いた化学的気化加工方法も開発されている(特許文献10)。この特許文献10には、SiC単結晶ウエハ表面の残留欠陥を除去する従来の方法の例として、水酸化カリウムのような高温の溶融塩を用いた液体エッチング法、高濃度水酸化カリウム水溶液やクロム酸又はシュウ酸を電解質とする陽極エッチング法、表面を酸化し、続いてこの酸化部分を除去する方法が例示されている。その他に、SiC結晶基板の平坦化法としては、酸化クロムを遊離砥粒として用いるメカノケミカルポリッシング法(特許文献11、12)も開発されている。
【0006】
【特許文献1】
特公平7−12590号公
【特許文献2】
特開平10−308379号公報
【特許文献3】
特開平11−31675号公報
【特許文献4】
特許第3099002号公報
【特許文献5】
特開2001−7063号公報
【特許文献6】
特開2001−9078号公報
【特許文献7】
特開平8−323604号公報
【特許文献8】
特開平11−188610号公報
【特許文献9】
特開2001−322899号公報
【特許文献10】
特表平5−500883(特許第2771697)号公報
【特許文献11】
特開平7−80770号公報
【特許文献12】
特開2001−205555号公報
【0007】
【発明が解決しようとする課題】
半導体デバイスは、バルク基板上に成長させたエピタキシャル薄膜上に形成されることが多くなってきている。超LSIでは、より高精度に制御された電気的活性元素を取りこんだ層を必要としているためである。現在求められている、電子デバイス動作の低電圧化と高速化のためには、電気的活性元素の制御と共に、荷電担体(キャリア)から見た結晶構造の均一化が必要となる。また、デバイスとして利用する部分は、表面から数百ナノメートル以下の領域であることから、表面近傍の結晶構造の制御は、デバイス特性を左右するキーポイントとなっている。
【0008】
エピタキシャル膜は高度に平坦化された基板面上に作製される。平坦化は結晶低指数面上に行われる場合と、格子面成長を促進させるために、数度のオフ角度を作った面上に行われる場合がある。何れの場合においても、研磨の不均一さはエピタキシャル成長界面における局所的な酸化領域や結晶構造の乱れを生む。これらの場所からミクロな欠陥がエピタキシャル膜中に成長し、キャリア移動度の低下、空間電荷によるデバイス高速動作の阻害が問題となる。
【0009】
また、デバイス形成の後、デバイス動作中にこれらの点から欠陥が成長しデバイスを破壊することも問題となって来ている。1つのデバイスが占める基板上の面積の微小化が、従来、許されて来た原子ステップ単位の欠陥が、「電子的欠陥」として現れて来ている。
【0010】
SiC半導体デバイス作製プロセスのSi半導体デバイス作製プロセスとの大きな違いは、エピタキシャル成長やイオン注入プロセス温度が1500℃を超え、最表面の原子移動が発生し始める温度であることにある。原子移動はミクロな格子歪み、凹凸等から発生し、ステップバンチングと呼ばれる階段状に再結晶成長した凹凸面を発生させる。また、キャリア移動度の結晶方位依存性が大きい、エピタキシャル成長様式の結晶方位依存性が大きいことから、様々な結晶面を得ることが必要となっていることも上げられる。
【0011】
さらに、SiC半導体は、SiとCの原子半径が大きく異なる2種類の元素からなる化合物であり、Cクラスター等が表面近傍に成長し、電子的準位を作り、MOSデバイス動作速度を低速化させるなど、物性面からの問題が生じている。また、SiC半導体では期待されているデバイス動作温度が500℃前後かそれ以上の温度であること、逆耐圧が数千ボルトの高い電圧であり、順方向電流も数百アンペア/□である等、動作時に欠陥が発生しやすい環境で用いられる。これらのことから、SiC半導体基板は平坦であることは勿論であるが、結晶欠陥が少ないことが要求される。
【0012】
上記の従来の技術に記載したようなダイヤモンド等の硬質砥粒によるSiC半導体表面の原子半径レベルの平坦化の為の研磨法では、研磨面の表層近傍の結晶構造は研磨ストレスにより破壊もしくは結晶性に乱れを生じ、結晶性ではない層が形成される。また、硬質砥粒による研磨においては、研磨中に10nmを越える深さの切削痕が発生し、その周りには結晶性ではない層が発生する。
【0013】
結晶性ではない層を除去する化学的手法として酸化クロム、酸化チタンなどの化学触媒研磨法においても同様であり、且つ、これらの化学的手法においては研磨材による金属元素が研磨面に化学的に結合し残留するため、表面金属汚染が生じる。
【0014】
このように、熱的、化学的、機械的な表面処理により結晶性表面を得ることが十分にできないSiC、III族窒化物半導体単結晶や、チタン酸バリウム、ニオブ酸バリウム、二酸化テルル、モリブデン酸鉛のような光学材料用酸化物単結晶、又は誘電体セラミックスなどの単結晶基板は、研磨することによって、結晶性表面が得られないために、その面上へのデバイス形成、その面上への単結晶膜成長において求める所望の特性が得られなかった。
【0015】
本発明は、単結晶基板に対し、研磨加工の利用によって最表面層まで単結晶性の電気的にも問題のない表面を得ることができ、さらに、表面凹凸がWyko法(光学式表面形状粗さ測定装置)及びAFM法で測定して1nm以下であることを可能とする表面処理方法を提供することを目的としている。
【0016】
さらには、エピタキシャル膜の最表面近傍の結晶性について問題が発生して来ている。エピタキシャル成長膜を「研磨」することはこれまでは考えられて来なかった。これは、研磨行為による汚染に対する意識もあったと思われるが、主に、エピタキシャル膜は結晶性に優れているという思い込みがあることに起因すると思われる。
【0017】
表面を作るエピタキシャル成長終了期では、原子供給が乱れるため、数層の構造乱れを生じさせる。AFM等、最表面の平坦さだけに着目する評価では、確かに原子一層程度の凹凸しかない平坦度が得られている。しかし、結晶構造を評価すると、数層が非晶質化しているエピタキシャル膜もある。AFM等、単に平坦度だけを調べるだけでは、電子デバイス基板の表面検査法としては不充分である。このような問題は、僅かな格子歪みが、結晶表面を利用するMOSトランジスタ構造において、特性に影響が出てくる程にデバイスが微細化してきていることから顕著になってきた。
【0018】
そこで、数層の格子配列を評価することに加えて、ショットキー電極を作製し、その特性を評価することも重要である。デバイスサイズがエピタキシャル膜の表面構造を無視出来なくなってきている現在、平坦度評価に加え、表面数層単位の結晶構造評価、電子的欠陥評価を「表面微細加工」の評価として行い、これらの評価の高いエピタキシャル膜が求められる。
【0019】
【課題を解決するための手段】
本発明者は、硬質材料の研磨に従来使用されているダイヤモンドや炭化珪素粉末などの硬質砥粒や化学的触媒材料を用いないで、コロイダルシリカとアルカリ液の相乗的作用を利用することによりこれまで研磨が非常に困難とされてきたSiC又はIII族窒化物単結晶基板の表面部の結晶性が単結晶ではない欠陥層を効率的に剥離して超平滑結晶面を形成できることを見出した。
また、この方法を酸化物、又は誘電体からなる単結晶基板の表面部の欠陥層の除去や単結晶基板上に形成したSiC、III族窒化物、酸化物、又は誘電体からなるエピタキシャル膜の表面部の欠陥層の除去にも適用できることを見出した。
【0020】
すなわち、本発明は、(1)水に対してコロイダルシリカを5〜40重量%含有し、pHを7〜10に調整したアルカリ水性研磨液を用いて、回転バフ研磨法又は超音波振動研磨法によりSiC、III族窒化物、酸化物、又は誘電体からなる単結晶基板を研磨することにより表面部分の結晶性が単結晶ではない欠陥層を剥離して結晶性部分と欠陥層部分との境界面からなる超平滑面を形成することを特徴とする単結晶基板の超平滑結晶面形成方法、である。
また、本発明は、(2)結晶性が単結晶ではない欠陥層は、単結晶基板に既存の層、単結晶基板の前段粗研磨時に生じた層、又は500℃を越える高温度プロセス歪みにより単結晶基板に生じた層であることを特徴とする上記(1)の単結晶基板の超平滑結晶面形成方法、である。
また、本発明は、(3)結晶性が単結晶ではない欠陥層は、半導体単結晶基板にイオン注入によって導入された100nmレベルの深さの層であり、欠陥層の除去により表面に100nmレベルの凹凸構造を選択的に作製することを特徴とする上記(1)の単結晶基板の超平滑結晶面形成方法、である。
【0021】
さらに、本発明は、(4)水に対してコロイダルシリカを5〜40重量%含有し、pHを7〜10に調整したアルカリ水性研磨液を用いて、回転バフ研磨法又は超音波振動研磨法により単結晶基板上に形成されたSiC、III族窒化物、酸化物、又は誘電体からなるエピタキシャル膜を研磨することにより表面部分の結晶性が単結晶ではない欠陥層を剥離して結晶性部分と欠陥層部分との境界面からなる超平滑面を形成することを特徴とするエピタキシャル膜の超平滑結晶面形成方法。
また、本発明は、(5)該アルカリ水性研磨液は、欠陥層の研磨による除去速度が結晶性部分の研磨による除去速度より少なくとも10倍以上速い研磨能力を有することを特徴とする上記(1)ないし(4)の超平滑結晶面形成方法、である。
また、本発明は、(6)研磨面を大気に触れない状態で研磨加工することを特徴とする上記(1)ないし(5)のいずれかの超平滑結晶面形成方法、である。
また、本発明は、(7)超平滑面がWyko法(光学式表面形状粗さ測定装置)及びAFM法で測定して凹凸1nm以下であることを特徴とする上記(1)ないし(6)のいずれかの超平滑結晶面形成方法、である。
【0022】
【作用】
SiCはダイヤモンドの次に硬いと言われる材料であり、SiとCの結合が極めて強いが、結晶性が単結晶ではない欠陥層には結合の手が切れている部分がある。本発明のアルカリ水性研磨液を使用すると、研磨液に分散したコロイダルシリカのシリカ微粒子がその欠陥領域がある部分を選択的にアタックし、シリカの酸素原子と結合の手が切れた炭素原子が化学的に結合し、気化脱離し、その後、残留シリコンがコロイダルシリカに固溶し脱離するという反応が繰り返されるものと推察される。
【0023】
このような反応を効率よく促進させるには、アルカリ水性研磨液は水に対してコロイダルシリカを約5〜40重量%含有することが望ましい。コロイダルシリカの含有量が約5重量%未満では、研磨出来ず、また、約40重量%を超えるとコロイダルシリカが凝集して粒径が大きくなり、研磨面に傷が入るので好ましくない。より好ましくは、約5〜15重量%である。コロイダルシリカの平均粒径は0.5μm以下、より好ましくは0.1μm以下である。粒径が0.5μmより大きくなると研磨面が荒れてしまう。
【0024】
アルカリ水性研磨液中のNaOHやKOHは、結晶性が単結晶ではない欠陥層をエッチングする作用をする。欠陥領域がある部分をコロイダルシリカは選択的に研磨するが、NaOHやKOHの場合、それに加えて、単結晶部分も速度は遅いがエッチングにより削り取ってしまう。この作用は、NaOHの方がKOHより強いので、KOHの方が望ましい。NaOHやKOH濃度が高い場合には単結晶領域で研磨が終端されることなく、次から次へと研磨が進み、単結晶部分も削り込むのでpHは10以下に調整する必要がある。
【0025】
コロイダルシリカとアルカリ液をこのような条件とすることにより両者の相乗的な作用により、欠陥層の研磨による除去速度を結晶性部分の研磨による除去速度より少なくとも10倍以上速くすることができる。このように、アルカリ度合いが少ない場合、結晶欠陥を積極的に除去している間は、100nm〜300nm/10分程度と速いが、単結晶部分に当たった時点で研磨速度が急速に1/100〜1/10程度に落ちるので、結晶性を維持し、平滑面を得るには好都合である。
【0026】
したがって、サンプルで予め研磨時間を厳密に決めておかなくても、結晶質面が出てくると、ゆっくりとした研磨に変化する。よって、欠陥層と結晶層との明確な境界面で研磨が停止するため、欠陥層のみを選択的に剥離出来ることになり、また、結晶層と欠陥層の境界面の凹凸は数ナノメートルオーダーであり、数十ナノオーダーに広がっていることはないので、この境界面の研磨により数ナノメートルオーダーの超平滑面が得られる。
【0027】
GaNなどのIII族窒化物からなる半導体単結晶の場合やチタン酸バリウム、ニオブ酸バリウム、二酸化テルル、モリブデン酸鉛のような光学材料用酸化物単結晶、又は誘電体セラミックスなどの単結晶材料も本発明の研磨液を使用すると欠陥層の研磨速度が極めて大きく、欠陥層の領域のみが研磨され、SiCの研磨と同様の効果が得られる。
【0028】
また、イオン注入等、積極的に凹凸を持つ欠陥層を導入出来る手法によって100nmレベルの深さの欠陥層を導入した後に、欠陥層の除去により表面に100nmレベルの凹凸構造を選択的に作製したとしても、欠陥層と結晶層との境界面は、本手法によって数ナノメートル以下の凹凸性をもつ超平滑面を作ることが出来る。
【0029】
【発明の実施の形態】
本発明の方法により、半導体単結晶基板を回転バフ研磨法により研磨する場合の一例を図1及び図2に基づいて説明する。図1(A)は、半導体単結晶の固定治具に半導体単結晶を接着固定した状態を示す断面図、図1(B)はその下面図である。また、図2は、研磨時のコロイダルシリカ分散アルカリ水溶液と研磨に用いる治具、研磨台、研磨布との配置関係を示す断面図である。
【0030】
研磨対象の半導体単結晶1は固定治具2の下端の円板3の下面に接着剤を用いて適宜間隔で均等に配置して接着固定する。半導体単結晶1の研磨面が常に水平を保つように、水平研磨治具4の垂直貫通孔に該固定治具2を支持し、該固定治具2と水平研磨治具4は互いに滑らかに回転しあうようにする。該固定治具2及び水平研磨治具4は金属あるいはセラミクス製とする。
【0031】
水平研磨治具4の端部下面の数箇所には非金属材料5、例えば、半導体単結晶1と同じ種類の結晶性基板又はSi基板を接着する。非金属材料5の代わりに金属材料を用いると、金属原子とコロイダルシリカとが圧力下にある場合、金属イオンを取り込みながらシリカ粒子が凝集し、堅い大型の粒子となり、この粒子は半導体単結晶の結晶面までも削り取るので不適当である。
【0032】
コロイダルシリカ分散アルカリ水性研磨液6は回転研磨台7の縁8により回転研磨台7上に溜められる。半導体単結晶1は常にコロイダルシリカ分散アルカリ水性研磨液に浸っているようにすると、空気と半導体単結晶1が接触することはなく、研磨面で大気からの酸素の取り込みを抑えることになるので好ましい。研磨面が大気に触れるとコロイダルシリカが研磨面に凝集し、シリカの粒径が大きくなってしまう。したがって、アルゴンガス等、不活性ガス雰囲気としてもよい。
【0033】
回転研磨台7の上には研磨バフ9を配置し、該研磨バフ9で半導体単結晶1の表面を回転研磨する。研磨バフ9としては、ウレタン発泡体、ポリエステル繊維不織布、人工皮革、ポリエステル繊維不織布とポリウレタン発泡体積層構造などを用いることができる。研磨バフを用いた回転研磨法により、好ましくは、研磨面圧力を約1.4kg/cm以下とし、研磨面の相対摺動速度を約1m/分以下として研磨加工する。
【0034】
水平研磨治具4の端部下面の数箇所に接着した基板5は、研磨バフにタッチするが、該部分を金属でなく半導体単結晶1と同じ種類の結晶性基板又はSi基板にしたのは、金属であるとそれが研磨されて、金属粒子が生成し、それを核にしてシリカが凝集しシリカ砥粒が巨大化するのを防ぐためである。このような凝集シリカは極めて硬く、研磨面に瑕(結晶格子を壊す)を入れるため、これを防ぐことが重要である。
【0035】
以上、具体例として研磨バフを用いた回転研磨法について説明したが、本発明の方法は、上記の特定のアルカリ水性研磨液を用いて被研磨面がコロイダルシリカとアルカリ液の相乗的な研磨作用を受ける態様であればよく、バフの代わりに硬質プレートを用いる方法、超音波振動研磨法などでも同様の効果が得られる。
【0036】
【実施例】
実施例1
0.1μm粒径のコロイダルシリカをイオン交換純水に50重量%添加した研磨剤原液(株式会社 フジミインコーポレーテッド社調合)を、イオン交換純水にてコロイダルシリカ重量%を30重量%に希釈し、KOHでpH8の研磨液を調製した。図1、図2に示すような研磨装置を用いて、 (0001)面、(1120)面、(1100)面で切り出され、#400〜#3000のシリコンカーバイド、1ミクロン粒径のアルミナ、0.5ミクロン粒径のダイヤモンド研磨材でラッピングされた1cm角、厚さ0.3mmのSiC単結晶を研磨した。
【0037】
ジュラルミン定盤を用い、研磨バフはポバール興業株式会社製ポリウレタンパッドTD87を使用した。研磨液の温度は50℃未満に保った。研磨液の深さは8mm。研磨圧力は1.4kg/cm、研磨定盤の回転速度は80cm/s。SiCの研磨面は(0001)面で、研磨時間は10分とした。この条件で100nmの厚さの非晶質SiC層を研磨により剥離した。この時の表面の平滑度はRMS値で0.6nmであった。
【0038】
実施例2
0.1μm粒径のコロイダルシリカをイオン交換純水に50重量%添加した研磨剤原液(株式会社 フジミインコーポレーテッド社調合)を、イオン交換純水にてコロイダルシリカ重量%を20重量%に希釈し、KOHでpH8の研磨液を調製した。図1、図2に示すような研磨装置を用いて、 サファイア上に成長させた3μm厚さの(0001)面GaN表面を研磨した。
【0039】
ジュラルミン定盤を用い、研磨バフはポバール興業株式会社製ポリウレタンパッドTD87を使用した。研磨液の温度は50℃未満に保った。研磨液の深さは8mm。研磨圧力は0.6kg/cm、研磨定盤回転速度は50cm/sとした。この条件でRMS値で3nmの研磨前の表面が研磨後2nmとなった。
【0040】
研磨加工後のSiC半導体単結晶表面のAFM像
図3に、コロイダルシリカ研磨後の4H−SiC結晶性基板の表面AFM像を示す。約0.8nmのステップが多数観測されている。これは、4H−SiC単結晶の格子定数と等しく、単結晶性表面が得られていることを示している。また、結晶格子ステップが観測されていない領域はAFM装置の分解能を超えた平坦性を示している。
【0041】
研磨加工後のSiC半導体単結晶表面のCAICISS(CoAxial Impact Collision Ion Scattering Spectrometer)測定結果
図4に、コロイダルシリカ研磨後にフッ化水素酸(HF)で洗浄後の6H−SiC結晶性基板の表面をCAICISS(直衝突イオン散乱法)を用いて結晶構造を評価した結果を示す。イオンビームを表面から14度の角度で入射し、表面から3層の原子層の構造を評価している。既知のSiCの結晶構造から図4のシグナルを解析すると、SiC単結晶の再表面にSi原子が√3X√3構造で配列していることが明らかとなった。
【0042】
すなわち、本発明の方法により研磨したSiC半導体基板は、最表面まで結晶性であることが解った。図4において、1インチ基板のinnerで中心部の結晶性を、outerで外周部の結晶性を評価している。outerはinnerに比べてピークが低くブロードである。これは、研磨によるものではなく、市販の結晶性基板の品質に依存している。
【0043】
さらに、表面層から結晶構造が保たれていること、研磨後の最表面には荒削り時の亜鉛定盤からの亜鉛元素の吸着等は無いことが明らかとなった。CAICISS測定をダイヤモンド研磨の後に行っているが、ダイヤモンド研磨後では図1で示すような最表面の結晶構造の周期性によるΗe原子の散乱強度の変化は全く観測されなくなる。コロイダルシリカ研磨は損傷層を導入すること無く、ダイヤモンド研磨によって生じる数十ナノメートルの損傷層を取り除くことが可能であることが解った。
【0044】
研磨加工後のSiC半導体単結晶表面に形成した金属−半導体接触の電気的評価
研磨加工を行ったn型SiC表面(Si面)と裏面にNiを堆積させ電極を形成した。裏面はパルスレーザー照射を行いオーミック電極とした。図5に、研磨面ショットキー電極の電流−電圧特性を示す。ショットキー電極の電流Iと電圧Vとの関係は、q,κ,T,Aを各々素電荷量、ボルツマン定数、絶対温度、リチャードソン定数とすると、I=AexpqV/nκTと表される。
【0045】
研磨面をフッ化水素で洗浄を行った後、金属を堆積させショットキーデバイスを作製すると、その理想因子で定数n(図5の順方向電圧に対する電流の傾き)=1.1以下の値が得られた。この値は金属−半導体界面状態、即ち、電極堆積面の状態に極めて敏感に変化する。金属一半導体間の電流の輸送が理想的に行われるならば、定数nは1となる。欠陥がある場合には1.2以上の値になる。図5で、実線及び波線で示した電極は、同一の研磨面上に作製した電極の特性である。
【0046】
【発明の効果】
本発明の方法によれば、半導体単結晶基板に対し、研磨加工の利用にによって最表面層まで単結晶性の電気的にも問題のない表面を得ることができ、さらに、表面凹凸がWyko法(光学式表面形状粗さ測定装置)及びAFM法で測定して1nm以下である超平滑面を形成することができる。
【図面の簡単な説明】
【図1】図1は、本発明の方法を実施する際の研磨に用いる治具と研磨対象の半導体単結晶基板との関係を一例として示す断面図(A)及び下面図(B)である。
【図2】図2は、研磨時のコロイダルシリカ分散アルカリ水性研磨液と研磨に用いる治具、研磨台、研磨布との配置関係を示す断面図である。
【図3】図3は、実施例1における研磨後のSiC半導体単結晶表面のAFM像を示す図面代用写真である。
【図4】図4は、実施例1における研磨後のSiC半導体単結晶表面のCAICISS測定結果を示すグラフである。
【図5】図5は、実施例1における研磨後のSiC半導体単結晶表面に形成した金属電極のショットキー特性を示すグラフである。
[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a method for forming an ultra-smooth crystal face by polishing a hard single crystal material that is difficult to perform chemical polishing or mechanical polishing.
[0002]
[Prior art]
A semiconductor wafer is usually manufactured by cutting a columnar semiconductor single crystal block into a wafer of a predetermined thickness using a diamond saw or the like, but a damaged layer including micro cracks and dislocations is generated on the cut surface. Therefore, a series of finishing processes such as (1) chamfering, (2) double-sided lapping, (3) chemical polishing, (4) polishing, (5) cleaning, etc., are performed, and a flattened surface is formed without a damaged layer or unevenness on the wafer surface. A high degree mirror surface is formed. Polishing is also performed to remove the insulating oxide film and the metal film on the surface of the semiconductor substrate.
[0003]
In the case of an insulating oxide film such as Si or a II-VI compound semiconductor crystal material, SiO 2 or the like, as the polishing step, an alkaline aqueous polishing slurry in which colloidal silica is dispersed is applied to a polishing pad such as a rotary single-side polishing apparatus and a workpiece. And a method of performing chemical mechanical polishing (CMP) while supplying between them (Patent Documents 1 to 6).
[0004]
However, SiC is a chemically stable and non-reactive substance far more chemically than Si, is a hard material next to diamond, and is difficult to polish by a CMP method using colloidal silica similar to a Si crystal substrate. For example, a method of polishing using diamond abrasive grains has been adopted (Patent Documents 7 and 8). In addition, a group III nitride represented by GaN, which is a hard material, has also been preferably polished using diamond abrasive grains (Patent Document 9).
[0005]
Instead of the chemical mechanical method, a chemical vaporization method using plasma has been developed in order to remove a residual defect such as a work-affected layer on the surface of a SiC single crystal (Patent Document 10). Patent Document 10 discloses, as examples of a conventional method for removing residual defects on the surface of a SiC single crystal wafer, a liquid etching method using a high-temperature molten salt such as potassium hydroxide, a high-concentration potassium hydroxide aqueous solution and chromium. An anodic etching method using an acid or oxalic acid as an electrolyte and a method of oxidizing the surface and subsequently removing the oxidized portion are exemplified. In addition, as a method for planarizing a SiC crystal substrate, a mechanochemical polishing method using chromium oxide as free abrasive grains has been developed (Patent Documents 11 and 12).
[0006]
[Patent Document 1]
Japanese Patent Publication No. Hei 7-12590 [Patent Document 2]
JP-A-10-308379 [Patent Document 3]
JP-A-11-31675 [Patent Document 4]
Japanese Patent No. 3099002 [Patent Document 5]
JP 2001-7063 A [Patent Document 6]
JP 2001-9078 A [Patent Document 7]
JP-A-8-323604 [Patent Document 8]
JP-A-11-188610 [Patent Document 9]
JP 2001-322899 A [Patent Document 10]
Japanese Unexamined Patent Publication No. 5-500883 (Patent No. 2771697) [Patent Document 11]
JP-A-7-80770 [Patent Document 12]
JP 2001-205555 A
[Problems to be solved by the invention]
Semiconductor devices are often formed on epitaxial thin films grown on bulk substrates. This is because the VLSI requires a layer that incorporates an electrically active element that is controlled with higher precision. In order to lower the voltage and increase the speed of the operation of electronic devices, which are required at present, it is necessary to control the electrically active elements and to make the crystal structure uniform from the viewpoint of the charge carrier. In addition, since the portion used as a device is a region of several hundred nanometers or less from the surface, control of the crystal structure near the surface is a key point that affects device characteristics.
[0008]
Epitaxial films are fabricated on highly planarized substrate surfaces. The flattening may be performed on a crystal low index plane or on a plane having an off angle of several degrees in order to promote lattice plane growth. In any case, non-uniform polishing results in local oxidized regions and disordered crystal structure at the epitaxial growth interface. From these locations, microscopic defects grow in the epitaxial film, which causes problems such as a decrease in carrier mobility and a hindrance to high-speed device operation due to space charge.
[0009]
In addition, after the device is formed, a defect grows from these points during device operation and the device is destroyed. The miniaturization of the area on a substrate occupied by one device has been permitted, and a defect per atomic step, which has been conventionally allowed, has appeared as an “electronic defect”.
[0010]
The major difference between the SiC semiconductor device fabrication process and the Si semiconductor device fabrication process is that the temperature of the epitaxial growth or ion implantation process exceeds 1500 ° C., and the atom transfer on the outermost surface starts to occur. Atomic movement occurs due to micro lattice distortion, unevenness, and the like, and generates an uneven surface called step bunching, which is recrystallized and grown stepwise. In addition, since the carrier mobility has a large dependence on the crystal orientation and the epitaxial growth mode has a large dependence on the crystal orientation, it may be necessary to obtain various crystal planes.
[0011]
Further, the SiC semiconductor is a compound composed of two types of elements in which the atomic radii of Si and C are greatly different, and C clusters and the like grow near the surface to form an electronic level and reduce the operation speed of the MOS device. Such as physical properties. In addition, the expected device operating temperature of the SiC semiconductor is around 500 ° C. or higher, the reverse breakdown voltage is a high voltage of several thousand volts, and the forward current is several hundred amps / □. Used in an environment where defects are likely to occur during operation. From these facts, it is needless to say that the SiC semiconductor substrate is not only flat but also has few crystal defects.
[0012]
In the polishing method for flattening the surface of the SiC semiconductor at the atomic radius level using hard abrasive grains such as diamond as described in the above-mentioned conventional technique, the crystal structure near the surface layer of the polished surface is broken or crystallized by polishing stress. And a non-crystalline layer is formed. Further, in polishing with hard abrasive grains, a cutting mark having a depth exceeding 10 nm is generated during polishing, and a non-crystalline layer is generated around the cutting mark.
[0013]
The same applies to chemical catalytic polishing methods such as chromium oxide and titanium oxide as chemical methods for removing a non-crystalline layer, and in these chemical methods, a metal element by an abrasive is chemically applied to a polished surface. Bonding and persistence causes surface metal contamination.
[0014]
As described above, SiC, a group III nitride semiconductor single crystal, which cannot sufficiently obtain a crystalline surface by thermal, chemical, and mechanical surface treatment, barium titanate, barium niobate, tellurium dioxide, molybdic acid A single-crystal substrate such as an oxide single crystal for an optical material such as lead or a single-crystal substrate such as a dielectric ceramic cannot be obtained by polishing, so a device is formed on the surface, and a single crystal substrate is formed on the surface. The desired characteristics required in the growth of a single crystal film were not obtained.
[0015]
According to the present invention, it is possible to obtain a single-crystal substrate having a single-crystal surface having no electrical problem by using a polishing process by using a polishing process. It is an object of the present invention to provide a surface treatment method capable of measuring a thickness of 1 nm or less by an AFM method.
[0016]
Further, a problem has arisen regarding the crystallinity near the outermost surface of the epitaxial film. "Polishing" an epitaxially grown film has not previously been considered. This seems to be due to the consciousness of contamination due to the polishing action, but mainly due to the assumption that the epitaxial film has excellent crystallinity.
[0017]
At the end of the epitaxial growth for forming the surface, the supply of atoms is disturbed, which causes several layers of structural disorder. In evaluations focusing only on the flatness of the outermost surface, such as AFM, a flatness having only one layer of irregularities is obtained. However, when the crystal structure is evaluated, there is an epitaxial film in which several layers are amorphous. Simply examining only the flatness, such as AFM, is not sufficient as a method for inspecting the surface of an electronic device substrate. Such a problem has become remarkable because slight lattice distortion has been miniaturized in a MOS transistor structure using a crystal surface to such an extent that characteristics are affected.
[0018]
Therefore, in addition to evaluating the lattice arrangement of several layers, it is also important to fabricate a Schottky electrode and evaluate its characteristics. As the device size cannot ignore the surface structure of the epitaxial film, in addition to the flatness evaluation, the crystal structure evaluation of several layers on the surface and the electronic defect evaluation are evaluated as "Surface microfabrication". Is required.
[0019]
[Means for Solving the Problems]
The present inventor has made use of the synergistic action of colloidal silica and an alkaline solution without using hard abrasive grains such as diamond and silicon carbide powder and chemical catalyst materials conventionally used for polishing hard materials. It has been found that a crystal layer on the surface of a SiC or group III nitride single crystal substrate, which has been considered extremely difficult to polish, can efficiently remove a defect layer that is not a single crystal to form an ultra-smooth crystal plane.
In addition, this method is used to remove a defect layer on the surface of a single crystal substrate made of an oxide or a dielectric or to remove an epitaxial film made of SiC, a group III nitride, an oxide or a dielectric formed on a single crystal substrate. It has been found that the method can be applied to the removal of a defect layer on the surface.
[0020]
That is, the present invention provides (1) a rotary buff polishing method or an ultrasonic vibration polishing method using an alkaline aqueous polishing liquid containing 5 to 40% by weight of colloidal silica with respect to water and adjusting the pH to 7 to 10. Polishing a single-crystal substrate made of SiC, group III nitride, oxide, or dielectric to remove a defect layer having a surface portion that is not single-crystal, thereby removing a boundary between the crystalline portion and the defect layer portion. A method for forming an ultra-smooth crystal surface of a single crystal substrate, comprising forming an ultra-smooth surface comprising a surface.
Further, the present invention provides (2) a defect layer having non-single-crystallinity due to an existing layer on a single-crystal substrate, a layer generated during pre-stage rough polishing of a single-crystal substrate, or a high-temperature process strain exceeding 500 ° C. (1) The method for forming an ultra-smooth crystal plane of a single crystal substrate according to the above (1), wherein the layer is formed on the single crystal substrate.
Further, according to the present invention, (3) the defect layer whose crystallinity is not a single crystal is a layer having a depth of 100 nm introduced into the semiconductor single crystal substrate by ion implantation, and the surface of the defect layer is removed by the removal of the defect layer. (1) The method for forming an ultra-smooth crystal surface of a single crystal substrate according to the above (1), wherein the uneven structure is selectively produced.
[0021]
Further, the present invention provides (4) a rotary buff polishing method or an ultrasonic vibration polishing method using an alkaline aqueous polishing liquid containing 5 to 40% by weight of colloidal silica with respect to water and adjusting the pH to 7 to 10. By polishing an epitaxial film made of SiC, group III nitride, oxide, or dielectric formed on a single crystal substrate by the above method, a defect layer in which the crystallinity of the surface portion is not a single crystal is peeled off to remove the crystalline portion Forming an ultra-smooth surface comprising a boundary surface between a semiconductor layer and a defect layer portion.
Also, in the present invention, (5) the alkaline aqueous polishing liquid has a polishing capability in which the removal rate of the defective layer by polishing is at least 10 times faster than the removal rate of the crystalline portion by polishing. ) To (4).
Further, the present invention is (6) the method for forming an ultra-smooth crystal surface according to any one of the above (1) to (5), wherein the polished surface is polished without being exposed to the atmosphere.
In the present invention, (7) the ultra-smooth surface has an unevenness of 1 nm or less as measured by a Wyko method (optical surface roughness measuring device) and an AFM method. Any one of the methods for forming an ultra-smooth crystal face.
[0022]
[Action]
SiC is a material that is said to be the hardest next to diamond, and has a very strong bond between Si and C. However, a defect layer having a non-single crystallinity has a broken bond. When the alkaline aqueous polishing liquid of the present invention is used, the colloidal silica silica fine particles dispersed in the polishing liquid selectively attack the portion where the defect region is present, and the carbon atom whose bond with the oxygen atom of the silica is broken is chemically converted. It is presumed that the reaction is repeatedly performed in which the silicon is chemically bonded, vaporized and desorbed, and then the remaining silicon is dissolved in colloidal silica and desorbed.
[0023]
In order to efficiently promote such a reaction, the alkaline aqueous polishing liquid desirably contains about 5 to 40% by weight of colloidal silica based on water. If the content of colloidal silica is less than about 5% by weight, polishing cannot be performed. If the content exceeds about 40% by weight, colloidal silica aggregates to increase the particle size, which is not preferable because the polished surface is damaged. More preferably, it is about 5 to 15% by weight. The average particle size of the colloidal silica is 0.5 μm or less, more preferably 0.1 μm or less. When the particle size is larger than 0.5 μm, the polished surface becomes rough.
[0024]
NaOH and KOH in the alkaline aqueous polishing liquid have an effect of etching a defect layer whose crystallinity is not a single crystal. Colloidal silica selectively polishes a portion having a defect region. In the case of NaOH or KOH, in addition to that, a single crystal portion is also etched away at a low speed. Since this effect is stronger in NaOH than in KOH, KOH is more preferable. When the concentration of NaOH or KOH is high, the polishing is not terminated in the single crystal region, the polishing proceeds one after another, and the single crystal portion is also cut. Therefore, the pH needs to be adjusted to 10 or less.
[0025]
By setting the colloidal silica and the alkaline solution under such conditions, the removal rate of the defective layer by polishing can be at least ten times faster than the removal rate of the crystalline portion by polishing due to the synergistic action of both. As described above, when the degree of alkali is small, while the crystal defects are actively removed, the polishing rate is as fast as about 100 nm to 300 nm / 10 minutes, but the polishing rate is rapidly reduced to 1/100 at the time of hitting the single crystal portion. Since it is reduced to about 1/10, it is convenient to maintain crystallinity and obtain a smooth surface.
[0026]
Therefore, even if the polishing time is not strictly determined in advance for the sample, when the crystalline surface comes out, the polishing is changed to slow polishing. Therefore, polishing stops at a clear interface between the defect layer and the crystal layer, so that only the defect layer can be selectively peeled off, and the unevenness at the interface between the crystal layer and the defect layer is on the order of several nanometers. Since the surface does not spread to several tens of nanometers, an ultra-smooth surface of several nanometers can be obtained by polishing this interface.
[0027]
In the case of a semiconductor single crystal made of a group III nitride such as GaN, an oxide single crystal for an optical material such as barium titanate, barium niobate, tellurium dioxide, lead molybdate, or a single crystal material such as a dielectric ceramic. When the polishing liquid of the present invention is used, the polishing rate of the defective layer is extremely high, and only the region of the defective layer is polished, and the same effect as the polishing of SiC can be obtained.
[0028]
Further, after introducing a defect layer having a depth of 100 nm level by a method capable of positively introducing a defect layer having irregularities such as ion implantation, a 100 nm level irregular structure was selectively formed on the surface by removing the defect layer. However, the boundary surface between the defect layer and the crystal layer can form an ultra-smooth surface having irregularities of several nanometers or less by this method.
[0029]
BEST MODE FOR CARRYING OUT THE INVENTION
An example in which a semiconductor single crystal substrate is polished by a rotary buff polishing method according to the method of the present invention will be described with reference to FIGS. FIG. 1A is a cross-sectional view showing a state in which a semiconductor single crystal is bonded and fixed to a jig for fixing the semiconductor single crystal, and FIG. 1B is a bottom view thereof. FIG. 2 is a cross-sectional view showing an arrangement relationship between a colloidal silica-dispersed alkaline aqueous solution during polishing and a jig, a polishing table, and a polishing cloth used for polishing.
[0030]
The semiconductor single crystal 1 to be polished is fixed to the lower surface of the disk 3 at the lower end of the fixing jig 2 by using an adhesive and uniformly spaced at appropriate intervals. The fixing jig 2 is supported in the vertical through hole of the horizontal polishing jig 4 so that the polishing surface of the semiconductor single crystal 1 always keeps horizontal, and the fixing jig 2 and the horizontal polishing jig 4 rotate smoothly with each other. Try to do each other. The fixing jig 2 and the horizontal polishing jig 4 are made of metal or ceramics.
[0031]
A non-metallic material 5, for example, a crystalline substrate or a Si substrate of the same type as the semiconductor single crystal 1 is bonded to several places on the lower surface of the end of the horizontal polishing jig 4. When a metal material is used in place of the nonmetallic material 5, when metal atoms and colloidal silica are under pressure, silica particles aggregate while taking in metal ions, forming hard large particles. This is unsuitable because it even scrapes the crystal plane.
[0032]
The colloidal silica-dispersed alkaline aqueous polishing liquid 6 is stored on the rotary polishing table 7 by the edge 8 of the rotary polishing table 7. It is preferable that the semiconductor single crystal 1 is always immersed in the colloidal silica-dispersed alkaline aqueous polishing liquid because the air does not come into contact with the semiconductor single crystal 1 and the polishing surface suppresses the incorporation of oxygen from the atmosphere. . When the polished surface comes into contact with the atmosphere, colloidal silica aggregates on the polished surface, and the particle size of the silica increases. Therefore, an inert gas atmosphere such as an argon gas may be used.
[0033]
A polishing buff 9 is arranged on the rotary polishing table 7, and the surface of the semiconductor single crystal 1 is rotationally polished by the polishing buff 9. As the polishing buff 9, a urethane foam, a polyester fiber non-woven fabric, artificial leather, a polyester fiber non-woven fabric and a polyurethane foam laminated structure can be used. The polishing is preferably performed by a rotary polishing method using a polishing buff, with the polishing surface pressure set to about 1.4 kg / cm 2 or less and the relative sliding speed of the polishing surface set to about 1 m / min or less.
[0034]
The substrate 5 adhered to several positions on the lower surface of the end portion of the horizontal polishing jig 4 touches the polishing buff, but this portion is not a metal but a crystalline substrate or a Si substrate of the same type as the semiconductor single crystal 1. In the case of a metal, it is polished to form metal particles, which are used as nuclei to prevent silica from agglomerating and silica abrasive grains from being enlarged. Such agglomerated silica is extremely hard and causes defects (breaking the crystal lattice) in the polished surface, so that it is important to prevent this.
[0035]
As described above, the rotary polishing method using a polishing buff has been described as a specific example. However, the method of the present invention employs the above-mentioned specific alkaline aqueous polishing liquid, and the surface to be polished has a synergistic polishing action of colloidal silica and an alkaline liquid. The same effect can be obtained by a method using a hard plate instead of a buff, an ultrasonic vibration polishing method, or the like.
[0036]
【Example】
Example 1
An abrasive stock solution prepared by adding 50% by weight of colloidal silica having a particle size of 0.1 μm to ion-exchanged pure water (formulated by Fujimi Incorporated) is diluted with ion-exchanged pure water to 30% by weight of colloidal silica. And KOH to prepare a polishing solution having a pH of 8. Using a polishing apparatus as shown in FIG. 1 and FIG. 2, (0001) plane, (1120) plane, and (1100) plane are cut out, and silicon carbide of # 400 to # 3000, alumina of 1 micron particle diameter, A 1 cm square, 0.3 mm thick SiC single crystal wrapped with a diamond abrasive having a particle size of 0.5 micron was polished.
[0037]
A duralumin platen was used, and a polishing pad was a polyurethane pad TD87 manufactured by Poval Kogyo Co., Ltd. The temperature of the polishing liquid was kept below 50 ° C. The depth of the polishing liquid is 8 mm. The polishing pressure was 1.4 kg / cm 2 , and the rotation speed of the polishing table was 80 cm / s. The polished surface of SiC was a (0001) plane, and the polishing time was 10 minutes. Under these conditions, the amorphous SiC layer having a thickness of 100 nm was peeled off by polishing. The surface smoothness at this time was 0.6 nm in RMS value.
[0038]
Example 2
An abrasive stock solution prepared by adding 50% by weight of colloidal silica having a particle size of 0.1 μm to ion-exchanged pure water (formulated by Fujimi Incorporated) is diluted with ion-exchanged pure water to 20% by weight of colloidal silica. And KOH to prepare a polishing solution having a pH of 8. Using a polishing apparatus as shown in FIGS. 1 and 2, the surface of a (0001) plane GaN having a thickness of 3 μm and grown on sapphire was polished.
[0039]
A duralumin platen was used, and a polishing pad was a polyurethane pad TD87 manufactured by Poval Kogyo Co., Ltd. The temperature of the polishing liquid was kept below 50 ° C. The depth of the polishing liquid is 8 mm. The polishing pressure was 0.6 kg / cm 2 , and the rotation speed of the polishing table was 50 cm / s. Under these conditions, the surface before polishing having an RMS value of 3 nm became 2 nm after polishing.
[0040]
AFM Image of Polished SiC Semiconductor Single Crystal Surface FIG. 3 shows a surface AFM image of a 4H—SiC crystalline substrate after colloidal silica polishing. Many steps of about 0.8 nm are observed. This is equal to the lattice constant of the 4H—SiC single crystal, indicating that a single crystal surface has been obtained. A region where no crystal lattice step is observed indicates flatness exceeding the resolution of the AFM device.
[0041]
CAICISS (CoAxial Impact Collision Ion Scattering Spectrometer) Measurement Results of Polished SiC Semiconductor Single Crystal Surface FIG. 4 shows that the surface of the 6H-SiC crystalline substrate washed with hydrofluoric acid (HF) after colloidal silica polishing was washed with CAICISS. The result of evaluating the crystal structure using (direct collision ion scattering method) is shown. An ion beam is incident at an angle of 14 degrees from the surface, and the structure of three atomic layers from the surface is evaluated. Analysis of the signal shown in FIG. 4 from the known crystal structure of SiC revealed that Si atoms were arranged in a {3X} 3 structure on the resurface of the SiC single crystal.
[0042]
That is, it was found that the SiC semiconductor substrate polished by the method of the present invention was crystalline up to the outermost surface. In FIG. 4, the crystallinity at the center is evaluated by the inner of the 1-inch substrate, and the crystallinity at the outer periphery is evaluated by the outer. Outer has a lower peak and is broader than inner. This is not due to polishing, but depends on the quality of commercially available crystalline substrates.
[0043]
Furthermore, it was clarified that the crystal structure was maintained from the surface layer, and that no zinc element was adsorbed from the zinc platen during rough cutting on the outermost surface after polishing. Although the CAICISS measurement is performed after the diamond polishing, no change in the scattering intensity of the Δe atoms due to the periodicity of the crystal structure on the outermost surface as shown in FIG. 1 is observed after the diamond polishing. It has been found that colloidal silica polishing can remove a tens of nanometer damaged layer caused by diamond polishing without introducing a damaged layer.
[0044]
Electrical evaluation of metal-semiconductor contact formed on the surface of the polished SiC semiconductor single crystal Ni was deposited on the polished n-type SiC surface (Si surface) and the back surface to form electrodes. The back surface was subjected to pulsed laser irradiation to form an ohmic electrode. FIG. 5 shows the current-voltage characteristics of the polished surface Schottky electrode. The relationship between the current I and the voltage V of the Schottky electrode is expressed as I = A exp qV / nκT where q, κ, T, and A are elementary charge, Boltzmann constant, absolute temperature, and Richardson constant, respectively. .
[0045]
After the polished surface is cleaned with hydrogen fluoride and a metal is deposited to produce a Schottky device, the value of a constant n (a gradient of a current with respect to a forward voltage in FIG. 5) = 1.1 or less is idealized by the ideal factor. Obtained. This value changes extremely sensitively to the state of the metal-semiconductor interface, that is, the state of the electrode deposition surface. If the current transport between the metal and the semiconductor is ideally performed, the constant n is 1. When there is a defect, the value becomes 1.2 or more. In FIG. 5, the electrodes shown by solid lines and wavy lines are characteristics of the electrodes manufactured on the same polished surface.
[0046]
【The invention's effect】
According to the method of the present invention, it is possible to obtain a single crystal electrically non-problematic surface up to the outermost surface layer by utilizing polishing processing on a semiconductor single crystal substrate. (Optical Surface Profile Roughness Measuring Apparatus) and an ultra-smooth surface of 1 nm or less as measured by the AFM method can be formed.
[Brief description of the drawings]
FIG. 1 is a sectional view (A) and a bottom view (B) showing an example of a relationship between a jig used for polishing and a semiconductor single crystal substrate to be polished when carrying out a method of the present invention. .
FIG. 2 is a cross-sectional view showing an arrangement relationship between a colloidal silica-dispersed alkaline aqueous polishing liquid during polishing and a jig, a polishing table, and a polishing cloth used for polishing.
FIG. 3 is a drawing substitute photograph showing an AFM image of a polished SiC semiconductor single crystal surface in Example 1.
FIG. 4 is a graph showing the results of CAICISS measurement of the polished SiC semiconductor single crystal surface in Example 1.
FIG. 5 is a graph showing Schottky characteristics of a metal electrode formed on the surface of a SiC semiconductor single crystal after polishing in Example 1.

Claims (7)

水に対してコロイダルシリカを5〜40重量%含有し、pHを7〜10に調整したアルカリ水性研磨液を用いて、回転バフ研磨法又は超音波振動研磨法によりSiC、III族窒化物、酸化物、又は誘電体からなる単結晶基板を研磨することにより表面部分の結晶性が単結晶ではない欠陥層を剥離して結晶性部分と欠陥層部分との境界面からなる超平滑面を形成することを特徴とする単結晶基板の超平滑結晶面形成方法。Using an alkaline aqueous polishing liquid containing 5 to 40% by weight of colloidal silica with respect to water and adjusting the pH to 7 to 10 by a rotary buff polishing method or an ultrasonic vibration polishing method, SiC, group III nitride, oxide A single crystal substrate made of a material or a dielectric is polished to remove a defect layer in which the crystallinity of the surface portion is not a single crystal, thereby forming an ultra-smooth surface including a boundary surface between the crystalline portion and the defect layer portion. A method for forming an ultra-smooth crystal face of a single crystal substrate, characterized in that: 結晶性が単結晶ではない欠陥層は、単結晶基板に既存の層、単結晶基板の前段粗研磨時に生じた層、又は500℃を越える高温度プロセス歪みにより単結晶基板に生じた層であることを特徴とする請求項1記載の単結晶基板の超平滑結晶面形成方法。The defect layer whose crystallinity is not a single crystal is an existing layer on the single crystal substrate, a layer generated during the preliminary rough polishing of the single crystal substrate, or a layer generated on the single crystal substrate due to high temperature process strain exceeding 500 ° C. 2. The method for forming an ultra-smooth crystal plane of a single crystal substrate according to claim 1, wherein: 結晶性が単結晶ではない欠陥層は、半導体単結晶基板にイオン注入によって導入された100nmレベルの深さの層であり、欠陥層の除去により表面に100nmレベルの凹凸構造を選択的に作製することを特徴とする請求項1記載の単結晶基板の超平滑結晶面形成方法。The defect layer whose crystallinity is not a single crystal is a layer having a depth of 100 nm introduced into a semiconductor single crystal substrate by ion implantation, and a concave-convex structure of 100 nm level is selectively formed on the surface by removing the defect layer. 2. The method for forming an ultra-smooth crystal plane of a single crystal substrate according to claim 1, wherein: 水に対してコロイダルシリカを5〜40重量%含有し、pHを7〜10に調整したアルカリ水性研磨液を用いて、回転バフ研磨法又は超音波振動研磨法により単結晶基板上に形成されたSiC、III族窒化物、、酸化物、又は誘電体からなるエピタキシャル膜を研磨することにより表面部分の結晶性が単結晶ではない欠陥層を剥離して結晶性部分と欠陥層部分との境界面からなる超平滑面を形成することを特徴とするエピタキシャル膜の超平滑結晶面形成方法。It was formed on a single crystal substrate by a rotary buff polishing method or an ultrasonic vibration polishing method using an alkaline aqueous polishing solution containing 5 to 40% by weight of colloidal silica with respect to water and adjusting the pH to 7 to 10. By polishing an epitaxial film made of SiC, a group III nitride, an oxide, or a dielectric, a defect layer whose surface portion is not a single crystal is peeled off and a boundary surface between the crystalline portion and the defect layer portion is removed. A method for forming an ultra-smooth crystal plane of an epitaxial film, characterized by forming an ultra-smooth plane comprising: 該アルカリ水性研磨液は、欠陥層の研磨による除去速度が結晶性部分の研磨による除去速度より少なくとも10倍以上速い研磨能力を有することを特徴とする請求項1ないし4記載の超平滑結晶面形成方法。5. The ultra-smooth crystal surface forming method according to claim 1, wherein said alkaline aqueous polishing liquid has a polishing ability at which the removal rate of said defective layer by polishing is at least 10 times faster than that of said crystalline portion by polishing. Method. 研磨面を大気に触れない状態で研磨加工することを特徴とする請求項1ないし5のいずれかに記載の超平滑結晶面形成方法。The method for forming an ultra-smooth crystal surface according to any one of claims 1 to 5, wherein the polished surface is polished without being exposed to the atmosphere. 超平滑面がWyko法(光学式表面形状粗さ測定装置)及びAFM法で測定して凹凸1nm以下であることを特徴とする請求項1ないし6のいずれかに記載の超平滑結晶面形成方法。The method for forming an ultra-smooth crystal surface according to any one of claims 1 to 6, wherein the ultra-smooth surface has an unevenness of 1 nm or less as measured by a Wyko method (optical surface profile roughness measuring device) and an AFM method. .
JP2003097341A 2003-03-31 2003-03-31 SUPER-SMOOTH CRYSTAL FACE FORMING METHOD BY POLISHING OF SiC SINGLE CRYSTAL SUBSTRATE OR THE LIKE Pending JP2004299018A (en)

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Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008166329A (en) * 2006-12-27 2008-07-17 Showa Denko Kk Aqueous polishing slurry for polishing silicon carbide single crystal substrate and polishing method
JP2011077547A (en) * 2010-12-20 2011-04-14 Sumitomo Electric Ind Ltd Method of manufacturing semiconductor device, and group iii nitride crystal substrate
CN103290482A (en) * 2013-01-06 2013-09-11 河北同光晶体有限公司 Method for removing stress of silicon carbide crystal with large diameter
US9165779B2 (en) 2012-10-26 2015-10-20 Dow Corning Corporation Flat SiC semiconductor substrate
US9279192B2 (en) 2014-07-29 2016-03-08 Dow Corning Corporation Method for manufacturing SiC wafer fit for integration with power device manufacturing technology
US9337277B2 (en) 2012-09-11 2016-05-10 Dow Corning Corporation High voltage power semiconductor device on SiC
WO2017061229A1 (en) * 2015-10-09 2017-04-13 株式会社フジミインコーポレーテッド Polishing composition and polishing method using same, and method for producing an object intended to be and has been polished using polishing composition and polishing method
US9738991B2 (en) 2013-02-05 2017-08-22 Dow Corning Corporation Method for growing a SiC crystal by vapor deposition onto a seed crystal provided on a supporting shelf which permits thermal expansion
EP2298521A4 (en) * 2009-05-25 2017-08-30 Tianjin University Proton beam assisted ultraprecise processing method for processing single-crystal fragile material
US9797064B2 (en) 2013-02-05 2017-10-24 Dow Corning Corporation Method for growing a SiC crystal by vapor deposition onto a seed crystal provided on a support shelf which permits thermal expansion
CN114473815A (en) * 2022-02-18 2022-05-13 南通元兴智能科技有限公司 A single face burnishing machine for carborundum processing

Cited By (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008166329A (en) * 2006-12-27 2008-07-17 Showa Denko Kk Aqueous polishing slurry for polishing silicon carbide single crystal substrate and polishing method
JP4523935B2 (en) * 2006-12-27 2010-08-11 昭和電工株式会社 An aqueous polishing slurry for polishing a silicon carbide single crystal substrate and a polishing method.
EP2298521A4 (en) * 2009-05-25 2017-08-30 Tianjin University Proton beam assisted ultraprecise processing method for processing single-crystal fragile material
JP2011077547A (en) * 2010-12-20 2011-04-14 Sumitomo Electric Ind Ltd Method of manufacturing semiconductor device, and group iii nitride crystal substrate
US9337277B2 (en) 2012-09-11 2016-05-10 Dow Corning Corporation High voltage power semiconductor device on SiC
US9165779B2 (en) 2012-10-26 2015-10-20 Dow Corning Corporation Flat SiC semiconductor substrate
CN103290482A (en) * 2013-01-06 2013-09-11 河北同光晶体有限公司 Method for removing stress of silicon carbide crystal with large diameter
US9738991B2 (en) 2013-02-05 2017-08-22 Dow Corning Corporation Method for growing a SiC crystal by vapor deposition onto a seed crystal provided on a supporting shelf which permits thermal expansion
US9797064B2 (en) 2013-02-05 2017-10-24 Dow Corning Corporation Method for growing a SiC crystal by vapor deposition onto a seed crystal provided on a support shelf which permits thermal expansion
US9279192B2 (en) 2014-07-29 2016-03-08 Dow Corning Corporation Method for manufacturing SiC wafer fit for integration with power device manufacturing technology
US10002760B2 (en) 2014-07-29 2018-06-19 Dow Silicones Corporation Method for manufacturing SiC wafer fit for integration with power device manufacturing technology
WO2017061229A1 (en) * 2015-10-09 2017-04-13 株式会社フジミインコーポレーテッド Polishing composition and polishing method using same, and method for producing an object intended to be and has been polished using polishing composition and polishing method
CN114473815A (en) * 2022-02-18 2022-05-13 南通元兴智能科技有限公司 A single face burnishing machine for carborundum processing

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