JP2004264242A - Circuit system for receiving gps signal - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a circuit system for receiving GPS signal that can remove an offset component, without increasing costs. <P>SOLUTION: The GPS signal receiving circuit system 22 filter-processes the received signal A/D converted by an A/D converter 5 to output it to a baseband processor 6, by a high-pass filter 21 composed of an IIR digital filter. <P>COPYRIGHT: (C)2004,JPO&NCIPI

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a GPS signal receiving circuit device that receives a GPS signal transmitted from a GPS satellite.
[0002]
[Prior art]
FIG. 3 shows a schematic configuration of a general GPS signal receiving circuit disclosed in Patent Document 1, for example. When a GPS signal transmitted from a GPS satellite is received by the receiving antenna 1, the GPS signal is amplified by the high-frequency amplifier 2, further converted into an intermediate frequency by the frequency converter 3, and then amplified by the receiving amplifier 4. Then, A / D conversion is performed by the A / D converter 5 and demodulation processing is performed in the baseband processing unit 6.
[0003]
Here, the baseband processing unit 6 mixes the pseudo-noise signal (PRN signal) generated by the PRN generator 7 with the received signal by the mixer 8 in order to demodulate the GPS signal, and integrates the integrator to obtain a correlation between the two. 9, the integration process is performed over a predetermined time. Then, in response to the integrated result, the data decoding unit 10 decodes the received data.
[0004]
However, an offset component is inevitably superimposed on the amplified signal output from the receiving amplifier 4 due to its circuit configuration. Since the integration processing time is extremely long (for example, about 1 second) with respect to the sampling frequency of 16.368 MHz, the integration result saturates in a short time if any offset component is present in the received signal. I will.
[0005]
Therefore, conventionally, the baseband processing unit 6 detects an offset component included in the received signal in the offset detection unit 11 and outputs a control signal according to the detection. Then, the control signal is integrated by an analog integration circuit 15 composed of an operational amplifier 12, a resistor 13, and a capacitor 14 and output to the receiving amplifier 4, so that the offset component superimposed on the receiving amplifier 4 becomes as small as possible. Thus, the adjustment was made dynamically.
[0006]
[Patent Document 1]
Japanese Patent Application Laid-Open No. 2002-122649
[Problems to be solved by the invention]
However, the receiving circuit having the above-described configuration is usually configured as an LSI. However, mounting the analog integrating circuit 15 including the resistor 13 and the capacitor 14 inside the LSI complicates the manufacturing process and increases the cost. There was a problem of raising it.
[0008]
The present invention has been made in view of the above circumstances, and it is an object of the present invention to provide a GPS signal receiving circuit device capable of removing an offset component without increasing costs.
[0009]
[Means for Solving the Problems]
According to the GPS signal receiving circuit device of the first aspect, the filter processing unit performs high-pass filtering on the received signal that has been A / D converted by the A / D converter. That is, since the offset component is removed by digitally performing a high-pass filter processing on the received signal after the A / D conversion, an analog processing circuit is not required unlike the related art. Can be.
[0010]
According to the GPS signal receiving circuit device of the second aspect, since the filter processing unit is configured by an IIR digital filter, it is suitable for filtering a GPS signal having a continuous received signal sequence.
[0011]
According to the GPS signal receiving circuit device of the third aspect, the filter processing unit converts the received signal A / D-converted by the A / D converter into a control signal corresponding to an offset component, which is provided from the baseband processing unit. High-pass filter processing is performed according to. Therefore, appropriate high-pass filtering can be performed according to the state of the offset component detected in the actual received signal.
[0012]
According to the GPS signal receiving circuit device of the fourth aspect, the filter processing unit responds to the control signal output based on the result of the baseband processing unit comparing the data value with the zero level of the A / D conversion value. Increase or decrease the baseband signal. That is, the DC component of the GPS signal is essentially zero. Therefore, if the data value is larger than the zero level, the baseband signal value is reduced, and if the data value is smaller than the zero level, the baseband signal value is increased. The offset component can be removed.
[0013]
BEST MODE FOR CARRYING OUT THE INVENTION
(First embodiment)
Hereinafter, a first embodiment of the present invention will be described with reference to FIG. Note that the same parts as those in FIG. 3 are denoted by the same reference numerals, and description thereof will be omitted. In this embodiment, the analog integration circuit 15 shown in FIG. 3 is eliminated. An IIR high-pass filter (filter processing unit) 21 is disposed between the A / D converter 5 and the baseband processing unit 6A. Further, the offset detection unit 11 is omitted from the baseband processing unit 6A.
[0014]
The high-pass filter 21 performs a high-pass filter process so as to remove an offset component included in digital data of a received signal output by the A / D converter 5. That is, since the level of the offset component included in the received signal can be predicted based on the characteristics of the reception amplifier 4, the filter characteristics of the high-pass filter 21 can be used to remove the predicted offset component. Set as appropriate. Other configurations are the same as those in FIG. 3, and the above constitutes the GPS signal receiving circuit device 22.
[0015]
According to the present embodiment configured as described above, the GPS signal receiving circuit device 22 filters the received signal A / D-converted by the A / D converter 5 by the high-pass filter 21 to perform baseband processing. Output to the unit 6. That is, since the offset component is removed by digitally filtering the received signal after the A / D conversion, an analog processing circuit is not required unlike the related art, and the GPS signal receiving circuit device 22 can be used as an LSI at lower cost. Can be configured. Further, since the high-pass filter 21 is an IIR digital filter, it is suitable for filtering a GPS signal having a continuous received signal sequence.
[0016]
(Second embodiment)
FIG. 2 shows a second embodiment of the present invention. The same parts as those of the first embodiment are denoted by the same reference numerals, and the description thereof will be omitted. Only the different parts will be described below. In the second embodiment, a filter processing unit 23 is provided instead of the high-pass filter 21 of the first embodiment. Further, the baseband processing unit 6 has the same configuration as that shown in FIG.
[0017]
The filter processing unit 23 performs high-pass filter processing equivalently by calculating the output signal X (n) according to the equation (1).
X (n) = X (n) + X (n-1) [± α] (1)
Here, X (n-1) is the output result of the previous filtering process, and α is an offset value set according to the characteristics of the receiving amplifier 4. In addition, the inclusion of ± α in the curly brackets [] indicates that the offset value α is not always added / subtracted every time the calculation of the expression (1) is performed.
[0018]
That is, whether or not the filter processing unit 23 adds / subtracts the offset value α depends on the detection result of the offset detection unit 11 in the baseband processing unit 6. The offset detection unit 11 observes the data output from the integrator 9 within a predetermined period, determines whether the integration result shows a tendency to swing more on the positive side or on the negative side, and determines the determination result. The control signal is output to the filter processing unit 23 based on the control signal.
[0019]
Then, the filter processing unit 23 adds or subtracts the offset value α in Expression (1) according to the output state of the control signal. For example, if the offset value α is set to “1” and the offset detection unit 11 outputs the addition command once every 10 times of the calculation of the equation (1), the equivalent offset value is “0. 1 ". When a subtraction command is output from the offset detection unit 11, the offset value α is subtracted. Note that the signal processing by the equation (1) is substantially equivalent to performing high-pass filtering. The above constitutes the GPS signal receiving circuit device 24.
[0020]
In addition, when the offset value α is represented by two's complement, it goes without saying that [± α] in the equation (1) may be simply represented as [+ α].
[0021]
According to the second embodiment configured as described above, the filter processing unit 23 performs the high-pass filter processing based on the equation (1) according to the detection result of the offset detection unit 11 in the baseband processing unit 6. Appropriate filtering can be performed according to the state of the offset component detected in the actual received signal. That is, it is possible to cope with a case where noise or the like is applied and an offset component is temporarily added, in addition to the one based on the characteristics of the receiving amplifier 4.
[0022]
The present invention is not limited to the embodiment described above and shown in the drawings, and the following modifications or extensions are possible.
The filter processing unit may be configured by a FIR (Finite Impulse Response) type digital filter.
In the second embodiment, when the offset component can be predicted according to the characteristics of the receiving amplifier 4 as in the first embodiment, the timing of executing [± α] in the equation (1) may be fixed. In this case, the offset detection unit 11 becomes unnecessary, and the timing for executing [± α] may be given from the baseband processing unit 6, or the timing may be generated autonomously inside the filter processing 23.
Further, the filter processing unit may be configured as follows. That is, the baseband processing unit is configured to increase or decrease the baseband signal according to the control signal output based on the result of comparing the data value with the zero level (two's complement representation) of the A / D converted value. Since the DC component of the GPS signal is essentially zero, if the data value is larger than zero level, the baseband signal value is reduced, and if the data value is smaller than zero level, the baseband signal value is increased. The superposed offset component can be removed with a simple configuration.
[Brief description of the drawings]
FIG. 1 is a first embodiment of the present invention, and is a functional block diagram showing an electrical configuration of a GPS signal receiving circuit device. FIG. 2 is a diagram corresponding to FIG. 1 showing a second embodiment of the present invention. Diagram corresponding to Fig. 1 showing the technology [Description of symbols]
4 is a receiving amplifier, 5 is an A / D converter, 6 and 6A are baseband processors, 9 is an integrator, 11 is an offset detector, 21 is a high-pass filter (filter processor), and 22 is a GPS signal receiving circuit device. , 23 indicate a filter processing unit, and 24 indicates a GPS signal receiving circuit device.

Claims (4)

A receiving amplifier for receiving and amplifying a GPS signal transmitted from a GPS satellite;
An A / D converter for A / D converting the signal amplified by the receiving amplifier;
A filter processing unit for high-pass filtering the received signal A / D converted by the A / D converter;
An integrator that performs an integration process to demodulate the reception signal output from the filter processing unit;
A GPS signal receiving circuit device comprising: a baseband processing unit that processes a baseband signal demodulated based on a result of the integration processing. 2. The GPS signal receiving circuit device according to claim 1, wherein the filter processing unit is configured by an IIR type digital filter. The baseband processing unit detects an offset component included in the baseband signal, and outputs a control signal corresponding to the detected offset component.
The GPS signal receiving circuit device according to claim 1, wherein the filter processing unit performs a high-pass filter process according to the control signal. The baseband processing unit outputs the control signal based on a result of comparing a data value of the baseband signal with a zero level of an A / D conversion value in the A / D converter;
The GPS signal receiving circuit device according to claim 3, wherein the filter processing unit increases or decreases the baseband signal according to the control signal.

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