JP2004241927A - Receiver and synchronous processing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a superior receiver and a synchronous processing method which pulls in synchronism for a short period of time by a comparatively simple component constitution without using a frequency-variable oscillator such as VCTCXO, etc. <P>SOLUTION: Timing is shifted M times about one code phase with a shift quantity Δt per time, i.e. Δt = T<SB>c</SB>/M (T<SB>c</SB>is chip spacing). After timing search for a code phase, a phase shifter circuit shifts codes generated by a code regenerator for receiving templates by one code according to a code phase control signal outputted from a pull-in logical circuit, and also shifts the timing M times. Correlation reception is conducted M × K times (K is the code length) in total to synchronize received signals. <P>COPYRIGHT: (C)2004,JPO&NCIPI

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a receiving apparatus for receiving a transmission signal composed of a pulse signal train and a synchronization processing method for performing processing such as synchronization acquisition and synchronization maintenance of the reception signal, and more particularly, to multiplying a reception signal by a template pulse, and And a synchronization processing method for performing reception by passing through an integration or a low-pass filter.
[0002]
More specifically, the present invention relates to an ultra wide band (UWB) communication type receiving apparatus for receiving a signal sequence that constitutes an information signal using an impulse signal sequence having a very short period of about several hundred picoseconds. In addition, the present invention relates to a synchronization processing method, and more particularly to a receiver and a synchronization processing method of an ultra-wide band communication system in which an interference wave resistance is enhanced in combination with DS-SS (direct spread spectrum).
[0003]
[Prior art]
A wireless LAN has been attracting attention as a system for releasing users from LAN wiring by a wired system. According to the wireless LAN, most of the wired cable can be omitted in a work space such as an office, so that a communication terminal such as a personal computer (PC) can be relatively easily moved. The demand for wireless LAN systems has been remarkably increased with the increase in speed and price. In particular, the introduction of a personal area network (PAN) is being studied to establish a small-scale wireless network between a plurality of electronic devices existing around a person and perform information communication.
[0004]
Recently, a wireless LAN (Local Area Network) system to which an SS (Spread Spectrum: spread spectrum) method is applied has been put to practical use. In the DS (Direct Spread: direct spreading) system, which is a type of the SS system, the transmitting side multiplies an information signal by a random code sequence called a PN (Pseudo Noise: pseudo noise) code to spread an occupied band and transmit the signal. Then, the receiving side reproduces the information signal by despreading by multiplying the received spread information signal by the PN code.
[0005]
Furthermore, a UWB (Ultra Wide Band) transmission system that applies the SS system has been proposed for applications such as PAN. As for the UWB transmission method, a method of carrying out wireless communication by carrying information on an extremely weak impulse train is attracting attention as a wireless communication system for realizing short-distance ultra-high-speed transmission, and its practical application is expected (for example, see Non-Patent Document 1). Reference 1).
[0006]
In the UWB transmission system, an information signal is formed by using a DS-UWB system in which the spreading speed of a DS information signal is extremely high and an impulse signal train having a very short period of about several hundred picoseconds. There are two types of impulse-UWB system for transmitting and receiving columns.
[0007]
The DS-UWB system can control the spectrum by the PN code speed, but has a problem that power consumption is likely to increase because it is necessary to operate a logic circuit at a high speed on the order of GHz. On the other hand, the impulse-UWB method has the merit that current consumption can be reduced because it can be configured by a combination of a pulse generator and a low-speed logic circuit, but has a problem that it is difficult to control the spectrum with the pulse generator.
[0008]
In both systems, high-speed data transmission is realized by performing transmission and reception by spreading over an ultra-high frequency band of, for example, 3 GHz to 10 GHz. The occupied bandwidth is a band on the order of GHz such that a value obtained by dividing the occupied bandwidth by its center frequency (for example, 1 GHz to 10 GHz) is substantially 1, and is a so-called W-CDMA or cdma2000 system, and an SS (Spread Spectrum). ) Or an OFDM (Orthogonal Frequency Division Multiplexing) scheme, which is an ultra-wide band compared to a bandwidth normally used in a wireless LAN.
[0009]
In February 2002, the US FCC deregulated the UWB system. The content of the deregulation is to permit emission of radio waves with an output of -41.3 dBm from 3.1 GHz to 10.6 GHz. In the standardization work of IEEE 802.15.3, for example, a method of forming a piconet and performing communication between wireless communication devices performing UWB wireless communication is being standardized.
[0010]
On the transmitter side of the UWB communication, the PN-spread transmission signal is modulated (multiplied) by a pulse signal having a predetermined pulse width, and the transmission signal in the form of an impulse signal sequence is amplified by a power amplifier, and is then passed through a band-pass filter. Only a signal component having a frequency conforming to regulations such as FCC is extracted and transmitted from an antenna to a transmission path.
[0011]
On the other hand, received data can be obtained by PN despreading, but for that purpose, it is necessary to obtain synchronization of the received signal. The synchronization acquisition here means both the synchronization of the pulse position and the synchronization of the code phase, and requires processing time.
[0012]
In the conventional UWB transmission method, reception processing is performed by multiplying a received signal by a template pulse, and integrating the signal or passing the signal through a low-pass filter (LPF).
[0013]
FIG. 8 shows a configuration of a conventional UWB transceiver using sliding correlation. FIG. 9 shows an internal configuration of a baseband circuit in the UWB transceiver shown in FIG. However, in the illustrated example, a BPSK (Binary Phase Shift Keying) modulation method is applied, transmission data is carried only by I-axis signals, and Q-axis signals are not used for data transmission.
[0014]
First, the transmission operation will be described. The transmission data is multiplied (modulated) by the spreading code in the baseband circuit. Further, an oscillation frequency output from a crystal oscillator (VCTCXO) or the like is multiplied using a PLL and a VCO to obtain a higher oscillation frequency. The pulse generator generates a pulse signal using the oscillation frequency. Then, the PN-spread transmission signal is modulated (multiplied) by a pulse signal having a predetermined pulse width, and the transmission signal that has become an impulse signal train is amplified by a power amplifier (PA), and is then amplified by a band-pass filter (BPF). Only a signal component having a frequency conforming to regulations such as FCC is extracted and transmitted from an antenna to a transmission path.
[0015]
When transmitting, set the oscillation frequency of the VCO to f _c Is transmitted. Where f _c Indicates the chip rate of the pulse.
[0016]
On the other hand, at the time of reception, the signal received by the antenna passes through a band-pass filter (BPF) to remove frequency components other than the transmission pulse signal component. The signal passing through the band-pass filter is further amplified by a low noise amplifier (LNA). In addition, the oscillation frequency output from a crystal oscillator (VCTCXO) or the like is multiplied using a PLL and a VCO to obtain a template pulse by a pulse generator using the same frequency as at the time of transmission. A template pulse 90 degrees out of phase is obtained by quadrature modulation. These are each multiplied by the received signal in each multiplier to obtain a detection signal for each of the I-axis and the Q-axis. Further, these detection signals are subjected to a low-pass filter (LPF) to remove high-frequency components, A / D conversion is performed on the peak of the filtered pulse, and digital processing is performed in a baseband circuit.
[0017]
In the baseband circuit, each of the I-axis and Q-axis detection signals is multiplied by a spreading code and despread, and the despread signal is integrated in an integration dump. With respect to the I-axis signal, FEC (Forward Error Correction) and CRC (Cyclic Redundancy Check code) are performed, and received data is extracted. The Q-axis signal is fed back to the clock generator via the loop filter. The clock generator adjusts the clock generation timing according to the integrated output.
[0018]
In the example illustrated in FIG. 8, a variable frequency oscillator such as a VCTCXO (Voltage Controlled Temperature Compensated Crystal Oscillator) is used as an oscillator serving as a clock frequency reference. The VCTCXO can set the oscillation frequency by the input voltage, and the oscillation frequency is determined according to the phase control signal supplied from the baseband circuit.
[0019]
First, at the time of synchronization acquisition, a phase control signal for synchronization acquisition is supplied from the baseband circuit, and the oscillation frequency of the VCO becomes f = f _c The template pulse is generated at a frequency Δf higher than the chip rate so as to be + Δf.
[0020]
After the synchronization is obtained, the synchronization is maintained by adjusting the oscillation frequency based on the phase control signal (error signal) composed of the integrated output of the Q-axis signal fed back from the baseband circuit.
[0021]
FIG. 10A shows a reception pulse waveform, and FIG. 10B shows a reception template waveform. As shown in FIG. 10B, the receiving side template waveform is set such that the pulse interval T2 is shorter than the transmitted pulse interval T1. Such a deviation is not so large in the reception pulse cycle T1 section, but becomes large due to a series of pulses, and becomes the least common multiple of T1 and T2, ie, T1 × k1 = T2 × (k1 + 1). At the given pulse number k1, the received signal and the pulse of the received template waveform are shifted by one.
[0022]
This means that the phase of the spread code of the reception template waveform is shifted by one with respect to the transmission signal, and the “sliding correlation” is performed by performing the “sliding correlation” on the section where the pulse shift occurs by the number of code lengths of the spread code. The phase of the spread code of the transmission signal can be found.
[0023]
In the synchronization acquisition processing using such a conventional sliding correlation method, first, there is a problem that synchronization takes a very long time. When Δf is set to be large, the synchronization acquisition time is shortened, but the frequency f _c + Δf, and after acquiring the synchronization (that is, at the time of maintaining the synchronization), f _c In this case, it is necessary to convert the frequency, and the response at this time is slow. Furthermore, since a variable frequency oscillator such as VCTCXO is required to slide the reception template waveform, there is a problem that the component configuration is complicated.
[0024]
[Non-patent document 1]
Nikkei Electronics, March 11, 2002, “Wireless Revolutionary Ultra Wideband” 55-66
[0025]
[Problems to be solved by the invention]
SUMMARY OF THE INVENTION An object of the present invention is to provide an excellent receiving apparatus and an excellent synchronous processing method capable of appropriately performing reception by multiplying a received signal by a template pulse and passing the signal through an integration or low-pass filter. is there.
[0026]
It is a further object of the present invention to multiply a received signal by a template pulse and integrate or low-pass the signal in an ultra-wide band communication system in which interference wave resistance is enhanced in combination with DS-SS (direct spread spectrum). An object of the present invention is to provide an excellent receiving device and a synchronous processing method that can perform reception suitably by passing through a filter.
[0027]
A further object of the present invention is to provide an excellent receiving apparatus and an excellent synchronization processing method that can acquire synchronization in a short time with a relatively simple component configuration without using a variable frequency oscillator such as a VCTCXO. .
[0028]
Means and Action for Solving the Problems
The present invention has been made in consideration of the above problems, and is a receiving device that receives a transmission signal including a pulse signal train,
Receiving means for receiving the transmission signal;
Pulse generating means for generating a template pulse having substantially the same pulse generation interval as the transmission signal;
Phase shift means for shifting the generation timing of the template pulse generated by the pulse generation means at predetermined intervals,
Correlation means for correlating each template pulse whose generation timing has been shifted by the phase shift means and the reception pulse received by the reception means,
Synchronization acquisition means for acquiring synchronization of a received signal based on a correlation result by the correlation means,
Is a receiving device.
[0029]
A receiving apparatus according to the present invention receives a signal sequence that constitutes an information signal by using an impulse signal sequence having a very short period of about several hundred picoseconds by, for example, an ultra-wide band communication method. . For example, by combining with DS-SS (direct spread spectrum), the anti-interference wave capability can be enhanced.
[0030]
The pulse generating means can be constituted by an oscillator for outputting a clock signal of a fixed frequency, and a PLL and VCO for multiplying the clock signal.
[0031]
In the present invention, sliding correlation is performed by shifting the generation timing, not the generation interval of the reception template pulse, using the phase shift means.
[0032]
The phase shift means can control the clock generation timing based on the control signal, but does not control the clock generation interval (frequency). The phase shift means has a chip interval T _c Is divided into M equal parts, and Δt (= T _c / M) by shifting the template pulse generation timing by M, and performing M timing shifts for each code phase. Further, the correlation means performs M × K correlation receptions (where K is a code length). Thus, it is considered that the synchronization acquisition means can synchronize the received signal.
[0033]
The number of timing shifts M of the phase shift means corresponds to the resolution of the timing search. If the number of timing shifts M is large, synchronization can be acquired with higher accuracy. However, the synchronization acquisition time becomes longer by that amount, and a longer preamble must be sent from the transmitter side. Conversely, if M is small, the accuracy of synchronization acquisition is low, but the time required for synchronization acquisition is short, and a short preamble may be transmitted from the transmitter.
[0034]
The number of timing shifts M is not determined arbitrarily on the receiver side, but requires a mechanism in which a predetermined negotiation is performed between the transmitter and the receiver, and a mutual notification is made together with the required preamble length.
[0035]
Further, the receiver according to the present invention, after acquiring synchronization, multiplies the received signal by a template pulse, and integrates or passes the signal through a low-pass filter. The synchronization may be maintained by adjusting the shift amount.
[0036]
In the conventional sliding correlation method, the error signal is D / A-converted, and the synchronization is maintained by voltage-controlling the oscillation frequency of the VCTCXO. In this case, the circuit configuration is complicated because an analog loop for controlling the oscillation frequency is used.
[0037]
In contrast, in the sliding correlation method according to the present invention, the synchronization is maintained by adjusting the amount of timing shift of the phase shift means based on the error signal. At this time, it is not necessary to directly control the frequency of the oscillator as in the case of acquiring the synchronization, and the configuration of the device is simplified. Therefore, an oscillator that outputs a fixed frequency such as TCXO can be used instead of a variable frequency oscillator such as VCTCXO.
[0038]
Further objects, features, and advantages of the present invention will become apparent from more detailed descriptions based on embodiments of the present invention described below and the accompanying drawings.
[0039]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
[0040]
FIG. 1 shows a configuration of a UWB transceiver according to an embodiment of the present invention. FIG. 2 shows an internal configuration of a baseband circuit in the UWB transceiver shown in FIG. However, in the illustrated example, a BPSK (Binary Phase Shift Keying) modulation method is applied, and transmission data is carried only on the I axis. Further, as described later, a sliding correlation is performed for synchronization acquisition.
[0041]
First, the transmission operation will be described. The transmission data is multiplied (modulated) with a spreading code by a multiplier 153 in the baseband circuit 150 to obtain spread transmission data. Further, the oscillation frequency output from the crystal oscillator (TCXO) 108 or the like is multiplied by using the PLL 107 and the VCO 106 to obtain a higher oscillation frequency. The pulse generator 109 generates a pulse signal using the oscillation frequency. The PN-spread transmission signal is modulated (multiplied) with a pulse signal having a predetermined pulse width by a multiplier 105, and the transmission signal that has become an impulse signal train is amplified by a power amplifier (PA) 104, and the bandpass signal is amplified. The filter (BPF) 102 extracts only a signal component having a frequency that conforms to regulations such as FCC, and sends the signal component from the antenna 101 to a transmission path.
[0042]
On the other hand, at the time of reception, the signal received by the antenna 101 passes through the band-pass filter 102 to remove frequency components other than the transmission pulse signal component. The signal passing through the band-pass filter 102 is further amplified by the low-noise amplifier 110. Also, the oscillation frequency output from the crystal oscillator (TCXO) 108 is multiplied by using the PLL 107 and the VCO 106 to obtain a template pulse by the pulse generator 109 using the same frequency as that at the time of transmission, and the other pulse generator At 112, a template pulse whose phase is shifted by 90 deg by the quadrature modulator 111 is obtained. These are multiplied by the received signals in multipliers 113 and 114, respectively, to obtain detection signals for the I axis and the Q axis. Further, these detected signals are respectively passed through low-pass filters (LPF) 115 and 116 to remove high-frequency components, and the peaks of the filtered pulses are converted into digital signals by A / D converters 117 and 118, respectively. Digital processing is performed in the band circuit 150.
[0043]
In the baseband circuit 150, each of the detection signals on the I axis and the Q axis is multiplied by a spreading code by multipliers 151 and 152, respectively, and despread, and the despread signals are integrated in integration dumps 154 and 155. With respect to the I-axis signal, FEC (Forward Error Correction) 156 and CRC (Cyclic Redundancy Check code) 157 are performed, and received data is extracted. Further, the Q-axis signal is fed back to the clock generator via the loop filter 158. The clock generator adjusts the clock generation timing according to the integrated output.
[0044]
In this embodiment, as shown in FIG. 1, an oscillator that oscillates only a fixed frequency such as TCXO108 is used instead of a variable frequency oscillator such as VCTCXO, and an analog loop for controlling the oscillation frequency is deleted. It has a simple component configuration.
[0045]
In the present embodiment, the sliding correlation is performed by using the phase shifter circuit 119 and shifting the generation timing, not the generation interval of the reception template pulse. The phase shifter circuit 119 here means a circuit that can control the clock generation timing by a control signal, and does not control the clock generation interval (frequency).
[0046]
FIG. 3 shows an output example of the phase shifter circuit according to the present embodiment. In the figure, the phase shifter circuit 119 operates for one cycle period (chip interval T _c ) Is divided into four equal parts, and four signals of phase # 1 to phase # 4, whose generation intervals are the same but whose generation timings are shifted by a quarter of one cycle, can be output. Then, the phase shifter circuit 119 can selectively output signals from the phase # 1 to the phase # 4 according to the control signal supplied from the baseband circuit 150.
[0047]
In the UWB transceiver according to the present embodiment, an oscillator such as the TCXO 108 that oscillates only a fixed frequency is used, and further multiplied using the PLL 107 and the VCO 106 to obtain a high-frequency clock frequency. The phase shifter circuit 119 shown in FIG. 3 controls the generation timing, not the clock frequency.
[0048]
In the conventional sliding correlation method shown in FIGS. 8 and 9, a relationship of T2 <T1 is given between the pulse interval T1 of the received signal and the pulse interval T2 of the received template waveform (see FIG. 10). . On the other hand, in the sliding correlation method according to the present embodiment, T2 = T1. Controlling the pulse generation timing means equivalently over-sampling the received signal.
[0049]
In the conventional sliding correlation method, since T2 <T1, at the pulse number k1 where T1 × k1 = T2 × (k1 + 1), the number of pulses of the received template signal becomes one extra compared with the received signal, and the code The phase will be shifted automatically (see FIG. 10).
[0050]
On the other hand, in the sliding correlation method according to the present embodiment, since the pulse generation timing is shifted, the code phase of the template signal on the receiving side does not have a code phase shift from the received signal. Therefore, as shown in FIG. 2, at the time of synchronization acquisition, a synchronization acquisition logic circuit 159 for supplying a control signal for controlling the phase of the generated code to the code generator on the receiving side is required.
[0051]
The synchronization acquisition logic circuit 159 outputs a phase control signal (code phase control signal) to the phase shifter circuit 119 so as to generate a signal whose timing is shifted from phase # 1 to phase # 4 during synchronization acquisition. (Described later).
[0052]
After acquiring the synchronization, the amount of synchronization is maintained by adjusting the amount of timing shift of the phase shifter circuit 119 based on the phase control signal (error signal) composed of the integrated output of the Q-axis signal fed back from the baseband circuit 150. Is performed.
[0053]
FIG. 4 shows a state of a pulse in the sliding correlation method according to the present embodiment. In this embodiment, since the generation timing of the reception template signal is shifted, there is a time difference Δt with respect to the reception signal in the example shown in the figure, and it can be seen that the pulse interval is equal between the reception signal and the reception template signal. The time difference Δt is provided by the phase shifter circuit 119 based on the phase control signal from the baseband circuit 159.
[0054]
In the UWB transmission / reception system according to the present embodiment, the head of the transmission signal includes a preamble part (training signal) for pulse detection and channel estimation. FIG. 5 shows the configuration of the preamble section according to the present embodiment. One block shown in the upper part of the drawing shows one symbol spread by one spreading code. Also, in the figure, it is assumed that all symbols are 1.
[0055]
Here, K is the length of the spreading code, and M is the number of timing shifts. The phase shifter circuit 119 divides the period of one cycle (chip interval) into M equal parts, and the generation intervals are the same, but the generation timing is shifted by 1 / M of one cycle (in the example shown in FIG. 3, M = 4). The number of timing shifts M corresponds to the resolution of the timing search by the phase shifter circuit 119.
[0056]
When the transceiver shown in FIG. 1 receives and synchronizes a preamble, it performs correlation reception using a certain spreading code and shifting the generation timing of a received signal by a phase shifter circuit.
[0057]
In the example shown in FIG. 5, M timing shifts are performed for one code phase. Therefore, the shift amount Δt per operation is Δt = T _c / M (T _c : Chip interval). After searching for the timing of a certain code phase, the phase shifter circuit shifts the generated code of the code generator for the receiving template by one by the code phase control signal output from the synchronization obtaining logic circuit 159 shown in FIG. , And M timing shifts are performed.
[0058]
In the example shown in FIG. 5, the code length is K, and it is considered that the reception signal can be synchronized by performing M × K correlation receptions in total.
[0059]
FIG. 6 and FIG. 7 show how correlation reception is performed by the sliding correlation method according to the present embodiment.
[0060]
FIG. 6 shows an output value of the integration dump circuit when a signal is transmitted, and FIG. 7 shows an output value of the integration dump circuit when no signal is transmitted. From each figure, it can be seen that synchronization can be obtained by using the sliding correlation method according to the present embodiment.
[0061]
After the synchronization is obtained by the timing shift of the reception template pulse using the phase shifter circuit 119, the synchronization is maintained.
[0062]
In the conventional sliding correlation method, the error signal is D / A-converted, and the synchronization is maintained by voltage-controlling the oscillation frequency of the VCTCXO. In this case, the circuit configuration is complicated because an analog loop for controlling the oscillation frequency is used.
[0063]
On the other hand, in the sliding correlation method according to the present embodiment, the synchronization is maintained by adjusting the amount of timing shift of the phase shifter circuit 119 based on the error signal. At this time, it is not necessary to directly control the frequency of the oscillator 108 as in the case of acquiring the synchronization, and the device configuration is simplified. As shown, an oscillator that outputs a fixed frequency such as TCXO can be used.
[0064]
As described above, the number of timing shifts M of the phase shifter circuit 119 corresponds to the resolution of the timing search, and the period of one cycle is divided into M equally, and the generation intervals are the same, but the generation timing is M minutes of one cycle. Are output (M = 4 in the example shown in FIG. 3). Then, a total of M × K correlation receptions are performed, thereby obtaining synchronization of the reception signals.
[0065]
If the number of timing shifts M is large, synchronization can be acquired with higher accuracy. However, the synchronization acquisition time becomes longer by that amount, and a longer preamble must be sent from the transmitter side. Conversely, if M is small, the accuracy of synchronization acquisition is low, but the time required for synchronization acquisition is short, and a short preamble may be transmitted from the transmitter.
[0066]
The number of timing shifts M is not determined arbitrarily on the receiver side, but requires a mechanism in which a predetermined negotiation is performed between the transmitter and the receiver, and a mutual notification is made together with the required preamble length.
[0067]
[Supplement]
The present invention has been described in detail with reference to the specific embodiments. However, it is obvious that those skilled in the art can modify or substitute the embodiment without departing from the scope of the present invention. That is, the present invention has been disclosed by way of example, and the contents described in this specification should not be interpreted in a limited manner. In order to determine the gist of the present invention, the claims described at the beginning should be considered.
[0068]
【The invention's effect】
As described in detail above, according to the present invention, in an ultra-wide band communication system in which interference wave capability is enhanced in combination with DS-SS (direct spread spectrum), a received signal is multiplied by a template pulse, It is possible to provide an excellent receiving apparatus and an excellent synchronous processing method that can perform reception suitably by integrating the signal or passing the signal through a low-pass filter.
[0069]
Further, according to the present invention, it is possible to provide an excellent receiving apparatus and an excellent synchronization processing method capable of acquiring synchronization in a short time with a relatively simple component configuration without using a variable frequency oscillator such as a VCTCXO. it can.
[0070]
According to the present invention, in the synchronization acquisition processing on the receiver side in the UWB transmission system, it is not necessary to control the frequency of a variable frequency oscillator such as a VCTCXO by an analog loop, and a fixed frequency oscillator such as a TCXO is used. Sliding correlation can be performed with a simple component configuration using an oscillator and a phase shifter circuit.
[0071]
In the conventional sliding correlation method, since the oscillation frequency of the VCTCXO is controlled, a response from the synchronization acquisition to the return to the reception frequency becomes a problem (f _c + Δf → f _c ). On the other hand, in the sliding method according to the present invention, the TCXO and the phase shifter circuit perform synchronization acquisition without performing frequency shift, so that a response problem at the time of synchronization acquisition is reduced.
[0072]
Further, in the conventional sliding correlation method, Δf _c Can not be too large. On the other hand, in the proposed method, the timing resolution M can be adjusted within a range where synchronization can be achieved. Δf _c When deciding, it is necessary to consider the trade-off between synchronization accuracy and transient response. On the other hand, the timing resolution M of the phase shifter circuit only needs to consider purely synchronization accuracy.
[Brief description of the drawings]
FIG. 1 is a diagram illustrating a configuration of a UWB transceiver according to an embodiment of the present invention.
FIG. 2 is a diagram showing an internal configuration of a baseband circuit in the UWB transceiver shown in FIG.
FIG. 3 is a diagram showing an output example of a phase shifter circuit according to one embodiment of the present invention.
FIG. 4 is a diagram illustrating a state of a pulse in a sliding correlation method according to an embodiment of the present invention.
FIG. 5 is a diagram showing a configuration of a preamble section.
FIG. 6 is a diagram showing a state of performing correlation reception by the sliding correlation method according to the present invention.
FIG. 7 is a diagram showing a state of performing correlation reception by the sliding correlation method according to the present invention.
FIG. 8 is a diagram showing a configuration of a conventional UWB transceiver using sliding correlation.
FIG. 9 is a diagram showing an internal configuration of a baseband circuit in the UWB transceiver shown in FIG.
FIG. 10 is a diagram for explaining the operation of the conventional sliding correlation method.
[Explanation of symbols]
101 ... antenna
102 Band-pass filter (BPF)
103 ... duplexer (SW)
104 Power amplifier (PA)
105 ... Multiplier
106 VCO
107 ... PLL
108 ... TCXO
109 ... Pulse generator
110 ... Low noise amplifier (LNA)
111 ... quadrature modulator
112 ... Pulse generator
115, 116 ... low-pass filter
117, 118 ... A / D converter
119 ... Phase shifter circuit
150 ... Baseband circuit
151, 152, 153 ... multiplier
154,155 ... Integral dump
156 ... FEC
157 ... CRC
158 ... Loop filter
159: Synchronization acquisition logic circuit

Claims (10)

A receiving device for receiving a transmission signal composed of a pulse signal train,
Receiving means for receiving the transmission signal;
Pulse generating means for generating a template pulse having substantially the same pulse generation interval as the transmission signal;
Phase shift means for shifting the generation timing of the template pulse generated by the pulse generation means at predetermined intervals,
Correlation means for correlating each template pulse whose generation timing has been shifted by the phase shift means and the reception pulse received by the reception means,
Synchronization acquisition means for acquiring synchronization of a received signal based on a correlation result by the correlation means,
Means for receiving and processing a received signal according to the acquired synchronization;
A receiving device comprising: By using an ultra-wide band communication method, a signal sequence comprising an information signal is received using an impulse signal sequence having a very short period of about several hundred picoseconds,
The receiving device according to claim 1, wherein: Performs reception of an ultra-wide band communication signal sequence in combination with DS-SS,
The receiving device according to claim 1, wherein: The pulse generation means includes an oscillator that outputs a clock signal of a fixed frequency, a PLL that multiplies the clock signal, and a VCO.
The receiving device according to claim 1, wherein: The phase shift means divides the chip interval _Tc into M equal parts, shifts the generation timing of the template pulse by Δt (= _Tc / M) per time, and shifts the timing of the template pulse by M times for each code phase. Do a shift,
The correlation means performs M × K correlation receptions (where K is a code length),
The receiving device according to claim 1, wherein: The apparatus further includes means for determining the number of timing shifts M by negotiation with the transmitter.
The receiving device according to claim 1, wherein: After the synchronization is obtained, the received signal is multiplied by the template pulse, and the timing shift amount of the phase shift means is adjusted based on the error signal obtained by integrating the signal to maintain synchronization.
The receiving device according to claim 1, wherein: A synchronous processing method for performing synchronous processing by sliding correlation between a received pulse and a template pulse,
A pulse generation step of generating a template pulse having a pulse generation interval substantially equal to the reception pulse,
A phase shifting step of shifting the generation timing of the template pulse generated by the pulse generation step at predetermined intervals;
A correlation step of correlating the received pulse with each template pulse whose generation timing has been shifted by the phase shift step;
A synchronization obtaining step of obtaining synchronization of a received signal based on a correlation result obtained by the correlation step;
A synchronization processing method comprising: In the phase shift step, the chip interval _Tc is divided into M equal parts, and the generation timing of the template pulse is shifted by Δt (= _Tc / M) each time, and M timings are performed for each code phase.・ Shift,
The correlation means performs M × K correlation receptions (where K is a code length),
9. The synchronization processing method according to claim 8, wherein: After acquiring the synchronization, a synchronization holding step of holding the synchronization by adjusting the amount of timing shift in the phase shift step based on an error signal obtained by multiplying the received pulse by the template pulse and integrating the signal. Further comprising,
9. The synchronization processing method according to claim 8, wherein:

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