JP2004170918A - Electro-optical device and electronic equipment - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To display a quality picture having no flicker, etc. by enhancing light shielding performance of semiconductor layers of a thin film transistor in an electro-optical device. <P>SOLUTION: In the electro-optical device, data lines(6a), scanning lines(3a), pixel electrodes(9a) and TFTs (Thin Film Transistors) are provided on a substrate while they are made to constitute portions of layered structure. Storage capacitances(70) each of which is electrically connected to the TFT and the pixel electrode, shield layers (400) each of which is arranged between the data line and the pixel electrode, are provided on the substrate while they are made to constitute portions of the layered structure. Since a groove (12cv) is formed in the lateral direction of the TFT, and the scanning line is formed so as to be embedded in the groove, incidence of light from the lateral direction to a semiconductor layer (1a) is suppressed. <P>COPYRIGHT: (C)2004,JPO

Description

  The present invention belongs to the technical field of an electro-optical device of an active matrix driving system, and particularly includes a thin film transistor for pixel switching (hereinafter, appropriately referred to as “TFT”) provided in a laminated structure on a substrate. The present invention belongs to the technical field of the electro-optical device and the method of manufacturing the same, and the electronic equipment provided with the same as a light valve. The present invention also belongs to the technical field such as an electrophoresis apparatus such as electronic paper, an EL (electroluminescence) apparatus, and an apparatus using an electron-emitting device (Field Emission Display and Surface-Conduction Electron-Emitter Display).

  In an electro-optical device of a TFT active matrix drive type, when incident light is applied to a channel region of a pixel switching TFT provided in each pixel, light leakage current is generated by light excitation, and the characteristics of the TFT change. I do. In particular, in the case of an electro-optical device for a light valve of a projector, since the intensity of incident light is high, it is important to shield the channel region of the TFT and its peripheral region from incident light.

  Therefore, conventionally, a light-shielding film that defines an opening area of each pixel provided on a counter substrate or a data line that passes over a TFT on a TFT array substrate and is made of a metal film such as Al (aluminum) is used. The channel region and its peripheral region are configured to be shielded from light. Further, a light-shielding film made of, for example, a high-melting-point metal may be provided at a position on the TFT array substrate facing the lower side of the TFT.

  If a light-shielding film is provided below the TFT as described above, the light reflected from the back surface from the TFT array substrate side or a plurality of electro-optical devices combined through a prism or the like to constitute one optical system can be used. It is possible to prevent return light, such as projection light, which penetrates through the prism or the like from the electro-optical device, from entering the TFT of the electro-optical device. See, for example, Patent Document 1.

JP 2002-156652 A

  However, according to the various light-shielding techniques described above, there are the following problems. That is, according to the technique of forming a light-shielding film on a counter substrate or a TFT array substrate, the light-shielding film and the channel region are three-dimensionally viewed, for example, via a liquid crystal layer, an electrode, an interlayer insulating film, or the like. Therefore, the light obliquely incident between them is not sufficiently shielded. In particular, in a small electro-optical device used as a light valve of a projector, incident light is a light beam obtained by focusing light from a light source with a lens, and a component obliquely incident cannot be neglected (for example, a light beam perpendicular to a substrate). (About 10% of a component tilted by about 10 to 15 degrees from a certain direction), and it is a practical problem that the light is not sufficiently shielded from such obliquely incident light.

  In addition, light that has entered the electro-optical device from a region without the light-shielding film is exposed to the upper surface of the substrate or the upper surface of the light-shielding film formed on the upper surface of the substrate or the lower surface of the data line (that is, the inner surface facing the channel region). ), The reflected light, or the multiple reflected light that is further reflected on the upper surface of the substrate or the light-shielding film or the inner surface of the data line may eventually reach the channel region of the TFT.

  In particular, as the definition of the electro-optical device is increased or the pixel pitch is reduced in line with the general demand for higher quality of display images in recent years, as the light intensity of incident light is increased to display a brighter image, According to the above-described conventional various light-shielding techniques, it is more difficult to perform sufficient light-shielding, and there is a problem that flicker or the like occurs due to a change in the transistor characteristics of the TFT, thereby deteriorating the quality of a displayed image. .

  In order to improve such light resistance, it seems that the formation region of the light-shielding film may be expanded. However, if the formation region of the light-shielding film is expanded, the brightness of a display image is improved. Although it is fundamentally required to increase the aperture ratio of each pixel, there is a problem that it is difficult to realize the above. Further, as described above, the presence of the light-shielding film (that is, the light-shielding film on the lower side of the TFT and the light-shielding film on the upper side of the TFT composed of the data lines, etc.) generates internal reflected light and multiple reflected light due to oblique light. In view of the above, if the formation region of the light-shielding film is unnecessarily widened, there is also a difficult problem of inviting such an increase in internally reflected light and multiple reflected light.

  The present invention has been made in view of the above problems, and has an object to suppress the occurrence of a light leak current by improving the light shielding performance of a semiconductor layer of a thin film transistor, thereby displaying a high-quality image without flicker or the like. An object of the present invention is to provide an electro-optical device capable of performing the following. Another object of the present invention is to provide an electronic apparatus including such an electro-optical device.

  In order to solve the above-mentioned problems, an electro-optical device according to the present invention has a data line extending on a substrate in a first direction, a scanning line extending in a second direction intersecting the data line, and the data line. An electro-optical device in which a pixel electrode and a thin film transistor arranged so as to correspond to a crossing area of a line and the scanning line are provided as a part of a laminated structure, and the thin film transistor and the thin film transistor are further provided on the substrate. A storage capacitor electrically connected to a pixel electrode and a shield layer disposed between the data line and the pixel electrode are provided as a part of the laminated structure, and constitute the storage capacitor. One of the pair of electrodes is formed of a multilayer film including a low resistance film.

According to the electro-optical device of the present invention, one of the pair of electrodes constituting the storage capacitor (hereinafter, sometimes simply referred to as “one electrode”) is formed of a multilayer film including a low-resistance film.
According to such a configuration, the function of the one electrode can be enhanced (for example, in addition to the function of the one electrode as the fixed potential side capacitor electrode, another function can be realized). it can. In particular, the multilayer film according to the present invention includes a low-resistance film, that is, a material having a lower electric resistance than conventional polysilicon or WSi, such as a simple metal such as aluminum, copper, and chromium, or a material containing these metals. , It is possible to achieve high electrical conductivity.
In one aspect of the electro-optical device of the present invention, the multilayer film includes a lower layer formed of a light absorbing film and an upper layer formed of a light reflecting film.
According to this configuration, the directly incident light is reflected by the upper layer, and the return light can be absorbed by the lower layer.
In another aspect of the electro-optical device of the present invention, one of the pair of electrodes forming the storage capacitor forms a part of a capacitor line formed along the second direction, and The line is made of a multilayer film including the low resistance film.

  According to this aspect, first, one of the pair of electrodes constituting the storage capacitor, that is, one of the electrodes defined above is part of the capacitance line formed along the second direction, that is, the scanning line forming direction. Is composed. Thus, for example, in order to set the one electrode to a fixed potential, it is necessary to separately provide a conductive material or the like for setting the fixed potential to each of the one electrodes of the storage capacitor that can be provided for each pixel. There is no such a case, and it is only necessary to adopt a mode in which each capacitor line is connected to a fixed potential source. Therefore, according to this aspect, the manufacturing process can be simplified, the manufacturing cost can be reduced, and the like.

  Further, in this embodiment, particularly, the capacitance line is formed of a multilayer film including the low-resistance film. According to such a configuration, the function of the capacitor line can be enhanced (for example, in addition to the function as the fixed potential side capacitor electrode of the capacitor line, other functions can be realized). . In particular, the multilayer film according to the present invention includes a low-resistance film, that is, a material having a lower electric resistance than conventional polysilicon or WSi, such as a simple metal such as aluminum, copper, and chromium, or a material containing these metals. , It is possible to achieve high electrical conductivity. And, by achieving this high electrical conductivity, in this embodiment, the narrowing of the capacitance line, that is, the narrowing of the storage capacitance can be realized without any special restriction. Therefore, this embodiment greatly contributes to improving the aperture ratio. In other words, it is possible to prevent the occurrence of crosstalk or burn-in due to the increase in resistance, which has conventionally occurred when the capacitance line is narrowed.

  In addition, since the capacitance line in this embodiment is formed of a multilayer film including the above-described low-resistance film, in addition to the low-resistance film, a film made of another material for realizing a light shielding function capable of preventing light from entering the thin film transistor. Can be additionally provided as a component of the capacitance line.

  Further, when the capacitance line is formed of a multilayer film as in the present invention, the function as a storage capacitor can be stabilized. That is, for example, if only the purpose of reducing the resistance as exemplified above is to be achieved, the capacitance line may be constituted by only one such material. May not be fully fulfilled. However, according to the present invention, as described above, since the capacitance line is composed of two or more layers, even if a material having some special function is used in one layer, the capacitance line is accumulated in another layer. Since the material that should function as a capacitor can be used in a compensated manner, the above-described problem does not occur.

  In the present invention, since the above-described multi-functionality can be achieved in the capacitance line, the degree of freedom in designing the electro-optical device is also improved.

  In another aspect of the electro-optical device according to the present invention, the capacitance line has the low-resistance film in an upper layer and a film made of a light-absorbing material in a lower layer.

  According to this aspect, multi-functionalization as described below is achieved in the capacitance line. First, since the upper layer of the capacitance line has the low resistance film, for example, assuming that light is incident from the upper layer side, the light is reflected on the surface of the low resistance film. It is possible to prevent this from directly going to the thin film transistor. This is based on the fact that the material generally has a high light reflectance.

  On the other hand, since the lower layer of the capacitance line is made of a light-absorbing material such as polysilicon, for example, after being incident inside the electro-optical device, it is reflected on the surface of the low-resistance film or the lower surface of the data line. Thus, it is possible to prevent so-called stray light generated as a result of trying to reach the thin film transistor. That is, all or a part of such stray light is absorbed in the lower layer of the capacitor line, so that the possibility that the stray light reaches the thin film transistor can be reduced.

  Note that, in the present invention, it is assumed that the capacitance line is “composed of a multilayer film”. For example, in this embodiment, even if aluminum exists in the upper layer of the capacitance line and polysilicon exists in the lower layer, Further, a film made of another material exists in an upper layer, or a film made of another material exists further below the polysilicon, or a film made of another material exists between the aluminum and the polysilicon. Needless to say, the form may exist. In some cases, the structure may be aluminum, polysilicon, aluminum, or the like in order from the top.

  In another aspect of the electro-optical device according to the present invention, the low-resistance film is made of aluminum.

  According to this aspect, since the aluminum is a very low-resistance material, the above-described effects can be more reliably achieved. Incidentally, the resistance value of aluminum is approximately 1/100 as compared with the above-described polysilicon and WSi.

  Further, according to the present configuration in which the capacitance line includes aluminum, the following operation and effect can be obtained. In the related art, since the capacitance line is formed of polysilicon alone, WSi, or the like as described above, an interlayer insulating film or the like formed on the capacitance line is formed by a contraction force or a compression force caused by these materials. Although a large stress was generated, such a problem does not occur in the present embodiment. That is, in the related art, the thickness of the interlayer insulating film is limited by the presence of the stress, and if the thickness is too small, the interlayer insulating film may be damaged by the stress. In the present aspect, it is not necessary to consider the presence of such stress, and as a result, the thickness of the interlayer insulating film can be reduced as compared with the related art, and therefore, the overall size of the electro-optical device can be reduced. .

  In one aspect of the electro-optical device of the present invention, the thin film transistor includes a semiconductor layer including a channel region extending in a longitudinal direction and a channel adjacent region extending further in the longitudinal direction from the channel region. A light-shielding portion. In one aspect of the electro-optical device of the present invention, the scanning line extends in a direction intersecting with the longitudinal direction and overlaps the channel region when viewed in plan. And a horizontal protruding portion that protrudes from the main body portion in the longitudinal direction beside the channel region and forms the light shielding portion.

  According to this aspect, the scanning line has a horizontal protruding portion protruding along the channel adjacent region from the main body including the gate electrode of the thin film transistor in a plan view, beside the channel region. Therefore, incident light and return light traveling obliquely to the substrate surface, and oblique light such as internal reflected light and multiple reflected light based on the incident light and the reflected light incident on the channel region and the channel adjacent region are detected by scanning lines. The light can be at least partially blocked not only by the main body including the gate electrode but also by light absorption or reflection by the horizontal protrusion. In this case, in particular, by shielding the light with a horizontal projection that is located at a position where the interlayer distance from the channel adjacent region is very small, that is, an interlayer position that is generally separated by the thickness of the gate insulating film, it is very effective. The light shielding can be performed.

  For example, when a lower light-shielding film is provided below a thin film transistor on a substrate, a lower light-shielding film having a relatively small interlayer distance and a horizontal projection or a main body of a scanning line functioning as a light-shielding film are formed. Since a configuration in which a channel adjacent region or a channel region is interposed therebetween is obtained, very high light-shielding performance with respect to oblique light can be obtained.

  As a result, according to this aspect, it is possible to enhance the light resistance, and the pixel electrode is formed by the thin film transistor in which the light leakage current is reduced even under severe conditions in which strong incident light and return light enter. Switching can be favorably performed, and finally a bright and light-contrast image can be displayed.

  In another aspect of the electro-optical device of the present invention, the main body and the horizontal projection are integrally formed of the same film.

  According to this aspect, when manufacturing the electro-optical device, the light-shielding protrusion can be formed in the step of forming the scanning line together with the main body. Therefore, an additional process for forming the protrusion is not necessary. Not required. Therefore, the laminated structure on the substrate and the manufacturing process can be simplified.

  In another aspect of the electro-optical device of the present invention, the main body has a wide portion including the gate electrode.

  According to this aspect, since the portion including the gate electrode is formed wide in the main portion of the scanning line, the light blocking performance of the wide main portion with respect to oblique light in the channel region and the channel adjacent region can be improved. Further, when manufacturing the first electro-optical device, in order to form the specific portion of the main body portion wide as described above, only a slight change needs to be made to the plane pattern of the scanning line, and an additional process is required. Is unnecessary.

  Further, in the aspect including the horizontal protrusion, the horizontal protrusion further protrudes on both sides of the channel adjacent region located on the source side and the drain side of each of the channel regions in plan view. ing.

  According to this aspect, for each thin film transistor, a total of four protrusions are provided on the source side and the drain side and on both sides thereof. Therefore, these projections can improve the light shielding performance with respect to oblique light that enters three-dimensionally from various directions.

  In another aspect of the electro-optical device of the present invention, the thin film transistor includes a semiconductor layer including a channel region extending in a longitudinal direction, and includes an upper light-shielding film that covers at least the channel region of the thin film transistor from above. The upper light-shielding film is formed at least partially in a concave shape when viewed from the channel region side on a cross section orthogonal to the longitudinal direction of the channel region.

  According to this aspect, an upper light-shielding film that covers at least the channel region from above is provided, and the upper light-shielding film is at least partially viewed from the channel region side on a cross section orthogonal to the longitudinal direction of the channel region. It is formed in a concave shape. That is, the lower side is formed in a concave shape. Therefore, as compared with the case where the upper light-shielding film is flat, the incident light that travels obliquely with respect to the substrate surface and the oblique light such as the internal reflection light and the multiple reflection light based on the incident light and the return light are finally emitted. The upper light-shielding film can more effectively prevent the light from entering the channel region from an obliquely upper side.

  For example, in the case where a lower light-shielding film is provided below a thin film transistor over a substrate, a structure in which a channel region is sandwiched between the lower light-shielding film and the upper light-shielding film can be obtained. On the other hand, very high light-shielding performance can be obtained. At this time, the lower light-shielding film may be at least partially formed in a concave shape when viewed from the channel region side on a cross section orthogonal to the longitudinal direction of the channel region, in a vertical direction opposite to the above-described unevenness of the upper light-shielding film. .

  As a result, according to this aspect, it is possible to enhance the light resistance, and the pixel electrode is formed by the thin film transistor in which the light leakage current is reduced even under severe conditions in which strong incident light and return light enter. Switching can be favorably performed, and finally a bright and light-contrast image can be displayed.

  In another aspect of the electro-optical device of the invention, the thin film transistor has a semiconductor layer including a channel region extending in the first direction, and the scanning line faces the channel region via a gate insulating film. A main line portion including a gate electrode of the thin film transistor arranged and extending in a second direction intersecting the first direction as viewed in plan, having a main line portion in the second direction from the channel region in plan view An enclosing portion extending so as to surround the semiconductor layer from the main line portion at a deviated location.

  According to this aspect, the scanning line has the surrounding portion extending so as to surround the semiconductor layer from the main line portion at a position deviated from the channel region by the predetermined distance in the second direction in plan view. Therefore, oblique light such as incident light and return light propagating toward the substrate surface, and inner surface reflected light and multiple reflected light based on the incident light and the reflected light incident on the channel region and the adjacent region to the channel are controlled by the gate of the scanning line. It can be at least partially blocked by light absorption or light reflection not only by the body part containing the electrodes, but also in particular by the surrounding part. In this case, in particular, light is shielded by a surrounding portion disposed at a position where the interlayer distance from the channel region or the channel adjacent region is very small, that is, an interlayer position generally separated by the thickness of the gate insulating film. By blocking light inclined in any direction, the light can be blocked very effectively.

  As a result, according to this aspect, it is possible to enhance the light resistance, and the pixel electrode is formed by the thin film transistor with reduced light leakage current even under severe conditions such as intense incident light and return light being incident. The switching can be favorably controlled, and finally, according to the present invention, a bright and light-contrast image can be displayed.

  In view of such a technical effect, in the present invention, “surrounding the semiconductor layer in plan view” means that the surrounding portion is formed so as to extend continuously around the semiconductor layer in plan view. In addition to the case where the surrounding portion is formed with a slight break around the lower side of the channel region around the semiconductor layer in plan view, or the surrounding portion is formed intermittently, it is dotted in an island shape This is a broad concept including the case where the surrounding portion is formed.

  In this aspect, in particular, a part of the source region and a part of the drain region of the semiconductor layer are each a contact hole opening region, and the surrounding portion includes the semiconductor layer including the contact hole opening region. Siege.

  According to such a configuration, the source region and the drain region of the semiconductor layer can be connected to, for example, a data line, a pixel electrode, a storage capacitor, or a relay wiring or a relay layer extending therefrom via a contact hole. In this case, in particular, the light shielding performance around the contact hole opening region can be improved by the surrounding portion. Therefore, even if the contact holes are provided, highly reliable light shielding can be performed.

  In such a configuration, at least one of the source region and the drain region is formed to have the same width as the width of the channel region including the contact hole opening region.

  According to such a configuration, the source region and the drain region having the same width as the channel region, including the contact hole opening region, are surrounded by a rectangular surrounding portion at a position relatively close to the planar region. Can be covered with gully.

  In the aspect having the surrounding portion, in particular, the scanning line includes a vertical protruding portion that protrudes in the vertical direction of the substrate from the main line portion at a position deviated from the channel region by a predetermined distance in the second direction. It is better to have more.

  According to this aspect, since the main line portion includes the vertical protrusion protruding in the vertical direction of the substrate, the channel region can be three-dimensionally covered by the main line portion including the vertical protrusion, and the light-shielding performance is improved. Can be further enhanced. In particular, in the case of a so-called top gate type in which the scanning line is located above the channel region, a configuration is obtained in which the channel region is three-dimensionally covered from above by a main line portion including a vertical projection. The predetermined distance for the surrounding part and the predetermined distance for the vertical protruding part may be the same or different.

  In the aspect including the surrounding portion, the scanning line may further include a vertical protruding portion protruding from the surrounding portion in a vertical direction of the substrate.

  According to this aspect, the channel region can be three-dimensionally covered by the vertical projection of the main line portion and the vertical projection of the surrounding portion, and the light-shielding performance can be further enhanced. In particular, in the case of a so-called top gate type in which the scanning lines are located above the channel region, a configuration is obtained in which the channel region is three-dimensionally covered from above by the main line portion and the surrounding portion each including the vertical projection. In addition, these vertical protrusion parts may protrude continuously or may protrude separately.

  In another aspect of the electro-optical device of the invention, the thin film transistor has a semiconductor layer including a channel region extending in the first direction, and the scanning line faces the channel region via a gate insulating film. A main line portion including a gate electrode of the thin film transistor arranged and extending in a second direction intersecting the first direction as viewed in plan, having a main line portion in the second direction from the channel region in plan view And a vertical protruding portion protruding downward from the main line portion at a deviated portion.

  According to this aspect, the scanning line has a vertical protruding portion that protrudes downward from the main line portion at a position separated from the channel region by the predetermined distance in the second direction when viewed in a plan view. Therefore, oblique light such as incident light and return light propagating toward the substrate surface, and inner surface reflected light and multiple reflected light based on the incident light and the reflected light incident on the channel region and the adjacent region to the channel are controlled by the gate of the scanning line. Not only the main body including the electrodes, but also the projections, especially the channel region and the channel adjacent region are three-dimensionally shielded by the main line portion and the projection at a position close to the channel region or the channel adjacent region. The light shielding can be performed effectively.

  As a result, according to this aspect, it is possible to enhance the light resistance, and the pixel electrode is formed by the thin film transistor in which the light leakage current is reduced even under severe conditions in which strong incident light and return light enter. The switching can be controlled satisfactorily, and finally, according to the present invention, a bright and light-contrast image can be displayed.

  In the aspect including the above-described vertical protrusion, in particular, the substrate further includes a lower light-shielding film that covers at least the channel region from below, and the vertical protrusion includes a lower light-shielding film at a distal end thereof. It is preferable to make contact with the light shielding film.

  According to such a configuration, a configuration in which a channel adjacent region or a channel region is sandwiched between a lower light-shielding film having a relatively small interlayer distance and an enclosing portion or a main body of a scanning line functioning as a light-shielding film can be obtained. . In addition, the space between the lower light-shielding film and the surrounding portion of the scanning line and the main body where the channel adjacent region or the channel region exists is a space at least partially closed by the protruding portion. Therefore, a very high light-shielding performance can be obtained with respect to oblique light inclined in any direction.

  According to this aspect, for example, instead of forming the gate electrode and the scanning line of the thin film transistor in the same layer, the gate electrode and the scanning line are formed as separate layers, and as the scanning line, It is possible to use the lower light-shielding film of this embodiment. That is, in this case, the lower light-shielding film also has a function as a scanning line. Further, the gate electrode and the scanning line may be formed in the same layer, but the lower light-shielding film may have a function as a scanning line. In this case, two scanning lines are provided in parallel for one thin film transistor, and the scanning lines have a redundant structure. Thereby, even if one of the scanning lines has any trouble such as disconnection, the other scanning line can be used, and therefore, an advantage of higher reliability can be obtained.

  In the case where the lower light-shielding film also functions as a scanning line as described above, the lower light-shielding film is formed in a stripe shape so as to correspond to each row of the thin film transistors arranged in a matrix. There is a need.

  Alternatively, a lower light-shielding film that covers at least the channel region from below may be further provided on the substrate, and the vertical protrusion may not be in contact with the lower light-shielding film.

  According to such a configuration, a configuration in which a channel adjacent region or a channel region is sandwiched between a lower light-shielding film having a relatively small interlayer distance and an enclosing portion or a main body of a scanning line functioning as a light-shielding film can be obtained. . In addition, the space between the lower light-shielding film and the surrounding portion of the scanning line and the main body where the channel adjacent region or the channel region exists is a space partially closed by the protruding portion. Therefore, a very high light-shielding performance can be obtained with respect to oblique light inclined in any direction.

  In the case where the configuration in which the lower light-shielding film is not in contact with the scanning line as described above is used, regardless of the conductivity of the lower light-shielding film, an adverse effect due to a potential change of the lower light-shielding film, The adverse effects can be prevented.

  In another aspect of the electro-optical device of the invention, the thin film transistor has a semiconductor layer including a channel region extending in the first direction, and the scanning line faces the channel region via a gate insulating film. A main line portion including a gate electrode of the thin film transistor arranged and extending in a second direction intersecting the first direction when viewed in plan, the main line portion being disposed in a groove dug on the substrate; And at least partially covering the channel region from the side.

  According to this aspect, the scanning line has the main line portion extending in the second direction when viewed in plan. Here, in particular, a portion of the main line portion in the groove disposed in the groove at least partially covers the channel region from the side. Accordingly, the incident light traveling obliquely to the substrate surface and particularly the return light traveling obliquely to the back surface, and oblique light based on these, such as internal reflected light and multiple reflected light, are generated in the channel region and the channel adjacent region. Can be at least partially prevented by light absorption or light reflection by the inside of the groove. By increasing the light resistance in this way, even under severe conditions where strong incident light or return light is incident, the thin-film transistor with reduced light leakage current can control the switching of the pixel electrode satisfactorily and achieve a bright and high A contrast image can be displayed.

  In addition, since the main line portion of the scanning line includes the in-groove portion, the cross-sectional area of the in-groove portion in a cross section perpendicular to the second direction and the cross-sectional area of the outer portion of the groove located outside the groove are increased. Accordingly, the wiring resistance of the scanning line can be reduced. If the wiring resistance of the scanning line is reduced in this manner, the occurrence of crosstalk, flicker, and the like due to the signal delay of the scanning signal can be reduced, and ultimately, the electro-optical device can have higher definition or the pixel pitch can be reduced. In addition, a high-quality image can be displayed. As a result, the present invention enables bright and high-quality image display.

  In the present invention, the groove in which the main line portion of the scanning line is at least partially disposed may be directly dug in the substrate or may be dug in the base insulating film laminated on the substrate.

  In another aspect of the electro-optical device of the invention, the thin film transistor has a semiconductor layer including a channel region extending in the first direction, and the scanning line faces the channel region via a gate insulating film. A main line portion including a gate electrode of the thin film transistor arranged and extending in a second direction intersecting the first direction when viewed in plan, the main line portion extending in the second direction and being on the substrate; An inner groove portion disposed in the dug groove and an outer groove portion extending in the second direction and disposed outside the groove.

  According to this aspect, the scanning line has the main line portion extending in the second direction when viewed in plan. Here, in particular, since the main line portion includes an inner groove portion and an outer groove portion extending in the second direction, the main line portion depends on the total cross-sectional area of the inner groove portion and the outer groove portion in a cross section perpendicular to the second direction. The wiring resistance of the scanning line can be reduced. For example, in view of the fact that there is a certain limit on the level difference allowed on the substrate surface that defines the layer thickness of the electro-optical material such as liquid crystal, in view of the relationship with the operation failure of the electro-optical material such as poor alignment of liquid crystal, Increases the cross-sectional area of the scan line relative to the total thickness of the stacked structure on the substrate compared to traditional scan lines deposited on top or completely embedded in the trench Such a structure as the present invention is very advantageous in practical use.

  By thus lowering the wiring resistance of the scanning line, it is possible to reduce the occurrence of crosstalk, flicker, and the like due to the signal delay of the scanning signal, and ultimately to improve the definition of the electro-optical device or the pixel pitch. In addition, a high-quality image can be displayed.

  In the present invention, the groove in which the main line portion of the scanning line is partially arranged may be directly dug in the substrate or may be dug in the base insulating film laminated on the substrate.

  As described above, by providing a scan line with a special element, for example, a horizontal projection, an enclosing portion, or the like, particularly in a mode in which the semiconductor layer can be shielded from light, the scan line is a light-shielding metal or alloy. It is good to consist of a film.

  According to this aspect, the scanning line is made of a light-shielding film containing a metal or an alloy. More specifically, for example, Ti (titanium), Cr (chromium), W (tungsten), Ta (tantalum), Mo (molybdenum) ), A metal simple substance, an alloy, a metal silicide, a polysilicide containing at least one of refractory metals such as Pb (lead), and a laminate thereof. Therefore, with the main body portion and the protruding portion of the scanning line made of such a light-shielding film, the light-shielding performance in the channel region or the channel adjacent region with respect to oblique light can be further improved.

  However, even if the scanning lines are formed of a polysilicon film or the like instead of such a light-shielding film, light-shielding performance according to the light absorption characteristics can be obtained.

  In this aspect, the scanning line has a multilayer structure of a metal film and a silicon film. According to such a configuration, the light shielding performance can be further improved.

  In another aspect of the electro-optical device of the present invention, at least a part of the scanning line, the data line, a pair of electrodes forming the storage capacitor, and the shield layer are made of a light-blocking material, and the at least part is And a built-in light-shielding film in the laminated structure.

  According to this aspect, various elements constituting the laminated structure on the substrate are made of a light-shielding material, and form a light-shielding film that defines a light-transmitting region. As a result, a so-called “built-in light-shielding film” is provided on the substrate, and light incident on the semiconductor layer of the thin film transistor causes a light leak current to generate a flicker on an image. It is possible to avoid it beforehand. That is, light resistance to the thin film transistor or its semiconductor layer can be improved. By the way, if the thin film transistor is formed in the lowermost layer on the substrate or in a layer close thereto, the scanning lines, data lines, storage capacitors, and shield layers are all formed on the upper side of the thin film transistor. The light-shielding film composed of these can be called “upper light-shielding film”.

  Note that the “light-shielding material” in the present embodiment refers to at least one of refractory metals such as Ti (titanium), Cr (chromium), W (tungsten), Ta (tantalum), and Mo (molybdenum). It comprises a metal simple substance, an alloy, a metal silicide, a polysilicide, and a laminate of these. The “light-shielding material” may also include aluminum (Al).

  Further, in this embodiment, in particular, all of the above-described various elements may constitute the “built-in light-shielding film”, but preferably, at least one of the two elements extending in the direction intersecting with each other is preferable. The set may constitute the “built-in light shielding film”. For example, in a case where a capacitor line is formed along a second direction in which the scanning line extends, and a part of the capacitor line is one of a pair of electrodes forming the storage capacitor, It is preferable that the capacitance line and the data line are made of a light-shielding material, and these constitute a “built-in light-shielding film”. According to such a configuration, the shape of the “built-in light-shielding film” has a lattice shape, and it is possible to suitably correspond to the matrix arrangement which is usually adopted as the arrangement mode of the pixel electrodes.

Note that, in the present invention, it is possible to adopt various aspects as described above, but in the various aspects of the present invention described above, regardless of the citation form of each claim described in the claims, It is basically possible to freely combine one embodiment with another. However, due to the nature of the matter, there may be conflicts. For example, a mode in which a capacitance line is formed of a multilayer film including a low-resistance film is combined with a mode in which a projection is provided horizontally with respect to a scanning line. Of course, it is also possible to configure an electro-optical device having three or more aspects.
In order to solve the above-mentioned problems, another electro-optical device of the present invention provides a data line extending in a first direction and a scanning line extending in a second direction intersecting the data line on a substrate, and An electro-optical device in which a pixel electrode and a thin film transistor arranged to correspond to an intersection region of the data line and the scanning line are provided as a part of a laminated structure, and the thin film transistor is further provided on the substrate. And a storage capacitor electrically connected to the pixel electrode, and a light-shielding film disposed between the data line and the pixel electrode are provided as a part of the stacked structure. One of the pair of electrodes is formed of a multilayer film including a low resistance film.

  According to another electro-optical device of the present invention, by having a configuration substantially similar to that of the above-described electro-optical device of the present invention, it is possible to enjoy substantially the same effects as those of the electro-optical device. It is possible to do. In the present invention, in particular, since the light shielding film is provided instead of the shield layer in the above-described electro-optical device, it becomes possible to effectively shield light incident from above the thin film transistor. Accordingly, light leakage current does not occur in the semiconductor layer of the thin film transistor.

  According to another embodiment of the invention, there is provided an electronic apparatus including the above-described electro-optical device. However, the various aspects are included.

According to the electronic apparatus of the present invention, since the above-described electro-optical device of the present invention is provided, light incidence on the semiconductor layer of the thin film transistor is suppressed, and almost no flicker on an image due to a light leak current occurs. Projection-type display devices, liquid crystal televisions, mobile phones, electronic organizers, word processors, viewfinder-type or monitor direct-view type video tape recorders, workstations, videophones, POS terminals, touch panels, etc. that can display high-quality images without images Various electronic devices can be realized.
The operation and other advantages of the present invention will become more apparent from the embodiments explained below.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the following embodiments, the electro-optical device of the present invention is applied to a liquid crystal device.

(1st Embodiment)
First, the configuration of the pixel portion of the electro-optical device according to the first embodiment of the present invention will be described with reference to FIGS. Here, FIG. 1 is an equivalent circuit of various elements, wiring, and the like in a plurality of pixels formed in a matrix forming an image display area of the electro-optical device. FIG. 2 is a plan view of a plurality of pixel groups adjacent to each other on a TFT array substrate on which data lines, scanning lines, pixel electrodes, and the like are formed. FIG. 3 is a plan view mainly showing only main components of FIG. 2, specifically, only the data lines, the shield layer, and the pixel electrodes in order to show the positional relationship between the pixel electrodes. FIG. 4 is a sectional view taken along line AA ′ of FIG. In FIG. 4, the scale of each layer / member is made different so that each layer / member has a size recognizable in the drawing.

  In FIG. 1, a plurality of pixels formed in a matrix forming an image display area of the electro-optical device according to the present embodiment are each formed with a pixel electrode 9a and a TFT 30 for controlling switching of the pixel electrode 9a. The data line 6a to which the image signal is supplied is electrically connected to the source of the TFT 30. The image signals S1, S2,..., Sn to be written to the data lines 6a may be supplied line-sequentially in this order, or may be supplied to a plurality of adjacent data lines 6a for each group. Good.

  Also, the scanning line 3a is electrically connected to the gate of the TFT 30, and the scanning signals G1, G2,..., Gm are applied to the scanning line 3a in a pulsed manner in this order at a predetermined timing. It is configured. The pixel electrode 9a is electrically connected to the drain of the TFT 30, and by closing the switch of the TFT 30 as a switching element for a certain period, the image signals S1, S2,... Write at a predetermined timing.

  The image signals S1, S2,..., Sn of a predetermined level written in the liquid crystal as an example of the electro-optical material via the pixel electrodes 9a are held for a certain period between the pixel electrodes 9a and the counter electrode formed on the counter substrate. The liquid crystal modulates light by changing the orientation and order of the molecular assembly according to the applied voltage level, thereby enabling gray scale display. In the normally white mode, the transmittance for the incident light decreases according to the voltage applied in each pixel unit, and in the normally black mode, the light enters according to the voltage applied in each pixel unit Light transmittance is increased, and light having a contrast corresponding to an image signal is emitted from the electro-optical device as a whole.

  In order to prevent the held image signal from leaking, a storage capacitor 70 is added in parallel with a liquid crystal capacitor formed between the pixel electrode 9a and the counter electrode. The storage capacitor 70 is provided side by side with the scanning line 3a, includes a fixed potential side capacitor electrode, and includes a capacitor electrode 300 fixed to a constant potential.

  Hereinafter, an actual configuration of the electro-optical device that realizes the above-described circuit operation using the data line 6a, the scanning line 3a, the TFT 30, and the like will be described with reference to FIGS.

  First, in FIG. 2, a plurality of pixel electrodes 9a are provided in a matrix on the TFT array substrate 10 (the outline is indicated by a dotted line portion 9a '), and each of the pixel electrodes 9a extends along the vertical and horizontal boundaries of the pixel electrode 9a. A data line 6a and a scanning line 3a are provided. The data line 6a has a laminated structure including an aluminum film or the like as described later, and the scanning line 3a is formed of, for example, a conductive polysilicon film. Further, the scanning line 3a is arranged so as to face a channel region 1a 'indicated by a hatched region in the semiconductor layer 1a, which rises to the right in the figure, and the scanning line 3a functions as a gate electrode. That is, pixel switching TFTs 30 are provided at the intersections of the scanning lines 3a and the data lines 6a, in which the main lines of the scanning lines 3a are opposed to each other as gate electrodes in the channel region 1a '.

  Next, as shown in FIG. 4, which is a cross-sectional view taken along the line AA ′ of FIG. 2, the electro-optical device is disposed to face the TFT array substrate 10 made of, for example, a quartz substrate, a glass substrate, or a silicon substrate. And a counter substrate 20 made of, for example, a glass substrate or a quartz substrate.

  As shown in FIG. 4, the pixel electrode 9a is provided on the side of the TFT array substrate 10, and an alignment film 16 on which a predetermined alignment process such as a rubbing process is performed is provided above the pixel electrode 9a. ing. The pixel electrode 9a is made of, for example, a transparent conductive film such as an ITO film. On the other hand, a counter electrode 21 is provided over the entire surface of the counter substrate 20, and an alignment film 22 on which a predetermined alignment process such as a rubbing process is performed is provided below the counter electrode 21. . The counter electrode 21 is made of a transparent conductive film such as an ITO film, like the pixel electrode 9a, and the alignment films 16 and 22 are made of a transparent organic film such as a polyimide film. An electro-optical material such as liquid crystal is sealed in a space surrounded by a sealing material (see FIGS. 20 and 21) described below between the TFT array substrate 10 and the opposing substrate 20 which are arranged so as to face each other. Is formed. The liquid crystal layer 50 assumes a predetermined alignment state by the alignment films 16 and 22 when no electric field is applied from the pixel electrode 9a. The liquid crystal layer 50 is made of, for example, an electro-optical material in which one or several kinds of nematic liquid crystals are mixed. The sealing material is an adhesive made of, for example, a photo-curing resin or a thermosetting resin for bonding the TFT substrate 10 and the counter substrate 20 around the periphery thereof, and is used for setting a distance between the two substrates to a predetermined value. Spacers such as glass fibers or glass beads are mixed.

  On the other hand, on the TFT array substrate 10, in addition to the pixel electrode 9a and the alignment film 16, various configurations including these are provided in a laminated structure. As shown in FIG. 4, the laminated structure includes, in order from the TFT array substrate 10, a first layer including the lower light-shielding film 11a, a second layer including the TFT 30 and the scanning line 3a, the storage capacitor 70, the data line 6a, and the like. , A fourth layer including the shield layer 400 and the like, and a fifth layer (uppermost layer) including the pixel electrode 9a and the alignment film 16 and the like. A base insulating film 12 is provided between the first and second layers, a first interlayer insulating film 41 is provided between the second and third layers, and a second interlayer insulating film 42 is provided between the third and fourth layers. A third interlayer insulating film 43 is provided between the fourth and fifth layers, respectively, to prevent short circuit between the above-described elements. In addition, the various insulating films 12, 41, 42, and 43 are also provided with, for example, contact holes for electrically connecting the high-concentration source region 1d in the semiconductor layer 1a of the TFT 30 and the data line 6a. I have. Hereinafter, each of these elements will be described in order from the bottom.

  First, the lower layer 11a is provided in the first layer. The lower light-shielding film 11a is patterned in a lattice shape when viewed in a plan view, thereby defining an opening region of each pixel (see FIG. 2). In a region where the scanning line 3a and the data line 6a of the lower light-shielding film 11a intersect, a region is formed so as to project the corner of the pixel electrode 9a.

  In the present embodiment, particularly, the lower light-shielding film 11a has a two-layer structure including a metal layer M1 below the barrier layer B1 and a barrier layer B1 for preventing oxidation of the metal layer M1 above the metal layer M1. Accordingly, even if a high-temperature processing step (for example, an annealing process for forming a TFT 30 described later) is performed when forming a component above the lower light-shielding film 11a in the laminated structure, even if a high-temperature processing step is performed, Is provided with the barrier layer B1, so that oxidation of the metal layer M1 can be prevented beforehand. The lower light-shielding film 11a may be extended from the image display area to the periphery thereof and connected to a constant potential source in order to prevent the potential fluctuation from adversely affecting the TFT 30.

  Next, a TFT 30 and a scanning line 3a are provided as a second layer. As shown in FIG. 4, the TFT 30 has an LDD (Lightly Doped Drain) structure, and includes a scanning line 3a that functions as a gate electrode as described above, for example, a scanning line made of a polysilicon film. A channel region 1a 'of the semiconductor layer 1a in which a channel is formed by an electric field from 3a, an insulating film 2 including a gate insulating film for insulating the scanning line 3a from the semiconductor layer 1a, a lightly doped source region 1b in the semiconductor layer 1a, A high concentration drain region 1c, a high concentration source region 1d and a high concentration drain region 1e are provided.

  The TFT 30 preferably has an LDD structure as shown in FIG. 4, but may have an offset structure in which impurities are not implanted in the low-concentration source region 1b and the low-concentration drain region 1c, or a part of the scanning line 3a. A self-aligned TFT in which a high concentration source region and a high concentration drain region are formed in a self-aligned manner by implanting impurities at a high concentration using a gate electrode formed of as a mask. Further, in the present embodiment, a single gate structure in which only one gate electrode of the pixel switching TFT 30 is disposed between the high-concentration source region 1d and the high-concentration drain region 1e has been described. Electrodes may be arranged. When a TFT is formed with a dual gate or triple gate or more as described above, a leak current at a junction between a channel and a source / drain region can be prevented, and a current in an off state can be reduced. Further, the semiconductor layer 1a constituting the TFT 30 may be a non-single-crystal layer or a single-crystal layer. For forming the single crystal layer, a known method such as a bonding method can be used. By using the semiconductor layer 1a as a single crystal layer, the performance of peripheral circuits in particular can be improved.

  Under the above-described lower light-shielding film 11a and below the TFT 30, a base insulating film 12 made of, for example, a silicon oxide film is provided. The base insulating film 12 has a function of interlayer insulating the TFT 30 from the lower light-shielding film 11a, and is formed over the entire surface of the TFT array substrate 10 so that the surface of the TFT array substrate 10 is roughened at the time of polishing the surface and dirt remaining after cleaning. It has a function of preventing a change in the characteristics of the pixel switching TFT 30.

  In the present embodiment, in particular, the base insulating film 12 has a groove having the same width as the channel length or a groove longer than the channel length (a groove formed in a contact hole shape) on both sides of the semiconductor layer 1a in plan view. ) 12cv is dug, and corresponding to the groove 12cv, the scanning line 3a stacked thereabove includes a portion formed in a concave shape on the lower side (in FIG. 2, it is not necessary to avoid complication). (See FIG. 5). Further, since the scanning line 3a is formed so as to fill the entire groove 12cv, the horizontal protruding portion 3b integrally formed with the scanning line 3a is extended to the scanning line 3a. Has become. As a result, as shown in FIG. 2, the semiconductor layer 1a of the TFT 30 is covered from the side as viewed in plan, so that the incidence of light from at least this portion is suppressed. It has become. The horizontal protrusion 3b may be provided on only one side of the semiconductor layer 1a. The groove 12cv and the scanning lines 3a and the horizontal protrusions 3b stacked thereon will be described in detail again with reference to FIG.

  Now, a storage capacitor 70 and a data line 6a are provided in the third layer following the second layer. The storage capacitor 70 includes a first relay layer 71 serving as a pixel potential side capacitor electrode electrically connected to the high concentration drain region 1 e and the pixel electrode 9 a of the TFT 30, and a capacitor electrode 300 serving as a fixed potential side capacitor electrode. It is formed by being opposed to each other with the dielectric film 75 interposed therebetween. According to the storage capacitor 70, the potential holding characteristic of the pixel electrode 9a can be significantly improved. Further, as can be seen from the plan view of FIG. 2, the storage capacitor 70 according to the present embodiment is formed so as not to reach the light transmission region substantially corresponding to the formation region of the pixel electrode 9a, in other words, It is formed so as to fit within the light shielding area. That is, in the storage capacitor 70, the lower light-shielding film 11 chamfers the corner of the pixel electrode 9a at a region overlapping the scanning line 3a between the adjacent data lines 6a and at a corner where the scanning line 3a and the data line 6a intersect. Formed in the area. As a result, the pixel aperture ratio of the entire electro-optical device is maintained relatively large, so that a brighter image can be displayed.

  More specifically, the first relay layer 71 is made of, for example, a conductive polysilicon film and functions as a pixel potential side capacitance electrode. However, the first relay layer 71 may be formed of a single-layer film or a multilayer film containing a metal or an alloy. In the case of a multilayer film, the lower layer may be made of a light absorbing conductive polysilicon film, and the upper layer may be made of a light reflecting metal or alloy. The first relay layer 71 has a function of relay connection between the pixel electrode 9a and the high-concentration drain region 1e of the TFT 30 via the contact holes 83, 85, and 89, in addition to the function as the pixel potential side capacitor electrode. Have. As shown in FIG. 2, the first relay layer 71 is formed to have substantially the same shape as the planar shape of the capacitance electrode 300 described later.

  The capacitance electrode 300 functions as a fixed potential side capacitance electrode of the storage capacitor 70. In the first embodiment, in order to set the capacitance electrode 300 to a fixed potential, an electrical connection is made to the fixed potential shield layer 400 via the contact hole 87.

  However, in a mode in which the capacitor electrode 300 and the data line 6a are formed as separate layers as described later, preferably, for example, the capacitor electrode 300 is moved from the image display region 10a where the pixel electrode 9a is arranged to the periphery thereof. The capacitor electrode 300 may be maintained at a fixed potential by taking a measure such as extending and electrically connecting to a constant potential source. Incidentally, the "constant potential source" described here may be a constant potential source of a positive power supply or a negative power supply supplied to the data line driving circuit 101, or a constant potential source supplied to the counter electrode 21 of the counter substrate 20. But it doesn't matter.

  In the present embodiment, particularly, the data line 6a is formed as the same film as the capacitor electrode 300. Here, the “same film” means that they are formed simultaneously as the same layer or in a manufacturing process. However, the space between the capacitor electrode 300 and the data line 6a is not formed continuously in a planar shape, but is separated from each other in patterning.

  Specifically, as shown in FIG. 2, the capacitor electrode 300 is formed so as to overlap with the formation region of the scanning line 3a, that is, while being divided along the X direction in the drawing. The layer 1a is formed so as to overlap in the longitudinal direction, that is, to extend in the Y direction in the drawing. More specifically, the capacitor electrode 300 includes a main line portion extending along the scanning line 3a, and a protruding portion (approximately in the drawing) protruding upward along the semiconductor layer 1a in a region adjacent to the semiconductor layer 1a in FIG. (A portion that looks like a trapezoid) and a constricted portion where a portion corresponding to a contact hole 85 described later is slightly constricted. Of these, the protrusion contributes to an increase in the formation area of the storage capacitor 70.

  On the other hand, the data line 6a has a main line portion extending linearly along the Y direction in FIG. The high-concentration drain region 1e at the upper end in FIG. 2 of the semiconductor layer 1a has a shape that is bent to the right by 90 degrees at right angles so as to overlap the region of the protrusion of the storage capacitor 70. This is for avoiding the data line 6a and electrically connecting the semiconductor layer 1a and the storage capacitor 70 (see FIG. 4).

  In the present embodiment, patterning or the like is performed so that the above-described shape is exhibited, and the capacitor electrode 300 and the data line 6a are formed simultaneously.

Further, as shown in FIG. 4, the capacitor electrode 300 and the data line 6a are formed as a film having a two-layer structure of a lower layer made of conductive polysilicon and an upper layer made of aluminum. Of these, the data line 6a is electrically connected to the semiconductor layer 1a of the TFT 30 via a contact hole 81 penetrating an opening of the dielectric film 75 described later. Since the first relay layer 71 is made of a conductive polysilicon film, the electrical connection between the data line 6a and the semiconductor layer 1a is directly Is realized by the polysilicon film. That is, in order from the bottom, the polysilicon film of the first relay layer, the polysilicon film below the data line 6a, and the aluminum film thereabove. Therefore, it is possible to maintain good electrical connection between them. In the present embodiment, the data line 6a and the capacitor line 300 have a two-layer structure of a conductive polysilicon layer and an aluminum layer, but have a three-layer structure of a conductive polysilicon layer, an aluminum layer, and a titanium nitride layer in order from the bottom. You may.
According to this configuration, the titanium nitride layer functions as a barrier metal for preventing penetration of etching when the contact hole 87 is opened.

  Further, since the capacitor electrode 300 and the data line 6a include aluminum having relatively excellent light reflection performance and polysilicon including relatively excellent light absorption performance, they can function as a light shielding layer. That is, according to these, it is possible to block the progress of incident light (see FIG. 4) on the semiconductor layer 1a of the TFT 30 on the upper side.

  As shown in FIG. 4, the dielectric film 75 is, for example, a relatively thin silicon oxide film such as an HTO (High Temperature Oxide) film or an LTO (Low Temperature Oxide) film having a thickness of about 5 to 200 nm, or a silicon nitride film. Consists of From the viewpoint of increasing the storage capacitance 70, the thinner the dielectric film 75 is, the better the reliability of the film can be obtained. In the present embodiment, particularly, the dielectric film 75 has a two-layer structure such as a silicon oxide film 75a as a lower layer and a silicon nitride film 75b as an upper layer as shown in FIG. The upper silicon nitride film 75b is patterned so as to fit within the light shielding region (non-opening region). Thus, the presence of the silicon nitride film 75b having a relatively large dielectric constant allows the capacitance value of the storage capacitor 70 to be increased, and nevertheless, the presence of the silicon oxide film 75a The breakdown voltage of the storage capacitor 70 is not reduced. Thus, by making the dielectric film 75 have a two-layer structure, it is possible to enjoy two opposing effects. In addition, since the silicon nitride 75b having coloring properties is patterned so as not to be formed in a region through which light is transmitted, a decrease in transmittance can be prevented. Further, the presence of the silicon nitride film 75b makes it possible to prevent water from entering the TFT 30 before it occurs. As a result, in the present embodiment, a situation in which the threshold voltage of the TFT 30 rises does not occur, and the device can be operated for a relatively long time. In the present embodiment, the dielectric film 75 has a two-layer structure. In some cases, for example, a three-layer structure such as a silicon oxide film, a silicon nitride film, and a silicon oxide film, Or you may comprise so that it may have more laminated structures.

  Above the TFT 30 or the scanning line 3a described above and below the storage capacitor 70 or the data line 6a, for example, NSG (non-silicate glass), PSG (phosphorus silicate glass), BSG (boron silicate glass), BPSG ( A silicate glass film such as boron phosphorus silicate glass, a silicon nitride film, a silicon oxide film, or the like, or a first interlayer insulating film 41 preferably made of NSG is formed. In the first interlayer insulating film 41, a contact hole 81 for electrically connecting the high concentration source region 1d of the TFT 30 and the data line 6a is formed. In the first interlayer insulating film 41, a contact hole 83 for electrically connecting the high-concentration drain region 1e of the TFT 30 and the first relay layer 71 forming the storage capacitor 70 is opened.

  Note that, of the two contact holes, in the portion where the contact hole 81 is formed, an opening is formed so that the above-described dielectric film 75 is not formed, in other words, the dielectric film 75 is formed. I have. This is because it is necessary to establish electrical conduction between the high-concentration source region 1b and the data line 6a via the first relay layer 71 in the contact hole 81. Incidentally, if such an opening is provided in the dielectric film 75, when hydrogenation processing is performed on the semiconductor layer 1a of the TFT 30, hydrogen used for the processing is supplied to the semiconductor layer 1a through the opening. It is also possible to obtain the effect of being able to easily reach.

  In the present embodiment, the first interlayer insulating film 41 is baked at about 1000 ° C. to activate the ions implanted into the semiconductor layer 1a and the polysilicon film forming the scanning line 3a. You may.

Now, a light-shielding shield layer 400 is formed on the fourth layer following the third layer. The shield layer 400 is formed in a lattice shape so as to extend in the X direction and the Y direction in FIG. 2 as shown in FIGS. 2 and 3 in plan view. In particular, a portion of the shield layer 400 extending in the Y direction in FIG. 2 is formed so as to cover the data line 6a and to be wider than the data line 6a. In addition, a portion extending in the X direction in FIG. 2 has a cutout near the center of one side of each pixel electrode 9a in order to secure a region for forming a third relay electrode 402 described later. . Further, substantially triangular portions are provided at the corners of the intersections of the shield layers 400 extending in the X and Y directions in FIG. 2 so as to correspond to the substantially trapezoidal protrusions of the capacitance electrode 300 described above. Have been. The shield layer 400 may have the same width as the lower light-shielding film 11a, or may be wider or narrower than the lower light-shielding film 11a.
The shield layer 400 extends from the image display area 10a in which the pixel electrode 9a is arranged to the periphery thereof, and is electrically connected to a constant potential source to have a fixed potential. The “constant potential source” described here may be a constant potential source of a positive power supply or a negative power supply supplied to the data line driving circuit 101 or a constant potential source supplied to the counter electrode 21 of the counter substrate 20. But it doesn't matter.

  As described above, the capacitance formed between the data line 6a and the pixel electrode 9a is formed so as to cover the entire data line 6a (see FIG. 3). It is possible to eliminate the influence of the coupling. That is, it is possible to avoid a situation in which the potential of the pixel electrode 9a fluctuates in accordance with the energization of the data line 6a, which may cause display unevenness or the like along the data line 6a on an image. Can be reduced. Also in the present embodiment, since the shield layer 400 is formed in a lattice shape, it is possible to suppress unnecessary capacitive coupling even at a portion where the scanning line 3a extends, so that unnecessary capacitive coupling does not occur. ing. In addition, the above-described triangular portion of the shield layer 400 can eliminate the influence of the capacitive coupling generated between the capacitor electrode 300 and the pixel electrode 9a. The effect will be obtained.

  In the fourth layer, a second relay layer 402, which is an example of the “relay layer” in the present invention, is formed as the same film as the shield layer 400. The second relay layer 402 has a function of relaying an electrical connection between the first relay layer 71 constituting the storage capacitor 70 and the pixel electrode 9a via a contact hole 89 described later. Note that the space between the shield layer 400 and the second relay layer 402 is not formed continuously in a planar shape as in the case of the above-described capacitance electrode 300 and data line 6a, but is separated by patterning. It is formed so that.

  On the other hand, the above-mentioned shield layer 400 and second relay layer 402 have a two-layer structure of a lower layer made of aluminum and an upper layer made of titanium nitride. Accordingly, first, the titanium nitride is expected to have an effect as a barrier metal for preventing penetration of the etching when the contact hole 89 is opened. In the second relay layer 402, the lower layer made of aluminum is connected to the first relay layer 71 forming the storage capacitor 70, and the upper layer made of titanium nitride is connected to the pixel electrode 9a made of ITO or the like. It is supposed to be. In this case, in particular, the latter connection will be performed well. In this regard, if the form in which aluminum and ITO are directly connected to each other is taken, electrolytic corrosion occurs between the two, and disconnection of aluminum or insulation due to formation of alumina, etc., makes a preferable electrical connection. In contrast to not being realized. As described above, in the present embodiment, since the electrical connection between the second relay layer 402 and the pixel electrode 9a can be satisfactorily realized, a voltage is applied to the pixel electrode 9a or a potential holding characteristic in the pixel electrode 9a. Can be maintained satisfactorily.

  Further, since the shield layer 400 and the second relay layer 402 include aluminum having relatively excellent light reflection performance and titanium nitride having relatively excellent light absorption performance, they can function as a light shielding layer. That is, according to these, it is possible to block the progress of the incident light (see FIG. 2) on the semiconductor layer 1a of the TFT 30 on the upper side. As described above, the same can be said for the above-described capacitance electrode 300 and data line 6a. In the present embodiment, the shield layer 400, the second relay layer 402, the capacitor electrode 300, and the data line 6a form a part of a laminated structure built on the TFT array substrate 10 and emit light from above to the TFT 30. It can function as an upper light-shielding film (or a "built-in light-shielding film" if attention is paid to the fact that the light-shielding film constitutes a part of the laminated structure). According to the concept of “upper light-shielding film” or “built-in light-shielding film”, in addition to the above-described configuration, the scanning line 3a, the first relay layer 71, and the like can be considered as being included therein. In short, under the premise that it is understood in the broadest sense, any structure made of an opaque material constructed on the TFT array substrate 10 can be called an “upper light-shielding film” or an “internal light-shielding film”.

  Above the above-described data line 6a and below the shield layer 400, a silicate glass film such as NSG, PSG, BSG, BPSG, etc., a silicon nitride film, a silicon oxide film, or the like, or preferably a NSG A two-layer insulating film 42 is formed. In the second interlayer insulating film 42, a contact hole 87 for electrically connecting the shield layer 400 and the capacitor electrode 300, and a second relay layer 402 and the first relay layer 71 are electrically connected. Contact holes 85 for connection are respectively formed. In the first embodiment, since the second relay layer 402 is formed, the electrical connection between the pixel electrode 9a and the TFT 30 is established through three contact holes 83, 85, and 89, That is, it is performed through three interlayer insulating films 41, 42 and 43. As described above, by connecting the relatively short contact holes to establish electrical connection between the pixel electrode 9a and the TFT 30, the relatively short contact holes can be used rather than the relatively long contact holes. The ease of manufacturing the holes provides an advantage that the electro-optical device can be manufactured at lower cost and with higher reliability.

  In addition, the stress generated near the interface of the capacitor electrode 300 may be reduced by not performing the above-described firing on the first interlayer insulating film 41 on the second interlayer insulating film 42.

  Finally, in the fifth layer, the pixel electrodes 9a are formed in a matrix as described above, and the alignment film 16 is formed on the pixel electrodes 9a. The pixel electrode 9a may have a shape in which a corner is cut. Under the pixel electrode 9a, a silicate glass film such as NSG, PSG, BSG, or BPSG, a silicon nitride film, a silicon oxide film, or the like, or a third interlayer insulating film 43 preferably made of BPSG is formed. A contact hole 89 for electrically connecting the pixel electrode 9a and the second relay layer 402 is formed in the third interlayer insulating film 43. In the present embodiment, particularly, the surface of the third interlayer insulating film 43 is planarized by a CMP (Chemical Mechanical Polishing) process or the like, and a liquid crystal layer caused by a step due to various wirings, elements, and the like present below the surface. 50 misalignment is reduced. However, not only the flattening process is performed on the third interlayer insulating film 43 as described above, but also at least one of the TFT array substrate 10, the base insulating film 12, the first interlayer insulating film 41, and the second interlayer insulating film 42. The flattening process may be performed by digging a groove and embedding the wiring such as the data line 6a or the TFT 30 or the like. Alternatively, the flattening process may be performed only on the above-described groove without performing the flattening process on the third interlayer insulating film 43.

(Configuration related to light shielding for TFT)
In the following, a configuration relating to the light shielding of the above-described TFT 30, more specifically, a structure relating to the scanning line 3 a including the gate electrode of the TFT 30, the groove 12 cv of the base insulating film 12, or the lower light-shielding film 11 a will be described.

(Part 1: Light shielding by an example in which a groove 12cv formed in the base insulating film 12 and a horizontal protrusion 3b extending from the scanning line 3a are provided)
First, the configuration, operation, and effect of the scanning line 3a and the horizontal protrusion 3b and the configuration, operation, and effect of the groove 12cv dug in the base insulating film 12 will be described in detail with reference to FIGS. . FIG. 5 is a plan view showing the horizontal protrusion 3b of the scanning line 3a and the groove 12cv formed in the base insulating film 12 in FIG. 2 together with the semiconductor layer 1a, and FIG. 7 is a sectional view taken along the line BB ′ of FIG. 5, and FIG. 7 is a sectional view taken along the line CC ′ of FIG. FIG. 8 is a sectional view taken along the line DD ′ of FIG.

  As shown in FIGS. 5 to 8, in the base insulating film 12, grooves 12cv are dug along the data lines 6a on both sides of the semiconductor layer 1a. The horizontal protrusion 3b of the scanning line 3a is partially buried in the groove 12cv, and the first relay layer 71 and the capacitor electrode 300 correspond to the groove 12cv via the first interlayer insulating film 41. It is partially recessed. As a result, in each of the cross-sectional views shown in FIGS. 6 to 8, the horizontal projection 3b of the scanning line 3a, the capacitor electrode 300, and the like include a portion formed in a lower concave shape corresponding to the groove 12cv. I have. In this embodiment, since the horizontal protrusion 3b is embedded in the groove 12cv, the horizontal protrusion 3b also has a character as a vertical protrusion in the depth direction of the groove 12cv.

  According to such an embodiment, first, since the horizontal protruding portions 3b are provided on the scanning lines 3a made of polysilicon, the incident light and the return light traveling obliquely with respect to the substrate surface of the TFT array substrate 10 are formed. Light and oblique light such as internally reflected light and multi-reflected light based thereon are incident on the channel region 1a and its adjacent regions, that is, the low concentration source region 1b and the low concentration drain region 1c. Among them, not only the main body functioning as the gate electrode but also the horizontal projection 3b mainly absorbs light and partially reflects the light, so that the light can be at least partially blocked. At this time, since the light is shielded by the horizontal projection 3b and the main body of the scanning line 3a close to the semiconductor layer 1a, the light can be shielded very effectively.

  Second, the scanning lines 3a (including the horizontal protruding portions 3b) functioning as upper light-shielding films that cover the semiconductor layer 1a from above, the first relay layer 71, and the capacitor electrodes 300 correspond to the grooves 12cv, respectively. Includes a concave portion on the side, so that the incident light traveling obliquely to the substrate surface and the internal reflected light based on the incident light and the return light as compared with the case where the upper light-shielding film is flat The upper light-shielding film can more effectively prevent the oblique light such as the multiple reflection light from finally entering the channel region 1a and the adjacent region from the obliquely upper side. That is, the tendency to diffuse oblique light from the upper side is increased by the upper surface portion of the upper light-shielding film that is concave downward or convex upward according to the groove 12cv. And the amount of light incident on the area adjacent thereto can be reduced. For the same reason, the lower light-shielding film 11a may be formed at least partially in a concave shape on the upper side, that is, in a convex shape on the lower side, upside down from the unevenness of the upper light-shielding film.

  Here, in the present embodiment, as shown in FIG. 2 and FIG. 4, the light shielding of the TFT 30 is performed from above and below by various light shielding films. That is, for incident light incident from the upper side of the electro-optical device, that is, from the incident side of the incident light, the capacitor electrode 300 and the shield layer 400 function as an upper light-shielding film. On the other hand, the lower light-shielding film 11a functions literally as a lower light-shielding film with respect to return light incident from the lower side of the electro-optical device, that is, from the exit side of the incident light. Therefore, it is considered that there is no need to provide the horizontal protruding portion 3b on the scanning line 3a or to give a special shape to the capacitor electrode 300 or the like serving as the upper light shielding film by the groove 12cv. However, the incident light includes oblique light incident on the substrate 10 from an oblique direction. Therefore, the oblique light is reflected by the upper surface of the substrate 10, the upper surface of the lower light-shielding film 11a, or the like, or is reflected by the lower surface of the upper light-shielding film, and is further reflected by another interface in the electro-optical device. As a result, internally reflected light and multiple reflected light are generated. Therefore, even if various light-shielding films are provided above and below the TFT 30, oblique light that enters through a gap between the two may exist, and therefore, as in the present embodiment, horizontal light-shielding is performed beside the semiconductor layer 1a. The light shielding effect by the protruding portion 3b and the concave portion corresponding to the groove 12cv is large.

  As described above, according to the electro-optical device of the present embodiment, by providing the horizontal protruding portion 3b and the groove 12cv, the light resistance can be improved, and the harsh condition such that strong incident light and return light enter. However, the switching of the pixel electrode 9a can be satisfactorily controlled by the TFT 30 in which the light leakage current is reduced, so that a bright and high-contrast image can be finally displayed.

  In addition, in the present embodiment, the upper light-shielding film is composed of a part of the scanning line 3a including the horizontal protrusion 3b, the capacitor electrode 300, the shield layer 400, and the like. The process can be simplified. Furthermore, in this embodiment, since the horizontal projection 3b is formed integrally with the scanning line 3a from the same film, no additional process is required to form the horizontal projection 3b.

  In addition, in this embodiment, the groove 12cv does not reach the lower light-shielding film 11a, and therefore, the horizontal protrusion 3b formed so as to cover the bottom surface of the groove 12cv and the vertical projection in the depth direction. The scanning line 3a including the protrusion is not in contact with the lower light-shielding film 11a. For this reason, even if the lower light-shielding film 11a is a conductive film, it is possible to prevent the potential fluctuation from adversely affecting the scanning line 3a.

  In the above-described embodiment, the scanning line 3a is formed, as in the case of the lower light-shielding film 11a, at least one of light-shielding films containing metals or alloys (such as Ti, Cr, W, Ta, and Mo). , A metal silicide, a metal silicide, a polysilicide, a laminate thereof, or the like). With this configuration, the scanning line 3a and the horizontal protrusion 3b can enhance the reflection performance and further improve the light blocking performance in the channel region 1a 'and the channel adjacent region for oblique light.

  In addition, although the four horizontal protrusions 3b are formed for each channel region 1a ', they may be formed only on one side of the channel region 1a', or only in the upper side of the channel region 1a 'in FIG. Even if it is formed only on the lower side, a certain similar effect can be obtained. For example, in the case where it is difficult to form a total of four horizontal protrusions 3b on both sides or both above and below the channel region 1a 'in view of the arrangement of wirings, elements, and the like around the semiconductor layer 1a, It is sufficient to provide not more than three horizontal protrusions 3b for each channel region only on one side or only on the upper side or lower side without adding excessive force.

(Part 2: Light shielding according to an example in which the horizontal protruding portion 3b is replaced with the surrounding portion 3c)
Secondly, the manner in which the surrounding portion 3c surrounding the semiconductor layer 1a is formed for the scanning line 3a will be described with reference to FIGS. FIG. 9 is a plan view having the same effect as FIG. 5 and shows a mode in which the horizontal protruding portion 3b in the drawing is replaced by the surrounding portion 3c. FIG. 10 is a plan view of FIG. It is EE 'sectional drawing, FIG. 11: is FF' sectional drawing of FIG. FIG. 12 is a sectional view taken along the line EE ′ of FIG. 9 which is a modification.

  As shown in FIGS. 9 to 11, in this embodiment, in place of the above-described horizontal projection 3 b, the scanning line 3 a at a position deviated from the channel region 1 a ′ by a predetermined distance along the scanning line 3 a in a plan view. The surrounding portion 3c extends from the main line portion to surround the entire semiconductor layer 1a including the channel region 1a and the contact hole opening region, that is, the regions where the contact holes 83 and 81 are respectively opened. . Other configurations, for example, the surrounding portion 3c is also embedded in the groove 12cv, so that the surrounding portion 3c also has a character as a vertical protruding portion in the depth direction of the groove 12cv. The configuration is substantially the same.

  According to such an embodiment, a configuration in which the semiconductor layer 1a is sandwiched between the lower light-shielding film 11a and the upper light-shielding film having a relatively small interlayer distance can be obtained. Basically, very high light shielding performance can be obtained. In particular, as shown in FIGS. 10 and 11, incident light and return light traveling obliquely with respect to the substrate surface, and oblique light L1 and L3 such as internal reflected light and multiple reflected light based on these are generated. In some cases, before reaching the semiconductor layer 1a, part of the light reaches not only the main line portion of the scanning line 3a but also light L2 and L4 having low light intensity due to light absorption or light reflection by the surrounding portion 3c. It can be attenuated. At this time, the light is shielded by the surrounding portion 3c disposed at a position where the interlayer distance from the semiconductor layer 1a is very small, and also the light L1 and L3 inclined in any direction by the surrounding portion 3c. By doing so, the light shielding can be performed very effectively.

  In addition, in this embodiment, particularly, the contact hole 81 and 83 surround the semiconductor layer 1a including the contact hole opening region where the contact hole is opened, so that the light shielding performance in the vicinity of the contact holes 81 and 83 where light generally tends to leak can be improved. sell.

  In this embodiment, instead of the configuration as shown in FIG. 10 described above, a configuration in which the vertical protruding portion contacts the lower light-shielding film 11a as shown in FIG. With such a configuration, the semiconductor layer 1a is arranged in a closed space, so that the semiconductor layer 1a can be more effectively shielded from light. Incidentally, the mode in which the lower light-shielding film 11a is brought into contact with the scanning line 3a can be similarly realized in FIGS. 5 to 8 described above.

  However, in these cases, as described above, there is a case where the lower light-shielding film 11a may be adversely affected by the potential fluctuation. For this reason, whether the scanning line 3a is brought into contact with the lower light-shielding film 11a is determined by comparing the necessity of light-shielding for the semiconductor layer 1a with the adverse effect that can be caused by the potential fluctuation of the lower light-shielding film 11a. After taking into account the scene, it will be determined appropriately according to the scene.

  Further, in the present embodiment, the groove 12cv may be dug along the entire surrounding portion 3c of the scanning line 3a to form a projecting portion projecting downward across the entire surrounding portion 3c, that is, a vertical projecting portion. . Further, in the case where the surrounding portion 3c is provided as in this embodiment, if the width of the semiconductor layer 1a in the contact hole opening region and the width in the channel region 1a are formed to be the same, the semiconductor can be seen in plan view. At a position relatively close to the layer 1a, the periphery of the semiconductor layer 1a can be covered by the surrounding portion 3c having a rectangular planar shape. Therefore, it is considered that a higher light shielding effect can be obtained.

  In addition, in the above description, the surrounding portion 3c is formed so as to be embedded in the groove 12cv, so that the surrounding portion 3c also has a character as a vertical protruding portion. However, even if a surrounding portion having only a horizontal portion is provided so as to go around the periphery of the semiconductor layer 1a, it is possible to expect a corresponding effect. The present invention includes such embodiments within the scope thereof.

(Part 3: Light shielding by example in which groove 12cva extending along scanning line 3a is provided)
Third, a mode in which a groove 12cva extending along the scanning line 3a is provided and a main line portion of the scanning line 3a is partially embedded in the groove 12cva will be described with reference to FIGS. I will explain it. Here, FIG. 13 is a diagram having the same meaning as FIG. 2 and is a plan view showing a different mode from the diagram in that a groove 12 cva along the scanning line 3 a is provided in the base insulating film 12. FIG. 14 is a sectional view taken along line GG ′ of FIG. 15 and 16 are cross-sectional views taken along the line GG ′ of FIG. 13 according to a modification of FIG.

  The scanning line 3a is arranged in the groove 12cva extending along the scanning line 3a and includes an in-groove portion partially covering the channel region 1a 'and the adjacent region from the side. Therefore, according to such an embodiment, incident light traveling obliquely to the substrate surface and return light traveling particularly obliquely to the back surface, and oblique light such as internal reflected light and multiple reflected light based on these, And the channel region 1a 'and its adjacent region can be partially blocked by light absorption or light reflection by the inside of the groove. By improving the light resistance in this manner, the switching of the pixel electrode 9a can be favorably controlled by the TFT 30 having a reduced light leakage current even under severe conditions such as strong incident light and return light being incident.

  In this embodiment, as shown in FIG. 15, instead of the scanning line 3a having a single-layer structure in FIG. 14, the first layer 311 made of a light-shielding material and the first layer 311 made of a light-absorbing material are used. The scanning line 3a 'made of a laminate including the two layers 312 may be formed. In this case, the first layer 311 is made of, for example, WSi, TiSi, or the like. The second layer 312 is made of, for example, SiGe or a polysilicon film which is the same layer as the semiconductor layer 1a. Even if the scanning line 3a 'is formed in this manner, the light shielding performance for the channel region 1a' and its adjacent region can be improved and the scanning line 3a 'can be enhanced according to the portion of the scanning line 3a' in the groove arranged in the groove 12cva. Wiring resistance can be reduced. In addition, the second layer 312 made of SiGe or the like can function well as a gate electrode disposed to face the gate oxide film in the TFT 30. Note that the stacking order of the first layer 311 and the second layer 312 may be upside down.

  Alternatively, as shown in FIG. 16, the scanning line 3a "may be formed so as not to completely fill the groove 12cva. Even if the scanning line 3a" is formed in this manner, the groove 12cva of the scanning line 3a "may be formed. The light shielding performance for the channel region 1a 'and the adjacent region can be enhanced and the wiring resistance of the scanning line can be reduced according to the in-groove portion disposed in the inside.

With the above-described various configurations and effects relating to light shielding, in short, light incident on the TFT 30 from above or below, light incident from the side, and light incident obliquely can be effectively prevented. Accordingly, it is possible to prevent the occurrence of light leakage current in the TFT 30 as much as possible. Incidentally, the existence of the above-mentioned upper light-shielding film or the built-in light-shielding film greatly contributes to such an effect.
That is, various elements such as the scanning line 3a, the data line 6a, the capacitor electrode 300, and the shield layer 400, which are formed of an opaque material above the TFT 30 in the laminated structure, emit light from the upper side to the semiconductor layer 1a of the TFT 30. By preventing the incidence beforehand, the occurrence of the light leakage current in the semiconductor layer 1a is also suppressed.

  As a result, according to the present embodiment, in addition to the fact that the switching operation of the TFT 30 can be performed accurately, it is possible to avoid the state in which the semiconductor layer 1a is always biased by the flow of light leakage current. Therefore, high-frequency driving can be realized. In addition, if the light shielding of the TFT 30 can be effectively performed, no particular obstacle will be caused even when the size of the electro-optical device is reduced (that is, an image of a certain brightness is displayed. In view of the necessity, even if the electro-optical device is reduced in size, a certain pixel aperture ratio is required in accordance with the size. There will be.).

  As described above, after all, according to the electro-optical device of the present embodiment, while maintaining the voltage applied to the pixel electrode as constant as possible, realizing miniaturization and high definition, high-frequency driving and high quality Images can be displayed.

Second Embodiment: When Shield Layer and Data Line are Formed on Separate Layers Hereinafter, an electro-optical device according to a second embodiment of the present invention will be described with reference to FIGS. I do. FIG. 17 is a view having the same concept as FIG. 2 and is a plan view of a plurality of adjacent pixel groups on the TFT array substrate on which data lines, scanning lines, pixel electrodes, and the like are formed. FIG. 18 is a view having the same effect as FIG. 3 and is a cross-sectional view taken along the line AA ′ of FIG. Further, FIG. 19 is a plan view showing a characteristic aspect of forming a nitride film in the second embodiment. The electro-optical device according to the second embodiment has a configuration substantially similar to the configuration of the pixel portion of the electro-optical device according to the first embodiment.
Therefore, in the following, only the main features of the second embodiment will be mainly described, and the description of the remaining portions will be omitted or simplified as appropriate.

In the second embodiment, as shown in FIG. 18, as compared with FIG. 4, the point that the capacitor electrode 300 serving as the upper electrode and the data line 6 a constituting the storage capacitor 70 are not formed as the same film, and Thus, the number of interlayer insulating films has been increased. That is, there is a great difference in that a “fourth interlayer insulating film 44” is further provided, and that a relay electrode 719 is formed as the same film as the gate electrode 3a. Thus, in order from the top of the TFT array substrate 10, a first layer including the lower light-shielding film 11a also serving as a scanning line, a second layer including the TFT 30 having the gate electrode 3aa, a third layer including the storage capacitor 70, and a data line. A fourth layer including 6a and the like, a fifth layer on which the shield layer 404 is formed, and a sixth layer (top layer) including the pixel electrode 9a and the alignment film 16 and the like. A base insulating film 12 is provided between the first and second layers, a first interlayer insulating film 41 is provided between the second and third layers, and a second interlayer insulating film 42 is provided between the third and fourth layers. , A third interlayer insulating film 43 is provided between the fourth and fifth layers, and a fourth interlayer insulating film 44 is provided between the fifth and sixth layers, respectively. Has been prevented.
Further, instead of forming the scanning line 3a on the second layer in the first embodiment, in the second embodiment, a gate electrode 3a instead of the scanning line 3a is formed and the same film as the gate electrode 3a is formed. A relay electrode 719 is newly formed. Hereinafter, the configuration in each layer will be described in more detail.

  First, a gate electrode 3a is formed on the second layer so as to face the channel region 1a 'of the semiconductor layer 1a. The gate electrode 3a is not formed linearly like the scanning line 3a of the first embodiment, and the semiconductor layer 1a or the channel region 1a 'is formed in an island shape on the TFT array substrate 10. Are formed in an island shape. Further, in the second embodiment, the bottom of the groove 12cv forming the contact hole has a depth in contact with the surface of the lower light-shielding film 11a of the first layer. 11a is formed in a stripe shape extending in the X direction in FIG. Thus, the gate electrode 3a formed on the groove 12cv is electrically connected to the lower light-shielding film 11a via the groove 12cv. That is, in the second embodiment, a scanning signal is supplied to the gate electrode 3a through the lower light-shielding film 11a. In other words, the lower light-shielding film 11a of the second embodiment functions as a scanning line.

  As shown in FIG. 17, the lower light-shielding film 11a in the second embodiment has a protruding portion along the direction in which the data line 6a extends. Thus, the lower light-shielding film 11a of the second embodiment also exhibits a light-shielding function comparable to that of the lattice-shaped lower light-shielding film 11a of the first embodiment. However, the protruding portions extending from the adjacent lower light-shielding films 11a do not contact each other, and are electrically insulated from each other. Otherwise, the lower light-shielding film 11a cannot function as a scanning line. In the region where the lower light-shielding film 11a intersects with the data line 6a, a region is formed so as to protrude the corner of the pixel electrode 9a.

  In the second embodiment, in particular, the relay electrode 719 is formed as the same film as the gate electrode 3a. As shown in FIG. 17, the relay electrode 719 is formed in an island shape so as to be located substantially at the center of one side of each pixel electrode 9a as shown in FIG. Since the relay electrode 719 and the gate electrode 3a are formed as the same film, when the latter is made of, for example, a conductive polysilicon film, the former is also made of a conductive polysilicon film.

  Next, in the third layer, the first relay layer 71, the dielectric film 75, and the capacitor electrode 300 that constitute the storage capacitor 70 are formed. The first relay layer 71 is formed of polysilicon. Since the capacitor electrode 300 is no longer formed at the same time as the data line 6a, as in the first embodiment, aluminum is used for the purpose of paying attention to the electrical connection between the data line 6a and the TFT 30. It is not always necessary to adopt a two-layer structure of a film and a conductive polysilicon film. Accordingly, the capacitor electrode 300 includes, for example, at least one of refractory metals such as Ti, Cr, W, Ta, and Mo, as in the lower light-shielding film 11a, a simple metal, an alloy, a metal silicide, It is preferable to use a light-shielding material such as polysilicide or a laminate thereof. According to this, the capacitor electrode 300 can better exhibit the function as the above-described “upper light-shielding film” or “built-in light-shielding film” (however, regarding the material forming the capacitor electrode 300 according to the second embodiment, , See below).

  Further, for the same reason, that is, since the capacitor electrode 300 and the data line 6a are formed in different layers, it is not necessary to achieve electrical insulation between them in the same plane. Therefore, the capacitor electrode 300 can be formed as a part of a capacitor line extending in the direction of the scanning line 3a.

  On the other hand, the data line 6a formed in the fourth layer may be made of aluminum alone or an aluminum alloy.

  As described above, the first interlayer insulating film 41 is formed above the gate electrode 3a and the relay electrode 719 and below the storage capacitor 70. The first interlayer insulating film 41 is substantially the same as described above. In addition, a silicate glass film such as NSG, PSG, BSG, or BPSG, a silicon nitride film, a silicon oxide film, or the like may be used. Also, a contact hole 881 is formed in the first interlayer insulating film 41 so as to have an electrical connection point on the lower surface of the first relay layer 71 in FIG. 18. Thereby, electrical connection between the first relay layer 71 and the relay electrode 719 is achieved. In order to electrically connect the relay electrode 719 and a second relay layer 6a2 described later, the first interlayer insulating film 41 has a contact hole formed so as to penetrate the second interlayer insulating film 42 described later. 882 is open.

  In the second embodiment, in particular, as described above, the data lines 6a made of aluminum or the like are arranged in order from the lower layer, such as a layer made of aluminum (see reference numeral 41A), a layer made of titanium nitride (see reference numeral 41TN), and a nitride layer. It is formed as a film having a three-layer structure of a layer made of a silicon film (see reference numeral 401). The silicon nitride film 401 is patterned to have a slightly larger size so as to cover the lower aluminum layer and titanium nitride layer. Since the data line 6a contains aluminum, which is a relatively low-resistance material, supply of image signals to the TFT 30 and the pixel electrode 9a can be realized without interruption. On the other hand, the formation of the silicon nitride film having a relatively excellent effect of blocking the intrusion of moisture on the data line 6a can improve the moisture resistance of the TFT 30 and can prolong its life. The silicon nitride film is preferably a plasma silicon nitride film.

  In addition, the silicon nitride film 401 according to the present embodiment has, in addition to the data lines 6a, pixel electrodes 9a arranged in a matrix and data lines 6a and scanning lines 3a arranged so as to sew these gaps. The area around the image display area 10a defined as an area is also formed in a square shape. Note that the thickness of the titanium nitride film and the silicon nitride film 401 is preferably set to, for example, about 10 to 100 nm, and more preferably about 10 to 30 nm.

  As described above, the silicon nitride film 401 according to the present embodiment is entirely formed on the TFT array substrate 10 in a shape schematically shown in FIG. In FIG. 19, the silicon nitride film 401 existing around the image display area 10a prevents moisture from penetrating into CMOS (Complementary MOS) type TFTs constituting the data line driving circuit 101 and the scanning line driving circuit 104 described later. (See FIG. 20). However, since nitride is expected to have a lower etching rate in dry etching and the like than other general materials, it is difficult to form the silicon nitride film 401 in a region around the image display region 10a. If it is necessary to form a contact hole or the like in the region, a hole corresponding to the position of the contact hole may be formed in the silicon nitride film 401 in advance. If this is performed at the same time as performing the patterning as shown in FIG. 19, it contributes to simplification of the manufacturing process.

  In the fourth layer, the same layer as the data line 6a is used as the shield layer relay layer 6a1 and the second relay layer 6a2 (however, the meaning is slightly different from the "second relay layer" in the first embodiment). Is formed. The former is a relay layer for electrically connecting the light-shielding shield layer 404 and the capacitor electrode 300, and the latter is a relay layer for electrically connecting the pixel electrode 9a and the first relay layer 71. It is a relay layer. It goes without saying that these are made of the same material as the data lines 6a.

As described above, the second interlayer insulating film 42 is formed above the storage capacitor 70 and below the data line 6a, the shield relay layer 6a1, and the second relay layer 6a2. The film 42 may be composed of a silicate glass film such as NSG, PSG, BSG, or BPSG, a silicon nitride film, a silicon oxide film, or the like, in substantially the same manner as described above.
When aluminum is used for the capacitor electrode 300, it is necessary to form a film at a low temperature by plasma CVD. In the second interlayer insulating film 42, a contact hole 801 and the contact hole 882 are formed so as to correspond to the relay layer 6a1 for the shield layer and the second relay layer 6a2.

Next, a light-shielding shield layer 404 is formed on the fifth layer. For example, similarly to the above-described shield layer 400, it may have a two-layer structure in which an upper layer is made of titanium nitride and a lower layer is made of aluminum. In some cases, ITO or other conductive material may be used. May be configured. The shield layer 404 is electrically connected to the capacitor electrode 300 via the shield layer relay layer 6a1 described above. As a result, the shield layer 404 has a fixed potential, and eliminates the influence of capacitive coupling generated between the pixel electrode 9a and the data line 6a as in the first embodiment.
Further, a third relay layer 406 is formed on the fifth layer as the same film as the shield layer 404.

  The third interlayer insulating film 43 is formed above the data line 6a and below the shield layer 404 as described above. The material and the like forming the third interlayer insulating film 43 may be the same as those of the second interlayer insulating film 42 described above. However, when the data line 6a or the like contains aluminum or the like as described above, the third interlayer insulating film 43 is preferably formed by a low-temperature forming method such as a plasma CVD method in order to avoid exposing the same to a high-temperature environment. It is preferable to use a film method.

  In the third interlayer insulating film 43, a contact hole 803 for electrically connecting the shield layer 404 to the shield layer relay layer 6a1 is formed. And a contact hole 804 corresponding to the third relay layer 406 is formed.

  The remaining configuration is such that the pixel electrode 9a and the alignment film 16 are formed in the sixth layer, and the fourth interlayer insulating film 44 is formed between the sixth layer and the fifth layer. 44, a contact hole 89 for electrically connecting the pixel electrode 9a to the third relay layer 406 is formed.

  In the above-described configuration, the third relay layer 406 comes into direct contact with the pixel electrode 9a made of ITO or the like. Therefore, considering this, it is preferable that the shield layer 404 and the third relay layer 406 have a two-layer structure made of aluminum and titanium nitride, as in the first embodiment. Further, even if the shield layer 404 and the third relay layer 406 are made of ITO, between the shield layer 404 and the shield layer relay layer 6a1, or between the third relay layer 406 and the second relay layer 6a2, the ITO and aluminum There is no need to worry about the occurrence of galvanic corrosion since direct contact can be avoided.

  Alternatively, in the second embodiment, as described above, since the capacitor electrode 300 can be configured as a part of the capacitor line, in order to set the capacitor electrode 300 to a fixed potential, the capacitor line must be connected to the image display area. What is necessary is just to set it as the form extended to outside 10a and connected to a constant potential source. In this case, the capacitance line including the capacitance electrode 300 can be connected to a constant potential source by itself, and the shield layer 404 can also be connected to a constant potential source by itself. Therefore, when such a configuration is employed, it is not necessary to provide the contact holes 801 and 803 for electrically connecting the two. Therefore, in this case, when selecting the material for forming the shield layer 404 and the capacitor electrode 300 and selecting the material for the shield layer relay layer 6a1 (the shield relay layer 6a1 is no longer necessary in the first place). It is not necessary to consider the occurrence of “electrolytic corrosion”.

  In the electro-optical device according to the second embodiment having the above-described configuration, first, it is apparent that substantially the same operation and effect as those in the above-described first embodiment are exerted. That is, similarly to the first embodiment, since the groove 12cv is formed along the semiconductor layer 1a, the light shielding of the semiconductor layer 1a of the TFT 30 is effectively performed, and a high quality image without flicker or the like is obtained. Can be displayed.

  In the second embodiment, in particular, since the silicon nitride film 401 is formed on the data line 6a and around the image display area 10a, it is possible to further improve the moisture resistance of the TFT 30. Become. That is, as described above, the nitride film or the nitride is excellent in the function of blocking the intrusion or diffusion of moisture, so that the infiltration of moisture into the semiconductor layer 1a of the TFT 30 can be prevented. In the second embodiment, in addition to this, a nitride film may be used for the shield layer 404, the third relay layer 406, and the like, and the dielectric film 75 forming the storage capacitor 70. If a film is provided, the effect of preventing moisture penetration will be exhibited more effectively. However, it is needless to say that a form in which no “nitride film” is provided may be adopted.

  In the second embodiment, since the silicon nitride film 401 exists only on the data line 6a except for the region outside the image display region 10a in the fourth layer, a large internal stress concentrates. The silicon nitride film 401 itself is destroyed by its internal stress, and the stress acts to the outside, so that, for example, the third interlayer insulating film 43 and the like existing around the silicon nitride film 401 No cracks are generated. This is clearer assuming that the nitride film is provided on the entire surface of the TFT array substrate 10.

  Further, since the thickness of the titanium nitride film and the silicon nitride film 401 in the second embodiment is relatively small, about 10 to 100 nm, and more preferably about 10 to 30 nm, Can be enjoyed more effectively.

  In addition, in the second embodiment, in particular, since the relay electrode 719 is provided, the following operation and effect can be obtained. That is, in FIG. 4, in order to achieve the electrical connection between the TFT 30 and the pixel electrode 9a, as in the contact hole 85 in FIG. It was necessary to make contact on the "upper surface" in FIG.

  However, in such a mode, in the step of forming the capacitor electrode 300 and the dielectric film 75, when etching the precursor film thereof, the first relay layer 71 located immediately below the precursor film is soundly left. A very difficult manufacturing process of performing the etching of the precursor film must be performed. In particular, when a high dielectric constant material is used as the dielectric film 75 as in the present invention, etching is generally difficult, and the etching rate of the capacitor electrode 300 and the etching rate of the high dielectric constant material are not uniform. And the like also overlap, so that the difficulty of the manufacturing process is further increased. Therefore, in such a case, there is a high possibility that so-called “penetration” or the like is caused in the first relay layer 71. In such a case, in the worst case, a short circuit may occur between the capacitor electrode 300 constituting the storage capacitor 70 and the first relay layer 71.

  However, by providing the relay electrode 719 as in this embodiment, an electrical connection point is provided on the “lower surface” of the first relay layer 71 in the drawing, thereby realizing an electrical connection between the TFT 30 and the pixel electrode 9a. By doing so, the above-described problem does not occur. This is because, as is clear from FIG. 18, in this embodiment, there is no need to perform a step of etching the precursor film of the capacitor electrode 300 and the dielectric film 75 while leaving the first relay layer 71.

  As described above, according to the present embodiment, it is not necessary to go through the difficult etching process as described above, so that the electrical connection between the first relay layer 71 and the pixel electrode 9a can be satisfactorily realized. This is because electrical connection between the two is realized via the relay electrode 719. Furthermore, for the same reason, according to the present embodiment, the possibility that a short circuit occurs between the capacitor electrode 300 and the first relay layer 71 is extremely small. That is, it is possible to preferably form the storage capacitor 70 without defects.

  In addition, in the second embodiment, in particular, as described above, since the capacitor electrode 300 can be formed as a part of the capacitor line, each of the capacitor electrodes provided corresponding to each pixel can be formed. In this case, it is not necessary to separately provide a conductive material or the like for setting these to a fixed potential, and it is only necessary to adopt a mode such as connecting each capacitor line to a fixed potential source. Therefore, according to the present embodiment, the manufacturing process can be simplified, the manufacturing cost can be reduced, and the like.

  In addition, the capacitance line including the capacitance electrode may be formed to have a two-layer structure including the aluminum film and the polysilicon film, as in the first embodiment. If the capacitor line includes an aluminum film, the capacitor line can enjoy high electrical conductivity. Thus, in such an embodiment, the narrowing of the capacitance line, that is, the narrowing of the storage capacitor 70 can be realized without any special restriction. Therefore, in the second embodiment, the aperture ratio can be further improved. In other words, in other words, since the capacitance line is conventionally formed of a single material such as polysilicon or WSi, if the aperture ratio is reduced to increase the aperture ratio, the material has a high resistance. For this reason, crosstalk and burn-in have occurred, but in the second embodiment, there is no risk of suffering such a problem.

  Incidentally, in such a form, since the aluminum film has light reflectivity and the polysilicon film has light absorbency, as described in the first embodiment, the capacitance line functions as a light shielding layer. It can be expected that it will. Further, in such a capacity line, the internal stress can be reduced as compared with the conventional one (the internal stress of aluminum is smaller than that of WSi or the like). Therefore, in this embodiment, it is possible to make the third interlayer insulating film 43 and the like, which are in contact with the capacitance line, as thin as possible, and it is possible to further reduce the size of the electro-optical device.

(Overall configuration of electro-optical device)
The overall configuration of the electro-optical device according to each embodiment configured as described above will be described with reference to FIGS. FIG. 20 is a plan view of the TFT array substrate together with the components formed thereon as viewed from the counter substrate 20, and FIG. 21 is a cross-sectional view taken along the line HH 'of FIG.

  20 and 21, in the electro-optical device according to the present embodiment, the TFT array substrate 10 and the opposing substrate 20 are arranged to face each other. A liquid crystal 50 is sealed between the TFT array substrate 10 and the opposing substrate 20, and the TFT array substrate 10 and the opposing substrate 20 are formed by a sealing material provided in a sealing area located around the image display area 10a. They are mutually bonded by 52.

  The sealing material 52 is made of, for example, an ultraviolet curable resin, a thermosetting resin, or the like, and is hardened by ultraviolet light, heating, or the like in order to bond the two substrates together. In the sealing material 52, if the liquid crystal device according to the present embodiment is a small-sized liquid crystal device such as a projector, which performs enlarged display, the distance between the two substrates (gap between the substrates) is set to a predetermined value. And a gap material (spacer) such as glass fiber or glass beads. Alternatively, such a gap material may be included in the liquid crystal layer 50 if the liquid crystal device is a large-sized liquid crystal device such as a liquid crystal display or a liquid crystal television that displays images at the same magnification.

  In a region outside the sealing material 52, a data line driving circuit 101 for driving the data line 6 a by supplying an image signal to the data line 6 a at a predetermined timing and an external circuit connection terminal 102 are connected to one side of the TFT array substrate 10. The scanning line driving circuit 104 that drives the scanning line 3a by supplying a scanning signal to the scanning line 3a at a predetermined timing is provided along two sides adjacent to this one side. I have.

  If the delay of the scanning signal supplied to the scanning line 3a does not matter, it goes without saying that the scanning line driving circuit 104 may be provided on only one side. Further, the data line driving circuits 101 may be arranged on both sides along the side of the image display area 10a.

On one remaining side of the TFT array substrate 10, a plurality of wirings 105 for connecting between the scanning line driving circuits 104 provided on both sides of the image display area 10a are provided.
In at least one of the corners of the counter substrate 20, a conductive material 106 for electrically connecting the TFT array substrate 10 and the counter substrate 20 is provided.

  In FIG. 21, an alignment film is formed on the pixel electrode 9a after the TFTs for pixel switching and wiring such as scanning lines and data lines are formed on the TFT array substrate 10. On the other hand, on the counter substrate 20, an alignment film is formed on the uppermost layer in addition to the counter electrode 21. The liquid crystal layer 50 is made of, for example, a liquid crystal in which one or several kinds of nematic liquid crystals are mixed, and takes a predetermined alignment state between the pair of alignment films.

  Note that, on the TFT array substrate 10, in addition to the data line driving circuit 101, the scanning line driving circuit 104, etc., a sampling circuit for applying an image signal to the plurality of data lines 6a at a predetermined timing, a plurality of data lines 6a, a precharge circuit for supplying a precharge signal of a predetermined voltage level prior to the image signal, an inspection circuit for inspecting the quality, defects, and the like of the electro-optical device during manufacturing or shipping are formed. Is also good.

(Electronics)
Next, an overall configuration, particularly an optical configuration, of an embodiment of a projection color display device as an example of an electronic apparatus using the electro-optical device described above in detail as a light valve will be described. FIG. 22 is a schematic cross-sectional view of the projection type color display device.

  In FIG. 22, a liquid crystal projector 1100, which is an example of a projection type color display device according to the present embodiment, prepares three liquid crystal modules each including a liquid crystal device in which a driving circuit is mounted on a TFT array substrate, and each of them has a light valve for RGB. The projector is configured as a projector used as 100R, 100G, and 100B. In the liquid crystal projector 1100, when the projection light is emitted from a lamp unit 1102 of a white light source such as a metal halide lamp, three mirrors 1106 and two dichroic mirrors 1108 light components R, G, and R corresponding to the three primary colors of RGB. B, and are led to light valves 100R, 100G, and 100B corresponding to each color. In this case, in particular, the B light is guided through a relay lens system 1121 including an entrance lens 1122, a relay lens 1123, and an exit lens 1124 in order to prevent light loss due to a long optical path. The light components corresponding to the three primary colors modulated by the light valves 100R, 100G, and 100B are combined again by the dichroic prism 1112, and then projected as a color image on the screen 1120 via the projection lens 1114.

  The present invention is not limited to the above-described embodiment, and can be appropriately modified within the scope not departing from the gist of the invention or the idea read from the entirety of the claims and the specification, and an electro-optical device with such a modification. And electronic devices are also included in the technical scope of the present invention. As the electro-optical device, the present invention can be applied to an electrophoretic device, an EL (electroluminescence) device, a device using an electron-emitting device (Field Emission Display, Surface-Conduction Electron-Emitter Display, etc.).

FIG. 2 is a circuit diagram showing an equivalent circuit such as various elements and wiring provided in a plurality of pixels in a matrix forming an image display area in the electro-optical device according to the first embodiment of the present invention. FIG. 2 is a plan view of a plurality of pixel groups adjacent to each other on a TFT array substrate on which data lines, scanning lines, pixel electrodes, and the like are formed in the electro-optical device according to the first embodiment of the present invention. It is the top view which extracted only the principal part in FIG. It is AA 'sectional drawing of FIG. FIG. 3 is a plan view showing a horizontal protruding portion of a scanning line 3a and a groove dug in a base insulating film in FIG. 2 together with a semiconductor layer. FIG. 6 is a sectional view taken along line BB ′ of FIG. 5. It is CC 'sectional drawing of FIG. It is DD 'sectional drawing of FIG. FIG. 6 is a view having the same meaning as in FIG. 5 and shows an aspect in a case where a horizontal protruding part in the figure is replaced with an enclosing part. It is EE 'sectional drawing of FIG. It is FF 'sectional drawing of FIG. It is EE 'sectional drawing of FIG. 9 which is a deformation form. FIG. 3 is a view having the same effect as FIG. 2 and is a view showing a different mode from the view in that a groove along a scanning line is provided in a base insulating film. It is GG 'sectional drawing of FIG. FIG. 15 is a sectional view taken along line GG ′ of FIG. 13 relating to a modification to FIG. 14. FIG. 15 is a sectional view taken along line GG ′ of FIG. 13 relating to a modification to FIG. 14. FIG. 10 is a plan view of a plurality of pixel groups adjacent to each other on a TFT array substrate on which data lines, scanning lines, pixel electrodes, and the like are formed in the electro-optical device according to the second embodiment of the present invention. It is AA 'sectional drawing of FIG. FIG. 4 is a plan view showing a manner of forming a nitride film (on data lines and outside an image display area). FIG. 2 is a plan view of the TFT array substrate in the electro-optical device according to the embodiment of the present invention, together with the components formed thereon, viewed from the counter substrate side. FIG. 21 is a sectional view taken along line HH ′ of FIG. 20. 1 is a schematic cross-sectional view illustrating a color liquid crystal projector as an example of a projection type color display device that is an embodiment of an electronic apparatus according to the invention.

Explanation of reference numerals

1a semiconductor layer 1a 'channel region 2 insulating film 3a scanning line 3b horizontal projection (including vertical projection)
3c: Surrounding part (including vertical protruding part)
6a Data line 9a Pixel electrode 10 TFT array substrate 11a Lower light-shielding film M1 Metal layer B1 Barrier layer 12 Base insulating films 12cv and 12cva Groove 30 TFT
43 ... third interlayer insulating film 50 ... liquid crystal layer 70 ... storage capacitor 75 ... dielectric film 75a ... silicon oxide film 75b ... silicon nitride film 81, 82, 83, 85, 87, 89 ... contact hole 300 ... capacitance electrode 400 ... Shield layer 402: second relay layer

Claims (16)

A data line extending in a first direction, a scanning line extending in a second direction intersecting the data line, and an intersection area of the data line and the scanning line are arranged on the substrate. An electro-optical device in which a pixel electrode and a thin film transistor are provided as part of a stacked structure,
Further on the substrate,
A storage capacitor electrically connected to the thin film transistor and the pixel electrode;
The data line and a shield layer disposed between the pixel electrodes are provided as a part of the laminated structure,
An electro-optical device, wherein one of the pair of electrodes constituting the storage capacitor is formed of a multilayer film including a low resistance film.   2. The electro-optical device according to claim 1, wherein the multilayer film includes a lower layer formed of a light absorbing film and an upper layer formed of a light reflecting film. One of a pair of electrodes constituting the storage capacitor constitutes a part of a capacitance line formed along the second direction,
The electro-optical device according to claim 1, wherein the capacitance line is formed of a multilayer film including the low resistance film.   The electro-optical device according to claim 1, wherein the multilayer film is formed of the same film as the data line.   The electro-optical device according to claim 1, wherein the low resistance film is made of aluminum. The thin film transistor has a semiconductor layer including a channel region extending in the longitudinal direction and a channel adjacent region further extending in the longitudinal direction from the channel region,
The electro-optical device according to any one of claims 1 to 5, further comprising a light blocking part beside the channel region.   The scan line extends in a direction intersecting with the longitudinal direction, and includes a main body including a gate electrode of the thin film transistor that overlaps the channel region when viewed in plan view, and the main body portion beside the channel region in plan view. The electro-optical device according to claim 6, further comprising a horizontal protruding portion that protrudes in the longitudinal direction and forms the light blocking portion.   The electro-optical device according to claim 7, wherein a portion including the gate electrode of the main body is formed wide.   9. The horizontal projection portion is projected on both sides of the channel adjacent region located on the source side and the drain side of each of the channel regions when viewed in plan, respectively, 9. An electro-optical device according to claim 1. The thin film transistor has a semiconductor layer including a channel region extending in a longitudinal direction,
An upper light-shielding film that covers at least the channel region of the thin-film transistor from above,
6. The upper light-shielding film is formed at least partially in a concave shape when viewed from the channel region side on a cross section orthogonal to a longitudinal direction of the channel region. An electro-optical device according to claim 1.   8. The scanning line according to claim 7, further comprising a vertical protrusion protruding in a vertical direction of the substrate from the main line at a position deviated from the channel region by a predetermined distance in the second direction. The electro-optical device according to any one of claims 9 to 9. On the substrate, further comprises a lower light-shielding film covering at least the channel region from below,
The electro-optical device according to claim 11, wherein the vertical protruding portion is in contact with the lower light-shielding film on a tip side thereof. The thin film transistor has a semiconductor layer including a channel region extending in the first direction,
The scanning line includes a main line portion including a gate electrode of the thin film transistor that is opposed to the channel region via a gate insulating film and extending in a second direction that intersects the first direction when viewed in plan,
6. The groove according to claim 1, wherein the main line portion is disposed in a groove dug on the substrate, and includes an in-groove portion that at least partially covers the channel region from a side. The electro-optical device according to claim 1. The scanning line, the data line, a pair of electrodes constituting the storage capacitor and at least part of the shield layer are made of a light-shielding material,
14. The electro-optical device according to claim 1, wherein at least a part of the electro-optical device is in the laminated structure and forms a built-in light shielding film. A data line extending in a first direction, a scanning line extending in a second direction intersecting the data line, and an intersection area of the data line and the scanning line are arranged on the substrate. An electro-optical device in which a pixel electrode and a thin film transistor are provided as part of a stacked structure,
Further on the substrate,
A storage capacitor electrically connected to the thin film transistor and the pixel electrode;
A light-shielding film disposed between the data line and the pixel electrode, provided as a part of the laminated structure;
An electro-optical device, wherein one of the pair of electrodes constituting the storage capacitor is formed of a multilayer film including a low resistance film. An electronic apparatus comprising the electro-optical device according to claim 1.

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