JP2004128286A - Chip-like electronic component and manufacturing method thereof, pseudo wafer used for the manufacturing and manufacturing method thereof, and mounting structure - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To improve the reliability in wiring formation or device characteristics by effectively preventing a void or a weld from being generated on a plate of a protecting material, reducing a step between a chip component and the protecting material, and preventing the protecting material from invading an electrode surface. <P>SOLUTION: On a wafer 1, a plurality of or a plurality of kinds of semiconductor chips 3, 3' are fixed while turning their electrode surfaces downwards, lateral sides 39 of the chip components 3, 3' are coated with a resin 38 as a isolator to surround an electrode pad 5, a plate 4 of the protecting material is mounted approximately all over the surface including a gap of the semiconductor chips around the resin 38, and a pseudo wafer 49 formed by mounting the plate 4 continuously between the semiconductor chips and over their rear surfaces is released from a wafer 1. Further, after the step of releasing the pseudo wafer 49, the pseudo wafer 49 is cut between the plurality of or the plurality of kinds of semiconductor chips to separate the chip-like electronic components 46. <P>COPYRIGHT: (C)2004,JPO

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a chip-shaped electronic component suitable for manufacturing a semiconductor device and a method for manufacturing the same, a pseudo wafer used for the manufacturing, a method for manufacturing the same, and a mounting structure in which the chip-shaped electronic components are connected and fixed.
[0002]
[Prior art]
2. Description of the Related Art Conventionally, there is a strong demand for reduction in size, thickness, and weight of portable electronic devices such as digital video cameras, digital mobile phones, and notebook PCs (Personal Computers), and how to increase the surface mounting density of semiconductor components. Is an important point. For this reason, a smaller CSP (Chip Scale Package), which replaces a package IC (QFP (Quad Flat Package), etc.), has already been developed or adopted in some parts. Considering this, it is strongly desired to spread the connection technology using the bare chip and the flip chip method.
[0003]
Incidentally, the bump forming technique in the flip chip mounting generally includes a method of forming an Au bump on an Al electrode pad by an Au-Stud Bump method or an electrolytic plating method, or a method of collectively forming solder bumps by an electrolytic plating method or an evaporation method. A typical example is a method of forming the substrate by using the above method. However, in the case of consumer use, in the case of flip-chip mounting at a lower cost, bumps are formed in a wafer state at once instead of forming bumps after forming a chip (Au-Stump Bump method is a typical example). A forming method is desirable.
[0004]
Such a wafer batch processing method has a natural direction in consideration of the recent increase in the diameter of the wafer (150 mmφ → 200 mmφ → 300 mmφ) and the increasing number of connection pins of LSI (Large Scale Integrated Circuit) chips. is there.
[0005]
Hereinafter, a conventional bump forming method will be described. For example, FIG. 8 shows a process of forming bumps in a batch of wafers by Ni electroless plating and printing of a solder paste for cost reduction. FIG. ₂ This figure shows a Si substrate (wafer) on which a film is formed, and FIG. 2B is an enlarged view of a chip portion including the electrode. 4 (a) and 4 (b), 51 is a Si substrate (wafer), 55 is an Al electrode pad, and others are SiO. ₂ Film, Si ₃ N ₄ , SiO ₂ It is a passivation film made of a film or a polyimide film.
[0006]
In FIG. 4C, a Ni electroless plating layer (UBM: Under Bump Metal) is selectively formed only on the upper surface of the opened Al electrode pad 55 by the Ni electroless plating method. This Ni electroless plating layer (UBM) is easily prepared by pre-treating the surface of the Al electrode pad 55 with a phosphoric acid-based etchant, substituting and depositing Zn by Zn treatment, and further immersing in a Ni-P plating bath. And acts as a UBM to assist the connection between the Al electrode pad 55 and the solder bump.
[0007]
FIG. 4D shows a state in which the solder paste 59 is transferred onto the Ni electroless plating layer (UBM) by a printing method with the metal screen mask 52 applied. FIG. 4E shows a state in which the solder paste 59 is melted by a wet back (heat melting) method to form the solder bumps 62. As described above, by using the Ni electroless plating method and the solder paste screen printing method, the solder bumps 62 can be easily formed without using a photo process. Then, in this state, the wafer is cut along the scribe line into individual pieces and processed into individual bare chips.
[0008]
On the other hand, the CSP is an approach of reducing the size of each LSI and mounting it at a high density. When looking at circuit blocks of digital equipment, CSP is composed of several common circuit blocks. A technology for making a multi-chip package or a module (MCM: Multi Chip Module) has also appeared. An example is a package of an SRAM (Static RAM), a flash memory, and a microcomputer in a digital mobile phone.
[0009]
This MCM technology involves arranging a plurality of semiconductor components and passive components, and electrically connecting these components to each other to form a single module. The MCM technology has a great advantage even in recent one-chip system LSIs. It is expected to do. That is, when a memory, logic, and an analog LSI are integrated into one chip, different LSI processing processes are processed by the same wafer process, so that the number of masks and the number of steps are significantly increased, and the development TAT (Turn around time) is increased. Is a problem, and a decrease in yield is also a major concern.
[0010]
For this reason, a method in which each LSI is individually manufactured and converted to MCM is considered to be promising. FIG. 5 shows an example of such an MCM technology.
[0011]
Compared to the wire bonding method, the flip chip method shown in FIGS. 5A, 5B, and 5C connects the semiconductor chip 64 face down to the electrode 63 on the circuit board 60, and is more compact. This is an advantageous method for reduction in thickness and thickness. Considering the reduction in connection distance and the variation in connection impedance due to future high speeds, it is expected that the flip chip method will be adopted.
[0012]
The flip-chip type MCM forms an Au-Stud Bump on the surface of the Al electrode pad 55 of each of a plurality of different types of LSIs, and connects the circuit board to the circuit board via an anisotropic conductive film (ACF: Anisotropic Conductive Film). Various methods have been proposed, such as a connection method, a pressure contact method using a resin paste, and a method using an Au plating bump, a Ni electroless plating bump, or a solder bump as a bump. FIG. 5C shows an example in which the metal is bonded to the substrate 60 by the solder bump 65 and the bonding is performed with lower resistance and reliability.
[0013]
Each of the above-described bump forming methods has already been completed, and utilization as a mass production-based technique has begun. For example, the method of forming solder bumps on a wafer at a time can be applied to area pad arrangement on the mounting surface, and has advantages such as batch reflow and double-sided mounting. However, when processing is performed on a wafer having a low cutting-edge yield, the cost per good chip becomes extremely high.
[0014]
That is, FIG. 6 shows a semiconductor wafer 53 in the conventional wafer batch processing. Although a high yield is required in a state-of-the-art LSI, among the chips partitioned by the scribe line 21, the cross mark is used. Actually, the number of defective chips 20 shown is larger than the number of non-defective chips 3 shown by a mark.
[0015]
Further, there is a problem that it is extremely difficult to form a bump when a chip is obtained from another place in the form of a bare chip. That is, although the above two types of bump forming methods have their respective characteristics, they are not technologies that can be used for all areas, and at present, they are selectively used taking advantage of each characteristic. The wafer batch bump processing method is characterized by high yield, a large number of terminals in one wafer (for example, 50,000 terminals / wafer), and formation of low-damage bumps corresponding to area pads. Au stud bumps are characterized by bump processing when obtained in chip units and simple bump processing.
[0016]
When the semiconductor wafer 53 shown in FIG. 6 is cut along the scribe line 21, the chip may be damaged by stress, cracks and the like due to the cutting, which may cause a failure. Furthermore, if the process is advanced to the formation of the solder bumps together with the non-defective chips 3 and the defective chips 20 as the semiconductor wafer 53, the steps performed on the defective chips 20 are wasted, which also causes an increase in cost.
[0017]
Japanese Patent Application Laid-Open No. 9-260581 discloses that a plurality of semiconductor chips are bonded and fixed on a Si wafer, embedded in a resin provided on a substrate such as alumina under pressure, and then peeled off. A method is shown in which the surface is flattened and a wiring layer for connection between elements is formed on this wafer by a photolithography technique.
[0018]
According to this known method, batch processing of wafers becomes possible, and it is possible to achieve cost reduction by mass production.However, a hard substrate such as the above alumina exists on the back side of individual semiconductor chips in a wafer. Therefore, the hard substrate on the back side must be cut together with the resin between the chips at the time of scribing, and the cutting blade may be damaged. In addition, although the side of the chip is covered with resin, the back only has a hard substrate different from the resin, so the back of the chip may not be protected effectively, and between the two. Of the adhesive becomes poor.
[0019]
[Procedure leading to the invention]
In view of the above-mentioned conventional circumstances, the present applicant takes advantage of the features of batch processing of wafers, and provides a high yield, low cost, and high reliability even when obtained with the most advanced LSI and bare chips. A possible chip-like electronic component such as a semiconductor chip suitable for MCM has already been proposed in Japanese Patent Application No. 2000-122112.
[0020]
An example of a preferred embodiment based on the invention according to the earlier application (hereinafter, referred to as the earlier application invention) will be described with reference to FIGS.
[0021]
First, as shown in FIG. 7B, an adhesive tape (or sheet) 2 made of acrylic or the like is attached on the substrate 1 shown in FIG. 7A. In this case, the substrate 1 serves as a temporary support substrate and may be the quartz substrate 1. However, since the heating process for the substrate is performed at 400 ° C. or lower, a cheaper glass substrate can be used, and the quartz substrate can be used repeatedly. Further, the adhesive tape (or sheet) 2 is used in ordinary dicing, and may be, for example, an acrylic-based adhesive, which has a reduced adhesive strength when irradiated with ultraviolet rays.
[0022]
Next, after being cut out from the semiconductor wafer 53 as shown in FIG. 6, only non-defective semiconductor bare chips (or LSI chips) 3a and 3b confirmed as non-defective by open / short or DC (direct current) voltage measurement are removed. With the chip surface (device surface or electrode surface) 28 facing down, they are arranged and attached at equal intervals to the adhesive tape (or sheet) 2 on the substrate 1 as shown in FIG. Note that the substrate 1 may be a circular quartz substrate. However, if a large number of non-defective chips are adhered to a limited area by using a rectangular glass substrate, the cost merit in the subsequent process is improved. Can be demonstrated.
[0023]
Next, as shown in FIG. 7D, an organic insulating resin, for example, an epoxy resin or an acrylic resin 4 is uniformly applied on the chips 3a and 3b. This coating can be easily realized by a spin coating method or a printing method.
[0024]
Next, as shown in FIG. 7 (e), ultraviolet rays are irradiated from the back side 31 of the substrate 1 to weaken the adhesive force of the adhesive tape (or sheet) 2, and the resin (hereinafter, may be referred to as a plate material). .) The pseudo wafer 29 composed of a plurality of non-defective bare chips 3a and 3b whose side and back surfaces are continuously solidified in step 4 is separated from the substrate 1 by the bonding surface 30 or the device surface 28. An example of the pseudo wafer 29 is shown in FIG. 10 as a perspective view and a partially enlarged plan view thereof. Hereinafter, such a pseudo wafer may be referred to as a plate.
[0025]
Next, as shown in FIG. 8F, the pseudo wafer 29 is turned upside down so that the non-defective bare chip surface 28 (device surface) is on the upper side. The pseudo-wafer 29 is made of SiO 2 on a Si substrate as shown in FIG. ₂ An Al electrode pad 5 and a passivation film are formed via a film.
[0026]
Next, as shown in FIG. 8 (g), for the purpose of MCM, an Al or Cu wiring 33 for connecting each pad 5 is formed on the insulating layer between non-defective bare chips by a usual photolithography technique. I do.
[0027]
Next, as schematically shown in FIG. 8 (h), if necessary, the bump electrodes 12 are collectively formed on the wirings 33, and then the dicing 11 is performed by a blade 42 (or laser light irradiation). The non-defective chip-shaped electronic component 26 is obtained.
[0028]
9 (g1) to 9 (g2), the same processing as in FIGS. 4 (c) to (e) described above may be performed. That is, after performing the Ni electroless plating process to become the UBM, the print transfer of the solder paste 9 using the print mask 8 and the formation of the solder bumps 12 by the wet back method may be performed.
[0029]
As described above, even a chip obtained from a state-of-the-art LSI with a low yield or a chip obtained from another company, only the non-defective chips 3a and 3b are pasted on the substrate 1 again, and as if they were composed only of 100% non-defective bare chips. By manufacturing the pseudo wafer 29, it is possible to form wiring and bumps at a low cost for the whole wafer.
[0030]
Then, in FIG. 8 (g), in addition to the fact that the non-defective bare chips were selected before the step of FIG. Can be sorted out.
[0031]
The non-defective chip-shaped electronic components 26 singulated as shown in FIG. 8H are mounted on a wiring board (circuit board) as shown in FIG.
[0032]
At this time, since the side surface and the back surface of the non-defective chip-shaped electronic component 26 are covered with the plate member 4, the chip-shaped electronic component 26 is handled at the time of handling such as adsorption of the chip-shaped electronic component 26 at the time of mounting on the wiring board (mounting board). The components 3a and 3b are not damaged, so that flip-chip mounting with high reliability can be expected.
[0033]
As described above, according to the prior application, a non-defective semiconductor chip is cut out from a wafer, re-arranged and attached to a substrate at regular intervals, and peeled off after the plate material is applied, as if all products were non-defective chips. In order to obtain a pseudo wafer, it is possible to perform solder bump processing or the like on a non-defective chip in a batch of wafers, so that a low-cost flip-chip solder bump chip can be formed. Further, not only in-house manufactured wafers but also bare chips purchased from other companies can be easily solder bumped.
[0034]
In addition, since the chip side surface and the back surface are covered by the plate material, Ni electroless plating can be performed, and since the chip side surface and the back surface are protected by the plate material, mounting handling after chip singulation is performed. In this case, the chip is protected and good mounting reliability is obtained. The substrate to which the non-defective chip is attached can be used repeatedly after the pseudo wafer is peeled off, which is advantageous in terms of cost such as bump formation and environment.
[0035]
Also, by utilizing the features of low-cost bump processing by batch processing of wafers, it is possible to use a chip obtained in the form of a state-of-the-art LSI or bare chip, and to provide a highly versatile new bump forming method. Also, when cutting the semiconductor chip from the pseudo wafer, only the plate material (resin) is cut, so that the cutting can be easily performed, the blade is not damaged, and the semiconductor chip body is adversely affected (distortion, burrs, cracks, etc.). Damage).
[0036]
[Problems to be solved by the invention]
As described above, it has been found that the prior invention has various excellent features, but still has a problem to be improved.
[0037]
FIG. 11 is an enlarged view showing the steps of fixing the semiconductor chips 3a, 3b and 3a ', 3b', applying the resin 4, and peeling the pseudo wafer 29 described in FIGS. 7C to 7E. It is. However, although there are actually many semiconductor chips, only four semiconductor chips are shown in the drawing, and the semiconductor chips 3a 'and 3b' are used to protect the device from the incidence of α rays from the filler in the resin 4. An overcoat 31 made of polyimide or the like is formed on a portion other than the electrode pad 5.
[0038]
Then, as shown in FIG. 11A, after each semiconductor chip is adhesively fixed to the adhesive tape (or sheet) 2 of the substrate 1, as shown in FIG. It has been found that the following problems (1) to (4) are likely to occur when the composition is applied by a printing method or formed by casting under heat and pressure conditions.
[0039]
(1) For example, when the plate material 4 is formed directly by a printing method such as a vacuum printing method or a molding under heating and pressing conditions, if the plate material 4 is directly formed, as shown in FIG. The plate material 4 entrains the air bubbles existing at a certain position of the chip and generates a void 32. Even if vacuum defoaming is performed, the void is difficult to be removed because the plate thickness is large. May remain on the surface. For example, when the semiconductor chip is a thick chip having a thickness of 400 μm or a gap between the chips is narrow such as 300 μm, an unfilled void portion may be generated in the plate material. In particular, if voids exist on the surface of the plate material, it is not possible to stably apply the subsequent interlayer insulating film for the rearrangement wiring process on the surface of the plate material. In other words, the interlayer insulating film to be applied uniformly is repelled at the voids, becomes uneven, and causes a circuit-like open or short in subsequent wiring formation. May worsen.
[0040]
(2) Further, when the plate material 4 is formed directly under the heating and pressurizing condition, if the plate material 4 is directly formed, the components of the plate material 4, the components of the fixing material (adhesive tape 2), and the mixture of the components are obtained. Traces (hereinafter, referred to as welds) are likely to occur at chip corners and chip edges. This weld does not contain low-expansion components such as fillers uniformly contained in the plate material, and is made of an organic component with a high expansion coefficient. May have an adverse effect on reliability, such as expansion when exposed.
[0041]
(3) Further, when the plate material 4 is formed directly under the condition of heating and pressing, when the plate material 4 is directly formed, the fixing material 2 is softened by the heating and pressing, and the softened portion 43 is provided with a hard chip under the softened portion 43. When the fixing material 2 is pressed, the chips sink (or float), and as shown in FIG. 11C, when the plate material 4 is peeled off, a step 34 is generated at the boundary between the chip and the plate material on the surface thereof. . If this step occurs, for example, 4 μm or more, the subsequent formation of the interlayer insulating film and the formation of the wiring cannot be performed stably, resulting in poor wiring continuity and poor reliability. The step 34 has an adverse effect on the patterning property even when a wiring having a narrow wiring pitch is formed.
[0042]
(4) Further, when the plate member 4 is formed by a printing method such as a vacuum printing method or a molding under heating and pressing conditions, for example, the unevenness of the chip device surface is large, or the difference in the material of the chip device surface is large. Because of this, a semiconductor chip having poor adhesion between the chip device surface and the fixing material 2 or a semiconductor chip in which the electrode 5 on the chip device surface is on the outer periphery of the chip and the overcoat 31 is removed from the chip edge to the electrode In (3a ′, 3b ′), since the plate material is easily formed to enter the electrode 5 on the chip device surface, when the plate material 4 is directly formed, when the plate material 4 is poured or vacuum degassed. At the same time, the plate material 4 may enter the electrode on the surface of the chip device at the same time as the bubbles are released, and may be cured as it is. When the plate material 4 enters the electrode 5 of the chip and cures as described above, the electrode 5 is covered with an insulating material as shown by 35 in FIGS. 11B and 11C. Insufficient conduction results in higher resistance and lower reliability. Such a situation also occurs when the plate material 4 enters a gap generated by sinking or floating of the chip shown in FIG.
[0043]
An object of the present invention is to solve the above-mentioned problems while utilizing the features of the above-mentioned prior invention, to provide a chip-shaped electronic component in which a protective material as a plate material is coated on the chip components other than the electrode surface, and this chip In a mounting structure using electronic components, and in a pseudo wafer in which a plurality of chip components are integrated with a protective material, the generation of voids and welds in the protective material is effectively prevented, and the An object of the present invention is to improve the reliability of wiring formation and device characteristics by reducing a step between the electrodes and preventing a protective substance from entering the electrode surface.
[0044]
[Means for Solving the Problems]
That is, according to the present invention, at least almost the entire surface of the chip component provided with the electrode on one surface side other than the one surface is covered with a continuous protective material, and the electrode and the protective material are isolated from each other. The present invention relates to a mounting structure in which a separating material for the chip-shaped electronic component is provided between the chip component and the protective material, and the chip-shaped electronic component is connected and fixed to a mounting board. is there.
[0045]
The present invention also provides that a plurality or a plurality of types of chip components in which at least the electrodes are provided on one surface side are fixed to each other by a protective substance continuously applied between them and on the back surface thereof, The present invention relates to a pseudo wafer provided with an isolating material for isolating the electrode and the protective material between the chip component and the protective material.
[0046]
The present invention also provides a step of fixing a plurality or a plurality of types of chip components on a support with their electrode surfaces facing down, and a step of applying a separator to surround the electrodes on the side surfaces of the chip components. Applying a protective substance around substantially the entire surface including the plurality of or plural types of chip components around the isolation member, and applying the protective material continuously between the chip components and on the back surface thereof. Peeling off the pseudo wafer from the support, and further comprising, after the pseudo wafer peeling step, cutting the pseudo wafer between the plurality or a plurality of types of chip components In addition, the present invention also provides a method for manufacturing a chip-shaped electronic component, which performs a step of separating each chip-shaped electronic component.
[0047]
According to the present invention, in the chip-like electronic component, its mounting structure, and the pseudo wafer, at least electrodes are provided on at least one side of the chip component, and almost the entire surface other than the one surface is covered with the continuous protective material. In addition, since an isolating material for isolating the electrode and the protective material is provided between the chip component and the protective material, the following (1) to ( The remarkable effect of 4) is obtained.
[0048]
(1) Separation material (for example, liquid resin: the same applies hereinafter) for isolating an electrode (for example, an Al electrode pad (the same applies hereinafter)) of a chip component from a protective substance (for example, a plate material made of an insulating resin: the same applies hereinafter) Is provided in advance (that is, the periphery of the chip component is surrounded by an isolating material in advance), and when the protection material is poured, it is possible to prevent the protection material from being involved in a void existing at a certain position of the chip component. When vacuum degassing is performed after dispensing the isolating material, the thickness of the isolating material is thin, so that voids are easily removed, and the presence of the isolating material causes the surface of the chip component to have a gentle shape. When a protective material is poured, it is difficult to form voids around the chip and no voids are generated on the surface. In this case, no voids are left unfilled, and since the hardening does not occur while the voids are present on the surface of the protective material, the subsequent wiring can be formed in a stable manner. The generation of unfilled voids can be eliminated without changing the printing conditions, the molding conditions, the defoaming conditions, the thickness of the protective substance, and the like into which the protective substance is poured.
[0049]
(2) Also, when pouring the protective substance, the flow of the protective substance is smooth even in the heating and pressurizing step, since the periphery of the chip component is previously surrounded by the isolating material and the chip surface has a gentle shape. And the like, welds are less likely to occur at chip corners and chip edges. Since this weld does not occur at those places, there are no factors that adversely affect the reliability, such as a decrease in the adhesion to the chip component and expansion when heat is applied. That is, it is possible to eliminate the occurrence of welds without changing the material and physical properties of the protective substance, the molding conditions for pouring the protective substance, and the like.
[0050]
(3) Also, when pouring the protective substance, even in the heating and pressurizing step, since the periphery of the chip component is previously surrounded by the isolating material, the isolating material is softened together with the chip component fixing material by heating. The softened isolating material suppresses sinking or floating of the chip component into the fixing material, thereby reducing a step generated at the boundary between the chip component and the protective material, and subsequently forming an interlayer insulating film and forming a wiring. Can be performed reliably and stably. Since the step is small, the patterning property is improved even when a wiring having a narrow wiring pitch is formed. In other words, without changing the material and physical properties of the protective substance, the material and physical properties of the fixing material, and the molding conditions when pouring the protective substance, it is possible to reduce the occurrence of steps and to cope with stable wiring formation and fine wiring. Can be.
[0051]
(4) Further, when pouring a protective substance, a chip having poor adhesion between the chip device surface and the fixing material or, for example, an electrode on the chip device surface is located on the outer periphery of the chip, and an overcoat is formed from the chip edge to the electrode. Even in the case of a chip that has been pulled out and has a structure in which the protective substance easily enters the electrode on the chip device surface, the chip can be cured without the protective substance entering the electrode on the chip device surface by the isolating material (particularly, a cured resin). Therefore, since the protective substance does not enter the electrodes of the chip, poor conduction with the wiring and high resistance do not occur, and the reliability is improved. That is, it is possible to prevent the protection substance from entering the electrode without changing the material and physical properties of the protection substance, the material and properties of the fixing material, the conditions for pouring the protection substance, and the like.
[0052]
In addition to these functions and effects, the present invention rearranges and adheres non-defective chip components to a support similarly to the above-mentioned prior invention, and peels off after attaching a separator and attaching a protective substance. In addition, since it is possible to obtain a pseudo wafer in which all the products are non-defective chips, it is also possible to perform wiring formation and solder bump processing on the non-defective chips at a time. Also, solder bump processing and the like can be easily performed not only on in-house manufactured wafers but also on bare chips purchased from other companies.
[0053]
In addition, since the chip side surface and the back surface are covered with the protective material, Ni electroless plating can be performed, and the chip side surface and the back surface are protected by the protective material. In this case, the chip is protected and good mounting reliability is obtained. The substrate to which a good chip is attached can be used repeatedly after the wafer is peeled off, which is advantageous in terms of cost such as bump formation and environment.
[0054]
In addition, when cutting chip-shaped electronic components from a pseudo wafer, only the protective material is cut, so cutting can be easily performed, blades are not damaged, and chip components are adversely affected (strains, burrs, cracks, etc. ) Can be suppressed.
[0055]
BEST MODE FOR CARRYING OUT THE INVENTION
In the present invention, it is preferable that the isolating material is applied between the chip component and the protective material and / or between the chip components on a side surface of the chip component, and the isolating material has an insulating property. The protective material may be made of a cured product, and the protective material may be made of an organic or inorganic insulating material. In particular, the isolating material may be made of the same material as the protective material.
[0056]
It is preferable that the isolating material and the protective material are on the same surface on the one surface side, and that the isolating material is locally applied by dispensing.
[0057]
A single semiconductor chip or a plurality or a plurality of types of semiconductor chips that are cut at the position of the protective material and / or the isolating material and fixed to a mounting substrate, and the electrodes are provided on a mounting surface side; Preferably, a side surface of the semiconductor chip is covered with the isolating material, and the isolating material and the back surface of the semiconductor chip are covered with the protective material.
[0058]
Further, a wiring or a solder bump may be formed on the electrode, and a plurality or a plurality of types of semiconductor chips for MCM may be integrated by the protective material.
[0059]
In the present invention, it is preferable to apply the separating material in a liquid state, and then apply the protective material made of an organic or inorganic insulating material.
[0060]
In this case, at a temperature at which the adhesive force of the fixing material for fixing the chip component on the support does not decrease, the liquid material locally applied by dispensing is cured, and then the protective substance is poured. It is effective to cure. This is desirable when the heat resistance of the fixing material is sufficient.
[0061]
Further, the protective substance may be poured and cured in a state where the liquid material locally applied by dispensing is not cured. This is desirable when the heat resistance of the fixing material is insufficient.
[0062]
The liquid material is preferably degassed in a vacuum, but is not always necessary.
[0063]
When dispensing with the viscosity of the liquid material being higher than the viscosity at the time of pouring the protective substance, the liquid material does not protrude onto the electrode due to the high viscosity. This is effective for a chip having a structure in which resin easily enters the electrodes of the chip. However, after dispensing the liquid material, it is preferable to cure at a temperature at which the adhesive strength of the fixing material does not decrease, and then to cure by pouring the protective substance.
[0064]
In the present invention, a fixing material is provided on the flat support, a frame is attached to the fixing material if necessary, and a plurality of non-defective semiconductor chips or a plurality of types of semiconductor chips are provided with an electrode surface inside the frame. The adhesive is fixed downward, and if necessary, vacuum is applied while applying a load and / or heat. Thereafter, the liquid material as the isolating material is dispensed on the side surface or around the semiconductor chip with a higher viscosity than the protective substance. And, if necessary, after vacuum degassing and curing at a low temperature, the organic or inorganic insulating material as the protective material is uniformly applied and cured from the backside of the semiconductor chip, and then the plurality of A pseudo wafer in which one or more kinds of semiconductor chips are fixed by the protective substance is peeled off from the support, and a plurality of or more non-defective semiconductor chips are arranged and the pseudo wafer in which an electrode surface is exposed is provided. Give Ha, it is preferable to cut the pseudo wafer thereafter between the plurality or more semiconductor chips.
[0065]
In this case, the liquid material to be dispensed around the chip in advance, for example, the liquid resin, may be the same material as the protective substance (plate material), or may be a material of the same system and having a high viscosity. In particular, in order to obtain the effect (4), a material having a high viscosity is used in order to suppress penetration of the chip device surface into the electrode. In addition, it is also possible to apply by printing instead of dispensing.
[0066]
To exemplify each material, the liquid resin may be material: epoxy resin, viscosity: 60 Pa · s, and the resin (dam) having high viscosity may be material: epoxy resin, viscosity: 100 to 200 Pa · s. . Instead of the epoxy resin, a liquid ceramic, for example, a ceramic having a material of alumina, an inorganic medium, and a viscosity of 50 to 60 Pa · s or less (which can be set relatively freely by adjusting the concentration) may be used.
[0067]
Further, when dispensing the liquid resin around the chip, it is preferable that a high-precision dispenser be used to dispense the liquid resin at a constant height from a chip edge to a position outside a fixed distance. It is desirable that the distance from the chip edge to a position outside the chip edge is extended to an area where a wiring is formed thereon, and dispensing is performed. That is, the wiring on the plate material is less likely to be affected by irregularities generated at the interface between the dispensed resin and the plate material. Also, it is desirable that the height of the resin after dispensing is a height that does not go around the back surface of the chip, and that the side surface of the chip is covered with resin. It is desirable that all portions where the gap between chips is narrow be filled with resin.
[0068]
After dispensing the liquid resin, there is a possibility that a void may be involved during dispensing, so it is preferable to perform vacuum defoaming. At this time, since the resin thickness is as thin as the chip thickness or less, it is easy to remove bubbles. However, in order to obtain the effect of the above (4), if air bubbles existing near the chip are defoamed, the plate material may easily enter there.
[0069]
For curing, if the plate forming method is a printing method such as a vacuum printing method, it is not necessary to cure after dispensing and vacuum degassing, but when heating and pressing, the resin dispensed around the chip after vacuum degassing is used. Must be cured so that it does not move. In this case, the curing is preferably performed within a temperature condition under which the chip does not move due to a decrease in the chip holding force of the fixing material and the separation between the fixing material and the substrate (support) does not occur.
[0070]
In the present invention, in the method of manufacturing a pseudo wafer in which only a number of non-defective chips are arranged and the device surface is exposed, the chips are fixed to a fixing material, and the adhesion is improved as necessary by, for example, pressing under vacuum. Thereafter, a liquid resin is dispensed around the chip, degassed in a vacuum, and cured at a low temperature if necessary. This eliminates voids that are trapped by the presence of the chip, and makes it easier to remove even if a void is generated around the chip during dispensing, so that no void is generated.
[0071]
Further, by curing the dispensed resin at a low temperature, the weld of the plate material generated at the time of molding by heating and pressing the plate material and the step between the chip and the plate material are reduced. This is also a manufacturing method capable of curing the dispensed resin so that the plate material does not enter the electrode on the chip device surface even if the material and the structure have different adhesive strengths of the chip and the chip to the fixing material.
[0072]
In this way, only a number of non-defective chips are arranged, the electrode pad portions of the device are all exposed, a plate without voids can be manufactured with high reliability, and the weld of the plate material or the step between the chip and the plate is small, so that The subsequent rewiring process can be performed with high reliability.
[0073]
Then, an electrode or a wiring is formed on this plate (pseudo wafer) and cut into a module composed of a single or a plurality of chips, whereby an extremely low-cost chip module can be provided. This chip module can be used not only for small and lightweight portable electronic devices but also for all electronic devices.
[0074]
Further, the chip component determined to be non-defective by the characteristic measurement is fixed on the support, and the characteristic of the chip component is measured in a state where the chip component is fixed with the protective substance, and a non-defective chip-shaped electronic component is selected. Good.
[0075]
Hereinafter, preferred embodiments of the present invention will be described with reference to the drawings.
[0076]
FIGS. 1 to 3 show a process of dispensing a liquid resin as a separating material around a semiconductor chip and then modularizing (plating) or dividing each chip into various chips.
[0077]
First, as shown in FIG. 1A, an adhesive fixing material 2 is uniformly formed on a flat substrate 1 with little deformation, such as a glass plate, as shown in FIG. 1B. If the fixing material 2 is a film, it is attached by a method such as roller lamination, and if it is a liquid, it is formed by a method such as spin coating or printing.
[0078]
Next, as shown in FIG. 1C, the semiconductor chips 3, 3 ′ which have been confirmed as non-defective products are fixed on the fixing material 2 with the device (electrode) face down using the adhesiveness of the fixing material 2. I do. At this time, the chip 3 ′ provided with an overcoat 31 of polyimide or the like on the surface is also fixed. Similarly, the chip 3 ′ is fixed with the overcoat surface down, using the adhesiveness of the fixing material 2. Note that the chip with the overcoat 31 is also described in FIG. Although the semiconductor chips 3 and 3 'are illustrated in the same size, it is a matter of course that the semiconductor chips 3 and 3' may have different sizes, such as the chips 3a, 3a ', 3b and 3b' shown in FIG. Although a large number of semiconductor chips 3 and 3 'actually exist, only four are shown in the drawing (the same applies hereinafter).
[0079]
Next, if necessary, as shown in FIG. 1 (d), in order to enhance the adhesion between the fixing material 2 and the chips 3, 3 ', the entire substrate 1 is placed in a vacuum device 36, and the load jig 37 is attached to the chip. The chip is placed on the back surface, a load is applied to the chip back surface by the own weight of the jig, or a mechanical load, and the chip is evacuated to improve the adhesion between the chips 3, 3 'and the fixing member 2.
[0080]
Next, as shown in FIG. 2 (e), a liquid resin (or a liquid resin having a higher viscosity than the plate material) 38A is dispensed on each side surface along the periphery of the chips 3, 3 ′, and is locally applied. Vacuum defoaming and curing at low temperature if necessary.
[0081]
At this time, the liquid resin 38A dispensed around the chip may be the same material as the plate material (for example, epoxy resin) or a material of the same system, but has a higher viscosity (for example, 100 to 200 Pa · s). What you did is good. In particular, in order to prevent the plate material from seeping into the electrode on the chip device surface, a material having a high viscosity is preferably used. This is also effective when a plate material is poured without curing the liquid resin 38A.
[0082]
Also, when dispensing around the chip, use a high-precision dispenser to dispense at a constant height from the chip edge to a position outside a certain distance, but the distance from the chip edge to the outside position must be It is desirable to dispense by spreading to the area where the is formed. This makes it less likely to be affected by irregularities at the interface between the resin 38 cured after dispensing and the plate member 4. Further, the height of the resin 38 after dispensing is set so as not to go around the back surface of the chip, and it is desirable that the chip side surface 39 is covered with the resin 38. It is desirable to keep.
[0083]
After this dispensing, there is a possibility that a void may be involved at the time of dispensing, so it is preferable to perform vacuum defoaming. At this time, since the thickness of the resin 38A is as thin as the chip thickness or less, it is easy to remove bubbles. However, when the plate material enters the defoaming portion when the plate material is poured, it may be better not to perform the vacuum defoaming.
[0084]
Regarding the hardening of the liquid resin 38A, if the plate material is formed by a printing method such as a vacuum printing method, it is not necessary to harden after dispensing and vacuum defoaming. Later, it is necessary to cure the dispensed resin 38 around the chip so as not to move. In this case, the curing is performed within a temperature condition under which the chip holding force of the fixing material 2 is reduced and the chip does not move, and the separation of the fixing material 2 and the substrate 1 does not occur.
[0085]
Next, as shown in FIG. 2 (f), a frame (or a mold) 41 on which a release agent has been spray-coated in advance is attached on the fixing material 2 so as to surround the chips 3 and 3 ′. In this state, as shown in FIG. 2 (g), a plate material 4A (having a viscosity of, for example, 60 Pa.s), in which the fixing material 2 is made of a liquid epoxy resin having a releasing function, is uniformly poured from the back surface of the chip and hardened.
[0086]
Next, as shown in FIG. 2 (h), by utilizing the releasing action of the fixing material 2, the plate with the frame 41 and the chips 3, 3 ′ covered with the hardened plate material 4 other than the electrode surface is flattened. 3 (i), the frame 41 is removed from the plate 4, and a pseudo wafer 49 shown in FIG. 3 (j) is produced.
[0087]
Next, as shown in FIG. 3 (k), wirings 33 for rearrangement are formed on the chips or between the chips by a subtractive method so as to be connected to the electrode pads 5 of the chips 3, 3 '. In this manner, the connection between chips for MCM is performed. In this case, an insulating layer may be provided under the wiring 33, but since the surface of the pseudo wafer 49 is made of an insulating material except for the electrode pad 5, the wiring 33 can be provided thereon, and It is not necessary to form another insulating layer on the base.
[0088]
Next, as shown in FIG. 3 (l), the plate material 4 (or / and the resin 38) between the chips is diced 11 by a cutting blade 42 into individual pieces. A non-defective chip-shaped electronic component 46 covered and integrated on the side surface and the back surface is manufactured in 4 (the dicing position is indicated by a virtual line in FIG. 3K).
[0089]
Further, after the solder bumps 12 connected to the respective electrode pads 5 are formed by the batch transfer method in the state of FIG. 3 (j) or (k), the solder bumps 12 can be separated into individual pieces.
[0090]
According to the present embodiment, the pseudo wafer 49 is manufactured by pouring the plate material 4A in a state where the separating material (dam material) made of the cured resin 38 is provided around each chip. There is no void entrapment due to the presence of, no voids in or on the plate material 4, and no plate material 4 penetrates and covers the electrode pads 5 of the chips 3, 3 ′. The step between the chip and the plate material on the surface of the material 4 is also reduced, and the occurrence of weld on the plate is suppressed.
[0091]
Therefore, a void-free resin plate (pseudo-wafer) 49 in which only non-defective chips are arranged in a large number and all the electrode pad portions of the device are exposed can be produced with high reliability. Rewiring can also be formed with high accuracy and reliability.
[0092]
That is, for example, even for the chips 3 and 3 'having a large thickness and having a structure in which the plate material 4A easily enters the electrode 5 of the chip, the liquid resin 38A or the like is dispensed around the chip in advance, and if necessary, By vacuum defoaming and heat curing, compared to the method of pouring the plate material 4A without providing the resin 38, the liquid resin is evacuated in a thin state and the voids around the chip are easily removed, Further, since the outer shape of the chip is covered with the resin 38 and has a gentle shape, it is difficult for the plate material 4A to be wound around the chip even when the plate material 4A is poured.
[0093]
In addition, a desired plate can be obtained without the plate material 4A entering the electrode 5 on the chip device surface. When the plate material is subsequently formed under heating and pressing conditions, the periphery of the chip is covered with the resin 38 in advance to form a gentle shape, so that welds that are likely to occur at chip corners and chip edges can be reduced.
[0094]
Also, when the plate material 4A is poured, the fixing material 2 is softened and pushed by the hard chip portion, so that a step is easily generated between the chip and the plate material. However, since the periphery of the chip is covered with the resin 38 in advance, Since the periphery of the chip can be made flexible and the step can be reduced, the resin plate 49 made of a good chip having a flat surface can be stably obtained.
[0095]
Then, the formation of electrodes such as bumps and the formation of wiring on the pseudo wafer 49 can be stably performed. By dividing into individual chips, a plurality of good chips (high-end LSIs with low yield and expensive state-of-the-art A desired flat chip module 46 in which integrated chips (chip parts such as chip resistors and chip parts) are integrated (however, a single chip can be separated). This chip-shaped electronic component 46 is connected and fixed to a mounting board in the same manner as shown in FIG.
[0096]
Further, in the present embodiment, similarly to the above-described prior application, the non-defective chips 3 and 3 ′ are rearranged and attached to the substrate 1, and are peeled off after the resin 38 is attached and the plate material 4 is attached. Since it is possible to obtain the pseudo wafer 49 in which all the products are non-defective chips, it is possible to perform wiring formation and solder bump processing on the non-defective chips at a time. Also, solder bump processing and the like can be easily performed not only on in-house manufactured wafers but also on bare chips purchased from other companies.
[0097]
In addition, since the chip side surface and the back surface are covered by the plate member 4, Ni electroless plating can be performed, and the chip side surface and the back surface are protected by the plate member 4, so that the chip after individualization is separated. The chip is also protected during mounting handling, and good mounting reliability is obtained. The substrate to which a good chip is attached can be used repeatedly after the wafer is peeled off, which is advantageous in terms of cost such as bump formation and environment.
[0098]
Further, when the chip-shaped electronic component 46 is cut from the pseudo wafer 49, the portion of the plate material 4 is cut, so that the cutting can be easily performed, the blade is not damaged, and the chip component is adversely affected (distortion, burrs, cracks, etc.). Damage).
[0099]
The embodiment described above can be further modified based on the technical idea of the present invention.
[0100]
For example, the pattern, material, forming method and the like of the resin 38 may be variously changed. The position may be between the chips 3 and 3 'and the plate material 4 or between the chips.
[0101]
Also, after the process of FIG. 3 (k), solder bumps may be collectively formed on the wiring 43 and then scribed, or the bumps may be provided in advance on the mounting substrate side to separate the chip-shaped electronic components 46. May be mounted. After the step of FIG. 3 (j), it is also possible to scribe without forming the wiring 43 and mount it on the mounting substrate.
[0102]
The substrate on which the non-defective bare chip is attached may be made of another material as long as it has the same effect and strength in addition to quartz and glass, and the shape and thickness may be arbitrarily changed. The adhesive tape (or sheet) 2 may be made of acrylic or the like, or various materials as long as it serves the same purpose. The material of the plate material 4 may be selected from a wide range, and only organic materials such as epoxy resin are used. Instead, inorganic materials such as SOG (Spin on Glass) SiOx can also be used. The non-defective bare chips may be different in shape, size and type, but may be of the same type.
[0103]
A substrate such as the above quartz substrate can be used repeatedly as many times as possible, which is advantageous in terms of cost and environment. The object to which the present invention is applied is not limited to a chip-shaped electronic component having a semiconductor chip, but may be various chip-shaped electronic components having other chip components.
[0104]
Operation and Effect of the Invention
As described above, according to the present invention, at least substantially the entire surface of the chip component provided with the electrode on one surface side other than the one surface is covered with a continuous protective material, and the electrode and the protective Since the isolating material for isolating the substance is provided between the chip component and the protective substance, the following remarkable effects (1) to (4) can be obtained.
[0105]
(1) By providing an insulating material (for example, a liquid resin) for isolating the electrodes of the chip component from the protection material in advance, the protection material is involved in a void existing at a certain position of the chip component when the protection material is poured. Can be prevented. And, when vacuum defoaming after dispensing this isolating material, since the thickness of the isolating material is thin, it is easy for voids to come off, and the presence of the isolating material causes the surface of the chip component to have a gentle shape, When the protective substance is poured, it is difficult to wind the void around the chip, and no void is generated on the surface. For example, even when the chip components are thick or the gap between the chip components is narrow, an unfilled void does not occur. In addition, since the curing is not performed while the voids are present on the surface of the protective material, the subsequent wiring can be formed stably.
[0106]
(2) Also, when pouring the protective substance, the flow of the protective substance is smooth even in the heating and pressurizing step, since the periphery of the chip component is previously surrounded by the isolating material and the chip surface has a gentle shape. And the like, welds are less likely to occur at chip corners and chip edges. Since this weld does not occur at those places, there are no factors that adversely affect the reliability, such as a decrease in the adhesion to the chip component and expansion when heat is applied.
[0107]
(3) Also, when pouring the protective substance, even in the heating and pressurizing step, since the periphery of the chip component is previously surrounded by the isolating material, the isolating material is softened together with the chip component fixing material by heating. The softened isolating material suppresses the sinking of the chip component into the fixing material, reducing the step that occurs at the boundary between the chip component and the protective material, and ensuring the subsequent formation of the interlayer insulating film and wiring formation. Can be performed well and stably. Since the step is small, the patterning property is improved even when a wiring having a narrow wiring pitch is formed.
[0108]
(4) Further, when pouring a protective substance, a chip having poor adhesion between the chip device surface and the fixing material, or, for example, an electrode on the chip device surface is located on the outer periphery of the chip, and an overcoat is formed from the chip edge to the electrode. Even in the case of a chip that has been pulled out and has a structure in which the protective substance easily enters the electrode on the surface of the chip device, it can be cured without the protective substance entering the electrode on the surface of the chip device by the isolating material (particularly, a cured resin). Therefore, since the protective substance does not enter the electrodes of the chip, poor conduction with the wiring, high resistance does not occur, and the reliability is improved.
[0109]
Then, the non-defective chip components are rearranged and adhered to the support, peeled off after the attachment of the isolating material and the deposition of the protective substance, and a pseudo wafer can be obtained as if all products were non-defective chips. It is also possible to perform wiring formation, solder bump processing, and the like on the chip in a batch of wafers. Also, solder bump processing and the like can be easily performed not only on in-house manufactured wafers but also on bare chips purchased from other companies.
[0110]
In addition, since the chip side surface and the back surface are covered with the protective material, Ni electroless plating can be performed, and the chip side surface and the back surface are protected by the protective material. In this case, the chip is protected and good mounting reliability is obtained. The substrate to which a good chip is attached can be used repeatedly after the wafer is peeled off, which is advantageous in terms of cost such as bump formation and environment.
[0111]
In addition, when cutting chip-shaped electronic components from a pseudo wafer, only the protective material is cut, so cutting can be easily performed, blades are not damaged, and chip components are adversely affected (strains, burrs, cracks, etc. ) Can be suppressed.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view showing a method of manufacturing a chip-shaped electronic component according to an embodiment of the present invention in the order of steps.
FIG. 2 is a sectional view sequentially showing a step that follows the step of FIG. 1;
FIG. 3 is a cross-sectional view sequentially showing a step that follows the step of FIG. 2;
4A to 4C are cross-sectional views illustrating a conventional method of manufacturing a chip-shaped electronic component in the order of steps.
FIG. 5A is a perspective view of an example of an MCM mounting structure, and FIGS. 5B and 5C are partial cross-sectional side views thereof.
FIG. 6 is a perspective view of a semiconductor wafer for coping with wafer batch processing.
7A to 7C are cross-sectional views showing a pseudo wafer according to the invention of the prior application and a subsequent mounting method in the order of steps.
8 is a cross-sectional view sequentially showing a step that follows the step of FIG.
FIG. 9 is a cross-sectional view sequentially showing a bump forming step.
FIG. 10 is a perspective view of the pseudo wafer and an enlarged plan view of a part thereof.
11 is a cross-sectional view for explaining the step of FIG. 7 in detail.
[Explanation of symbols]
1: quartz substrate, 2: adhesive fixing material or adhesive tape (or sheet),
3, 3 ', 3a, 3b: good bare chip, 4: plate material or resin,
4A: liquid plate material (resin), 5: electrode pad, 8: printing mask,
9: solder paste, 11: dicing, 12: solder bump,
29, 49: pseudo wafer, 31: overcoat, 33: wiring,
36: vacuum device, 37: load jig, 38: cured resin, 38A: liquid resin,
39 ... side surface, 40 ... narrow gap, 41 ... frame, 42 ... blade,
46 ... Chip electronic components

Claims (53)

At least an electrode is provided on one surface side of the chip component, and substantially the entire surface other than the one surface is covered with a continuous protective material, and the isolating material for isolating the electrode from the protective material is provided. A chip-shaped electronic component provided between the chip component and the protective substance. The chip-shaped electronic component according to claim 1, wherein the isolation member is applied between the chip component and the protective material and / or between the chip components on a side surface of the chip component. The chip-shaped electronic component according to claim 1, wherein the isolation material is made of an insulating cured material, and the protective material is made of an organic or inorganic insulating material. The chip-shaped electronic component according to claim 3, wherein the isolation member is made of the same material as the protective substance. The chip-shaped electronic component according to claim 1, wherein the isolation member and the protective material are on the same surface on the one surface side. The chip-shaped electronic component according to claim 1, wherein the separator is locally applied by dispensing. A single semiconductor chip or a plurality or a plurality of types of semiconductor chips cut at the position of the protective material and / or the separating material and fixed to a mounting substrate, wherein the electrode is provided on a mounting surface side; The chip-shaped electronic component according to claim 1, wherein a side surface of the semiconductor chip is covered with the isolating material, and the isolating material and the back surface of the semiconductor chip are covered with the protective material. The chip-shaped electronic component according to claim 1, wherein a wiring or a solder bump is formed on the electrode. The chip-shaped electronic component according to claim 1, wherein a plurality or a plurality of types of semiconductor chips are integrated by the protective substance. A plurality or a plurality of types of chip components provided with at least one electrode on one surface side are fixed to each other by a protective substance continuously applied between them and on the back surface thereof, and the electrode and the protection A pseudo wafer in which an isolating material for isolating a substance is provided between the chip component and the protective substance. The pseudo wafer according to claim 10, wherein the separating material is applied between the chip component and the protective material and / or between the chip components on a side surface of the chip component. The pseudo wafer according to claim 10, wherein the isolation material is made of an insulating cured material, and the protective material is made of an organic or inorganic insulating material. 13. The pseudo wafer according to claim 12, wherein the isolation material is made of the same material as the protective material. The pseudo wafer according to claim 10, wherein the isolation material and the protective material are on the same surface on the one surface side. The pseudo wafer according to claim 10, wherein the separator is locally applied by dispensing. A single semiconductor chip or a plurality or a plurality of types of semiconductor chips cut at the position of the protective material and / or the separating material and fixed to a mounting substrate, wherein the electrode is provided on a mounting surface side; The pseudo wafer according to claim 10, wherein a side surface of the semiconductor chip is covered with the separating material, and a back surface of the separating material and the semiconductor chip are covered with the protective material. The pseudo wafer according to claim 10, wherein a wiring or a solder bump is formed on the electrode. The pseudo wafer according to claim 10, wherein a plurality or a plurality of types of the semiconductor chips are integrated by the protective material. At least an electrode is provided on one surface side of the chip component, and substantially the entire surface other than the one surface is covered with a continuous protective material, and the isolating material for isolating the electrode from the protective material is provided. A mounting structure in which a chip-shaped electronic component provided between the chip component and the protective substance is connected and fixed to a mounting substrate. 20. The mounting structure according to claim 19, wherein the separating material is applied between the chip component and the protective material and / or between the chip components on a side surface of the chip component. 20. The mounting structure according to claim 19, wherein the insulating material is made of an insulating cured material, and the protective material is made of an organic or inorganic insulating material. 22. The mounting structure according to claim 21, wherein the isolation member is made of the same material as the protective substance. 20. The mounting structure according to claim 19, wherein the isolation member and the protective material are on the same surface on the one surface side. 20. The mounting structure according to claim 19, wherein the separator is locally applied by dispensing. A single semiconductor chip or a plurality or a plurality of types of semiconductor chips cut at the position of the protective material and / or the separating material and fixed to a mounting substrate, wherein the electrode is provided on a mounting surface side; 20. The mounting structure according to claim 19, wherein a side surface of the semiconductor chip is covered with the isolating material, and the isolating material and the back surface of the semiconductor chip are covered with the protective material. 20. The mounting structure according to claim 19, wherein the connection and fixing are performed by a wiring or a solder bump formed on the electrode. 20. The mounting structure according to claim 19, wherein a plurality or a plurality of types of semiconductor chips are integrated by the protection material. Fixing a plurality of or a plurality of types of chip components on a support with their electrode surfaces facing down, applying a separator on the side surface of the chip component so as to surround the electrodes, A step of applying a protective substance on substantially the entire surface including the plurality of or a plurality of types of chip components around, and the pseudo wafer formed by continuously applying the protective material between the chip components and the back surface thereof. A method for manufacturing a chip-shaped electronic component, comprising: a step of separating the chip-shaped electronic component from a support; and a step of cutting the plurality of or a plurality of types of chip components to separate each chip-shaped electronic component. 29. The method for manufacturing a chip-shaped electronic component according to claim 28, wherein the isolating material is applied between the chip component and the protective material and / or between the chip components on a side surface of the chip component. 29. The method for manufacturing a chip-shaped electronic component according to claim 28, wherein the separating material is applied in a liquid state, and then the protective material made of an organic or inorganic insulating material is applied. At a temperature at which the adhesive force of the fixing material for fixing the chip component on the support does not decrease, the liquid material locally applied by dispensing is cured, and then the protective material is poured and cured. A method for manufacturing a chip-shaped electronic component according to claim 30. 31. The method for manufacturing a chip-shaped electronic component according to claim 30, wherein the protective substance is poured and cured in a state where the liquid material locally applied by dispensing is not cured. 33. The method for manufacturing a chip-shaped electronic component according to claim 31, wherein the liquid material is vacuum degassed. 33. The method for manufacturing a chip-shaped electronic component according to claim 31, wherein the liquid material is dispensed with a viscosity higher than a viscosity at the time of pouring the protective substance. 29. The method for manufacturing a chip-shaped electronic component according to claim 28, wherein, on the one surface side, the isolation material and the protective material are present on the same surface. A fixing material is provided on the flat support, and if necessary, a frame is attached to the fixing material, and a plurality of non-defective semiconductor chips or a plurality of types are adhesively fixed inside the frame with the electrode surface facing down. Then, if necessary, vacuuming is performed while applying a load and / or heat, and then the liquid material as the isolating material is applied with a higher viscosity than the protective substance on the side surface or the periphery of the semiconductor chip by dispensing, If necessary, after vacuum degassing and curing at a low temperature, the organic or inorganic insulating material as the protective material is uniformly applied and cured from the backside of the semiconductor chip, and then the plurality or plural kinds of the A pseudo wafer in which semiconductor chips are fixed with the protective substance is peeled off from the support, and a plurality of non-defective semiconductor chips or a plurality of kinds of semiconductor chips are arranged and the pseudo wafer in which an electrode surface is exposed is obtained. It said pseudo wafer is cut between the plurality or more of the semiconductor chip, a manufacturing method of the chip-like electronic components according to claim 30. A single semiconductor chip or a plurality or a plurality of types of semiconductor chips fixed to a mounting substrate by being cut at the position of the protective material and / or the isolating material are covered with the isolating material on the side surface, and the isolation is performed. The method for manufacturing a chip-shaped electronic component according to claim 28, wherein the chip-shaped electronic component in which a material and a back surface of the semiconductor chip are integrated by the protective substance is obtained. The method for manufacturing a chip-shaped electronic component according to claim 28, wherein a wiring or a solder bump is formed on the electrode. The method for manufacturing a chip-shaped electronic component according to claim 28, wherein the chip component determined as a non-defective product by characteristic measurement is fixed on the support. 29. The method for manufacturing a chip-like electronic component according to claim 28, wherein the characteristics of the chip-like component are measured in a state where the chip-like electronic component is fixed with the protective material, and a good-quality chip-like electronic component is selected. Fixing a plurality of or a plurality of types of chip components on a support with their electrode surfaces facing down, applying a separator on the side surface of the chip component so as to surround the electrodes, A step of applying a protective substance on substantially the entire surface including the plurality of or a plurality of types of chip components around, and the pseudo wafer formed by continuously applying the protective material between the chip components and the back surface thereof. Separating the pseudo wafer from the support. 42. The method of manufacturing a pseudo wafer according to claim 41, wherein the isolation member is applied between the chip component and the protective material and / or between the chip components on a side surface of the chip component. 42. The method of manufacturing a pseudo wafer according to claim 41, wherein the isolating material is applied in a liquid state, and then the protective material made of an organic or inorganic insulating material is applied. At a temperature at which the adhesive force of the fixing material for fixing the chip component on the support does not decrease, the liquid material locally applied by dispensing is cured, and then the protective material is poured and cured. A method for manufacturing a pseudo wafer according to claim 43. 44. The method of manufacturing a pseudo wafer according to claim 43, wherein the protective substance is poured and cured in a state where the liquid material locally applied by dispensing is not cured. The method for manufacturing a pseudo wafer according to claim 44 or 45, wherein the liquid material is vacuum degassed. The method of manufacturing a pseudo wafer according to claim 44 or 45, wherein the dispensing is performed by setting the viscosity of the liquid material to be higher than the viscosity at the time of pouring the protective substance. 42. The method for manufacturing a pseudo wafer according to claim 41, wherein the isolation material and the protective material are present on the same surface on the one surface side. A fixing material is provided on the flat support, and if necessary, a frame is attached to the fixing material, and a plurality of non-defective semiconductor chips or a plurality of types are adhesively fixed inside the frame with the electrode surface facing down. Then, if necessary, vacuuming is performed while applying a load and / or heat, and then the liquid material as the isolating material is applied with a higher viscosity than the protective substance on the side surface or the periphery of the semiconductor chip by dispensing, If necessary, after vacuum degassing and curing at a low temperature, the organic or inorganic insulating material as the protective material is uniformly applied and cured from the backside of the semiconductor chip, and then the plurality or plural kinds of the A pseudo wafer in which semiconductor chips are fixed with the protective substance and the pseudo wafer is peeled off from the support to obtain the pseudo wafer in which a plurality of or more non-defective semiconductor chips are arranged and the electrode surfaces are exposed. Method for producing a pseudo wafer described in 1. A single semiconductor chip or a plurality or a plurality of types of semiconductor chips fixed to a mounting substrate by being cut at the position of the protective material and / or the isolating material is covered with the isolating material on a side surface thereof. 42. The method of manufacturing a pseudo wafer according to claim 41, wherein a material and a back surface of the semiconductor chip are processed into the chip-shaped electronic component integrated by the protective substance. 42. The method of manufacturing a pseudo wafer according to claim 41, wherein a wiring or a solder bump is formed on the electrode. 42. The method for manufacturing a pseudo wafer according to claim 41, wherein the chip component determined to be non-defective by characteristic measurement is fixed on the support. 42. The method of manufacturing a pseudo wafer according to claim 41, wherein the characteristic of the chip component is measured in a state where the chip component is fixed with the protective substance, and a good chip-shaped electronic component is selected.

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