JP2004015688A - High frequency switching circuit and communication device using the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a high frequency switching circuit for supporting a diversity system of which deterioration within a predetermined frequency band due to an insertion loss by a switching device has been improved, and a communication device with such a switching circuit being incorporated therein. <P>SOLUTION: The high frequency switching circuit 11 is configured to have a pair of SPDT switches 21, 31, and each single pole of the SPDT switches 21, 31 is connected together via an inductor LO to support the diversity system. This allows the switching circuit in off-state at some point in a signal wire path to operate as a low path filter through a relation with the inductor LO in stead of just an existence as a parasitic capacity, and thereby to improve the deterioration within the predetermined frequency band due to the insertion loss. <P>COPYRIGHT: (C)2004,JPO

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a high-frequency switch circuit and a communication device using the same, and more particularly to a technique for reducing insertion loss caused by a switch element included in the high-frequency switch circuit.
[0002]
[Prior art]
In a communication device for wireless communication or the like, a diversity system may be adopted to prevent fading. In particular, some wireless communication devices employ a so-called spatial diversity reception system in which two antennas are arranged at a predetermined distance from each other and a signal received by each antenna is switched according to a reception state.
[0003]
In order to adopt such a diversity system, two ports to which the main antenna and the diversity antenna are respectively connected, and two ports to which the transmission circuit and the reception circuit are respectively connected, that is, a total of four ports according to the transmission / reception state. It is necessary to switch and select each. Therefore, in the related art, for example, a high-frequency switch circuit having a configuration as shown in FIG. 9 is used.
[0004]
That is, the high frequency switch circuit 51 includes a pair of upper and lower SPDT (Single Pole Dual Through, single pole double throw) switches 21 and 31. One SPDT switch 21 has two ports P1 and P2, two through switch elements SW1 and SW2, and two shunt switch elements SW5 and SW6. Similarly, the other SPDT switch 31 has two ports P3 and P4, two through switch elements SW3 and SW4, and two shunt switch elements SW7 and SW8. The central ports (single poles) P0 of the SPDT switches 21 and 31 are connected to each other so as to be compatible with a diversity system.
[0005]
That is, for example, one SPDT switch 21 is disposed on the communication device side, and of the two ports P1 and P2, a transmission circuit is connected to one port P1 and a reception circuit is connected to the other port P2. Is done. The other SPDT switch 31 is arranged on the antenna side. Of the two ports P3 and P4, the main antenna is connected to one port P3 and the diversity antenna is connected to the other port 4 respectively. Note that, since the high-frequency switch circuit 51 is vertically symmetric, one SPDT switch 21 may be arranged on the antenna side and the other SPDT switch 31 may be arranged on the communication device side.
[0006]
Each of the through switch elements SW1 to SW4 is inserted in the middle of the signal line, and each of the through switches SW1 to SW4 is turned on / off according to the transmission / reception state to selectively connect the ports P1 to P4. Connected to. Further, the shunt switch elements SW5 to SW8 are inserted between the signal line and the ground, and when the through switch elements SW1 to SW4 are turned off, a high frequency signal may leak out. To SW4, the shunt switch elements SW5 to SW8 are turned on to ensure isolation.
[0007]
In the high-frequency switch circuit 51 having the above configuration, there are four types of ports P1, P3, P1 and P4, P2 and P3, and P2 and P4 between ports actually connected according to the transmission / reception state. The ON / OFF state of each of the switch elements SW1 to SW8 is selected so that four kinds of connection states can be obtained as described above.
[0008]
For example, when transmitting a signal from the transmission circuit via the main antenna, it is necessary to connect between the two ports P1 and P3. In this case, the through switch elements of SW1 and SW3 are on, and SW2 and SW4 Are turned off, the shunt switch elements of SW5 and SW7 are turned off, and the shunt switch elements of SW6 and SW8 are turned on. Thus, the transmission signal input from one port P1 is transmitted via the main antenna (not shown) connected to the other port P3 via the through switch elements SW1 and SW3.
[0009]
FIG. 10 is a circuit diagram showing a configuration of a conventional high frequency switch circuit compatible with a diversity system when field effect transistors (hereinafter referred to as FETs) are used as the switch elements SW1 to SW8.
[0010]
The basic configuration of the high-frequency switch circuit 52 is the same as that of the high-frequency switch circuit 51 shown in FIG. 9, but in FIG. 10, since each of the switch elements SW1 to SW8 is an FET, each of the switch elements SW1 to SW8 Are connected to control terminals D1 to D8 via resistors R1 to R8. Further, DC cut capacitors C1 to C4 having sufficiently small impedance at a signal frequency to be driven by a single positive power supply are connected to the drains of the shunt switch elements SW5 to SW8, respectively, and are grounded at a high frequency. ing.
[0011]
In this configuration, for example, when connecting between the two ports P1 and P3, a positive control voltage Vcol (for example, 3 V) is applied to the control terminals D1 and D3, the through switch elements of SW1 and SW3 are turned on, and the control terminal D2 , D4 are applied, the through switch elements of SW2, SW4 are turned off, 0v is applied to the control terminals D5, D7, the shunt switch elements of SW5, SW7 are turned off, and the positive control voltage Vcol is applied to the control terminals D6, D8. (For example, 3 V) is applied, and the shunt switch elements of SW6 and SW8 are turned on. Thus, the port P1 on one side is connected to the port P3 on the other side via the through switch elements SW1 and SW3.
[0012]
[Problems to be solved by the invention]
By the way, in the high-frequency switch circuit as shown in FIGS. 9 and 10, when one of the ports is connected via the switch element in the ON state, the switch element in the ON state acts as a resistance element. The switch element in the off state functions as a capacitor.
[0013]
For example, when connecting between the two ports P1 and P3 as described above, the through switch elements of SW1 and SW3 are turned on, the through switch elements of SW2 and SW4 are turned off, the shunt switch elements of SW5 and SW7 are turned off, and SW6 and SW6 are turned off. The shunt switch element of SW8 is turned on, and this state is shown in FIG. 11 by an equivalent circuit. That is, the through switch elements SW1 and SW3 and the shunt switch elements SW6 and SW8 in the on state act as resistance elements, and the through switch elements SW2 and SW4 and the shunt switch elements SW5 and SW7 in the off state act as capacitance elements.
[0014]
Therefore, as can be seen from FIG. 11, the switch elements SW2, SW4, SW5, and SW7 in the off state exist as a parasitic capacitance connected between the signal line between the two ports P1 and P3 and the ground. This causes the insertion loss of the signal line to deteriorate. In particular, when a configuration is used in which two SPDT switches 21 and 31 (or 22 and 32) are combined to support a diversity system, the number of switch elements inserted in the middle of a signal line increases, so that insertion loss is reduced. The influence of the deterioration increases.
[0015]
In addition, when each of the switch elements SW1 to SW8 is configured by an FET, if the gate width is increased in order to reduce the resistance value when the through switch elements SW1 to SW4 are turned on and function as a resistance element, conversely, When these through switch elements SW1 to SW4 are turned off and act as capacitance elements, the capacitance value increases. As a result, for example, in the example shown in FIG. 11, when a signal flows through the signal line between the two ports P1 and P3, signal leakage of the through switch elements SW2 and SW4 that are turned off increases, and insertion loss increases. to degrade. These effects become more pronounced as the signal frequency increases.
[0016]
The present invention has been made in view of such inconvenience, and a high frequency switch circuit compatible with a diversity system in which deterioration of insertion loss due to a switch element in a required frequency band has been improved, and such a high frequency switch circuit has been developed. It is an object to provide a built-in communication device.
[0017]
[Means for Solving the Problems]
The present invention is as follows to solve the above-mentioned problem.
That is, a high-frequency switch circuit according to the first aspect of the present invention is a high-frequency switch circuit configured by connecting single poles of a pair of SPDT switches to each other. And a shunt switch element, and an inductor is interposed between the single poles of the pair of SPDT switches.
[0018]
By providing such an inductor, the switch element that is in the off state in the middle of the signal line acts as a low-pass filter depending on the relationship with the inductor, instead of the conventional presence as a mere parasitic capacitance. Then, by setting the inductance component of the inductor according to the magnitude of the parasitic capacitance so that the cut-off frequency of the low-pass filter is higher than the required frequency band, the frequency in the required frequency band is reduced. Deterioration of insertion loss can be improved.
[0019]
A high-frequency switch circuit according to a second aspect of the present invention is the high-frequency switch circuit according to the first aspect of the present invention, wherein each of the switch elements constituting the SPDT switch comprises a field-effect transistor. Thereby, the overall configuration of the high-frequency switch circuit is extremely reduced.
[0020]
A high frequency switch circuit according to a third aspect of the present invention is the high frequency switch circuit according to the second aspect, wherein the field effect transistor is a multi-gate type. Thus, high power can be turned on / off at a low operating voltage, and the overall configuration can be simplified as compared with a case where a plurality of field effect transistors are connected in multiple stages in series.
[0021]
A high frequency switch circuit according to a fourth aspect of the present invention is the high frequency switch circuit according to the first aspect, wherein each of the switch elements constituting the SPDT switch is formed by sequentially connecting a plurality of field effect transistors in series. I have. As a result, high power can be turned on / off at a lower operating voltage as compared with a case where each switch element is configured by a single field effect transistor.
[0022]
According to a fifth aspect of the present invention, there is provided a high-frequency switch circuit according to the first to fourth aspects of the present invention, wherein a shunt provided between the signal line and the ground among the switch elements constituting the SPDT switch. Is characterized in that a series resonance circuit including an inductor and a capacitor is interposed between the switch element and the ground. Thereby, the isolation characteristics when the ports are connected can be improved.
[0023]
According to a sixth aspect of the present invention, there is provided a communication apparatus including the high-frequency switch circuit according to any one of the first to fifth aspects. In this way, a communication device having excellent characteristics with little insertion loss when transmitting and receiving signals can be obtained.
[0024]
BEST MODE FOR CARRYING OUT THE INVENTION
(Embodiment 1)
FIG. 1 is a circuit diagram showing a configuration of a high-frequency switch circuit according to Embodiment 1 of the present invention. Components corresponding to those of the prior art shown in FIG. 9 are denoted by the same reference numerals.
[0025]
The high-frequency switch circuit 11 according to the first embodiment is compatible with a diversity system, and includes a pair of upper and lower SPDT switches 21 and 31. As a feature of the first embodiment, the central single poles of the SPDT switches 21 and 31 are connected to each other via an inductor L0.
[0026]
One SPDT switch 21 has two ports P1 and P2, two through switch elements SW1 and SW2, and two shunt switch elements SW5 and SW6. Similarly, the other SPDT switch 31 has two ports P3 and P4, two through switch elements SW3 and SW4, and two shunt switch elements SW7 and SW8. One SPDT switch 21 is arranged on the communication device side, and the other SPDT switch 31 is arranged on the antenna side. Conversely, one SPDT switch 21 may be arranged on the antenna side and the other SPDT switch 31 may be arranged on the communication device side.
[0027]
The function of each of the through switch elements SW1 to SW4 and the shunt switch elements SW5 to SW8 is the same as that of the conventional case shown in FIG. 9, and each switch element in the case where the ports P1 to P4 are connected to each other. The setting of the ON / OFF state of SW1 to SW8 is the same as that of the conventional case, and thus the detailed description is omitted here.
[0028]
Next, the operation of the inductor L0 interposed between the single poles of the SPDT switches 21 and 31 in the high frequency switch circuit 11 shown in FIG. 1 will be described.
[0029]
For example, when connecting between the two ports P1 and P3 as described above, the through switch elements of SW1 and SW3 are turned on, the through switch elements of SW2 and SW4 are turned off, the shunt switch elements of SW5 and SW7 are turned off, and SW6 and SW6 are turned off. The shunt switch element of SW8 is turned on.
[0030]
At this time, the through switches SW1 and SW3 and the shunt switches SW6 and SW8 in the on state act as resistance elements, and the through switches SW2 and SW4 and the shunt switch elements SW5 and SW7 in the off state act as capacitors. FIG. 2 shows this state as an equivalent circuit.
[0031]
Here, when the inductor L0 is provided between the single poles at the center of the SPDT switches 21 and 31 as in the first embodiment, the portion surrounded by the broken line in FIG. 2 acts as a low-pass filter. become. In other words, the through switch elements SW2 and SW4 that are in the off state in the middle of the signal line play a role as an LC low-pass filter due to the relationship with the inductor L0 because of the mere parasitic capacitance.
[0032]
Therefore, the inductance component of the inductor L0 is changed according to the magnitude of the capacitance value of the two through switch elements SW2 and SW4 in the off state so that the cutoff frequency of the low-pass filter is higher than a required frequency band. By setting, deterioration of insertion loss can be improved in a wide band up to a high frequency band.
[0033]
In the case where the equivalent circuit shown in FIG. 2 is formed in the high-frequency switch circuit 11 of the first embodiment, and in the case where the equivalent circuit shown in FIG. FIG. 3 shows the result obtained by simulating the relationship shown in FIG. Here, the inductance value of the inductor L0 is 1 nH, the resistance value when the through switch elements SW1 to SW4 are turned on to act as a resistive element is 3Ω, and the through switch elements SW1 to SW4 are turned off and the capacitive element is turned off. When the capacitance value is 0.3 pF, the shunt switch elements SW5 to SW8 are turned on to act as a resistance element, and the resistance value is 6Ω. When the shunt switch elements SW5 to SW8 are turned off, the capacitance value is acted as a capacitance element. Is 0.15 pF.
[0034]
As can be seen from FIG. 3, in the frequency range of 10 GHz or less, the insertion loss (indicated by a solid line in FIG. 2) with respect to the frequency of the equivalent circuit shown in FIG. It is understood that the rate of deterioration of the insertion loss is smaller than that of the insertion loss (indicated by a broken line in the figure), and the deterioration of the insertion loss is improved over a wide band. Since there is a cutoff frequency as a low-pass filter around 15 to 20 GHz, the insertion loss is degraded at frequencies higher than that, but there is no problem since it is outside the required frequency band.
[0035]
(Embodiment 2)
FIG. 4 is a circuit diagram showing a configuration of a high-frequency switch circuit according to Embodiment 2 of the present invention. Components corresponding to those of the prior art shown in FIG. 10 are denoted by the same reference numerals.
[0036]
The basic configuration of the high-frequency switch circuit 12 in the second embodiment is the same as that of the high-frequency switch circuit 11 shown in FIG. 1 and includes a pair of upper and lower SPDT switches 22 and 32. The central single poles are connected to each other via an inductor L0.
[0037]
In the case of the high-frequency switch circuit 12 of the second embodiment, FETs are used as the switch elements SW1 to SW8. Therefore, the gates of the switch elements SW1 to SW8 have control terminals via the resistors R1 to R8. D1 to D8 are connected. Further, DC cut capacitors C1 to C4 each having a sufficiently small impedance at a signal frequency are individually connected to the drains of the shunt switch elements SW5 to SW8 so as to be driven by a single positive power supply, and are grounded at a high frequency. Have been.
[0038]
The role of each of the through switch elements SW1 to SW4 and the shunt switch elements SW5 to SW8 is the same as that of the conventional case shown in FIG. 11, and each switch element in the case where the ports P1 to P4 are connected to each other. The setting of the ON / OFF state of SW1 to SW8 is the same as that of the conventional case, and thus the detailed description is omitted here.
[0039]
In the case where the equivalent circuit shown in FIG. 2 is formed in the high-frequency switch circuit 12 of the second embodiment, and in the case where the equivalent circuit shown in FIG. The result of examining the relationship is shown in FIG. Here, the inductance value of the inductor L0, the resistance value when the switch elements SW1 to SW8 are turned on, and the capacitance value when the switch elements SW1 to SW8 are turned off are set to the same values as in the first embodiment.
[0040]
As can be seen from FIG. 5, also in the case of the second embodiment, when the frequency is 10 GHz or less, the insertion loss (indicated by a solid line in FIG. 11) with respect to the frequency of the equivalent circuit shown in FIG. It can be understood that the rate of deterioration of the insertion loss is smaller than that of the conventional equivalent circuit with respect to the frequency (indicated by a broken line in the figure), and the deterioration of the insertion loss is improved over a wide band.
[0041]
(Embodiment 3)
FIG. 6 is a circuit diagram showing a configuration of a high-frequency switch circuit according to Embodiment 3 of the present invention. Components corresponding to those of the high-frequency switch circuit according to Embodiment 2 shown in FIG. .
[0042]
The basic configuration of the high-frequency switch circuit 13 of the third embodiment is the same as that of the high-frequency switch circuit 12 shown in FIG. 4, and includes a pair of upper and lower SPDT switches 23, 33. The central single poles are connected to each other via an inductor L0.
[0043]
Further, series resonance circuits 41 to 44 are formed by connecting the capacitors C6 to C9 and the inductors L1 to L4 in series to the drains of the shunt switch elements SW5 to SW8. In this case, as the inductors L1 to L4, besides using a dedicated element, a bonding wire or a package lead having an inductance component can be used.
The other configuration is the same as that of the second embodiment shown in FIG. 4, and the detailed description is omitted here.
[0044]
Here, if the capacitance value and the inductance value are set so that the series resonance circuits 41 to 44 including the capacitors C6 to C9 and the inductors L1 to L4 resonate in series at a desired frequency, the shunt switch elements SW5 to SW8 are turned on. Then, the impedance in a state where the shunt switch elements SW5 to SW8 are viewed from the signal line can be reduced. For this reason, the isolation characteristics can be improved so that unnecessary signal leakage does not occur when the ports P1 to P4 are connected to each other. For example, in order to resonate the series resonance circuits 41 to 44 at 5 GHz, the capacitance values of the capacitors C6 to C9 may be set to 1 pF, and the inductance values of the inductors L1 to L4 may be set to 1 nH.
[0045]
(Embodiment 4)
FIG. 7 is a circuit diagram showing a configuration of a high-frequency switch circuit according to a fourth embodiment of the present invention. Components corresponding to those of the high-frequency switch circuit according to the third embodiment shown in FIG. .
[0046]
The basic configuration of the high-frequency switch circuit 14 of the fourth embodiment is the same as that of the high-frequency switch circuit 13 shown in FIG. 6, and includes a pair of upper and lower SPDT switches 24 and 34. The central single poles are connected to each other via an inductor L0.
[0047]
In the third embodiment shown in FIG. 6, each of the series resonant circuits 41 to 44 composed of the capacitors C1 to C4 and the inductors L1 to L4 is individually connected to each of the shunt switch elements SW5 to SW8 composed of FETs. However, in the fourth embodiment, the drains of the shunt switch elements SW5 to SW8 are commonly connected, and then grounded via one series resonance circuit 45 including a capacitor C5 and an inductor L5. With such a configuration, the number of capacitors and inductors can be reduced, so that the chip size can be reduced and the number of package terminals can be reduced.
Other configurations and operations are the same as those of the third embodiment shown in FIG. 6, and therefore, detailed description is omitted here.
[0048]
With respect to each of the above-described first to fourth embodiments, the following modifications and application examples can be further considered.
[0049]
{Circle around (1)} In the first to fourth embodiments, the inductor L0 interposed between the central single poles of the pair of SPDT switches uses a dedicated element. It is also possible to use wires and package leads.
[0050]
{Circle around (2)} In the first to fourth embodiments, it is assumed that the high-frequency switch circuits 11 to 14 are formed as one chip as a whole, but the present invention is not limited to this, and the SPDT switches 21 and 31 , 22 and 32, 23 and 33, and 24 and 34 are manufactured in advance as separate chips, and the single port of each chip is connected with a wire serving as the inductor L0 to constitute the high-frequency switch circuit of the present invention. .
[0051]
{Circle around (3)} In the above-described second to fourth embodiments, the control terminals D1 to D8 for turning on / off the switch elements SW1 to SW8 made of FETs are individually provided. The control terminals D5, D3 and D8, D4 and D7 are commonly connected, and the switch elements SW1 and SW6, SW2 and SW5, SW3 and SW8, and SW4 and SW7 are turned on / off in conjunction with each other. You can also. In this case, the number of control terminals can be reduced.
[0052]
{Circle around (4)} In Embodiments 2 to 4, a single-gate FET is used, but a multi-gate FET may be used. The use of such a multi-gate type FET enables high power to be turned on / off at a lower operating voltage than that of a single-gate type FET, and also simplifies the overall configuration as compared to a series connection of multiple FETs in multiple stages. Can be
[0053]
{Circle around (5)} In the above-described second to fourth embodiments, each of the switch elements SW1 to SW8 is configured by a single FET, but each of the switch elements SW1 to SW8 connects a plurality of FETs in series. It can also be configured. With such a multi-stage configuration, there is an advantage that higher power can be turned on / off at a lower operating voltage than when each of the switch elements SW1 to SW8 is configured by a single FET.
[0054]
(6) In a communication device such as a portable wireless device, as shown in FIG. 8, the high-frequency switch circuits 11 to 14 of the above embodiments are mounted as chips on a wiring board 61, and this is mounted in a case 62. It can be stored and used. In this way, a communication device having excellent characteristics with small insertion loss when transmitting and receiving signals can be obtained.
[0055]
【The invention's effect】
In the high-frequency switch circuit according to the first aspect of the present invention, the single poles of the pair of SPDT switches are connected to each other via the inductor. Due to its existence as a parasitic capacitance, it acts as a low-pass filter in relation to the inductor. Then, by setting the inductance component of the inductor according to the magnitude of the parasitic capacitance so that the cut-off frequency of the low-pass filter is higher than the required frequency band, the frequency in the required frequency band is reduced. Deterioration of insertion loss can be improved.
[0056]
In the high frequency switch circuit according to the second aspect of the present invention, in addition to the effect of the first aspect of the present invention, since each of the switch elements constituting the SPDT switch comprises a field effect transistor, the overall configuration of the high frequency switch circuit is extremely small. It is downsized.
[0057]
In the high frequency switch circuit according to the third aspect of the present invention, in addition to the effect of the second aspect of the invention, since the field effect transistor is a multi-gate type, high power can be turned on / off at a low operating voltage, Moreover, the overall configuration can be simplified as compared with a case where a plurality of field effect transistors are connected in multiple stages in series.
[0058]
In the high frequency switch circuit according to the fourth aspect of the present invention, in addition to the effect of the first aspect of the present invention, each switch element constituting the SPDT switch is formed by sequentially connecting a plurality of field effect transistors in series. Higher power can be turned on / off at a lower operating voltage than when a switch element is formed of a single field effect transistor.
[0059]
According to a fifth aspect of the present invention, in addition to the effects of the first to fourth aspects, the high frequency switch circuit according to the present invention is provided between the signal line and the ground among the switch elements constituting the SPDT switch. Since the shunt switch element has a series resonance circuit including an inductor and a capacitor between the shunt switch element and the ground, signal leakage does not occur when the ports are connected via the switch element. In addition, the isolation characteristics can be improved.
[0060]
A communication device according to a sixth aspect of the present invention is constructed by incorporating the high-frequency switch circuit according to any one of the first to fifth aspects. A communication device having
[Brief description of the drawings]
FIG. 1 is a circuit diagram showing a configuration of a high-frequency switch circuit according to Embodiment 1 of the present invention.
FIG. 2 is a diagram illustrating an example of an equivalent circuit obtained when a switch element is turned on / off to connect between ports in the high-frequency switch circuit according to the first embodiment of the present invention;
FIG. 3 is a characteristic diagram showing a result of simulating the effect of insertion loss in the high-frequency switch circuit of FIG. 1 in comparison with a conventional high-frequency switch circuit.
FIG. 4 is a circuit diagram showing a configuration of a high-frequency switch circuit according to a second embodiment of the present invention.
FIG. 5 is a characteristic diagram showing a result of simulating the effect of insertion loss in the high-frequency switch circuit of FIG. 4 in comparison with the case of a conventional high-frequency switch circuit.
FIG. 6 is a circuit diagram showing a configuration of a high-frequency switch circuit according to Embodiment 3 of the present invention.
FIG. 7 is a circuit diagram showing a configuration of a high-frequency switch circuit according to Embodiment 4 of the present invention.
FIG. 8 is a perspective view showing a mobile phone incorporating the high-frequency switch circuit of the present invention.
FIG. 9 is a circuit diagram showing a configuration of a conventional high-frequency switch circuit.
FIG. 10 is a circuit diagram showing a configuration of a conventional high-frequency switch circuit using a field-effect transistor as a switch element.
FIG. 11 is a diagram illustrating an example of an equivalent circuit obtained when a port is connected by turning on / off a switch element in a conventional high-frequency switch circuit.
[Explanation of symbols]
11-14 High frequency switch circuit
21-24 SPDT switch
31-34 SPDT switch
41-45 Series resonance circuit
P1 to P4 port
SW1-SW4 Through switch element
SW5 to SW8 Shunt switch element
R1 to R8 resistance
C1-C9 capacitor
L0, L1 to L5 Inductor
D1 to D8 control terminal

Claims (6)

In a high-frequency switch circuit configured by connecting single poles of a pair of SPDT switches to each other,
Each of the pair of SPDT switches includes a through switch element and a shunt switch element between terminals, and an inductor is interposed between single poles of the pair of SPDT switches. High frequency switch circuit. 2. The high-frequency switch circuit according to claim 1, wherein each of the switch elements constituting the SPDT switch comprises a field-effect transistor. 3. The high frequency switch circuit according to claim 2, wherein said field effect transistor is a multi-gate type. 2. The high-frequency switch circuit according to claim 1, wherein each of the switch elements forming the SPDT switch includes a plurality of field-effect transistors connected in series. Among the switch elements constituting the SPDT switch, a shunt switch element provided between the signal line and the ground further has a series resonance circuit including an inductor and a capacitor interposed between the signal line and the ground. The high-frequency switch circuit according to any one of claims 1 to 4, wherein: A communication device comprising the high-frequency switch circuit according to claim 1 incorporated therein.

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