JP2003524808A - Global network computer - Google Patents

Abstract

(57) The present invention comprises a computer, such as a personal computer or a network server, with a microprocessor linked by broadband transmission means, as well as hardware, software, firmware and other means, One or more computer networks wherein at least one parallel processing operation involving at least two computers of the network occurs. The present invention provides for one or more separate parallel processing operations involving one or more different sets of computers to occur simultaneously and to establish an ongoing processing linkage between any of the microprocessors of the individual computers connected to the network. To one or more large networks of smaller networks, such as the Internet, and a large number of connected computers. The present invention further provides for the personal computer owner, preferably in parallel processing, to exchange for network linkage by a network provider to another personal or other computer, including linkage to another microprocessor for parallel or other processing. A business configuration that enables the shared use of a network microprocessor for parallel and other processing, providing microprocessor processing power to the network for networking, where the basis of the exchange between the owner and the provider is the net usage of the network. All terms and conditions agreed by the parties in accordance with laws and regulations, including payments for power supply for periodic measurement and processing.

Description

Detailed Description of the Invention

[0001] BACKGROUND OF THE INVENTION This invention generally and has a network computer such as a server equipped with a computer or preferably a microprocessor being linked by a broadband transmitting means, such as a personal computer, hardware, software, Firmware and at least two sets of computers in a network or in networks connected together, namely, hypercomputing (metaco).
One or more computer networks having other means by which at least two parallel processing operations occur, including the form of mputing). In particular, the invention consists of a large number of connected computers, such as small networks and the Internet, where two or more separate parallel or massively parallel processes involving two or more different sets of computers. It relates to one or more large networks in which operations occur simultaneously. More specifically, the present invention provides two or more (
(Or multiple) parallel or massively parallel microprocessing operations occur individually or in correlation, and ongoing network processing linkages are established between virtually any microprocessor of the individual computers connected to the network. One or more networks of this kind.

More particularly, the present invention generally relates to Internet Service Providers (ISPs) and the like that include linkage to other microprocessors for parallel or other processing such as multitasking. In the exchange of network linkages to other personal and other computers supplied by the network provider, the owner of the personal computer is preferably microprocessor for parallel or massively parallel processing or multitasking. A network structure or architecture that enables shared use of a network microprocessor for parallel processing, including massively parallel processing, and other shared processing, such as multitasking, that provides power. The capital basis for shared use between the owner and the provider is (in any case, because in network systems (software, hardware, etc.) that results in an essentially equivalent use of computing resources by both the user and the provider. Any network computer operated by an entity of is potentially both alternating (or both at the same time assuming multitasking) users who are computing resources (eg, user profiles or user profiles). It is based on credit lines or through relatively momentary payments)
In a potentially overriding option by the user, including or, preferably, any payment from one party to the other based on a periodic measure of net use or supply of processing power, such as a deregulated grid. Does not include
Subject to applicable law, regulation or rule, all terms and conditions agreed by both parties.

[0003] Finally, the present invention provides for the Internet or its future equivalents or successors (and most other networks) at no cost to most users of personal computers or most other computers. A network including hardware and software that provides use and through these supercomputing means provides these users (and all other users including supercomputer users) with at least a double of computing power every 18 months. Regarding system architecture. This improvement in ultra computational performance provided by the new super Internet (or simplified meta net Metanet) in all other other performance improvement, such as already expected performance improvement by Moore's Law (Moore's Law).

By way of background, the computer industry has been dominated by Moore's Law for the past 30 years, and this Moore's Law, like many transistors, is virtually every 18 months, as circuit circuits in computer chips are scaled down every year. Twice as often as new chip generations occur, and as a result microprocessor computing power remains effectively doubling every year and a half.

The long-term trend in computer chip miniaturization is planned to continue to remain unchanged over the next few decades. For example, just before a decade,
A 16 kilobit DRAM memory chip (which stores 16,000 data bits) is typical, and the standard in 1996 was the 16 megabit chip (16,000,000 data bits) introduced in 1993, the industry standard. Strategic plan is 1
A 6 gigabit memory chip (1,000,000,000,000 data bits) will be introduced in 2008, and a 64 gigabit chip will be introduced in 2011. At this time, a 16 terabit chip ( 16,000,000
,, 000,000 data bits) are being considered by the mid to late 2020s. That is a regular 1000-fold increase every 15 years. Hard drive speeds and capacities are also increasing at an astonishing rate, in recent years higher than that of semiconductor microchips.

Similarly, a single clock speed or MIPS (millions of instructions for
second: millions of instructions per second) or whether evaluated in transistors per chip, regular and significant improvements are expected to continue in microprocessor computing speed. For example, Intel has improved performance four to five times every three years since it launched the X86 family of microprocessors used in the now dominant "Wintel" standard personal computer. First Intel Pentium Pro Microprocessor (Intel
The Pentium Pro microprocessor was introduced in 1995, and the processing time of the first IBM standard PC (Microprocessor) (PC) microprocessor introduced in 1979, that is, the Intel 8088 is 1,000 times as high. It's speed. Until 1996, the fastest microprocessors such as the Digitel Equipment Corp. Alpha chip were the original clay
It's faster than the Cray Y-MP supercomputer processor, and faster than the Nintendo 64 video camera system.

Both microprocessors and software (and firmware and other components) are also deploying 8-bit and 16-bit systems into 32-bit systems, which are becoming the norm today. Some 64-bit systems, such as the DEC Alpha, have already been introduced and are now available. In the future, such as Intel's Merced microprocessor in 2000 It seems to increase to 128 bits.

The second major development trend in the past decade or so is the advent of parallelism, ie a single computer with a new operating system linked together to allow each modification to allow this kind of approach. Is the advent of computer architectures that utilize two or more CPU microprocessors (often more, or thousands of relatively simple microprocessors for massively parallel processing). The field of supercomputing has been followed by this approach, which includes designs that utilize many of the same standard personal computer microprocessors.

The hardware firmware software and other components specific to parallel processing are at a relatively early stage of development compared to the case for single processor computations, and thus enabled by parallel processing. Further design and development is expected in the future to better optimize the computational capacity required. By reducing the reliance on multiple microprocessors having to share a common central memory, each one has its own separate memory, such as present day personal computers, workstations and most other computer system architectures. System hardware for parallel processing, which allows more independent operation of these microprocessors, and for unconstrained operation each individual microprocessor must have sufficient rapid access to memory, Continuous improvement of software and architecture is expected.

Several models of personal computers are currently available with more than one microprocessor. In the future, personal computers that are broadly defined to include versions that are not currently in use should also use parallel computing with a large number of microprocessors or massively parallel computing with a very large number of microprocessors. It seems to be inevitable. Future designs such as Intel's Merced chip are expected to have a significant number of parallel processors on a single microprocessor chip.

Parallel processing of the form called superscalar processing is also being adopted in the microprocessor design itself. The current generation of microprocessors such as Intel Pentium has more than one data path within the microprocessor where the data is processed, and currently two to three paths are typical, but IBM's New Power 3 The microprocessor chip has eight paths in 1998.

A third major development trend is to increase the size of bandwidth, which is a measure of the communication power or transmission rate (in units of data / second) between computers connected by a network. Heretofore, local area networks and telephone lines that typically link computers, including personal computers, have operated at much lower speeds than the processing speeds of personal computers. For example,
A typical Intel Pentium operates at 100 MIPS (millions of instructions per second), whereas the most common Ethernet to connect PC (PC) is 10 megabits per second (Mbps). ) Is about 10 times slower, some Ethernet connections are now 100 Mbts and telephone lines are much slower, but typical peak speeds in 1998 are only about 56 kilobits (only achieved during download).

However, the use of coaxial cables, wireless and, in particular, fiber optic cables in place of older telephone twisted-pairs cables, however, currently provides bandwidths 5 to 100 times faster than microprocessor speed improvements. Or a dramatic situation change is expected, where the transmission rate is expected to expand. Currently, telecommunications providers are making fiber connections available that support bandwidths of 40 gigabits and above.

Expecting a technical improvement soon that will enable each of the 700 wavelength streams to be carried over 2 GHz (billions of cycles per second) and add up to 1,400 GHz or more on each single optical fiber. Has been done. Experts currently estimate that the bandwidth of optical fibers is utilized well under a million times less than the bandwidth of coaxial or twisted copper wire pairs. Within 10 years, 10,000 wavelength streams per fiber are expected, and 20-80 wavelengths on a single fiber are already commercially available. This is even further increased by using thin mirror hollow wires or tubes called omniguides.

Price / performance is improved 10 times every two years, for example, asynchronous transfer mode (ATM
: Asynchronous transfer mode) and other network connection developments such as digital signal processors are also helping to increase bandwidth rapidly. The increase in bandwidth reduces the need for switching, and when practical optical switches are introduced in the near future, the switching speed can be greatly increased, significantly reducing the cost.

The results of this significant bandwidth increase are extraordinary. That is, it is already technically possible to connect virtually any computer to the network with a bandwidth equal to or greater than the computer's own internal system bus speed, even though the bus speed itself has increased considerably. The main constraint is that the infrastructure, which consists mostly of connecting the "last mile" to the personal computer to fiber optic or other high bandwidth connections, has not yet been constructed. A computer system bus connects many or most of its internal components, such as, for example, a microprocessor, random access memory (RAM), hard-drive, modem, floppy drive and CD-ROM. The internal network, which was only 40 megabits per second for personal computers in recent years, is up to 133 megabits per second for Intel's Pentium PCI in 1995. IBM 1998
The Power3 microprocessor chip has a 1.6 Gbit / sec system bus, and is currently up to Gbit / sec on Intel's Pentium PCI bus.

Despite these horrific improvements in the future, unfortunately the fact is that PCs are in actual use because typical personal computers (PCs) are already very fast. Most of the time the microprocessor is essentially idle and the operating time itself is only a small fraction of the days and days when the PC is in use at all. The reality is that almost all PCs are essentially idle for almost all of their useful lives. A realistic estimate is (ignoring currently unnecessary microprocessor busy work, such as running screen saver programs, which is essentially obsolete by the power-saving CRT monitor technology that is now standard in the PC industry). That microprocessor is idle 99.9% of the time.

Since the mean time between failures of all components is generally several hundreds of thousands of hours or more, P
Due to the fact that C's reliability is now very high, PC's huge idle time represents a total loss, and given the high capital and operating cost of PC, the economic loss is very high. The PC idle time does not actually store the PC, saving it for future use. Because the main limiting factor for continued use of today's PCs is obsolescence, not equipment failure due to use.

Also, as noted above, the constant miniaturization of circuits has given great interest to the fact that Moore's Law, which holds that doubling the computational power every 18 months, cannot continue to apply. ing. In fact, Moore's Law is probably as early as 20
New technology, which seems to be nearing its limits for silicon-based devices in 2004, but now has convincing confidence that it may be developed to a practical level. Has not yet appeared, and many recent developments have the potential to preserve Moore's Law.

[0020] SUMMARY OF THE INVENTION However, above all three established major trends summarizing, i.e., parallel processing (especially the use of a personal computer, a microprocessor of a personal computer such as a supercomputer, a large Parallel processing) and the enormous increase in network communication bandwidth have combined with a very high potential economic once the basic infrastructure for connecting personal computers to optical fibers is in place in the relatively near future. The savings have enabled surprising solutions to the very excessive idle problem of personal computers (and to the possible end of questions about Moore's Law).

This solution uses the mostly idle PCs (or their equivalents or successors) to connect the Internet with extremely wide bandwidth connections and virtually unlimited data rates. Very large networks, such as the World Wide Web (WWW), or their equivalent or (currently in development, with much higher bandwidth). (Including Internet II and Next Generation Internet, including the Super Internet, which utilizes its structure and is co-existing with the Internet, whose structure is always in constant hardware and software upgrades and is based essentially on all fiber optic transmission)
It is to build a parallel or large-scale parallel processing computer by using a successor such as the super Internet (Meta Internet).

The first characteristic of the Internet is, of course, that the number of computers of all kinds already linked in the future possibilities for actual universal connections is very large. The Internet is a network of networks of computers that provides almost unlimited access (other than cost) to the world. The very wide bandwidth available for network communication shortly is used to externally link personal computers in a way that is at least comparable to, and perhaps faster than, the personal computer's faster internal system bus, resulting in No external processing constraints are imposed on the linked personal computer by data input or output or throughput, and the speed of the microprocessor itself is only a processing constraint of the system.

This is a method called superscalar processing, which is more comparable to conventional internal parallel processing, and makes external parallel processing including large-scale parallel processing efficient.

In one embodiment, the World Wide Web (or its equivalent or successor)
Through the established hyperlink connection,
It will be transformed into a huge virtual massively parallel computer that will operate in at least a somewhat similar way to a neutral network. Because the speed of transmission during wideband linkage is so great that any linkage between two microprocessors is actually equivalent to a direct, physically closed connection between these microprocessors. .

Further developments have led to digital signal processor type microprocessors and / or
Alternatively, analog microprocessors, either alone or with conventional microprocessors and / or with these new microprocessors described in this application, are particularly advantageous for this approach. A network having a WWW type hyperlink incorporating a digital signal processor type microprocessor (or successor or equivalent) may be separate from a conventional microprocessor (or successor or equivalent) network or between different networks of this type. Can be operated by one or more connections of, or by relatively complete integration between different networks of this kind. Non-interfering transmission links should be used to allow simultaneous operation between identical network connection structures.

This type of extremely wide bandwidth network of computers allows any PC in the network to be fully or close to utilization. At optimal performance, this new system potentially has a thousand times the computer power available for each and every PC user (and any other user), as existing PCs are currently idle and somewhat out of the ordinary. Increasing power, and on demand, almost any desired level of increasing power, limited by increased costs, relatively lower than is possible from any other possible computer network configuration. Will be reduced to. This revolutionary growth is extremely fast, but on top of the developmental growth already occurring in the computer / network industry.

The hyper-computation hardware and software means of the Super Internet may, for example, start with at least two PCs and then about 4, about 8, about 16, about 3 PCs.
Two, about 64, about 128, about 256 and about 512 standard P
This would result in a performance increase that would be at least doubled every 18 months based on the doubling of personal computers shared in typical parallel processing operations by C users. After about fifteen years, each standard PC user has about 1,024 personal computers for parallel processing or any other shared computing use, while making widespread use of that successor, eg, the Internet and the free super Internet. Is expected to be available. At the other end of the performance spectrum, supercomputers generally experience similar performance enhancements, but in the end, performance enhancements are limited primarily by the cost of adding temporary network linkage to the available PCs, and thus supercomputers. Quantum leap (qu
There is a clear possibility for antum leap).

Networked computer systems, such as those described above, offer almost unlimited flexibility due to the abundant supply of idle connected microprocessors. This benefit allows us to do without knowing in advance how many processors will be available no matter what the processors are or what their connection characteristics may be (as is currently needed in relatively massive parallel processing ), The "tightly coupled" computational problem (which is usually difficult to process in parallel) can be solved. The minimum number of equivalent processors (with equivalent other specs) are easily found near large networks, such as the Internet, and are allocated within the network from many of these available nearby. Furthermore, the number of microprocessors used is almost completely flexible depending on the complexity of the problem and is only limited by cost. The existing problem of time delay is largely eliminated by the widespread introduction of wide bandwidth connections between computers processing in parallel.

The state of the art known in the context of this application is summarized in The Grid: Blueprint for a New Computing Infrastructure, edited by Ian Foster and Karl Kesselmann and published by Morgan Kaufman Publishers in July 1998. Has been done. Further information can be obtained from the World Wide Web at "http://www.mkp.com/grids".

Detailed Description of the Preferred Embodiments New network computers utilize PCs as providers of computing power for this network as well as users of network services. This connection between the network and the personal computer is valued as if the economic resources that the network is supplied by the owner of the PC (or leaser) are supplied by the network provider that provides the connectivity. Enabled by a new form of computer / network capital structure established on the basis of the similarities.

An Internet service (which is very similar to a cable TV service) in which a network provider pays a fee to provide access to a network such as the Internet (currently often utilizing the Dentsu communication network for connectivity). -Unlike the existing one-way functional relationship between a network provider such as a provider and a PC user, this new relationship also allows the PC user to have network network access to the user's PC for parallel computing use, of similar value. Recognize you are offering. Thus, the PC is in multitasking mode.
mode) in the alternative, or potentially at substantially the same time, to serve and use the network.

This new network operates in a structural relationship that is roughly similar to the relationship currently existing between electric utilities and small independent generators connected to deregulated grids. Power can flow in either direction between the power company and the independent generator, depending on the operating decisions of both parties, and at any particular time It is either the debtor or the debtor with respect to the other based on the net direction of the flow and the invoice is sent accordingly. In the deregulated electrical power industry, electricity (both its generation and transmission) is becoming a commodity traded in a competitive market that intersects traditional boundaries. Due to the structural relationship proposed in this application for new networks, parallel and free market structures can be
Further international) can evolve over time in the new computer power industry dominated by networks of personal computers in all forms that provide shared processing in network scaling almost seamlessly.

For this new network and its structural relationships, the network provider, or Internet Service Provider (ISP), is in the widest possible way, the first continuing connection hardware and / or software and / or firmware and And / or other components and / or Internet and WWW or Internet II or next generation Internet or telecommunications company, TV cable or broadcasting company, electric power company or other affiliated company, satellite communication company, or their current or future Their current or future equivalents, co-existing or co-existing matters, such as the super-Internet proposed herein, including any of the present forms of Internet Access Providers (ISPs), including equivalents, co-existing or successors Saku Service to any network (such as a network, etc.) to a personal computer user (which is very broadly defined below) (a corporation or other business, political, non-profit organization, consortium, committee, union). , Organization, or other organization or individual).

The connection means used for each network of the network provider, including between personal computers or equivalents or successors, are preferably of very high bandwidth, with associated gateways, bridges, routers and all associated Hardware and / or software and / or firmware and / or other components and switches with current or future equivalents or successors, as well as any other, including radio over television coaxial cable and telephone. Includes electromagnetic connections, such as optical connections, including, for example, fiber optic cables or wireless means, without excluding the electromagnetic and other means. Computers used by providers include, for example, mainframes, minicomputers, servers, and personal computers, and their associated hardware and / or software and / or firmware and / or other components associated therewith, and the like. Includes any current and future computers, including current or future equivalents or current examples of successors, etc.

Other levels of network control that are beyond the reach of network providers also exist to control any aspect of network structure and function, any one of these levels being associated with PC users. It may or may not directly control and interact. For example, the World Wide Web Community (W3C: World Wide)
Web Consortium) or Internet Society (ISOC)
Or at least one level of network control, such as other specialized industries), is any of the aforementioned network standards for any hardware and / or software and / or firmware and / or other components connected to the network. And / or establish and ensure compliance with protocols and / or industry standard agreements. Based on the consensus management of these communities / associations, other levels of network control can address the management and operation of the network. These other levels of network control can potentially be configured by any network entity, including those just described for network providers.

Important and distinct properties of the networks described here include electromagnetic (such as light and radio or microwave) and electrochemistry (not biochemical or biological) between PC users and their computers. , Of any format (hardware and / or
Or software and / or firmware and / or other components) communication connections, such as the Internet (and Internet II and Next Generation Internet) and WWW, and equivalents such as the Super Internet and networks such as successors. Thus, the maximum possible number of users and their connection (directly or indirectly) with the computer is very advantageous. While many levels of this kind of network are likely to coexist with different technical capabilities, such as the Internet and Internet II, they probably have interconnections, and thus are likely to have levels for standard network functions such as email. There will probably be free communication between them.

Personal computer (PC) users utilize one or more microprocessors made of, for example, inorganic compounds such as silicon and / or other inorganic or organic compounds, and any computer, digital or analog or neural or It is defined in the widest possible way as any individual or other entity, using the customary use of personal computers defined as quantum computers. In this case, one or more microprocessors (each of which has one or more parallel processors) in a particularly common current form (hardware and / or software and / or firmware and / or any other component) Personal computers with microprocessors and special purpose (or several applications) computers, network computers, handheld personal digital assistant devices, and personal communicators such as telephones and pagers. , Wearable computer (wearable
computer), a digital signal processor, and a neural-based computer (
Entertainment devices such as PCs) and televisions and related cable digital set-top boxes, videotape recorders, video games, videocams, compact or digital video disc (CD or DVD) players / recorders, radios and cameras. And other consumer electronic devices, printers, copiers,
Business electronic devices such as facsimile machines, automobiles or other transportation equipment, robots, etc. and other current or successor devices incorporating one or more microprocessors (or functional or structural equivalents), in particular, Includes their current and future equivalents or successors, such as owned (or direct or indirect leased) devices used directly by an individual. Personal computers (generally because of their high cost) are not, but current and future forms of mainframe computers, minicomputers, workstations, and supercomputers also include PCs in parallel processing networks, Because they can be used functionally in the network in the same general way as PCs. This type of personal computer described above has an owner or leaser that may or may not be the same as the computer user. A continuous connection of computers to a network such as the Internet, WWW, or equivalent or successor is preferred, but is obviously not necessary as the connection can be made at the beginning of a shared processing operation.

Parallel processing is defined as a form of shared processing that involves two or more microprocessors used to solve the same computational problem or other task.
Large-scale parallel microprocessor processing includes a large number of microprocessors.
In today's technology, massively parallel processing can probably be thought of as about 64 microprocessors (referred to as nodes in this context), with more than 7,000 nodes having PC microprocessors (Pentium Pros ( Pentium Pros)
) Has been successfully tested in Intel supercomputer designs. With continued software improvement, the number of microprocessors that can be used in a given network, ie the Internet or its equivalents such as the super Internet and / or even extraordinarily large networks such as successors. It is expected that a very large number of nodes can be effectively used, possibly limited only by.

Broadband wavelengths or wideband network transmissions are herein at least sufficiently high (roughly to the internal clock speed of a microprocessor or multiple microprocessors, instructions per second or operations per second or per second). Depending on the bandwidth of the network connection between the microprocessors performing some form of parallelism, including massively parallelism, at least equivalent to the amount of microprocessor channels multiplied by the number of operations), It is defined to mean a transmission rate at which the microprocessor's processing inputs and outputs, including peak processing levels, are virtually unlimited (usually measured in bits per second). This definition depends on the microprocessor speed and will increase as the microprocessor speed increases. A rough example is a wide bandwidth connection is 1 per second
It would be a 100 MIPS (millions of instructions per second) microprocessor of the 1996s, larger than 00 megabytes (MBps). This is a rough approximation.

However, the preferred connection means described above is a lightwave or optical connection, such as a fiber optic cable, which in 1996 already provided a large number of gigabit bandwidths for a single fiber line, which was continuously and significantly improved. PC
The presently preferred general use of fiber optic connections between guarantees a practically high bandwidth for much higher data transmissions relative to the microprocessor speed which results in the data to be transmitted. In addition, the new wired optical connections in the form of thin mirror hollow wires or tubes, called omniguides, provide much greater bandwidth than optical fibers without the need for amplification over long distances, unlike optical fibers. The connection means that provide the wide bandwidth are either wired or wireless, where wireless is generally preferred for mobile personal computers (or equivalents or successors), or as shown below. . Wireless connection bandwidth is also increasing rapidly and is believed to provide essentially the same benefits as fiber optic cables, ie, data transmission rates that far exceed data processing rates.

The capital basis for shared use between the owner / leaser and provider is compliant, including the net use of processing power or payment from one party to the other based on a periodic measure of treatment. If it complies with laws, regulations, or rules, it would be all the terms that both parties agree upon, as well as deregulation or open market grids.

In one embodiment, as shown in FIG. 1, in order for this network structure to function effectively, PC1 users and the Internet and / or world wide
Measure computer power flow to and from the network 2 provider, which may have a connection to any current or future equivalent or successor 3, such as Web and / or Internet II and / or Super Internet (hardware and And / or software and / or firmware and / or other components). In one embodiment, the PC user is a PC magazine benchmark test program for particularly important components such as microprocessors (such as MIPS, or millions of instructions per second) that may be of special importance to the application. (PC Magazine's benchmark test program), ZD Winstone (potentially including hardware and / or software and / or firmware and / or other component tests) or specific A certain net rating of the processing power that is available to the network, such as one or more standard test measured speeds, such as the individual scores of the By the time elapsed, this type of resource was being used in the network. In the simplest case, for example, a meter of this kind would be used to compare the time a net costing PC is used in the network (which is usually already measured by the provider, as explained below). It is necessary to measure only the time for which the PC is valid for the network for process 4. A possible location for this kind of meter is a network computer such as a server, a PC, and some point on the connection between them. Throughput at any standard condition is another possible measure.

In another embodiment, as shown in FIG. 2, the amount of network resources 6 used by each individual PC1 user and their associated cost is measured (
There is also a meter device 7 (comprising hardware and / or software and / or firmware and / or other components). This includes, for example, the time spent in conventional downloading of data from locations in the network or broadcasting from network 6. Metering instruments of this type are available in America Online, Compuserve and Prodigy.
), Etc., to support billing by service time or service type that is common to the public industry. The capabilities of existing devices of this kind have been enhanced to include a measure of parallel processing resources assigned to individual PC users from other PC users 6 by Internet service providers or the like, and easily measured in time. It is like this. The difference in time 4 for the results of meter 5 and meter 7 during a given time gives a valid billing base.

Alternately, as shown in FIG. 3, the meter 10 is associated with the amount of network resources needed to meet the processing demands placed on the network (provider or other level of network control) by PC users and related It provides a means of estimating the planned cost to individual PC users in the future and approving the estimator by executing the request and a real-time readout of the cost when it occurs (alternatively, this meter Can only be used to alert the PC user that a given processing request 8 deviates from the usual pre-accepted parameters such as cost level).
To give an example of a significantly deeper search request, the search priority or time limit and depth should optimally be criteria or limit parameters that a user can determine or set with the device.

Preferably, it results in a substantially equivalent use of computing resources by both users and providers (because any network computer operated by either entity potentially (multitasking Assuming
In a network system (such as software hardware) because it can be both a user and a provider of computing resources (at the same time) and also (eg, based on a user's profile or a user's credit line).
In a potentially overriding option by the user (or otherwise worked through relatively instant payment), the network would not include any payment between the user and the provider.

Preferably, as shown in FIGS. 4A-4C, the priority and scope of usage of PCs and other users depends on the network (provider or otherwise) and is based on a default-to-standard for class usage. Standard‐of‐class‐usage ba
sis) and can be overridden by a particular network provider (or by another level of network control). One default-based example is to spend up to the total credit balance of the PC or other user for the aforementioned providers and network providers to further provide limited services on a liability basis up to some set limit for the user. is there. Different users have different constraints based on resources and / or credit history.

For example, certain categories of PC users based on particular microprocessor hardware owned or leased generally have less access, or vice versa, in smaller or basic users. Maximum number of parallel P
It may have access to a C or microprocessor. Certain categories of users may have different priorities for performing processing by the network. A very wide range of specific structural types between users and providers is possible, both future and new, based on the unique features of the new networked computer system of shared processing resources.

For example, in the simplest case, in the first system embodiment, as shown in FIG. 4A, a standard PC1 user request 11 for use, including parallel processing, is shown in FIG. to the use of only the same PC1 ₂ microprocessor can take the default value by the system software 13, this time, the microprocessor intended for parallel processing or multi-tasking, as shown in FIG. 4C is there. For a total number of about 4, then about 8, about 16, about 32, about 64, etc., or for any number in between (acting the override option, the default standard at the service level mentioned above, possibly with extra cost (A PC1 user using one PC microprocessor can be illustrated), as shown in FIG. 10G below, a larger standard number of PC microprocessors, such as the next level of about three PCs, The addition of the high performance override option is, of course, made available as the network system is upgraded in a simple phase over a long period of time. As the phase-in process continues, more PC microprocessors, preferably about 1 over time, as the network and all its components become upgraded to handle increasing numbers.
It will be valid for standard PC users (actually any number) starting at 28, then about 256, then about 512, then about 1024, and so on. The system scalability at the standard user level is essentially unlimited over time.

Preferably, most standard P (including current and future equivalents and successors)
For C users, connecting to the Internet (or current or future equivalents or successors such as Super Internet) is not costly for PC users. Because this type of exchange for Internet access generally makes those idle PCs available to the network for shared processing. Preferably, competition between Internet service providers (including current and future equivalents and successors) for PC user users is provided without the access services and any additional costs offered to standard PC users. Factors such as the convenience and quality of shared processing, or the level of shared processing of a large number of slave PCs assigned to a master PC on a standard basis, will be over. IS
P also manages internal or external ISP networks by competing for parallel processing operations.

Also, as shown in FIGS. 5A-5B, in another embodiment, a network controls access to a user's PC (hardware and / or software and / or firmware and / or other). There is a controller. In its simplest form, such as a manually actuated electromechanical switch, a PC user can use this controller to connect to the network when not in use by the PC user.
C can be set to be valid. Alternatively, the PC user may use the multitasking hardware and / or software and / or firmware and / or other components to connect to the network momentarily but whenever idle. The controller can be configured to enable the PC via the Internet (broadcast from the Internet or other networks or
"Push" applications can still run in the desktop background).

Or more simply, as shown in FIG. 5A, all (possibly after a time delay set by the user, such as those conventionally used on screensaver software) Each time the software control device 12 installed in the PC detects that the user application is closed and the PC 1 is enabled for the network 14, the device 12 can do this by another PC. Inform a network computer, such as a server 2, that enables the PC to network, 15 that can control the PC 1 for processing or multitasking. When the device 12 informs the network computer, such as the server 2, that the PC is no longer valid for the network and the network uses the first use of the PC as shown in FIG. , Device 12 may continue on the first PC (or on the first use of the keyboard for faster response in a multitasking environment) until it detects that the application is open 16.

In a preferred embodiment, as shown in FIG. 6, for a network or network computer, such as the server 2, that particular (hardware / software / firmware / from state 19 provided by the PC) A PC 1 that directs or informs the network 15 of user PC availability for network use (and full use or multitasking only) 15 as well as configuration 20 (comprising other components) to effectively utilize its capabilities. Signal device 18 (comprising hardware and / or software and / or firmware and / or other components) for use. In one embodiment, the transponder device resides on the user PC and (
For example, based on changes or periodically) broadcast its idle or other state or respond to interrogation signals from network devices.

In another embodiment, as shown in FIG. 7, there is a transponder device 21 (comprising hardware / software and / or firmware and / or other components). This device 21 receives the PC device status as shown in FIG.
2. Exists in a part of the network 26 (eg, network computer, switch, router, or another PC) that broadcasts and / or queries the PC for its status.

In one embodiment, as shown in FIG. 8, the network also includes valid users P.
C can be effectively selected and utilized to perform parallel processing initiated by a PC user or a network provider or otherwise its hardware and / or software (and / or firmware) capacity. as well as/
Or other components). To do so, the network precisely locates each PC (consisting of hardware and / or software and / or firmware and / or other components) at a PC location on the geographical grid line / connecting means 23. It is necessary to have the capability so that parallel processing occurs between the PCs (PC1 and PC1 ₂ ) which are as close together as possible. In this case, parallel processing should not be difficult for a PC in a fixed location in a geographical location, which is conventionally grouped together into cells 24, as shown in FIG. 8, but the active system of any wireless microprocessor. Request to measure the distance from the location of the network relay, as will be explained later in FIG.

One of the major capabilities of the Internet (or successors such as the Internet II or Super Internet) or WWW network computers is the PC
Promoting a search by a user or other users. As shown in FIG. 9, the search is particularly suitable for multiple processing. Because, for example, a representative search would use specific information to find a specific Internet or WWW location. This type of location search can be geographically divided, with different PC processors 1'wiring means 99 (or wireless connection) as shown to search each area.
Assigned by a network communicating through, and the entire area is preferably divided into eight individual parts as shown, which results in (in some cases preferred, the PC1 microprocessor provides control only, parallel processing Assuming one processor alone (assuming no provision), the full search is about 1/8.

As a typical example, a single PC user may need 1 to find out what is required.
A network computer using a large number of PC processors can take 100 minutes using 100 processors, or 100 minutes using 10 processors, or The search can be completed in 1 minute with 1,000 processors used (or even with 1 second with 60,000 processors used). Given performance transparency, this should be achievable at least over time. The external parallelism of the network is optimally fully scalable, without any theoretical restrictions.

The previous examples also illustrate the tremendous potential benefits of network parallelism. The same amount of network resources, ie, 60,000 to complete the search in 1 second
Zero processors are spent in each of the equivalent examples. However, by using a relatively large number of processors, the network provides the user with a relatively immediate response with no major cost difference (or with a relatively small difference), which is a major advantage. can do. In fact, each PC user linked to the network that provides external parallelism is, in effect, a virtual supercomputer. As explained below, supercomputers
Experience a performance-like quantum leap by spending a thousand times (or more) on microprocessors that exceed current levels.

This kind of power would be required for any effective search on the World Wide Web (WWW). The WWW is currently growing at a rate that is doubling each year, and as a result, searching for information within the WWW will be geometrically more difficult in the future, especially in the next decade, and will be associated with any WWW.
Finding a place and then examining and analyzing its contents is already a very significant challenge.

Therefore, the ability to search for massively parallel processing is required to be effective, which dramatically enhances the ability of scientific, technical and medical researchers.

This type of enhanced ability for exploration (and analysis) will also fundamentally change the buyer-seller relationship for any item and / or service. To the buyer
Massively parallel network processing refers to the best combination of category or price / performance for a given price point, etc. or any product within the highest rate products or the highest rate products (for performance, reliability etc.) or It will make it possible to find the best price for the service, ie worldwide. The best price for a product may include the best price for shipping within certain delivery time parameters that are acceptable to the buyer.

For sellers, this kind of parallelism drastically enhances the worldwide search for users who are potentially interested in a given product or service, and is very specific to advertising. It will bring the target. Sellers, including producers, know their users directly and interact directly with users for feedback on specific products and services to assess user satisfaction and investigate new product developments. You can

Similarly, the vastly increased capacity offered by the shared parallel processing of the system is new in the classification, organization of PC user rich inputs of electronic data in pharmaceutical therapy and from “push” technology. Drugs and much higher performance artificial intelligence (A
I: The use of artificial intelligence (I) for the design and testing of any structure or product from airlines and skyscrapers, as well as worldwide modeling and complexity such as local weather observation systems over time. Will bring a major improvement of the simulation. Game improvements are also made, especially with regard to realistic simulation and real-time interactivity.

As is clear from each example, W like the Internet and the super Internet
The WW networked computer system potentially puts an extraordinary new level of computer power into the hands of PC users, which is far greater than most powerful supercomputers present today. The total number of microchips in the world has already reached about 350 billion, of which about 15 billion are occupied by certain microprocessors (mostly quite simple "appliance" type). Working watches, televisions, cameras, cars, telephones, etc.). Assuming growth at the current rate, Internet / Internet II / WWW is easily 10 in 10 years.
There may be one hundred million individual PC users, with at least four microprocessors (or more, eg 16 or 32 microprocessors) and a microprocessor such as a digital signal processor or successor device. Each PC user (assuming a PC with a processor or other associated handheld, home entertainment, and business equipment with digital processing capabilities) results in an average total number of at least 10 highly capable microprocessors . It has been 10 years from now that at least 10 interconnected by electromagnetic means at a speed close to the speed of light.
It will be a wide area computer consisting of 0 billion microprocessors.

Also, if it is preferred, a large number of the above-mentioned special-purpose “appliances (applia
)) microprocessor, and in particular, a microprocessor that operates intermittently, such as a personal computer, is a PC (or equivalent or successor) or “PC system on chip” described below in FIGS. 10A-10H.
as a parallel microprocessor for "na chip)", preferably all PCs function homogeneously, or are preferably homogenized in a parallel processing internet, such PCs being If connected by high bandwidth means including fiber optic cables or equivalent radios, the number of potentially parallel processors available, with the exception of Moore's Law routine increase, will be 10,000 of current performance within 15 years. Up to twice the net potential'standard (standa
rd) ”computing performance will increase roughly 10 times. Also, in an environment where all currently intermittently operating microprocessors preferably follow the same basic design standard such that they are all homogeneous parallel processors, the cost per microprocessor increases somewhat, especially at the beginning. However, the net cost of computing for all users is the otherwise idle "applianc".
e) "Thoroughly down due to general performance enhancements through the use of microprocessors. Therefore, virtually all microprocessors of this type, nowadays custom made devices known as Application Specific Integrated Circuits (ASICs), are forced to reduce overall cost,
It is a common microprocessor (such as a PC), where the software and firmware provide most of their characteristic functionality. As mentioned above, while the homogeneity of parallel (and multitasking) processing design standards for microprocessors and networks, including local and Internet, is preferred, heterogeneity also often provides significant benefits over non-parallel processing. It is an established alternative parallel processing.

To put this in context, the typical supercomputers that today utilize the latest PC microprocessors have less than 100 PC microprocessors. Using network linkage for all external parallel processing, a peak maximum of perhaps 1 billion microprocessors could be enabled for users of network supercomputers, resulting in (same microprocessor technology (Provided that) the current widespread internal parallel processing supercomputer would provide 10,000,000 times more power to the user than would be available. Due to its practically unlimited scalability mentioned above, the resources made available to the supercomputer user or PC user by the network can change considerably during any arithmetic operation, which results in , Peak computing load will effectively experience what level of resource is needed.

In summary, in view of monitoring the net supply of power between a PC and a network, FIGS. 1-9 show embodiments of a system for a network of computers, including personal computers. At this time, the system for network of this computer, as well as shared computer processing such as parallel processing, should be provided to a personal computer in the network, means for network service including scanning and searching function, and at least two units. A personal computer and means for at least one of the personal computers, which when temporarily idled by a personal user should be temporarily enabled to provide shared computing services to the network. Nono Means for monitoring the service provision to the user of the ax or personal computer on a net basis. 1 to 9 show that the system is a scalar in which the system imposes no limitation on the number of personal computers including at least 1024 personal computers, and the system has at least 256 personal computers. Including a computer,
It is a scalar that puts no restrictions on the number of personal computers that can participate in a single shared computer processing operation, and the network is connected to the Internet and its equivalents and successors, resulting in at least 1 million personal computers. A personal computer of the personal computer and the network, the network being connected to the World Wide Web and its successors, the network including at least one network server participating in shared computing. The monitoring means being provided with a metering device for measuring the flow of computational power between, the monitoring means providing the personal user of the personal computer with a future estimate of the cost to the network, Providing means for performing the action requested by the personal user prior to performing the action by the network, and the system providing access to the personal computer by the network for shared computer processing and Having negative control means, access to the personal computer by the network is limited to those times when the personal computer is idle, and having at least one microprocessor, and peak data of the microprocessor. Fig. 3 shows an embodiment characterized by a personal computer in communication with the network via a connection means having a data transmission rate at least higher than the processing rate.

With respect to a standard cost monitor, FIGS. 1-9 show embodiments of a system for a network of computers, including personal computers,
At this time, the network system of this computer, as well as the shared computer processing such as the parallel processing, has a means for the network service including the scanning search function to be provided to the personal computers in the network, and at least two personal computers. Computers and means for at least one of the personal computers, which, when idle by a personal user, should be temporarily enabled to provide shared computing services to the network, and each personal computer. Or a means of maintaining a standard cost base for the provision of services to users. 1 to 9 show that the system is a scalar that does not impose any limitation on the number of personal computers including at least 1,024 personal computers, and the system is at least 256 units. Scalar, which does not impose any restrictions on the number of personal computers that can participate in a single shared computer processing operation, including the personal computers of The null computer includes at least one million personal computers, the fixed standard cost is zero, the fixed standard cost is zero, and the means for monitoring the standard cost base is a personal computer. Shared by And it involves the use to enable the standard number of personal computers for the management,
That the network is connected to the World Wide Web and its successors, and that the personal user can override the means to monitor the standard cost base so that the personal user can obtain additional network services. And a system having control means for allowing and denying access to the personal computer by the network for shared computing, and having at least one microprocessor and having a peak data processing speed of the microprocessor. Figure 3 shows an embodiment characterized by a personal computer communicating with the network via a connection means having at least a high data transmission rate.

Browsing features generally include at least access to explore the World Wide Web or Internet sites, worldwide e-mail exchange, and worldwide conferencing, Microsoft Explorer (Micros).
oft Explorer 3.0 or 4.0 and Netscape Navigator (Netsca
pe Navigator) 3.0 or 4.0 and other current Internet browsers (
It includes features like these standard features provided by the Internet browser). Intranet networks use the same browser software, but may not include access to the Internet or WWW. As described above, the shared processing includes the parallel processing and the multitasking processing including two or more personal computers. The network system is quite scalar, with potentially any number of PC microprocessors.

As shown in FIGS. 10A to 10F, in order to handle operations and security issuance, on the other hand, ie directly by the network controlling each function of the slave microprocessor 40 when the network does not utilize them. Remain inaccessible (preferably using hardware and / or software and / or firmware and / or other component firewalls 50) (hardware and / or software and / or / Or firmware and /
It may be advantageous for an individual user to have a master 30 controller (or other components) and a microprocessor or equivalent device that may be called permanently or temporarily.

For example, as shown in FIG. 10A, a typical PC 1 (through different designs of arbitrary component parts), depending on whether or not the master 30 is exclusively a controller, has 30 masters and 30 masters. Or it may have 4 or 5 microprocessors (on a single microprocessor chip) 4 of which are slaves 40,
At this time, it is preferable to request four slave microprocessors 40. Alternatively, the master microprocessor 30 preferably has only three slave microprocessors 40 by having the same or equivalent microprocessor power as a slave 40 and a multiprocessor in parallel with the slave microprocessor 40. The number of PC slave microprocessors 40 may be, for example, at least about 8, about 16, about 32, about 64, about 128, about 256, about 512, about 1024.
It can be increased to virtually any other number, such as (these multiples are generally preferred in the prior art, but not explicitly required). The PC master microprocessor 30 can also be increased. Also, the master 30 and the slave 40
A preferred firewall 50 is provided between the microprocessors. As shown in FIGS. 1-9 above, the PC 1 of FIG. 10A is preferably connected to a network computer 2 and current or future equivalents or successors 3, such as the Internet or the super Internet.

Not only the digital signal processor, but also a hard drive 61, a floppy diskette 62, a compact disc read only memory (CD-ROM) 63,
Other typical PC hardware components such as a digital video disk (DVD) 64, flash memory 65, random access memory (RAM) 66, video or other display, graphics card 68, and audio card 69 are included in these components. A display 67, a graphics card 68 and an audio card 69, which may be located on either side of the preferred firewall 50 with software and / or firmware stored on or for these.
A device such as a hard drive 62 which is both readable and writable
, Flash memory 65, floppy drive 62, read / write CD-RO
Devices with non-volatile memory (generally full writes to protect and erase data without power), such as M or DVD 64, are primarily for security reasons, as shown in FIG. 10A. For this reason, it is preferable to be located on the PC user side of the firewall 50, where the master microprocessor is also located, these positions being flexible and their capabilities managed by password-authorized access or the like.

Alternately, any or these devices that are replicating (for other exceptional needs), such as the second hard drive 61, can be located on the network side of the firewall 50. RAM 66, which is generally volatile (data is lost when power is interrupted) or equivalent successor memory, should generally be located on the network side of the firewall. However, some may be equipped with a master microprocessor to facilitate their independent use.

However, a read only memory (ROM) device may include the newest CD drive (CD-ROM) 63 ′ or DVD (DVD-ROM) 64 ′ or may be safely located on the network side of the firewall 50. This is because the data on these drives cannot be modified by the network user and the user's preemptive usage control is preferably left to the PC user.

However, at least a portion of the RAM can be maintained on the master 30 microprocessor side of the firewall 50 and the PC user uses the core of the user PC1 processing power completely independent of any network processing. Can retain ability. If this capability is not desired, move the master 30 microprocessor to the network side of the firewall 50 and replace it with a simpler controller on the PC1 user side, similar to the master remote controller 31 shown in FIG. 10I and described below. You can

If future microprocessor design standards of this kind comply with the requirements of network parallelism as previously mentioned, some or all of the PC users own or lease the home entertainment digital signal processor 70, etc. The use of other processors 60 can be controlled. In this general approach, the PC master processor uses slave microprocessors or, if idle (or at a low priority, that is, it continues to work on deferrable processes) to the network provider or others it uses. Enable these slave microprocessors. Preferably, the wireless connection 100 is (
Or with the use of a master remote controller 31 (or with microprocessing power),
Expected to be widely used in home or business network systems, where the preferred high bandwidth connection, such as fiber optic cable, directly connects to at least one component, such as PC1, of the home or business personal network system shown in a slave configuration. Connected. This preferred connection links the home system to a network 2, such as the Internet 3, as shown in FIG. 10I. The business system preferably comprises a fiber optic link to most or all personal computers PC1 and other devices having a microprocessor, such as printers, copiers, scanners, fax machines, telephones and video conferencing equipment, including wireless links. It can also be used.

PC1 as is currently common in the Internet and other accesses
The user uses another networked master microprocessor 30 on another PC 1 and owns his own PC 1 master microprocessor 3
You can remotely access your networked PC 1 by using 0 and passwords to enter files and other access control means. Alternatively, the remote user may simply carry their own files and master microprocessor, or use another networked master microprocessor that temporarily has its own.

In the simplest configuration, the PC 1 has a single master microprocessor 30 and a single slave microprocessor 40, preferably separated by a firewall 50, as shown in FIG. 10B, In this case, both processors are used for parallel or multitasking processing, or only the slave 40 is used, preferably connected to the network computer 2 and the Internet (and successors such as the super Internet). Virtually any number of slave microprocessors 40 are possible. Other non-microprocessor components shown in FIG. 10A can also be included in this simple FIG. 10B configuration.

Preferably, as shown in FIG. 10C, the microprocessor 90 is a PC memory (RAM 66, graphics 82, audio 3, power management 84, network communication 85, and video processing 86, possibly a modem 87, a flash bios. (Flas
h bios) 88, digital signal processor 89, and most or all other necessary computer components (or their current or future ones), including other components or current or future equivalents or successors. Equivalents or successors are expected to be integrated on a single chip 90 (silicon, plastic, or otherwise) known in the industry as "system on a chip". . This type of PC microprocessor 90 preferably has the same architecture as PC1 shown in FIG. 10A. That is, it is preferably separated by a firewall 50 and preferably connected to a successor such as the network computer 3 and the Internet or the super Internet (parallel or multitasking processing by either the PC 1 or the network 2). Master control and / or processing unit 93)
And preferably one or more slave processing units 94.

Machines such as a hard disk 61, a floppy or other removable diskette 62, a CD-ROM 63 and a DCD 64, which are large-sized storage devices having mechanical features that are not considered to be an integral part of the PC “system of a chip”. Existing PC components with dynamic components can preferably be connected to a single PC microchip 90 and controlled by a single PC master unit 93, of course.

In the simplest case of a multiprocessor, the chips 90 are preferably separated by a firewall 50, as shown in FIG. Preferably has a single master unit 93 and at least one slave unit 94 (where the master has only control functions or processing functions). The other non-microprocessor component shown in FIG. 10A can also be included in this simple FIG. 10D configuration.

As mentioned in Section 2 from the introduction to the background of the invention, in the preferred network invention any computer is potentially a user and a provider,
Alternatively ... Can be dual-mode operating capability. Thus, when any PC 1 in the network 2, which is preferably connected to the Internet 3 (and successors such as the super Internet), is temporarily present, as shown in FIG. 10E,
It may be the master PC 30 which initiates parallel or multitasking processing requests to the network 2 for execution by at least one slave PC 40. At another time, the same PC 1 can be a slave PC 40 executing a parallel or multitasking processing request to another PC 1 ′ temporarily assuming the function of the master 30, as shown in FIG. 10F. The simplest approach to accomplishing this alternation is for both master and slave versions of parallel processing software that should be loaded on each or every PC1 to be shared in parallel processing, and thus each PC1 Is a single P using master software
A signal request for parallel processing initiated by C1 is sent to at least a second PC1 to trigger its slave software to add a switching means adapted to respond by initiating parallel processing, etc. It has the necessary software with minor changes in behavior.

As shown in FIGS. 10G and 10H, which are similar to FIGS. 10E and 10F, the number of PC slave processors 40 can be increased to any substantially other number, such as at least four. As you can see, the processing system is completely scalar,
This results in a further increase of about 8, about 16, about 32, about 64, about 128, about 256, about 512, about 1024, as is not mandatory but conventional in the art.
And so on (multiples of these being preferred). The PC master microprocessor 30 can also be increased.

In summary, as described above with respect to FIG. 10I, PC1 can function as a slave PC 40 and can be controlled by a master controller 31, which can be remote and preferably without microprocessing capability. Alternatively, although limited, it can still have equal or greater capacity.
As shown in FIGS. 10J and 10K, such a master controller 31 has a P
Located on the PC user side of the firewall 50 under control of the C user, the microprocessor 40 resides on the network side of the firewall 50. The master controller 31 is preferably a local means such as a keyboard, microphone, video cam or future hardware and / or software and / or firmware or other equivalent or successor interface means (as the master processor 40 is). Receives input from the PC user, which provides input to the PC 1 or microprocessor 30 that originates from the user's hands, voice, eyes, nerves, and other human body parts. In addition, telephones, cables,
Remote access by wireless or other connection is also possible by hardware and / or software and / or other means with suitable security such as password controlled access. Similarly, as shown in FIGS. 10L and 10M, a master controller unit 93 ′ (which can be accessed by a PC user via the remote controller 31) that has only controllability with respect to the PC “system on a chip” is Under the control of the user, it is located on the PC user side of the firewall 50 and the slave processor unit 94 resides on the network side of the firewall 50.

FIGS. 10N and 100 show hardware and / or software and / or
Alternatively, a PC1 having a firewall 50 configurable by firmware and / or other means is shown, the software configuration being the easiest and most typical, active motherboard hardware configuration being possible, manual or electromechanical or Certain security advantages can be provided, including the use of other switches or locks. FIG. 10N shows the CD-ROM 63 ′ which is located by the PC user on the network side of the firewall 50 from a position in front of the PC user side of the firewall 50 shown in FIG. 10A. Preferably,
The setting of the firewall 50 can be performed from uncontrolled access by network users.
C1 can be defaulted to one that protects it securely, but the ability for relatively sophisticated PC users to override such default settings, and even a proper safeguard that prevents less sophisticated users from accidentally doing so. The configuration of the firewall 50 requires guarding, and may not be the owner or leaser of the PC used by the PC user. As in the case of business, the network administrator in the local network allows remote access or remote controller 31 on the network. It can also be actively controlled.

Similarly, FIGS. 10P and 10Q show a PC “system of a chip” having a firewall 50 configurable by hardware and / or software and / or firmware and / or other means, the software configuration being the easiest. And is the most typical. Active configuration of the integrated circuit of PC microprocessor 90 is also possible and may provide certain seed and security advantages. Direct configuration of the circuitry of the microchip 90 that establishes or modifies the firewall 50 can be provided using a field programmable gate array (ie FPGA) or their future equivalents or successors, such as microcircuit electrical machines or others. Switches and locks could potentially be used. For example, in FIG. 10P, the slave processor 94 'has moved from the network side location shown in FIGS. 10C and 10L to the PC user side of the firewall 50. Similarly, FIG. 10Q shows the FP for the simplest form of a microprocessing microchip 90 with a single slave unit 94 '.
The same active configuration of the chip circuit using the GA is shown and its location is moved from the network side shown in FIGS. 10M and 10D to the PC user side of the firewall 50.

In summary, with respect to the use of master / slave computers, FIGS. 10A-10I show embodiments of a system for a network of computers,
In this case, the system for network of this computer functions as at least two personal computers and, when instructed by the personal user, temporarily functions as a master personal computer and is shared with at least the other personal computer in the network. Means for at least one personal computer adapted to initiate and control execution of computer processing operations and, when idle by the personal user, enabled to temporarily function as at least one slave personal computer. At least the other personal computer means participating in the execution of the shared computer processing operation controlled by the master personal computer and the shared computer processing operation. And means for alternating the personal computer as indicated between the function as it and slave functions as chromatography.
10A-10H also show an embodiment in which the system is scalar in that the system imposes no limit on the number of personal computers,
For example, a system may include at least 256 said personal computers, and a system does not impose a limit on the number of personal computers participating in a single shared computing operation, including, for example, at least 256 said personal computers. And the network is connected to the Internet and its equivalents and successors, so that the personal computer includes, for example, at least one million personal computers, the shared computer processing is parallel processing, and the network is world wide. Connected to the web and its successors, means for network services, including browsing and broadcasting functions, as well as shared computer processing such as parallel processing, are provided in the network. Provided for a null computer, the network comprises at least one network server that participates in shared computer processing, the personal computer comprises a transponder or equivalent or successor means, so that the master personal computer is the closest available slave. The personal computer can be determined, the closest available slave personal computer is compatible with the master personal computer,
The personal computer, which executes the shared computer processing operations, has at least one microprocessor and communicates with the network through a connection means having a data transmission rate at least higher than the peak data processing rate of the microprocessor, and the local network PC1. Is remotely controlled by the microprocessor controller 31.

As described above in FIGS. 10A-10I, the preferred use of firewall 50 is for parallel or other shared processing functions from any ability to access or retain information about any element about shared processing. By providing a complete isolation of the host PC that brings the slave microprocessor to the network, it provides a solution to important safety problems. Also. Of course, the firewall 50 provides security to the host PC against intrusion by external hackers. That is, by reducing the need for encryption and authentication, the use of firewall 50 can result in relative increases in computational speed and efficiency. In addition to a computer such as a personal computer, the above-described firewall 50 can be used for "applianc" such as a telephone, a television or a car.
e) "type microprocessors, including those equipped with any computing device within the applicant's above definition of a personal computer.

In summary, with respect to the use of firewalls, FIGS. 10A-10I show embodiments of a computer system architecture, including a personal computer, operating within a network of computers, wherein the system architecture is Comprises at least two microprocessors and
A computer having means for connecting the computer to the network, and a firewall means for the personal computer for restricting network access to only a part of the hardware, software, firmware and other components of the personal computer. With a computer architecture, the firewall means acting as a master microprocessor,
Network access to the at least one microprocessor having means for initiating and controlling execution of computer processing operations shared with at least the other microprocessor having means for functioning as a slave microprocessor, and a firewall The means allow network access to the slave microprocessor. The system architecture is, for example, that the computer is a personal computer,
The personal computer is a microchip, and the computer has control means for permitting and denying access to the computer by the network for shared computing, the system comprising at least 2
Being scalar in that it does not impose a limit on the number of personal computers, including 56 said personal computers, the network is connected to the Internet and its equivalents and successors, so that the personal computer has, for example, at least one million A personal computer, the system being scalar in that the system does not impose a limit on the number of personal computers participating in a single shared computing operation, including, for example, at least 256 said personal computers. A personal computer having at least one microprocessor and communicating with a network through a connection means having a data transmission rate at least higher than the peak data processing rate of the microprocessor; The computer is a personal computer, the personal computer is a microchip, the computer has control means for allowing and denying access to the computer by the network for shared computer processing, and the network being the Internet and its successors. Explicitly included are each embodiment of being connected.

In summary, regarding the use of a controller with a firewall, FIG.
J-10M shows an example of a system architecture for a computer, including a personal computer, functioning in a network of computers including, for example, a computer having at least a controller and a microprocessor and having means for connecting to the network of computers, The architecture for a computer includes firewall means for a personal computer that limits network access to only hardware, software, firewalls, and other components of the personal computer, the firewall means including at least one microprocessor having a means to act as a slave microprocessor. Has means for initiating and controlling execution of computer processing operations shared with the processor Without without permit access by the network to a single controller, firewall means permits access to the slave microprocessor by the network. Further, the system architecture explicitly includes, for example, an embodiment in which the computer is a personal computer, the personal computer being a microchip, and the computer being a control means for permitting and denying access to the computer by the network for shared computing. And the system is scalar in that it does not limit the number of personal computers, including, for example, at least 256 said personal computers, the network is connected to the Internet and its equivalents and successors, and thus the personal computer is, for example, at least The system includes one million personal computers, and the system is a single shared computer processor that includes, for example, at least 256 said personal computers. It is scalar in that it does not limit the number of personal computers that participate in the operation, and the personal computer has at least one microprocessor and is connected to the network via a connection means having a data transmission rate at least greater than its peak data processing rate. In communication, the controller can be used remotely.

In summary, with respect to the use of firewalls that can be actively configured, FIGS. 10N-10Q show examples of system architectures for computers, including personal computers, that function within a network of computers, eg, at least 2 Personal computer including a computer having two microprocessors and means for connecting the computer to a network, the architecture for the computer limiting the access by the network to only a part of the hardware, software, firmware and other components of the personal computer. Including a firewall means for the slave, the firewall means acting as a master microprocessor, The network means does not allow access to the at least one microprocessor having means for initiating and controlling the execution of a computer processing operation shared with at least another microprocessor having means acting as a sessa, and the firewall means is a slave by the network. Allowing access to the microprocessor, the firewall configuration can be modified by the user or an authorized local network administrator, and the firewall configuration on the Microchip PC is at least partially a field programmable gate array or equivalent or successor. Done using. Further, the system architecture specifically includes embodiments in which the computer is a personal computer, for example, the personal computer is a microchip, and the computer has control means for permitting and denying access to the computer by the network for shared computing. However, the system is scalar in that it does not limit the number of personal computers, including at least 256 said personal computers, and the network is connected to the Internet and its equivalents and successors,
The personal computer is scalar in that it is intended to include at least one million personal computers, and the system does not limit the number of personal computers participating in a single shared computing operation including at least 256 said personal computers. Communicates with the network via connection means having at least one microprocessor and preferably having a data transmission rate greater than at least its data peak processing rate.

The above-mentioned PC1 microprocessor has a P1 microprocessor as shown in FIGS. 10A and 10B.
As a parallel microprocessor for C (or equivalent or successor),
Alternatively, the PC “system on a chip (sy) described in FIGS. 10C and 10D is used.
It can be thought of as being designed according to the same basic consensus industry standard as a parallel microprocessor for "stem on a chip)". Although the cost per microprocessor initially rises somewhat, the net cost of computing for all users has so far been in the idle "appliance".
It is expected to drop drastically almost immediately due to the significant general performance enhancements created by the new ability to use microprocessors. Potentially quite good profits for all users bring powerful power, and by utilizing the Internet 3 and successors, significant industrial hard about continuous base for this kind of basic parallel network processing design. Agreement on software, software, and other standards should be reached. This type of basic industry standard is adopted at the beginning of system design, and it is preferable, but not necessary, to initially use a minimum number of shared microprocessors. A basic industry standard of this kind was first applied to a minimum number of shared microprocessors, and design improvements incorporating more complexity and more shared microprocessors were stepped step by step. If implemented, conversion to a super Internet architecture at all component levels would be relatively easy and inexpensive (as opposed to a rapid, large scale conversion attempt). Is very difficult and terribly expensive). The scalability of the ultra-internet system architecture (both vertical and Kodaira direction) described in this application enables this practical approach.

Until 1998, the improvement of manufacturing technology made it possible to form 20 million transistors on a single chip (each circuit is thin at 0.25 μm),
In the next period, a circuit of 0.18 μm can be used to form 5,000,000 transistors. Preferably, all computers on a chip are linked directly to the network, preferably directly by optical fiber or other broadband connection means, so that the limiting factor for the data throughput of the network system or any part is the linked microprocessor. It is only its own speed, not the transmission speed of the linkage. Such direct optical fiber linkages currently range from 100 to 200 in Intel Pentium and 1998 IBM Power
The need for an increasingly cumbersome number of microprocessor-connected prongs in excess of 1000 prongs for three microprocessors is eliminated. One or more digital signal processors 89 and one or more all optical switches 92 located on the microprocessor 90 (or 30 or 40) include a multitude of channels and / or signal multiplexing (of the fiber optics signals). With wave splitting), a large number of microchip connection prongs can be replaced.

Any such PC for a computer that is not reduced to a single chip
The internal system bus of the system has at least a sufficiently high transmission rate so that all processing operations of the PC microprocessor or microprocessors are not restricted (as well as other PC components such as RAM) and the system described above. As in chips, the microprocessor chip or chips become directly linked by optical fiber or other high bandwidth connections, limiting the data throughput of network systems, and of any part, of the linked microprocessor itself. It is also preferred that the transmission rate of the linkage is not a factor, only the rate.

The individual user PCs may be connected to the Internet / Internet II / WWW (via the Intranet) or the super Internet (or other Internet) by any electromagnetic means which favors the very high transmission rates provided by the high bandwidth of the fiber optic cable. ) A hybrid system that can be connected to a successor such as a network but uses fiber optic cables for trunk lines and coaxial cables for individual users, although initially cost effective, Unless the cable can be manufactured (through hardware and / or software and / or firmware and / or other component means) to provide a sufficiently wide bandwidth connection to provide unlimited throughput by the microprocessor. It can become undesirable. Assuming good transmission speed and bandwidth of fiber optics or equivalent or successor connections, conventional network architectures and structures are acceptable for good system performance, and actual full interconnection between users. Enable the network.

However, all else being equal, the best speed for any parallel processing operation must be obtained by utilizing the available microprocessors that are physically closest to each other. Thus, as shown previously in FIG. 8, the network may be based on a continuously ongoing basis, where each PC is likely to be in the area or cell that is closest to the PC and the cells in the adjacent area. Provides the ability to know the address of the closest valid PC in sequence, from closest to farthest (hardware and / or software and / or firmware and / or other components). It is necessary to have a means (through).

Therefore, a network architecture in which PCs are clustered together is preferred, but not mandatory for substantial benefits and can be constructed by hardwired means. However, it is probably very beneficial to construct a local network cluster 101 (or cell) of personal computers 1'by wireless 100 means, as shown in FIG. Because the physical proximity of any PC1 to its closest other PC1 'should be easy to access the method directly, as described below. It should be noted that providing any given geographical area to provide competitive services and prices is economically desirable for at least some network providers.

Thus, these wireless PC connections are resident PCs and can communicate by wireless or hardwired (or mixed) means to all available PCs within the geographical area of the cluster or cell. Advantageously, both are close to and potentially outside the practical limits of wireless transmission.

As shown in FIG. 12, the wireless PC connection 100 may be made to one or more satellites 110 or existing non-PC network components such as present or future equivalents or successor components. And, the wireless transmission can utilize conventional wireless waves such as infrared or microwave, or any other portion of the electromagnetic spectrum.

Also, as shown in FIG. 13, this kind of wireless or hard-wired approach makes it easy to develop a network cluster 101 of efficient PCs 1 ′ with complete interoperability in the future. That is, each valid PC 1 in the cluster 101 is connected (preferably wirelessly 100) to every other valid PC 1 in the cluster 101 so that it continually adapts to the individual PCs that are enabled or disabled. There is. Given the good speed of some wired broadband connections, such as fiber optic cables, a cluster 101 of this kind with perfect interconnectivity is certainly a possible embodiment.

As shown in FIGS. 14A-14D, a wireless system of this type may include hardware and / or software and / or firmware, such as the PC1-enabled device described above, preferably residing on a PC. Not only is it provided with a wireless device 120 consisting of other components, but also by means of a PC signal transmission by a transponder or its functional equivalent and / or other means to the nearest other PC 1 ′ in the cluster 101. It is advantageous to also have a network-like ability to measure the distance from each PC 1 within 101. As shown in FIG. 14A, this distance measurement is performed by, for example, actually measuring the time delay from the wireless transmission of the interrogation signal 105 by the transponder device 120, and receiving the wireless transmission response 106 signal availability from the master PC 1 Requesting the start of shared processing by the slave P from each of the idle PCs 1'in the cluster 101 which received the inquiry signal 105.
By acting as C, it can be achieved in a conventional manner between the transponder devices 120 connected to each PC of the cluster 101. The first response signal 106 'received by the master PC1 is selected by the requesting master PC1 (assuming the simplest shared processing case for one slave PC and one master PC) for shared processing operation. From the closest valid slave PC 1 ″, because the closer the shared microprocessors are, (assuming equivalents of connecting means and other components between each of the PC 1 ′). This is because the speed of the wireless connection 100 is increased between the shared PCs, and the inquiry signal 105 is the closest compatible (firstly, with the first response signal 106 'selected as described above). Other choices for Slave PC1 ", probably defined by the functional requirements of the system to be the same microprocessor) You can also specify a constant basis.

This same transponder approach is also shown in FIG. 14A, where the wire 99 (or wire 99) (or wire It can be used between the PCs 1 connected by the wireless / mixing means. This is because the speed of transmission over the preferred broadband transmission means, such as fiber optic cable, is very high to offset this longer distance. On a cost basis, this hardwired approach is preferred for this type of PC already connected by wideband transmission means. This is because additional wireless components such as hardware and software are needed. In this case, the functionally equivalent transponder device 120 is the wireless cluster 1
Wiring type cluster 1 in the same manner as described above for the PC connected at 01.
01 can operate. A network incorporating a PC 1 connected by both wireless and wired (or mixed) means is envisaged, such as the home or business network described in FIG. 10I, where the mobile P
C or other computing device preferably uses a wireless connection. Depending on the distance between the PC and the other factors, the local cluster 101 of the network will wirelessly communicate between the PCs with the network 2 linked to the wired broadband transmission means via the response means, as shown in FIG. 14C. Can be connected to expressions.

As shown in FIG. 14D, the same generic transponder means 120 may also be used, for example by an ISP, or any other network system architecture (including client / server or peer-to-peer) or ring (well known in the art). It can be used in a hardwired 100 network system 2 with a network server 98 operating in topologies (including buses and stars) or their future equivalents or successors.

The approach of FIG. 14 of establishing a local PC cluster 101 for parallel or other shared processing is a server (and, if wireless, other network components that also include connecting means) etc. Has the major advantage of avoiding the use of network computers, which results in the entire local system of PCs in the cluster 101 operating independently of the network servers, routers, etc. Also,
In particular, if connected by wireless means, the size of cluster 101 is quite large, and as a result is generally limited by PC radio transmission power, PC radio reception sensitivity, and local and / or other conditions affecting transmission and reception. Becomes Also,
One cluster 101 may be adjacent to another cluster 101 and a radio 10 that may include more than its own direct transmission range, as shown in FIG. 14B.
0 means to communicate.

In order to improve the response speed in shared processing involving a considerable number of slave PCs 1, the actual possible parallel processing network for PC1s in cluster 101 is preferably established before the processing request is initiated. This is done by the transponder device 120, i.e. the potential slave, of each PC 1 in the idle state and by co-broadcasting its valid state by the transponder 120 when idle and / or periodically later. Achieved, so that each potential master PC1 of the local cluster 101 can relatively constantly maintain its own directory 121 of the idle PC1 closest to the ones that are valid to act as slaves. . The directories 121 are preferably listed sequentially, for example, from the closest valid PC to the farthest away, the slave PC to the master PC (initially probably just one other PC1 ″).
Contains a list of standard or higher numbers for. The directory of valid slave PCs 1 is preferably updated relatively up to a data basis, whether changes occur in the idle state of potential slave PCs of directory 121 or periodically.

Special clusters 101 of this kind should be more effective by becoming less geographically arbitrary. Because each individual PC is effectively at the center of its own special cluster. Scaling up or down the number of microprocessors required by each PC at any given time is also more seamless.

The complete interconnection potentially optimally provided by this type of special radio cluster is also notable. Because this kind of cluster is a neuron
, Which mimics the neural network structure of the animal's brain, which is characterized in that each nerve cell, which we call, is interconnected with its surrounding neurons in a very complex way. By comparison, the wide area network computers mentioned above, which are expected within 10 years, have at least 10 times more PCs than the neurons of the human brain, which are comparable to human neuron transmission rates. Then 300,0
They are connected by electromagnetic waves traveling at a speed close to that of light, which is 00 times faster (but they are much closer together).

As an added note, compatibility issues become less important as individual PCs continue to be much more sophisticated and more network oriented. This is because all major types of PCs can emulate each other and most software, especially for parallel processing, is no longer hardware specific. However, in order to achieve maximum speed and efficiency, compatible hardware, software, firmware, and other component standards are set to provide the potential performance gained by the homogeneous parallel processing components of wide area network computers. It would be beneficial to realize the above advantages.

Until the compatibility or homogeneity is designed to be included in the essential components of the network system, the existing incompatibility or heterogeneity of the current components is involved in parallel processing between large networks. Increase difficulty. Even so, massive parallelism between heterogeneous personal computers, for example, through the use of a message passing interface, is considerably facilitated for non-coupling operations, as shown for example in the Beowulf system. Programming languages such as Java are one way to provide partial means of addressing the heterogeneity problem, and Linux offers greater speed and efficiency. In addition, other same or substantially the same P
Specific Intel Pentium chip with C components
Using a similar configuration of the existing standard, such as using a PC available from Intel (with huge resources), probably adopts a reasonable consensus standard for all system component specifications. It is the best method in current technology to eliminate many of the serious existing problems that can be easily designed using the available technology. The potential benefits to all interested parties far outweigh the potential costs.

The wide area network computer system described above has the added benefit of reducing the serious and growing problem that computer hardware, software, firmware, and other components are almost immediately depleted. There is. Since the preferred system described above is a summation of its components used for parallel processing, each particular PC component becomes a little less critical. As long as it is possible to access a network that utilizes sufficient bandwidth, all other technical deficiencies of the user's own PC can be Can be fully compensated by access.

Wide area network computers will obviously intersect with the geographical boundaries of a country, but their operations are unlikely to be unreasonably restricted by incapable or any law within these individual states. There will be considerable pressure on all countries to comply with generally coordinated legitimate system architectures and operating standards. Because the penalty for not participating in a wide area network computer is
Because it is potentially more expensive than it is politically possible.

As shown in FIG. 15, the maximum number of user PCs is completely idle or close to it, so that during the night the network is routed to the night geographical area of the earth, And keeping them there even when the earth spins by shifting computing resources as the world rotates,
Useful for most complex massively parallel processing, including the maximum number of processors with continuous availability that are as close together as possible. As shown in the simplest case of FIG. 15, during the daytime, at least one parallel processing request by at least one PC1 in the network 2 of the Earth's western hemisphere 131 requires a very wide bandwidth connection wiring such as an optical fiber cable. By means of Eqn. 99 means is sent to the eastern hemisphere 132 of the earth for execution by at least one PC 1'of the network 2'which is idle during the night, the result being by the same means at least one of the network 2 and the requestor. It is sent back to PC1 and returned.

Any number of individual PCs in a local network, such as those operated by an ISP, would be grouped into clusters or cells, as is common practice in the networking industry. As is common in operating power grids and telecommunications and computer networks, many such processing requests from many PCs and many networks can be routed to remote processing, where the system The complexity of is increased significantly over time in the natural course.

Alternatively, in order to enhance or simplify security, nighttime parallel processing is kept in a relatively local area to avoid a relatively long nighttime period without interrupt of a considerable number of slave personal computers PC1. It may emphasize relatively large parallel processing by a large party such as a business, government, or university for a relatively complex application that benefits.

The conventional way of constructing a network of personal computers PC1 for parallel processing is to arrange them together in a simple bus architecture, as shown in FIG. 16AA shows a new hierarchical network topology.

Although the network structure of FIG. 9 is simple and produces reasonable results in loosely coupled problems such as the regional search described above, there are at least three problems in general practice.

First, as the number of personal computers PC1 used in the network increases, the level of the master PC1 is established in order to establish a means of allocating some of the operations among a large number of available personal computers PC1 '. There is a need for increasingly complex pre-operation planning and tailor-made programming in.

Secondly, the results of the operation returning from the personal computer PC1 'to the PC1 are not synchronized, so that the PC1 frequently alternates between idle and ruin. When the number of personal computers PC1 'is very large, both problems become serious,
A large number can be catastrophic and can seriously degrade network operation.

Thirdly, in general, there is no established means for the personal computers PC1 'to communicate or cooperate with each other during such network operation, and therefore personal computers PC1', especially if a large number of PC1's are included. Sharing operation results during processing between computers PC1 'is usually not feasible. Therefore, the tight coupling problem is generally not amenable to conventional parallel processing solutions by computers using simple bus networks such as FIG.

In the new hierarchical network topology shown in FIG. 16A, a personal computer C1 (or an equivalent PC on a microprocessor chip 90) or a microprocessor 30 acting as a master M ₁ performs a given operation in two parts (eg 2 Two halves) and then one half is shown as S ₂₁ and S ₂₂ one processing level down, by optical or electrical connections such as optical fibers and wires 99. 2
Available connected slave personal computer PC1 (or P
C microprocessor 90) or a simple subdivision step to each of the microprocessors 30. FIG. 16A (and subsequent FIG. 16) may or may not benefit from connection to the Internet 3 and the World Wide Web, as desired.

FIG. 16B shows that the slave personal computer PC1 (or PC microprocessor 90) or microprocessor 40 located at S ₂₁ temporarily adopts the same functional role as the master and the same subdivision of a given operation. It shows that it repeats. Thus, given operation has already been subdivided in half in FIG. 16A, the given operation is subdivided again in FIG. 16B, which in turn is (for example) halved to 1/4 of the original operation by S ₂₁ , then it sends one 1/4 S ₃₁ and S ₃₂ are disposed a 2 horns more available slave personal computer PC1 (or PC microprocessor 90) or to each of the microprocessor 40.

FIG. 16C shows that the personal computer PC1 (or PC micro computer) in S ₃₁ and S _{32 that} sends the operation result to S ₂₁ instead of repeating the subdivision again after performing the processing required by the given operation. Processor 90) or microprocessor 40. The processing action by S ₃₁ and S ₃₂ is commanded by a pre-established program criterion, eg automatically defaulting to operating processing at the S ₃ level after the two subdivision processes mentioned above, making four available The slave personal computer PC1 (or the PC microprocessor 90) or the microprocessor 40 can process operations in parallel. Alternatively, as another example, the criteria are more or less the slave personal computer PC1 (or PC microprocessor 90) or microprocessor 4
To specify other processing levels, including 0, automatic defaults can be user-selected commands that should override processing to level 3.

Similarly, in FIG. 16A, the personal computer PC1 (or PC microprocessor 90) or the microprocessor 40 acting as the master M ₁ is also based on preset program parameters via software, hardware, firmware or other means. Parallel processing operations (i.e., multitasking operations) can be initiated, an example of a parameter being again a preset automatic default or user-selected override.

Similar to FIG. 16C, FIG. 16D shows the operation result returned to the next high level, in which the slave personal computer PC1 (or PC microprocessor 90) or the microprocessors 40, S ₂₁ and S ₂₂ from the master. personal computer PC1 (or PC microprocessor 90) or a microprocessor 30, M _1, is returned to operation after S ₂₁ and S ₂₂ results are integrated is completed.

FIG. 16G shows an available slave personal computer PC1 (that temporarily functions as S ₁ at location M ₁ on the first processing level for the duration of a given parallel processing (ie, multitasking) operation. or to the PC microprocessor 90) or a microprocessor 40, for example, shows a master personal computer PC1 (or PC microprocessor 90) or a microprocessor 30, M _1, which Ofuodo the entire parallel processing operation by a wireless connection 100, of the operation The first step is shown in FIG. 16H, which is similar to FIG. 16A except as shown.

FIG. 16I executes a command that acts in the role of a slave of S ₂₁ for a given operation, but the result of the given operation from the lower concurrency level is passed to S ₂₁ . At times (eg, due to an interrupt or malfunction of another higher priority command by the user), or personal computer PC1 (or PC microprocessor 90) or microprocessor that was initially unavailable. 40 is shown. In this situation, S ₂₁ (or S ₃₁ or S ₃₂ ) is another personal computer PC 1 (
Alternatively, it simply offloads these results to the PC microprocessor 90) or microprocessor 30 (or 40), which becomes S ₂₁ and assumes the role of S ₂₁ for the duration of that operation in a given operation. Similarly, the role of any unavailable or malfunctioning master or slave PC1 or microprocessor 90, 30 or 40 can be transitioned to an available active one.

As shown in FIG. 16J, S ₂₁ then completes the parallel processing operation and passes a portion of the operation result to M ₁ .

As shown in FIGS. 16G-16J, PCs 1 and 30 that can be used from unusable ones
The offload capabilities of the functional roles of master and slave computers PC1 (and PC microprocessor 90) and microprocessor 30 (and 40) to and 40 can also be used in the previous figures of this application. First at the simplest case, the personal computer PC1 (and PC microprocessor 90), such as S ₂₁ described above and a microprocessor (30 or 40
), All processing roles can be determined at the beginning of the operation based on availability and remain unchanged until the end of the operation. However, with more sophisticated system software and hardware and firmware, the personal computer PC1 (or PC microprocessor 90) can perform any number of processing roles during operation, even many times and many simultaneously. Alternatively, it can be offloaded from the microprocessor 30 (or 40) to another.

FIG. 16E shows one personal computer PC1 (or PC microprocessor 90) or microprocessor 30 (or 40) of level 1, two of level 2, four of level 3, and a level 4 in this example. A large scale implementation is shown that includes all personal computers PC1 (or PC microprocessor 90) or microprocessors 30 (or 40) involved in a typical operation, including eight. Any practical number of additional processing levels can be added (and exactly 2 (or 3) levels) to the illustrated personal computer PC1 (or PC microprocessor 90) or microprocessor 30 (or 40). A restricted topology is also possible, which is the simplest case of operational processing subdivision that distinguishes it from the traditional single-level "string-together" architecture of FIG. 9).

It has been found that the number of personal computers PC1 (or PC microprocessor 90) or microprocessor 40 processing is doubling at each additional processing level and can therefore be represented by 2 ^N , where N is as described above. Is the last or final processing level for the simplest case, which divides a given operation into two parts, such as half in between each level.

Also, instead of subdividing one operation as described above, using the same network architecture described above, two separate parallel processes on separate branches, shown as S ₂₁ and S _22. Operations can be multitasked. As can be seen from this example, any practical mix of multitasking and / or parallel processing is possible using the network architecture described above.

FIG. 16E shows the distribution of given parallel processing (ie, multitasking) routed through a 4-level virtual network starting at M ₁ . The personal computer PC1 (or PC microprocessor 90) or microprocessor 3 that was available for the previous operation in the next parallel processing starting at M _1.
“Virtual” used here means temporary because 0 (or 40) is not available for the next operation.

FIG. 16E shows 2 for initial distribution of operations from M _{1 down} to 4 slave processing levels.
FIG. 16F shows a binary tree network architecture, and FIG. 16F shows the subsequent processing and the accumulation of results from there back to M ₁ . 16F shows an inverted view of FIG. 16E showing the operation sequence from the operation distribution in FIG. 16E to the result accumulation in FIG. 16F.

In particular, FIG. 16F shows the slave personal computer PC1 (or PC microprocessor 90) or microprocessor 40 processing at the fourth level, S ₄₁ to S ₄₈ , processing operations to produce results. It is then sent back to M ₁ through the other two levels of the virtual network.

In the routing of the operation results shown in FIG. 16F, each slave personal computer PC1 (or PC microprocessor 90) or microprocessor 40 simply passes these result operations as a direct communication link or connection only, or, for example, , Has the ability to integrate these results sent from the low level personal computer PC1 (or PC microprocessor 90) or microprocessor 40, or to perform other additional processing based on these low processing level results. .

By such integration and addition processing, duplicated data can be reduced or eliminated from searching and other operations that produce duplicated results, and a large number of slave personal computers PC1 (or PC microprocessor 90) or microprocessor 40, etc. M ₁ in the single processing level access of FIG. 9 without adjustment from
Can serve to buffer the outgoing master M ₁ from overload caused by many result sets arriving at. Such an integrated role for personal computer PC1 (or PC microprocessor 90) or microprocessor 40 can substantially reduce or eliminate the excessive custom preplanning and synchronization problems of the network topology of FIG. 9 described above. .

FIG. 16K shows a simple example showing the extremely complicated network structure that results from subdividing a given operation, for example, where the complexity of the associated operation is not uniform due to variations in the data. In this example, a preset program division criterion for balancing the processing load of each slave personal computer PC1 (or PC microprocessor 90) or microprocessor 40 can be used. This method allows a complex part of a given operation to automatically derive more resources in a way that further divides the more difficult part of the problem, resulting in parallelism as shown in the left branch of FIG. 16K. Processing slave personal computer PC1 (or P
An additional level of C microprocessor 90) or microprocessor 40 can be put into the virtual network to handle the operation.

FIG. 16K is a fairly simple example, but with a microlevel and personal computer PC1 network in the PC microprocessor chip 90 (FIG. 20).
Applying the same kind of dynamic network structure to many personal computers PC1 (or PC microprocessor 90) or microprocessors 30 or 40, including both at the macro level (as shown in B), the potential complexity of virtual networks. Is significantly increased. For example, each PC microprocessor chip 90 may have 64 slave microprocessor chips 94 on the final processing level, each personal computer PC1 may have 64 slave PC microprocessor chips 90 on the final processing level, The virtual network may include 64 personal computers PC1 at the final processing level. Similar to that shown in FIG. 16K, this large number of physical resources (of course, very large, of course) available to the virtual network created by processing a given operation is tailored to a particular operation. It is clear that the operation itself can model incredibly complex virtual networks. What is needed can reside in each PC 1 (or PC microprocessor 90) or microprocessor 30 or 40, or can be passed along with the data (which may be operating application software) when the operation is performed. It is the above-mentioned operation subdivision process.

Therefore, FIG. 16K can be dynamically configured in real time according to the processing conditions imposed on the components of the network by the particular given operations permitted by the network hardware / software / firmware architecture and their associated data. Here is an example of a very flexible virtual network that can be done.

16L and 16M, as shown in FIG. 16L, subdivision routing to three slave personal computers PC1 (or PC microprocessor 90) or microprocessor 40 at the next level down, or
As shown in FIG. 16M, an example of another possible subdivision parallel processing method such as subdivision routing to four slave personal computers PC1 (or PC microprocessor 90) or microprocessor 40 is shown. Subdivisional routing to any practical number of slave personal computers PC1 (or PC microprocessor 90) or microprocessor 40 can be performed between processing levels.

As shown in FIG. 16N, such routing subdivision may vary between processing levels or even within the same processing level, and as shown in FIG. 16K,
Examples of these variations may occur due to preset program criteria that balance operating loads. Means for refining the problem for parallel or multitasking processes may also vary in at least some way known in the computer and mathematical arts.

FIG. 16O shows a slave personal computer PC1 (or PC microprocessor 90) or microprocessor 40 sending the operation result to a higher processing level S ₃₁ , which, as shown in FIG. 16P, does not change the result. including a personal computer PC1 (or PC microprocessor 90) or microprocessor 40, S ₄₂ router ie, one or more high-speed switch 42 (all of the optical switch back to, through to the original level, PC microprocessor 90 on Can be placed as 92).
FIG. 16Q shows any two pairs of personal computer PCs such as S ₄₁ and S _42.
1 (or PC microprocessor 90) or microprocessor 40, including the illustrated wired or wireless 100, indicates the ability to communicate directly with each other. FIGS. 16O-16Q, like the next FIGS. 16V-16W, show the same small portion of the network topology shown in FIG. 16F (top left).

A personal computer PC1 (or PC microprocessor 90) or microprocessor 40 located at a higher processing level within the network architecture, such as S ₃₁ , may not only route the results, but also process them as shown in FIG. 16V. 16W, S ₃₁ receives and processes the results from the lower processing levels S ₄₁ and S ₄₂ before sending them to the higher level S ₂₁ .

Together, Figures 16V-16W and 16O-16Q are shown in Figure 16F (and 16E).
Any personal computer PC1 (or PC microprocessor 90) or microprocessor 30 (or 40) of the network structure of and any other personal computer PC1 in which the functional invention participates in a given parallel processing (ie, multitasking) operation. (Or PC microprocessor 90) or the ability to communicate with microprocessor 30 (or 40). Communications can take the form of simple passage of unmodified results or modification of these results by processing at any level.

16X-16Z show Applicants' new hierarchical network structure as described above for FIGS. 10A and 10B as applied to the design of personal computer PC1. FIG. 16X is the simplest general design with a master M ₁ microprocessor 30 and two slave S ₂₁ and S ₂₂ microprocessors 40. FIG.
Y shows the same network structure with additional levels of slave microprocessors 40, S ₃₁ to S ₃₄ , and FIG. 16Z shows the same network structure as the same FIG. 16Y with additional levels of slave microprocessor 40, S ₄₁ to S ₄₈ . Indicates.
As shown in these examples, this network structure is completely scalar and has a practical number of slave microprocessors 40 on a practical number of processing levels.
Is included.

FIG. 16AA shows that in addition to the internal cache memory, each microprocessor 30 and 40 has its own random access memory (RAM) 66 or equivalent memory (flash or magnetic memory) integrated on-chip or independently off-chip. Volatile or non-volatile) useful examples. A significant amount of such RAM or other memory, significantly larger than the "cache memory" and other on-chip memory used on today's microprocessors, is beneficial in improving the efficient operation of the microprocessor, The size of such memory, when placed on an off-microprocessor chip, substantially exceeds the size of the associated microprocessor, while on-microprocessor chip placement, such as cache memory, improves microprocessor speed and efficiency. Offer the best possible to do. The design may also incorporate (or replace) conventional shared memory or RAM 66 '(ie, memory used by all or some of the personal computers PC1 microprocessors 30 or 40 (or 90)).

FIGS. 16R-16T correspond to FIGS. 16X-16Z described above, but show the PC microprocessor 90 architecture rather than the macro PC1 architecture, and as described above for FIG. 10C, the PC microprocessor 90 is of course on the microchip. Is a personal computer.

16U is similar to FIG. 16AA except that it also shows the PC microprocessor 90 architecture instead of the PC1 architecture. Figure 1
6U is a random access memory (RAM) 66 in which each PC microprocessor 93 or 94 has its own integrated random access memory (RAM) 66 or equivalent memory (volatile or non-volatile, such as flash or other magnetic memory). ) Are shown as useful examples. Used on microprocessors today
A significant amount of such RAM or other memory, which is significantly larger than "cache memory" and other on-chip memory, is beneficial in improving the efficient operation of the microprocessor and when located off the microprocessor chip. On the other hand, while the size of such memory substantially exceeds the size of the microprocessors involved, on-microprocessor chip placement such as cache memory offers the best potential for improving microprocessor speed and efficiency. The microprocessor design may also incorporate (or replace) conventional shared memory or RAM 66 '(ie, the memory used by all or some of the PC microprocessors 93 or 94 of the personal computer PC microprocessor 90). it can .

16R-16U show different improved basic chip architectures that can eliminate or reduce the currently used superscalar methods in microprocessors to execute multiple instructions during each clock cycle. Show. FIG.
The R-16U architecture is much simpler and reduces memory bottlenecks by integrating the memory with a microprocessor. Figure 16R-16U, which may have little or no superscalar components, compares the simplicity of the microchip design to a conventional superscalar design, whose inherent extreme complexity results in considerable memory overhead. With the exception of the integration of memory or RAM 66 on the microprocessor chip 90, as discussed in 16U, much more of an independent non-superscalar processor per microprocessor can be used.

16X-16Z and 16AA correspond to FIG. 16R- for the PC1 network.
By using the same architecture as 16U, the same benefits of microchip parallelism performance are introduced into parallelism within the PC1 network.

As with the preceding figures of this application, all Figures 16A-16Z are of the WWW or Internet or Internet II or Next Generation Internet (meaning connected to it) or Intranet or Extranet or other network Personal computer PC1 that can be part
(Or PC microprocessor 90) or microprocessor 30 or 40 network portion.

[0151]   Also, except for FIGS. 16R-16T and 16X-16Z, all of FIG.
The personal computer PC1 and the micro computer are assumed to occupy the same place.
A processor 30 or 40 is shown. This dual expression is a presentation
Personal computer P in the new network structure because of the economics of
Parallel function in conceptual terms of C1 and microprocessor 30 or 40
And to show interchangeability. Therefore, taking FIG. 16A as an example, M ₁ , S_{twenty one}And S_{twenty two}Is three personal computers PC1 or one My
A black processor 30 and two microprocessors 40 are shown.

As described above with respect to FIG. 10C, the personal computer PC1 can be reduced in size to a PC microprocessor chip 90, so the preceding figures showing the personal computer PC1 generally also represent the PC microprocessor chip 90. There is.

Finally, FIGS. 16A-16Z and 16AA show a mix of electrical and optical connections, including fiber optics 99, and in particular fiberglass and radio 100 (and both in a single drawing). In general, 99 or 100 or a mixture may be used interchangeably within the illustrated network invention (as well as in the previous figures), but in some embodiments the maximum transmission rate (ie, the widest bandwidth) or Mobility (and other factors) can dictate the preferred use of wired or wireless. In general, the fiber optic wire 99 provides the most advantageous means of transmission because it has the maximum bandwidth or data transmission rate, and is therefore generally preferred for connections between personal computers and microchips, including direct connections, and wireless 10
0 is generally preferred where mobility is the main design criterion.

Any of the embodiments shown in FIGS. 16A-16Z and 16AA may be combined with any one or more of the preceding or subsequent figures of the present application.

The parallel processing network architecture shown in the preceding Figures 16A-16Z and 16AA and in the previous figure is a personal computer PC1 (or PC microprocessor 90) or a micro-computer that is shared with other computers for parallel or multi-tasking processing. It has some features unique to its basic design that provide the security of the processor 40. First, each of the slave personal computers PC1 (or microprocessor 40) has only a portion of the operation (a very small portion for large operations), and thus especially relatively local area exchange or routing is utilized. If not, single PC
One unauthorized monitoring can only provide very limited knowledge of the overall operation. Second, the address of slave personal computer PC1 (or microprocessor 40) is known or trackable, and thus unprotected against unidentified persons (such as ordinary hackers) in the event of unauthorized intervention. In addition, cryptographic schemes are available and on-microprocessor chips 30, 40 or 90 hardware 55 are preferred for efficiency, but software and firmware may also be used, or independent PC1 hardware such as cryptographic microchips. A wear-based component 56 can be used, and cryptographic components 55 or 56, micromechanical locks can be used to prevent access other than direct physical users. 17B-17D
Nonetheless, these inherent strengths can still be substantially reinforced.

FIG. 17A implements its conventional function of excluding intruders such as hackers from the Internet 3 from unauthorized access to the user's personal computer PC1 (or PC microprocessor 90) or master microprocessor 30 for monitoring or intervention. At least one firewall 50 is shown.

FIG. 17B illustrates one or more slave microprocessors 40 of another personal computer PC1 (or PC microprocessor 90) in parallel (ie, multitasking) when an Internet user is enabled by Applicants' network architecture invention. ) As it can be used for processing, at least one firewall 50 protects the use of the Internet 3 (or other shared use on the network) from unauthorized monitoring or intervention by the PC1 owner / user providing the shared resources. It has a function. In order to maintain the privacy required to operate such collaboratively shared network configurations, unauthorized monitoring or intervention must be carefully prevented by hardware / software / other means.

Thus, FIG. 17C shows a master M personal computer PC1 (or microprocessor 90) using a different personal computer PC1 ′ slave S ₂ microprocessor 40 that can be used for shared use of the Internet 3 (or other net), Firewall 50 'is PC1' by PC1 '
Block unauthorized access to the PC (the owner / user of PC1 'can interrupt the shared operation and regain control of the slave S'microprocessor 40 at any time, as described above with respect to FIGS. 16I-16J). , Then trigger the off-road action to compensate).

FIG. 17D is a view similar to FIG. 17C, but showing a PC microprocessor 90 having a slave microprocessor 94 used by Internet 3 users (or other nets), wherein at least one firewall 50 is a slave S. Access to the Internet 3 parallel processing (that is, multitasking) on the microprocessor 94 is denied by the master M microprocessor 93 such as monitoring, and the master M microprocessor by the Internet 3 (or other net) user of the slave S microprocessor 94 is denied. Access to the processor 93 is denied. Currently, at least one firewall 50 is implemented with non-configurable hardware at the microchip level, and has the best access to tampering with the firewall 50 by PC1 users, with easy access to modify software or macro hardware such as PC motherboards. Provide protection.

The flexible network architecture shown in FIG. 16K and other series of FIGS. 16 (and other drawings) has many applications, including use in design improvements and alternatives to the network itself. In addition, the flexible network can be used to be static or configurable (in response to the requirements of a given operation, such as the FIG. 16K network architecture) or mixed, personal computer PC1 and a specific PC. Microprocessor chip 90 (and other microchips) can be simulated and designed.

Since any personal computer PC1 or microprocessor chip 90 in the network of FIG. 16K can simulate much more than a simple binary circuit on / off state or other simple microchip circuit, The network architecture of FIG. 16K is a typical PC microprocessor 90.
Or, it has the ability to go beyond simulating the fairly simple binary circuits of other microchips. Any PC 1 or 90 in the network of FIG. 16K can represent virtually any number of states or conditions simulating circuits of any kind, no matter how complex, The limit is the processing time required for the personal computer PC1 or PC microprocessor 90 to process the simulation, which can be a very large number-thousands or millions, i.e. an increasing number of processors are phased as described above. It is expected to be imported, but there are no theoretical constraints, only practical constraints.

One possible related application of the network invention described above is to simulate not only the virtual quantum computer itself, but also the unique “qubit” components needed to construct the quantum computer.

18A-18D show a design for a virtual quantum computer. FIG.
A simulates a “qubit” for a quantum computer, and an important component of the quantum computer 153, virtual qubit (VQ) 1
A personal computer P to which a software program 151 of 50 has been added
C1 (ie microprocessor 90) is shown. FIG. 18B shows a personal computer PC1 (ie, microprocessor 90) having a digital signal processor (DSP) 89 connected to a hardware analog device 152 that simulates a qubit, which monitors the qubit via the DSP 89 to quantize the qubit. Simulating a Virtual Qubit (VQ) 150 for computer 153, this configuration allows the option of simultaneous use of PC1 via multitasking for both digital and analog computing.

FIG. 18C is similar to FIG. 16A, but includes virtual qubits in PC1, so virtual quantum computer 153 is optional as shown in FIGS. 16A-16Z and 16AA, as well as other features of the present application. Can have a network architecture of.

As shown in FIG. 18D, for example, a virtual qubit (VC) 150 network can provide full interconnectivity as in FIG. The virtual qubit VC 150 may be added to or replaced by the microprocessors 30 and 40 of FIGS. 16B-16Q and 16V-16AA prior to this application as well as the previous drawings, similar to that described in FIGS. 18A and 18b. it can. As shown in the previous application, the number of virtual qubits 150 is limited to what is practical at any given time, and from a development point of view it is only one qubit 150 in one or more network personal computers PC1. However, as shown in the previous figure, the number of qubits 150 can be extremely large. FIG. 18D shows a mix of wired 99 and wireless 100 connections.

Like a personal computer installed in a home or office, an automobile 170
The personal computer PC1 (including other transportation vehicles and other vehicles) is actually used for only a very small percentage of the time, with an average idle period of 9
It can be over 0%. The personal computer PC1 has now been added to some automobiles and is expected to become the standard device for the next decade or so.
Furthermore, as mentioned earlier in this application, the vehicle already has a large number of on-board microcomputers in the form of specialized microprocessors 35, which will become common parallel processing units in future designs. Seem.

Thus, as explained in the previous figures, the car forms a potentially large unused resource for massive parallel processing over the Internet 3 or other networks. However, when it is idle and therefore generally available for use in the network, the vehicle will of course be powered off with its normal power, engine,
Is lacking because it is too large to power the onboard computer efficiently and can only be supplied from time to time. As shown in FIG. 19, the car engine may have a controller (hardware, software, or firmware or combination in PC1 (or other microprocessor 35), for example, connected to an automobile computer network 178 to provide a battery. When low (and before the engine is low enough to start), it automatically starts the vehicle engine to recharge the car battery 171, but the engine does not automatically consume all available fuel. Furthermore, it is necessary to control as described above.

Alternatively, the vehicle 170 may have a very small engine power electric power generator 17
7 may be installed to power the computer network of the vehicle and the engine of generator 177 may be powered to the main engine fuel tank and controlled as described above.

Mitigating (does not solve) the power deficit problem described above, not mutually exclusive,
There are two solutions, the first is to provide an (at least mainly) additional car battery 171 'for use in the network, and the second is to use a single battery but the existing battery 171 is required to start the vehicle 170. This is to add a controller, for example, in the PC 1 to prevent the discharge to a level close to or below a certain level.

Furthermore, as shown in FIG. 9, one or more solar power cells or cell arrays 172 can be incorporated within the exterior surface of the vehicle, and generally the most efficient arrangement is a roof, hood, or A part of an upper horizontal surface such as a part of a trunk.
Focused or focusable light source 173 for charging the vehicle battery 171 when sunlight is not available, such as at night or in the garage.
Can supply external power to the solar panel.

Alternatively, a connection device 174, such as an external power plug, can be installed on or near the exterior surface of the vehicle. In addition, or independently, a connection device 17 for external connection of an optical fiber (or other wire) to the Internet 3 or other nets.
5 may be installed and an intermediate high transmission rate may exist between the vehicle network and the fiber optic connection to the Internet 3. Alternatively, a wireless receiver 176, located in the garage or near a car parked, connects the car's personal computer, or computer PC1, directly to the Internet 3 or to a home or business network as shown in FIG. 10I. Can be provided.

FIG. 20A is similar to FIG. 16Y, but additionally shows a slave microprocessor 40 functioning as S ₁ , with the master's functionality temporarily or permanently offloaded to it by the M ₁ microprocessor 30. ing. Furthermore, FIG.
0A indicates the processing levels of the slave microprocessors 40, S ₃₁ to S ₃₄ , each having a separate output link to a digital signal processor (DSP) 89 or other transmission component, the transmission linkages being 111 and 112, respectively. ，
It is shown as 113, 114. The DSP 89 is connected to wired 99 means such as fiber optics to the Internet (or other net), but non-fiber optic wires can be used (possibly not requiring the DSP 89).

FIG. 20B is similar to FIG. 16S, with the addition of the same new ones described above in FIG. 20A. Similar to FIG. 16S, FIG. 20B shows a detailed view of a personal computer PC microprocessor 90 ₁ which is a personal computer on a microchip which further includes two parallel processing levels within the microprocessor 90.
In addition, the two new levels of PC microprocessor 90 shown in FIG. 20B are P
A second processing level consisting of C microprocessors 90 ₂₁ to 90 ₂₄ and a third processing level consisting of PC microprocessors 90 ₃₁ to 90 ₃₁₆ (third level of a total of 16 microprocessors 90). Each of the third processing levels shown in the example of FIG. 20B is separated between the levels by an intermediate direct connection to the Internet 3 (or other network) and four output lines from the higher processing levels.
For example, microprocessors 90 ₂₁ through 90 ₂₄ are PC microprocessors 90 ₁
Of four slave microprocessors 94, S ₃₁ to S ₃₄ , respectively, are shown to receive outputs 111 to 114, respectively.

The PC microprocessor 90 ₁ is illustrated in detail as including all slave microprocessors 94, while the other PC microprocessors 90 at the second and third levels are shown in a simplified form for clarity and simplicity. Not shown as such. Further, although the additional processing level can be presented, it is not shown for the sake of clarity, and the personal computer PC1 shown in FIG. 20A can be used interchangeably with the PC microprocessor 90.

FIG. 20B shows that the output link from each PC microprocessor 90 between each processing level is from the slave microprocessor 94 to the next lower processing level PC microprocessor 90, eg from PC microprocessor 90 ₂₁ to the lower PC microprocessor. It is shown for direct transmission to processors 90 ₃₁ to 90 ₃₄ . Shown as 111, 112, 113 and 114 for the PC microprocessor 90 ₁ .
Each of the transmission links from these slave processing microprocessors 94 (S ₃₁ to S ₃₄ ) connects to a digital signal processor 89 (there may be more than one) that connects to a wired or wireless connection, such as the fiber optic line shown. A fiber optic line that can be integrated, preferably directly connected to the PC microprocessor 90 ₁ (due to the enormous capacity, one fiber optic line is generally expected to be sufficient, but an additional line Can be used for transmission over a different channel (also a waveform or dense wave division).
on) can be used).

Any of the embodiments shown in FIGS. 20A and 20B are included in any one of the preceding figures of this application.
Can be combined with more than one.

This application is directed to any of the related computer or network hardware, software, or firmware (or other components), ie, the network computer system or systems described above, including both apparatus and methods. It includes all new equipment and methods required to operate the. In particular, but not exclusively, all available PC and network software, hardware, and firmware that runs the system (in current or future form, equivalent, or successor) and all All available PC and network hardware designs and systems, including PCs and other computers, ie network computers such as servers, microprocessors, nodes, gateways, bridges, routers, switches, and all other components. All to network providers, PC users, and / or others, including the purchase and sale of any matter or service regarding the architecture and network or any other interaction or transaction between the network or any such buyers and sellers. Available for Transactions on this and legal, as the structure and entities, P
All services by a third party, including selecting, creating, setting up, implementing, integrating, operating and performing maintenance on any or all of the foregoing for C users, networks, providers, and / or others. And are included.

While many combinations of elements introduced in the drawings to which the present application precedes are illustrated because their examples are believed to be at least among the most useful of the possible, many other useful ones. Appropriate combinations in the unavoidably long description provided by the inherently complex wiring of the invention presented here, in which all combinations can exist and generally all can operate as part of one system or independently. Not all of them are shown here, as it is not possible to show them all while maintaining great brevity.

Therefore, any combination not specifically described is explicitly implied in all inventions of this application, and thus any portion of any preceding drawing and / or related description may be It may be combined with any one or more of any other drawing and / or any portion of the associated description to create new and useful improvements over existing technology.

Furthermore, any unique new portion of any preceding drawing and / or associated description may itself be considered a separate improvement over existing technology.

The embodiments described above fulfill the general purpose of the invention summarized above. However, it will be clearly appreciated by those skilled in the art that the above description has been made only with respect to the most preferred specific embodiment. Therefore, many other changes and modifications that are useful improvements and are clearly not included in the existing art can be made obviously and easily without departing from the scope of the invention, which in fact Within the broad scope, the invention is manifested as surpassing the existing art by the appended claims.

[Brief description of drawings]

FIG. 1 is a simplified diagram of a section of a computer network, such as the Internet, showing an embodiment of a meter means for measuring the flow of computation during shared operations such as parallel processing between a typical PC user and a network provider. Is.

FIG. 2 is a section of a computer network, such as the Internet, showing an example of another metering means for measuring the flow of network resources, including shared processing, provided to a typical PC user and network provider. It is the simplified figure.

FIG. 3 shows an example of another metering means for estimating the level of network resources and their costs prior to execution for shared processing operations requested by a representative PC user from a network provider, such as the Internet. FIG. 3 is a simplified diagram of a section of a computer network.

[FIG. 4A] In a series of steps, a common processing request by a PC is a standard preset number of other Ps.
3 is a simplified drawing of a section of a computer network, such as the Internet, showing an example of a selection means that matches C and performs a sharing operation.

[FIG. 4B] In a series of steps, the common processing request by the PC is a standard preset number of other Ps.
3 is a simplified drawing of a section of a computer network, such as the Internet, showing an example of a selection means that matches C and performs a sharing operation.

[FIG. 4C] In a series of steps, the common processing request by the PC is a standard preset number of other Ps.
3 is a simplified drawing of a section of a computer network, such as the Internet, showing an example of a selection means that matches C and performs a sharing operation.

FIG. 5 is a simplified section of a computer network, such as an internetwork, showing an example of a control means in which a PC is enabled for a network for shared processing operations when idled by its user. It is a figure.

FIG. 6 is a simplification of a section of a computer network, such as the Internet, showing an embodiment of signaling means by which a PC informs the network of its availability for shared processing operations when idled by its user. FIG.

FIG. 7 is a simplified section of a computer network, such as the Internet, showing an embodiment of a receiver and / or interrogator means by which the network receives and / or queries the availability of PCs in the network for shared processing states. It is a figure.

FIG. 8 is a section of a computer network, such as the Internet, showing an example of selection and / or utilization means for locating valid PCs in a network so that the networks are located closest to each other for shared processing. It is a simplified diagram.

FIG. 9 is a simplified diagram of a section of a computer network, such as the Internet, showing an embodiment of a system architecture for processing a request imitated by a PC for a search using parallel processing means utilizing multiple networked PCs. Is.

FIG. 10A: Separates a portion of a networked PC (including a system downsized to microchip in size) accessible to the network for shared processing from a portion that remains accessible only to PC users. 1 illustrates an example of a system architecture that utilizes a firewall to do so that each PC in the network plays either a master or slave role in shared processing operations involving one or more slave PCs in the network. FIG. 2 shows an alternative role and shows a home or business network system that can be configured as the Internet, and also shows PCs and PC microchips controlled by controllers (including remote) with or without limited processing power, In addition, the PC user may 1 is a simplified diagram of a section of a computer network, such as the Internet, showing a PC and PC microchip with which the firewall 50 may be reconfigured.

FIG. 10B: Separates the portion of the networked PC (including systems downsized to microchip in size) accessible to the network for shared processing from the portion that remains accessible only to PC users. 1 illustrates an example of a system architecture that utilizes a firewall to do so that each PC in the network plays either a master or slave role in shared processing operations involving one or more slave PCs in the network. FIG. 2 shows an alternative role and shows a home or business network system that can be configured as the Internet, and also shows PCs and PC microchips controlled by controllers (including remote) with or without limited processing power, In addition, the PC user may 1 is a simplified diagram of a section of a computer network, such as the Internet, showing a PC and PC microchip with which the firewall 50 may be reconfigured.

FIG. 10C decouples the portion of the networked PC (including systems downsized to microchip in size) accessible to the network for shared processing from the portion that remains accessible only to PC users. 1 illustrates an example of a system architecture that utilizes a firewall to do so that each PC in the network plays either a master or slave role in shared processing operations involving one or more slave PCs in the network. FIG. 2 shows an alternative role and shows a home or business network system that can be configured as the Internet, and shows PCs and PC microchips controlled by controllers (including remote) with or without limited processing power, In addition, the PC user may 1 is a simplified diagram of a section of a computer network, such as the Internet, showing a PC and PC microchip with which the firewall 50 may be reconfigured.

FIG. 10D decouples the portion of the networked PC (including systems downsized to microchip in size) accessible to the network for shared processing from the portion that remains accessible only to PC users. 1 illustrates an example of a system architecture that utilizes a firewall to do so that each PC in the network plays either a master or slave role in shared processing operations involving one or more slave PCs in the network. FIG. 2 shows an alternative role and shows a home or business network system that can be configured as the Internet, and also shows PCs and PC microchips controlled by controllers (including remote) with or without limited processing power, In addition, the PC user may 1 is a simplified diagram of a section of a computer network, such as the Internet, showing a PC and PC microchip with which the firewall 50 may be reconfigured.

FIG. 10E: Separates the portion of a networked PC (including systems downsized to microchip in size) accessible to the network for shared processing from the portion that remains accessible only to PC users. 1 illustrates an example of a system architecture that utilizes a firewall to do so that each PC in the network plays either a master or slave role in shared processing operations involving one or more slave PCs in the network. FIG. 2 shows an alternative role and shows a home or business network system that can be configured as the Internet, and shows PCs and PC microchips controlled by controllers (including remote) with or without limited processing power, In addition, the PC user may 1 is a simplified diagram of a section of a computer network, such as the Internet, showing a PC and PC microchip with which the firewall 50 may be reconfigured.

FIG. 10F separates the portion of the networked PC (including systems downsized to microchip in size) accessible to the network for shared processing from the portion that remains accessible only to PC users. 1 illustrates an example of a system architecture that utilizes a firewall to do so that each PC in the network plays either a master or slave role in shared processing operations involving one or more slave PCs in the network. FIG. 2 shows an alternative role and shows a home or business network system that can be configured as the Internet, and also shows PCs and PC microchips controlled by controllers (including remote) with or without limited processing power, In addition, the PC user may 1 is a simplified diagram of a section of a computer network, such as the Internet, showing a PC and PC microchip with which the firewall 50 may be reconfigured.

FIG. 10G separates the portion of the networked PC (including systems sized microchip down) accessible to the network for shared processing from the portion that remains accessible only to PC users. 1 illustrates an example of a system architecture that utilizes a firewall to do so that each PC in the network plays either a master or slave role in shared processing operations involving one or more slave PCs in the network. FIG. 2 shows an alternative role and shows a home or business network system that can be configured as the Internet, and also shows PCs and PC microchips controlled by controllers (including remote) with or without limited processing power, In addition, the PC user may 1 is a simplified diagram of a section of a computer network, such as the Internet, showing a PC and PC microchip with which the firewall 50 may be reconfigured.

FIG. 10H: Separates portions of a networked PC (including systems downsized to microchip in size) accessible to the network for shared processing from portions that are kept accessible only to PC users. 1 illustrates an example of a system architecture that utilizes a firewall to do so that each PC in the network plays either a master or slave role in shared processing operations involving one or more slave PCs in the network. FIG. 2 shows an alternative role and shows a home or business network system that can be configured as the Internet, and also shows PCs and PC microchips controlled by controllers (including remote) with or without limited processing power, In addition, the PC user may 1 is a simplified diagram of a section of a computer network, such as the Internet, showing a PC and PC microchip with which the firewall 50 may be reconfigured.

FIG. 10I: Separating the portion of a networked PC (including systems downsized to microchip in size) accessible to the network for shared processing from the portion that remains accessible only to PC users. 1 illustrates an example of a system architecture that utilizes a firewall to do so that each PC in the network plays either a master or slave role in shared processing operations involving one or more slave PCs in the network. FIG. 2 shows an alternative role and shows a home or business network system that can be configured as the Internet, and also shows PCs and PC microchips controlled by controllers (including remote) with or without limited processing power, In addition, the PC user may 1 is a simplified diagram of a section of a computer network, such as the Internet, showing a PC and PC microchip with which the firewall 50 may be reconfigured.

FIG. 11 is a simplified diagram of a section of a computer network, such as the Internet, showing an example of a system architecture for interconnecting a cluster of PCs by wireless means to create the closest possible (and thus fastest) connection. is there.

FIG. 12 is a simplified diagram of a section of a computer network, such as the Internet, showing an example of a system architecture for connecting a PC to a satellite by wireless means.

FIG. 13 is a simplified diagram of a section of a computer network, such as the Internet, showing an example of a system architecture that provides full interconnectivity to a cluster of networked PCs by wireless means.

FIG. 14A illustrates an embodiment of a transponder means by which a PC can identify one or more of the closest valid PCs in a network cluster and designate it for shared processing by wireless means, a computer network such as the Internet. FIG.

FIG. 14B   1 shows a wirelessly connected cluster.

FIG. 14C shows a wireless cluster with transponders and network hardwired connections to the Internet.

FIG. 14D illustrates a network client / server wired system with transponders.

FIG. 15: It is possible to route PC requests for shared processing to another area of the network that has one or more idle PCs active in the network, preferably using wide bandwidth connections. FIG. 6 is a simplified diagram of a section of a computer network, such as the Internet, showing an example of possible route selection means.

FIG. 16A illustrates a new hierarchical network architecture for personal computers and / or microprocessors based on parallel processing or multitasking subdivision through several levels down to the processing level.

FIG. 16B shows a new hierarchical network architecture for personal computers and / or microprocessors based on parallel processing or multitasking subdivision through several levels down to the processing level.

FIG. 16C illustrates a new hierarchical network architecture for personal computers and / or microprocessors based on parallel processing or multitasking subdivision through several levels down to the processing level.

FIG. 16D shows a new hierarchical network architecture for personal computers and / or microprocessors based on parallel processing or multitasking subdivision through several levels down to the processing level.

FIG. 16E illustrates a new hierarchical network architecture for personal computers and / or microprocessors based on parallel processing or multitasking subdivision through several levels down to the processing level.

FIG. 16F shows a new hierarchical network architecture for personal computers and / or microprocessors based on parallel processing or multitasking subdivision through several levels down to the processing level.

FIG. 16G shows a new hierarchical network architecture for personal computers and / or microprocessors based on parallel processing or multitasking subdivision through several levels down to the processing level.

FIG. 16H illustrates a new hierarchical network architecture for personal computers and / or microprocessors based on parallel processing or multitasking subdivision through several levels down to the processing level.

FIG. 16I illustrates a new hierarchical network architecture for personal computers and / or microprocessors based on parallel processing or multitasking subdivision through several levels down to the processing level.

FIG. 16J illustrates a new hierarchical network architecture for personal computers and / or microprocessors based on parallel processing or multitasking subdivision through several levels down to the processing level.

FIG. 16K illustrates a new hierarchical network architecture for personal computers and / or microprocessors based on parallel processing or multitasking subdivision through several levels down to the processing level.

FIG. 16L illustrates a new hierarchical network architecture for personal computers and / or microprocessors based on parallel processing or multitasking subdivision through several levels down to the processing level.

FIG. 16M illustrates a new hierarchical network architecture for personal computers and / or microprocessors based on parallel processing or multitasking subdivision through several levels down to the processing level.

FIG. 16N illustrates a new hierarchical network architecture for personal computers and / or microprocessors based on parallel processing or multitasking subdivision through several levels down to the processing level.

FIG. 16O shows a new hierarchical network architecture for personal computers and / or microprocessors based on parallel processing or multitasking subdivision through several levels down to the processing level.

FIG. 16P shows a new hierarchical network architecture for personal computers and / or microprocessors based on parallel processing or multitasking subdivision through several levels down to the processing level.

FIG. 16Q illustrates a novel hierarchical network architecture for personal computers and / or microprocessors based on parallel processing or multitasking subdivision through several levels down to the processing level.

FIG. 16R illustrates a new hierarchical network architecture for personal computers and / or microprocessors based on parallel processing or multitasking subdivision through several levels down to the processing level.

FIG. 16S shows a new hierarchical network architecture for personal computers and / or microprocessors based on parallel processing or multitasking subdivision through several levels down to the processing level.

FIG. 16T illustrates a new hierarchical network architecture for personal computers and / or microprocessors based on parallel processing or multitasking subdivision through several levels down to the processing level.

FIG. 16U shows a new hierarchical network architecture for personal computers and / or microprocessors based on parallel processing or multitasking subdivision through several levels down to the processing level.

FIG. 16V shows a new hierarchical network architecture for personal computers and / or microprocessors based on parallel processing or multitasking subdivision through several levels down to the processing level.

FIG. 16W illustrates a new hierarchical network architecture for personal computers and / or microprocessors based on parallel processing or multitasking subdivision through several levels down to the processing level.

FIG. 16X shows a new hierarchical network architecture for personal computers and / or microprocessors based on parallel processing or multitasking subdivision through several levels down to the processing level.

FIG. 16Y illustrates a new hierarchical network architecture for personal computers and / or microprocessors based on parallel processing or multitasking subdivision through several levels down to the processing level.

FIG. 16Z shows a new hierarchical network architecture for personal computers and / or microprocessors based on parallel processing or multitasking subdivision through several levels down to the processing level.

FIG. 16AA shows a novel hierarchical network architecture for personal computers and / or microprocessors based on parallel processing or multitasking subdivision through several levels down to the processing level.

FIG. 17A is an Internet user (and / or other user sharing a use) of one or more slave personal computers PC1 or microprocessors 40;
FIG. 5 shows a firewall 50 with dual functionality that includes protecting the I / O from unauthorized monitoring or intervention by owners / operators of these slave processors.

FIG. 17B: Internet users (and / or other users sharing usage) of one or more slave personal computers PC1 or microprocessors 40.
FIG. 5 shows a firewall 50 with dual functionality that includes protecting the I / O from unauthorized monitoring or intervention by owners / operators of these slave processors.

FIG. 17C is an Internet user (and / or other user sharing usage) of one or more slave personal computers PC1 or microprocessors 40;
FIG. 5 shows a firewall 50 with dual functionality that includes protecting the I / O from unauthorized monitoring or intervention by owners / operators of these slave processors.

FIG. 17D is an Internet user (and / or other user sharing usage) of one or more slave personal computers PC1 or microprocessors 40;
FIG. 5 shows a firewall 50 with dual functionality that includes protecting the I / O from unauthorized monitoring or intervention by owners / operators of these slave processors.

FIG. 18A shows a design for one or more virtual quantum computers integrated in one or more digital computers.

FIG. 18B shows a design for one or more virtual quantum computers integrated in one or more digital computers.

FIG. 18C shows a design for one or more virtual quantum computers integrated in one or more digital computers.

FIG. 18D illustrates a design for one or more virtual quantum computers integrated in one or more digital computers.

FIG. 19 illustrates a special adaptation that enables an idle vehicle computer to be powered and connected to the Internet (or other net) for parallel or multitasking processing.

FIG. 20A illustrates separate high bandwidth outputs such as fiberglass-like optical connections from each microprocessor 40 or 90.

FIG. 20B illustrates separate high bandwidth outputs such as fiberglass-like optical connections from each microprocessor 40 or 90.

─────────────────────────────────────────────────── ─── Continued front page    (31) Priority claim number 09 / 085,755 (32) Priority date May 27, 1998 (May 27, 1998) (33) Priority claiming countries United States (US) (31) Priority claim number 60 / 086,948 (32) Priority date May 27, 1998 (May 27, 1998) (33) Priority claiming countries United States (US) (31) Priority claim number 60 / 087,587 (32) Priority date June 1, 1998 (June 1998) (33) Priority claiming countries United States (US) (31) Priority claim number 60 / 088,459 (32) Priority date June 8, 1998 (June 8, 1998) (33) Priority claiming countries United States (US) (31) Priority claim number 09 / 213,875 (32) Priority date December 17, 1998 (December 17, 1998) (33) Priority claiming countries United States (US) (31) Priority claim number US9827058 (32) Priority date December 17, 1998 (December 17, 1998) (33) Priority claiming countries United States (US) (31) Priority claim number 60 / 134,552 (32) Priority date May 17, 1999 (May 17, 1999) (33) Priority claiming countries United States (US) (81) Designated countries EP (AT, BE, CH, CY, DE, DK, ES, FI, FR, GB, GR, IE, I T, LU, MC, NL, PT, SE), OA (BF, BJ , CF, CG, CI, CM, GA, GN, GW, ML, MR, NE, SN, TD, TG), AP (GH, GM, K E, LS, MW, SD, SL, SZ, UG, ZW), E A (AM, AZ, BY, KG, KZ, MD, RU, TJ , TM), AE, AL, AM, AT, AU, AZ, BA , BB, BG, BR, BY, CA, CH, CN, CU, CZ, DE, DK, EE, ES, FI, GB, GD, G E, GH, GM, HR, HU, ID, IL, IN, IS , JP, KE, KG, KP, KR, KZ, LC, LK, LR, LS, LT, LU, LV, MD, MG, MK, M N, MW, MX, NO, NZ, PL, PT, RO, RU , SD, SE, SG, SI, SK, SL, TJ, TM, TR, TT, UA, UG, US, UZ, VN, YU, Z A, ZW [Continued summary] Network owners preferably network for parallel processing Brings microprocessor processing power to parallel, and others Network Microprocessor Sharing for Processing Regarding the business structure that enables use, in this case, the owner And the basis of exchange between providers is regular usage of internet Laws and regulations including payment by electric power supply for physical measurement and processing Or all the terms that the parties agree to in accordance with the rules It

Claims (40)

[Claims] 1. A system for a network of computers, providing at least two personal computers, network services provided to said at least two personal computers in said network, and shared computer processing, including parallel processing. Means for: at least one of said at least two personal computers, when idled, made available temporarily to provide said shared computer processing to said network A computer processing operation that temporarily functions as a master personal computer to share with at least another of the at least two personal computers in the network when instructed by a corresponding personal user. Means for initiating and controlling execution of at least one of said at least two personal computers, and a shared computer controlled by said master personal computer to temporarily act as at least one slave personal computer when idle Means for said at least one of said at least two personal computers made available to participate in the execution of processing operations, and alternately as master and slave in said shared computer processing operations when instructed Means for said at least two personal computers in operation, each of said at least one slave personal computer from another slave personal computer at a lower processing level. A system that integrates or passes the results that are sent. 2. The system of claim 1, further comprising means for subdividing the shared computer processing operation into a plurality of portions for transmission to a slave personal computer. 3. The system of claim 2, wherein at least one of the at least two personal computers includes a plurality of microprocessors. 4. The system of claim 3, wherein the microprocessor is on a single chip. 5. A system for computer networks, the network comprising at least two personal computers and shared computer processing, including browsing functionality and parallel processing, provided to the at least two personal computers in the network. Means for providing services, said at least two being made temporarily available for providing said shared computing service to said network when idled
Means for at least one of the two personal computers, a monitor configured to monitor the provision of the network service to each of the at least two personal computers on a net basis, the at least two personal computers or Means for maintaining a standard cost base for the provision of the network service to each of the personal users, and, when instructed by the corresponding personal user, to temporarily function as a master personal computer to provide at least two Means for initiating and controlling execution of computer processing operations shared with at least one of the personal computers for at least one of the at least two personal computers; and an idle state Of the at least two personal computers that temporarily function as at least one slave personal computer and are available to participate in performing shared computer processing operations controlled by the master personal computer. A means for the at least two other personal computers alternately functioning as a master and a slave in the shared computer processing operation; and at least two microprocessors, At least one of said computers having a connection to a network of computers and one of the hardware, software, firmware and other components of said at least two personal computers A firewall for the at least two personal computers that restricts access by the network to only one minute, the firewall functioning as a master microprocessor and at least means for functioning as a slave microprocessor. Access by the network to at least one of the microprocessors is disallowed and means for initiating and controlling execution of computer processing operations shared with the one microprocessor, and wherein the firewall is the slave microprocessor To the network via the network, each of the at least one slave personal computer from another slave personal computer having a lower processing level. A system that integrates or passes the results that are sent. 6. The system of claim 5, further comprising means for the master personal computer to subdivide the shared computer processing operation into a plurality of parts for delivery to a slave personal computer. 7. The system of claim 6, wherein at least one of the at least two personal computers includes a plurality of microprocessors. 8. The system of claim 7, wherein the microprocessor is on a single chip. 9. A system for a network of at least two processors, the shared computer comprising: said at least two processors; network services provided to said at least two processors in said network; and parallel processing. Means for providing processing, means for at least one of the at least two processors temporarily made available to provide the shared computer processing to the network when idled, Sometimes at least one of the at least two processors temporarily functions as a master processor to initiate and control execution of computer processing operations shared with at least another of the at least two processors in the network. Was Means for temporarily acting as at least one slave processor when idled and available for participating in the execution of shared computing operations controlled by the master processor. Means for at least one of the processors; and means for the at least two processors that, when commanded, alternately function as a master and a slave in the shared computing operation.
A system in which each of the at least one slave processor integrates or passes results sent from another slave processor of a lower processing level. 10. The system of claim 9, further comprising means for said master processor to subdivide said shared computer processing operation into a plurality of parts for delivery to a processor. 11. The system of claim 10, wherein at least one of the at least two processors comprises a plurality of microprocessors. 12. The system of claim 11, wherein the microprocessor is on a single chip. 13. The system of claim 9, wherein each of the at least two processors includes a corresponding memory. 14. The system of claim 13, wherein each of the corresponding memories is one of volatile memory and non-volatile memory. 15. A system for a network of computers, comprising: at least two personal computers, at least one of which comprises a PC microprocessor having a slave microprocessor, in said network. A network service including a browsing function and a shared computer process including parallel processing provided to the at least two personal computers, and temporarily providing the shared computer process to the network when idle. Means for at least one of said at least two personal computers made available to perform said network to each of said at least two personal computers. A monitor configured to monitor the provision of network services on a net basis, means for maintaining a standard cost base for the provision of the network services to each of the at least two personal computers or personal users, and the corresponding personal users. Commanded by the at least two personal computers to temporarily act as a master personal computer to initiate and control execution of computer processing operations shared with at least another of the at least two personal computers in the network. Means for at least one of the computers and a shared co-processor controlled by said master processor to temporarily act as at least one slave personal computer when idled; Means for said at least another one of said at least two personal computers made available to participate in the performance of a computer processing operation, and as a master and a slave in said shared computer processing operation when commanded Means for said at least two processors working in alternation, said at least restricting access by said network to only a portion of the hardware, software, firmware and other components of said at least two personal computers A firewall for two personal computers, the firewall means having at least means for functioning as a master microprocessor and as a slave microprocessor. Access by the network to the at least one microprocessor having means for initiating and controlling execution of computer processing operations shared with the other microprocessor is not allowed, and the firewall is to the slave microprocessor. A system for allowing access by the network, wherein each of the at least one slave personal computer integrates or passes results from another slave personal computer of a lower processing level. 16. The system of claim 15, further comprising means for the master personal computer to subdivide the shared computer processing operation into a plurality of parts for delivery to a slave personal computer. 17. The system of claim 16, wherein at least one of the at least two personal computers includes multiple microprocessors. 18. The system of claim 17, wherein the microprocessor is on a single chip. 19. The system of claim 15, wherein the firewall is implemented with non-configurable hardware at the microchip level. 20. A system for a network of at least two processors, the shared computer comprising: said at least two processors; network services provided to said at least two processors in said network; and parallel processing. Means for providing processing, means for at least one of said at least two processors which, when idle, are made temporarily available to provide said shared computer processing to said network; At least one of the at least two processors that temporarily functions as a master processor to initiate and control execution of computer processing operations shared with at least another of the at least two processors in the network. One Means for, when idled, said at least two temporarily acting as at least one slave processor and available for participating in the execution of shared computing operations controlled by said master processor. Means for at least one of the two processors; means for the at least two processors that, when commanded, alternately function as a master and a slave in the shared computing operation;
A system in which at least one of the at least two slave processors is located in a vehicle and connected to the network. 21. Providing network services and shared computer processing, including parallel processing, to the at least two personal computers in the network; and at least one of the at least two processors when idle. Making the network available for providing the shared computer processing, and causing at least one of the at least two personal computers to temporarily function as a master personal computer when instructed by a corresponding personal user. Initiating and controlling execution of computer processing operations shared with at least one of the at least two personal computers in the network; Enabling at least the other of the at least two personal computers to temporarily function as at least one slave personal computer to participate in performing shared computing operations controlled by the master personal computer; Instructing the at least two personal computers to alternately function as a master and a slave in the shared computer processing operation, each of the at least one slave personal computer having a lower processing level of another one. A method of consolidating or passing the results from two slave personal computers. 22. The method of claim 21, further comprising the master personal computer subdividing the shared computer processing operation into a plurality of portions to send to a slave personal computer. 23. The method of claim 22, wherein at least one of the at least two personal computers comprises a plurality of microprocessors. 24. The method of claim 23, wherein the microprocessor is on a single chip. 25. Providing at least two personal computers in a network with shared computer processing including network services including browsing functionality and parallel processing; and at least one of said at least two personal computers when idle. One of the at least two personal computers is provided for providing the shared computing process to the network, and the provision of the network service to each of the at least two personal computers is monitored on a net basis; Maintaining a standard cost base for providing the network service to each of the personal computers or personal users, and when instructed by the corresponding personal user, Causing at least one of the at least two personal computers to temporarily function as a master personal computer to initiate execution of computer processing operations shared with at least another of the at least two personal computers in the network; And controlling by the master processor to cause the at least another one of the at least two personal computers to function as at least one slave personal computer when idled. Making the at least two personal computers masterable in the shared computing operation when instructed to participate in performing the shared computing operation. Alternately functioning as a slave and a slave, and limiting access by the network to only a portion of the hardware, software, firmware, and other components of the at least two personal computers. A restriction does not allow access by the network to at least one of the microprocessors, the restriction allows access by the network to at least another of the microprocessors, and each of the at least one slave personal computer Allows the results sent from another slave personal computer of lower processing level to be integrated or passed. 26. The method of claim 25, further comprising the master personal computer subdividing the shared computer processing operation into a plurality of portions to send to a slave personal computer. 27. The method of claim 26, wherein at least one of the at least two personal computers comprises a plurality of microprocessors. 28. The method of claim 27, wherein the microprocessor is on a single chip. 29. Providing at least two processors in a network with shared computer processing, including network services and parallel processing; and, when idle, at least one of said at least two processors to said network. Making it available to provide shared computing, and, when instructed, causing at least one of the at least two processors to temporarily function as a master processor. Making it available for initiating and controlling execution of computer processing operations shared with at least another of the processors; and said at least another of said at least two processors when idle. With less Making the at least two personal computers function as one slave processor and available to participate in the execution of shared computing operations controlled by the master processor; Alternately functioning as a master and as a slave, wherein each of said at least one slave processor integrates or passes the results sent from another slave processor of a lower processing level. 30. The method of claim 29, further comprising the master personal computer subdividing the shared computer processing operation into a plurality of portions to send to a slave personal computer. 31. The method of claim 30, wherein at least one of the at least two personal computers comprises a plurality of microprocessors. 32. The method of claim 31, wherein the microprocessor is on a single chip. 33. The method of claim 29, wherein each of the at least two processors includes a corresponding memory. 34. The method of claim 33, wherein each of the corresponding memories is one of volatile memory and non-volatile memory. 35. Providing at least two personal computers in a network with network services including browsing functionality and shared computer processing including parallel processing, wherein at least one of the at least two personal computers is a slave. P with microprocessor
Including a C microprocessor; making at least one of the at least two personal computers available to provide the shared computing to the network when idle; Net-based monitoring of the provision of the network service to each of the two personal computers; maintaining a standard cost base for the provision of the network service to each of the at least two personal computers or personal users; At least one of the at least two personal computers to temporarily function as a master personal computer when instructed by the personal user Making it available for initiating and controlling execution of computer processing operations shared with at least one of the at least two personal computers; and in the at least two personal computers when idled. Of the at least one of the at least one of the at least one of the at least two slave processors to function as at least one slave processor to participate in performing a shared computing operation controlled by the master personal computer; Alternately operating two personal computers as masters and slaves in the shared computer processing operation, and accessing the at least two personal computers by the network. Limiting only at least a portion of the hardware, software, firmware, and other components of the two personal computers, said limiting providing access to at least one of said microprocessors by said network. Disallowing, the restriction permits access to the slave microprocessor by the network, and each of the at least one slave personal computer integrates or passes results sent from another slave personal computer of a lower processing level. How to let. 36. The method of claim 35, further comprising the master personal computer subdividing the shared computer processing operation into a plurality of portions to send to a slave personal computer. 37. The method of claim 36, wherein at least one of the at least two personal computers comprises a plurality of microprocessors. 38. The method of claim 37, wherein the microprocessor is on a single chip. 39. The method of claim 35, wherein the restriction is implemented by non-configurable hardware at the microchip level. 40. Providing at least two processors in a network with shared computer processing, including network services and parallel processing; and, when idle, at least one of the at least two personal computers. Making the network available to provide the shared computer processing, and, when instructed, causing at least one of the at least two processors to temporarily function as a master processor. Making it available for initiating and controlling execution of computer processing operations shared with at least one of the at least two processors; and, when idle, the at least one of the at least two processors. Also Activating one of the at least one slave processors to participate in performing a shared computing operation controlled by the master processor; and, when instructed, to cause the at least two processors to Alternately functioning as a master and a slave in a shared computer processing operation, wherein at least one of the at least two processors is located in a vehicle and connected to the network.