JP2003347722A - Multilayer electronic parts mounting substrate and its fabricating method - Google Patents

Multilayer electronic parts mounting substrate and its fabricating method

Info

Publication number
JP2003347722A
JP2003347722A JP2002149660A JP2002149660A JP2003347722A JP 2003347722 A JP2003347722 A JP 2003347722A JP 2002149660 A JP2002149660 A JP 2002149660A JP 2002149660 A JP2002149660 A JP 2002149660A JP 2003347722 A JP2003347722 A JP 2003347722A
Authority
JP
Japan
Prior art keywords
substrates
substrate
electronic component
resin
multilayer electronic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2002149660A
Other languages
Japanese (ja)
Inventor
Terumasa Ninomaru
輝正 二の丸
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ibiden Co Ltd
Original Assignee
Ibiden Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibiden Co Ltd filed Critical Ibiden Co Ltd
Priority to JP2002149660A priority Critical patent/JP2003347722A/en
Publication of JP2003347722A publication Critical patent/JP2003347722A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1517Multilayer substrate
    • H01L2924/15192Resurf arrangement of the internal vias
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1532Connection portion the connection portion being formed on the die mounting surface of the substrate
    • H01L2924/15321Connection portion the connection portion being formed on the die mounting surface of the substrate being a ball array, e.g. BGA
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1532Connection portion the connection portion being formed on the die mounting surface of the substrate
    • H01L2924/1533Connection portion the connection portion being formed on the die mounting surface of the substrate the connection portion being formed both on the die mounting surface of the substrate and outside the die mounting surface of the substrate

Landscapes

  • Combinations Of Printed Boards (AREA)
  • Non-Metallic Protective Coatings For Printed Circuits (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a multilayer electronic parts mounting substrate with high reliability in electrical connection between the substrates. <P>SOLUTION: A fabricating method of a multilayer electronic parts mounting substrate having at least two substrates 11 to 15 and arranged with the electronic parts 3 between both of the substrates, comprises a process where a plurality of the substrates 11 to 15 are prepared in which conductor circuits 4 are provided on insulation substrates 5, and a process where substrates 12 to 15 are mounted with the electronic parts 3 to be arranged between the substrates 12 to 15 when laminating the substrates. A plurality of the substrates 11 to 15 are laminated and then the electronic parts are arranged between the substrates 11 to 15 and each of conductor circuits 4 provided on the substrates 11 to 15 that are adjacent to one another are mutually connected electrically by solder balls 2 serving as connecting terminals and thereafter the gaps between the substrates are sealed with resin 6. <P>COPYRIGHT: (C)2004,JPO

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【技術分野】本発明は,基板間に電子部品を収容した多
層電子部品搭載用基板及びその製造方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a substrate for mounting a multilayer electronic component in which electronic components are accommodated between substrates, and a method for manufacturing the same.

【0002】[0002]

【従来技術】従来,多層電子部品搭載用基板としては,
図10に示すごとく,上基板91と下基板92との間に
電子部品93を搭載し樹脂94により封止したものがあ
る。上基板91と下基板92との間は半田ボール95に
より電気的に接続されている。電子部品93はフリップ
チップ型であり,下基板92の上に搭載されている。
2. Description of the Related Art Conventionally, as a substrate for mounting multilayer electronic components,
As shown in FIG. 10, an electronic component 93 is mounted between an upper substrate 91 and a lower substrate 92 and sealed with a resin 94. The upper substrate 91 and the lower substrate 92 are electrically connected by solder balls 95. The electronic component 93 is a flip chip type and is mounted on the lower substrate 92.

【0003】上記多層電子部品搭載用基板を製造するに
当っては,図11に示すごとく,絶縁基板905に導体
回路900を形成し,これを上基板91とする。
In manufacturing the above-mentioned substrate for mounting a multilayer electronic component, a conductor circuit 900 is formed on an insulating substrate 905 as shown in FIG.

【0004】また,他の絶縁基板906に導体回路90
2を形成し,これを下基板92とする。上面の導体回路
902には,電子部品93を半田904にて接合する。
また,基板周縁部の導体回路902には,半田ボール9
5を接合する。次いで,電子部品93及び上面の導体回
路902を樹脂94により封止する。
A conductor circuit 90 is provided on another insulating substrate 906.
2 is formed and used as a lower substrate 92. The electronic component 93 is joined to the conductor circuit 902 on the upper surface by solder 904.
The conductor circuit 902 on the periphery of the substrate includes solder balls 9
5 are joined. Next, the electronic component 93 and the conductor circuit 902 on the upper surface are sealed with the resin 94.

【0005】その後,下基板92の上に上基板91を積
層し,加熱圧着する。このとき,下基板92に接合した
半田ボール95を,上基板91の導体回路900に接合
する。以上により,図10に示す多層電子部品搭載用基
板96を得る。
[0005] Thereafter, the upper substrate 91 is laminated on the lower substrate 92 and heat-pressed. At this time, the solder balls 95 joined to the lower substrate 92 are joined to the conductor circuit 900 of the upper substrate 91. Thus, the multilayer electronic component mounting board 96 shown in FIG. 10 is obtained.

【0006】[0006]

【解決しようとする課題】しかしながら,上記従来の多
層電子部品搭載用基板の製造方法においては,上基板9
1と下基板92とを積層する前に,電子部品93を樹脂
94により封止している。このため,下基板92の半田
ボール95が,樹脂94により被覆されてしまい,上基
板91の導体回路900と接合しない場合があり,上基
板91と下基板92との間に電気接続不良が発生する場
合がある。
However, in the above-mentioned conventional method for manufacturing a substrate for mounting a multilayer electronic component, the upper substrate 9 is not provided.
Before laminating the substrate 1 and the lower substrate 92, the electronic component 93 is sealed with a resin 94. Therefore, the solder balls 95 of the lower substrate 92 may be covered with the resin 94 and may not be joined to the conductor circuit 900 of the upper substrate 91, and an electrical connection failure may occur between the upper substrate 91 and the lower substrate 92. May be.

【0007】本発明はかかる従来の問題点に鑑み,基板
間の電気的接続信頼性が高い多層電子部品搭載用基板及
びその製造方法を提供しようとするものである。
SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and has as its object to provide a substrate for mounting a multilayer electronic component having high reliability of electrical connection between the substrates and a method of manufacturing the same.

【0008】[0008]

【課題の解決手段】第一発明は,少なくとも2つの基板
からなり,両基板間に電子部品を配置している多層電子
部品搭載用基板の製造方法において,絶縁基板に導体回
路を設けてなる基板を複数準備する工程と,上記基板
に,積層時に基板間に配置されるべき電子部品を搭載す
る工程とを行い,次いで,上記複数の基板を積層して,
上記電子部品を上記基板間に配置するとともに,隣合う
上記基板に設けた上記導体回路同士の間を接続端子によ
り電気的に接続し,その後上記基板間の間隙を樹脂によ
り封止することを特徴とする多層電子部品搭載基板の製
造方法である(請求項1)。
A first invention relates to a method for manufacturing a multilayer electronic component mounting substrate comprising at least two substrates, wherein electronic components are arranged between the two substrates. And a step of mounting electronic components to be arranged between the substrates upon lamination on the substrate, and then laminating the substrates,
The electronic component is disposed between the substrates, the conductor circuits provided on the adjacent substrates are electrically connected to each other by connection terminals, and then the gap between the substrates is sealed with a resin. (Claim 1).

【0009】第一発明において,複数の基板を積層し隣
合う基板の導体回路同士を接続端子により電気的に接続
した後に,基板間の間隙を樹脂封止している。このた
め,隣合う基板の導体回路は,樹脂により邪魔されるこ
となく,接続端子によって確実に接続する。
In the first invention, after a plurality of substrates are stacked and conductive circuits of adjacent substrates are electrically connected to each other by connection terminals, a gap between the substrates is sealed with a resin. For this reason, the conductor circuits of the adjacent boards are reliably connected by the connection terminals without being disturbed by the resin.

【0010】第二の発明は,導体回路を有する基板を少
なくとも2つ積層して,両基板間に電子部品を配置して
いる多層電子部品搭載用基板であって,隣合う上記基板
に設けた上記導体回路同士の間は接続端子により電気的
に接続されており,上記基板間の間隙は樹脂により封止
されており,かつ上記基板間の間隔の高さは10~15
0μmであることを特徴とする多層電子部品搭載基板で
ある(請求項6)。
A second invention is a multilayer electronic component mounting board in which at least two boards each having a conductor circuit are laminated and electronic components are arranged between the two boards, and is provided on the adjacent board. The conductor circuits are electrically connected to each other by connection terminals, the gap between the substrates is sealed with resin, and the height of the interval between the substrates is 10 to 15
It is a multilayer electronic component mounting substrate characterized by having a thickness of 0 μm.

【0011】第二発明において,基板間の間隙が上記の
ごとく狭いため,この間に樹脂を封止するときに,毛細
管現象が生じ易い。このため,樹脂封止を容易に行うこ
とができる。
In the second aspect, since the gap between the substrates is narrow as described above, a capillary phenomenon is likely to occur when the resin is sealed during the gap. Therefore, resin sealing can be easily performed.

【0012】第三の発明は,導体回路を有する基板を少
なくとも2つ積層して,両基板間に電子部品を配置して
いる多層電子部品搭載用基板であって,隣合う上記基板
に設けた上記導体回路同士の間は接続端子により電気的
に接続されており,上記基板間の間隙は樹脂により封止
されており,かつ上記電子部品の上記基板表面からの突
出量は150μm以下であることを特徴とする多層電子
部品搭載基板である(請求項7)。
A third aspect of the present invention is a multilayer electronic component mounting board in which at least two boards having conductive circuits are stacked and electronic components are arranged between the two boards. The conductor circuits are electrically connected to each other by connection terminals, the gap between the substrates is sealed with a resin, and the protruding amount of the electronic component from the substrate surface is 150 μm or less. A multilayer electronic component mounting board characterized by the following (claim 7).

【0013】第三発明において,電子部品の基板表面か
らの突出量は上記のごとく低いため,基板間の間隙を狭
くして,樹脂の毛細管現象を生じさせることができる。
したがって,両基板間に樹脂を容易に封止することがで
きる。
In the third aspect of the present invention, since the amount of protrusion of the electronic component from the substrate surface is low as described above, the gap between the substrates can be narrowed to cause a capillary phenomenon of the resin.
Therefore, the resin can be easily sealed between the two substrates.

【0014】[0014]

【発明の実施の形態】第一発明において,基板に設けら
れている導体回路は,接続端子を接合するための接合部
位を有する。これらの接合部位は,パッド,スルーホー
ルなどである。
DESCRIPTION OF THE PREFERRED EMBODIMENTS In the first invention, a conductor circuit provided on a substrate has a joint portion for joining a connection terminal. These joints are pads, through holes, and the like.

【0015】接続端子は,半田ボール,ピンなどがあ
る。たとえば,接続端子が半田ボールの場合には,導体
回路の接合部位はパッドである。接続端子がピンの場合
には,上記接合部位はスルーホール内壁である。
The connection terminals include solder balls and pins. For example, when the connection terminal is a solder ball, the bonding portion of the conductor circuit is a pad. When the connection terminal is a pin, the joint is the inner wall of the through hole.

【0016】積層時に隣合う基板は,少なくとも一方
に,基板間に収容されるべき電子部品を搭載している。
基板間の間隙を樹脂により封止するにあたっては,両基
板間に配置された電子部品及び導体回路が外気から遮断
されるように,両基板間に樹脂を充填する。例えば,両
基板間の間隙全体に樹脂を充填するか,基板間の間隙の
全周縁部を樹脂により囲む。後者の基板間の間隙の全周
縁部を樹脂により囲む場合,少なくとも上記接続端子が
埋まる程度まで樹脂を充填することが好ましい。樹脂に
よる囲み幅が薄いと,湿気遮断効果が薄れ,電子部品を
湿気から保護することができなくなるおそれがあるから
である。
At least one of the substrates adjacent at the time of lamination has an electronic component to be accommodated between the substrates.
In sealing the gap between the substrates with the resin, the resin is filled between the two substrates so that the electronic components and the conductor circuits disposed between the two substrates are shielded from the outside air. For example, the entire gap between the two substrates is filled with resin, or the entire periphery of the gap between the substrates is surrounded by resin. In the latter case, when the entire periphery of the gap between the substrates is surrounded by the resin, it is preferable that the resin is filled at least to such an extent that the connection terminals are filled. This is because if the enclosing width of the resin is small, the effect of blocking moisture is weakened, and the electronic component may not be able to be protected from moisture.

【0017】基板間を封止する樹脂は,ポリオレフィン
系などの熱可塑性樹脂,アクリレート系などのUV硬化
樹脂などがある。この中,密着信頼性等の観点から,エ
ポキシ樹脂が好ましい。
The resin for sealing between the substrates includes a thermoplastic resin such as a polyolefin resin and a UV-curable resin such as an acrylate resin. Among them, epoxy resin is preferable from the viewpoint of adhesion reliability and the like.

【0018】上記基板間の間隙を樹脂により封止するに
あたっては,積層された上記基板を樹脂浴面に対して垂
直方向に立てて,上記基板間の開口端部側を,溶融状態
にある樹脂浴に浸すことが好ましい(請求項2)。これ
により,両基板に形成された導体回路が樹脂により汚染
されることなく,両基板間の間隙に樹脂を封止すること
ができる。この場合,上記開口端部は,樹脂浴の浴面に
接する程度か又は浴面から最大1.0mmまで浸る程度
にすることが好ましい。1.0mmを超えて浸すと,基
板に形成した導体回路が樹脂浴により汚れるおそれがあ
るからである。
In sealing the gap between the substrates with a resin, the stacked substrates are set upright in the direction perpendicular to the resin bath surface, and the open end side between the substrates is melted with a resin in a molten state. It is preferable to immerse in a bath (claim 2). As a result, the resin can be sealed in the gap between the two substrates without contaminating the conductor circuits formed on the two substrates with the resin. In this case, it is preferable that the opening end portion is in contact with the bath surface of the resin bath or soaked up to a maximum of 1.0 mm from the bath surface. This is because, if immersed more than 1.0 mm, the conductor circuit formed on the substrate may be stained by the resin bath.

【0019】積層時に隣合う上記基板間の間隔の高さは
10~150μmであることが好ましい(請求項3)。
両基板間の間隙が上記のごとく狭い場合には,溶融した
樹脂が毛細管現象により両基板間の間隙に自ずと進入す
る。このため,両基板間への樹脂の封止が容易である。
基板間の間隙が10μm未満の場合には,のおそれがあ
り,150μmを超える場合には毛細管現象が起こりに
くくなるおそれがある。
It is preferable that the height of the interval between the adjacent substrates at the time of lamination is 10 to 150 μm.
When the gap between the two substrates is narrow as described above, the molten resin naturally enters the gap between the two substrates due to a capillary phenomenon. Therefore, it is easy to seal the resin between the two substrates.
If the gap between the substrates is less than 10 μm, there is a risk of occurrence. If it exceeds 150 μm, there is a possibility that the capillary phenomenon is unlikely to occur.

【0020】搭載された上記電子部品の上記基板表面か
らの突出量は150μm以下であることが好ましい(請
求項4)。電子部品の基板表面からの突出量は上記のご
とく低い。このため,基板間の間隙を150μm以下と
狭くすることができ,上記請求項3の発明と同様に,溶
融した樹脂が毛細管現象によって自ずと両基板間に進入
させることができる。したがって,両基板間への樹脂の
封止が容易である。ここで,電子部品の基板表面からの
突出量とは,基板の表面から測った電子部品の高さをい
う。したがって,電子部品が基板の凹部内に搭載されて
いる場合には,電子部品の全高さから,凹部内に埋まっ
ている部分の高さが除かれる。電子部品の基板表面から
の突出量が150μmを超える場合には毛細管現象が起
こりにくくなるおそれがある。
It is preferable that an amount of the mounted electronic component protruding from the surface of the substrate is not more than 150 μm. The protruding amount of the electronic component from the substrate surface is low as described above. For this reason, the gap between the substrates can be narrowed to 150 μm or less, and the molten resin can naturally enter between the two substrates by the capillary phenomenon as in the third aspect of the present invention. Therefore, it is easy to seal the resin between the two substrates. Here, the protruding amount of the electronic component from the substrate surface refers to the height of the electronic component measured from the surface of the substrate. Therefore, when the electronic component is mounted in the concave portion of the substrate, the height of the portion buried in the concave portion is excluded from the total height of the electronic component. When the projection amount of the electronic component from the substrate surface exceeds 150 μm, there is a possibility that the capillary phenomenon hardly occurs.

【0021】隣合う上記基板に設けた上記導体回路同士
の間を接続端子により電気的に接続するにあたっては,
上記基板の上記導体回路と上記接続端子との間を,半田
を用いて接着することが好ましい(請求項5)。接続端
子は,積層時に相対する導体回路の接合部位との間に多
少の位置ずれがあっても,溶融半田の表面張力によって
基板を移動させて接続端子と導体回路とを正しい位置に
移動させるセルフアライメント効果が生じる。とくに,
本発明においては,接続端子を導体回路と接合するとき
には,両者間に封止樹脂が介在していない。このため,
樹脂により邪魔されず,上記セルフアライメント効果が
生じ易い。したがって,基板間の位置合わせが容易であ
る。
When electrically connecting the conductor circuits provided on the adjacent substrates with connection terminals,
It is preferable that the connection between the conductor circuit of the substrate and the connection terminal is performed by using solder. Even if there is a slight misalignment between the joints of the opposing conductor circuits at the time of lamination, the connection terminals can move the board by the surface tension of the molten solder to move the connection terminals and the conductor circuits to the correct position. An alignment effect occurs. In particular,
In the present invention, when the connection terminal is joined to the conductor circuit, no sealing resin is interposed between the two. For this reason,
The self-alignment effect is easily generated without being hindered by the resin. Therefore, alignment between the substrates is easy.

【0022】第二発明の多層電子部品搭載用基板は,上
記第一発明の請求項3の発明を行うことにより得られ
る。第三発明の多層電子部品搭載用基板は,上記第一発
明の請求項4の発明を行うことにより得られる。
The substrate for mounting a multilayer electronic component according to the second invention is obtained by carrying out the invention of the third invention of the first invention. The multilayer electronic component mounting board of the third invention is obtained by performing the invention of claim 4 of the first invention.

【0023】[0023]

【実施例】(実施例1)本発明の実施形態に係る多層電
子部品搭載用基板及びその製造方法について,図1〜図
6を用いて説明する。本例の多層電子部品搭載用基板
は,図1に示すごとく,5つの基板11〜15からな
り,これらの基板の間には,電子部品3を配置してい
る。最上段の基板11は,導体回路4を有するが,その
上面及び下面のいずれにも電子部品を搭載していない。
最上段の下側に積層されている基板12〜15は,導体
回路4を有するとともに,その上面に電子部品3を搭載
している。
(Example 1) A substrate for mounting a multilayer electronic component and a method of manufacturing the same according to an embodiment of the present invention will be described with reference to FIGS. As shown in FIG. 1, the multilayer electronic component mounting board of the present embodiment includes five boards 11 to 15, and an electronic component 3 is arranged between these boards. The uppermost substrate 11 has the conductive circuit 4, but has no electronic components mounted on either the upper surface or the lower surface thereof.
Substrates 12 to 15 stacked on the lower side of the uppermost stage have conductor circuits 4 and have electronic components 3 mounted thereon.

【0024】基板11〜15は,電子部品3を収容する
ように積層されている。各基板11〜15に設けられた
導体回路4は,接続端子としての半田ボール2により電
気的に接続されている。各基板11〜15の間の間隙の
高さHは200μmであり,この間隙は樹脂6により封
止されている。電子部品3の基板表面からの突出量tは
50μmである。
The substrates 11 to 15 are stacked so as to accommodate the electronic components 3. The conductor circuits 4 provided on each of the substrates 11 to 15 are electrically connected by solder balls 2 as connection terminals. The height H of the gap between the substrates 11 to 15 is 200 μm, and this gap is sealed with the resin 6. The protruding amount t of the electronic component 3 from the substrate surface is 50 μm.

【0025】図1,図2に示すごとく,最上段の基板1
1には,パッド41,43,導体充填穴42及び図示し
ない配線部からなる導体回路4が設けられている。基板
11の下面に形成したパッド41は,半田ボール2と接
合する接合部位である。基板11の上面に形成したパッ
ド43は,外部のマザーボードに接合するための部位で
ある。上面のパッド43と下面のパッド41との間は,
導体充填穴42及び配線部を通じて電気的に接続されて
いる。
As shown in FIGS. 1 and 2, the uppermost substrate 1
1 is provided with a conductor circuit 4 including pads 41 and 43, a conductor filling hole 42, and a wiring portion (not shown). The pad 41 formed on the lower surface of the substrate 11 is a bonding portion for bonding with the solder ball 2. The pad 43 formed on the upper surface of the substrate 11 is a part for bonding to an external motherboard. Between the pad 43 on the upper surface and the pad 41 on the lower surface,
It is electrically connected through the conductor filling hole 42 and the wiring portion.

【0026】図1,図3に示すごとく,最上段の基板1
1の下側に積層されている基板12〜15にも,導体回
路4が設けられている。この導体回路4は,基板12〜
15の上面に設けたパッド44,配線部45及びボンデ
ィングパッド46と,基板12〜15の下面に設けたパ
ッド48と,パッド44,48間を電気的に接続する導
体充填穴47とからなる。ボンディングパッド46に
は,半田23により電子部品3が接合されている。この
電子部品3は,フリップチップである。
As shown in FIGS. 1 and 3, the uppermost substrate 1
The conductor circuits 4 are also provided on the substrates 12 to 15 stacked on the lower side of 1. This conductor circuit 4 is composed of
A pad 44, a wiring portion 45, and a bonding pad 46 provided on the upper surface of the substrate 15, a pad 48 provided on the lower surface of the substrates 12 to 15, and a conductor filling hole 47 for electrically connecting the pads 44, 48 are provided. The electronic component 3 is joined to the bonding pad 46 by the solder 23. This electronic component 3 is a flip chip.

【0027】次に,本例の多層電子部品搭載用基板の製
造方法について説明する。最上段の基板11を作製する
にあたって,図4に示すごとく,絶縁基板5に,穴あ
け,めっき,露光,エッチングなどの手法を用いて,導
体充填穴,パッド及び配線部等からなる導体回路4を形
成する。絶縁基板5は,ガラスエポキシ樹脂基板であ
る。基板11の下側の基板12〜15を作製するにあた
って,絶縁基板5に上記と同様の手法にて導体回路4を
形成する。図4,図3に示すごとく,基板12〜15の
上面には,導体回路4の一部であるパッド44に,半田
ボール2を接合する。
Next, a method of manufacturing the substrate for mounting a multilayer electronic component according to the present embodiment will be described. In manufacturing the uppermost substrate 11, as shown in FIG. 4, a conductor circuit 4 including conductor filling holes, pads, wiring portions, and the like is formed on an insulating substrate 5 by using a technique such as drilling, plating, exposure, and etching. Form. The insulating substrate 5 is a glass epoxy resin substrate. When fabricating the lower substrates 12 to 15 of the substrate 11, the conductor circuit 4 is formed on the insulating substrate 5 in the same manner as described above. As shown in FIGS. 4 and 3, on the upper surfaces of the substrates 12 to 15, the solder balls 2 are bonded to the pads 44 which are a part of the conductor circuit 4.

【0028】次いで,得られた基板11〜15を,上か
ら下へ順に積層する。基板12〜15の上面に接合した
半田ボール2は,その上の基板11〜14の下面に形成
されているパッド41,48に当接させる。図5に示す
ごとく,この状態で加熱して半田ボール2を一部溶融さ
せて,当接しているパッド41,48に接合させる。こ
れにより,隣合う基板の導体回路間が半田ボール2によ
り電気的に接続される。
Next, the obtained substrates 11 to 15 are laminated in order from top to bottom. The solder balls 2 bonded to the upper surfaces of the substrates 12 to 15 are brought into contact with pads 41 and 48 formed on the lower surfaces of the substrates 11 to 14 thereon. As shown in FIG. 5, the solder ball 2 is partially melted by heating in this state, and the solder ball 2 is joined to the pads 41 and 48 that are in contact. Thus, the conductor circuits of the adjacent boards are electrically connected by the solder balls 2.

【0029】次いで,図6に示すごとく,半田ボール2
にて接合された基板11〜15を,樹脂浴61の浴面6
0に対して垂直方向に立てて,基板間の間隙開口端部1
0側を,溶融状態にある樹脂浴61に浸す。このとき,
間隙開口端部10は,樹脂浴61の浴面60から1.0
mm浸る程度にする。この状態でしばらく放置すると,
毛細管現象により樹脂浴61の樹脂が間隙開口端部10
から内部へ進入し,やがて基板間の間隙全体に充満す
る。これにより,基板11〜15間が樹脂6により封止
される。以上により,図1に示す多層電子部品搭載用基
板が得られる。
Next, as shown in FIG.
The substrates 11 to 15 joined together by the bath 6
0 in the vertical direction with respect to
The 0 side is immersed in a resin bath 61 in a molten state. At this time,
The gap opening end 10 is 1.0 mm from the bath surface 60 of the resin bath 61.
mm. If you leave this state for a while,
Due to the capillary action, the resin in the resin bath 61 is filled with the gap opening end 10.
From the inside, and eventually fills the entire gap between the substrates. Thereby, the space between the substrates 11 to 15 is sealed with the resin 6. Thus, the multilayer electronic component mounting board shown in FIG. 1 is obtained.

【0030】本例において,各基板11〜15に設けた
導体回路4を半田ボール2により接続した後に,基板間
を樹脂6により封止しているため,導体回路4は,樹脂
により邪魔されることなく,半田ボール2によって確実
に接続する。基板11〜15間の間隙の高さTが上記の
ごとく狭いため,この間隙に樹脂6を封止するときに,
毛細管現象が生じ易い。このため,樹脂封止を容易に行
うことができる。
In this embodiment, after the conductor circuits 4 provided on the respective substrates 11 to 15 are connected by the solder balls 2, the substrates are sealed with the resin 6, so that the conductor circuits 4 are obstructed by the resin. Without fail, the connection is reliably made by the solder ball 2. Since the height T of the gap between the substrates 11 to 15 is narrow as described above, when the resin 6 is sealed in this gap,
Capillary phenomenon easily occurs. Therefore, resin sealing can be easily performed.

【0031】各基板11〜15の間は半田ボール2によ
り接続している。半田ボール2は,積層加熱時に一部が
溶融して相手側のパッド41,48と接合する。このた
め,半田ボール2は,相手側のパッド41,48との間
に多少の位置ずれがあっても溶融半田の表面張力によっ
て正しい位置に移動するセルフアライメント効果を起こ
す。また,半田ボール接合時には,封止用の樹脂が未だ
介在していないことから,樹脂により基板の移動が邪魔
されず,セルフアライメント効果が生じ易い。したがっ
て,基板間の位置合わせが容易である。また,基板間を
樹脂により封止するときには,基板11〜15を浴面6
0に垂直に立てて間隙開口端部10のみを僅かに樹脂浴
61の中に浸している。このため,導体回路4を汚すこ
となく,樹脂封止作業を行うことができる。
Each of the substrates 11 to 15 is connected by a solder ball 2. A part of the solder ball 2 is melted at the time of lamination heating and is joined to the mating pads 41 and 48. Therefore, the solder ball 2 has a self-alignment effect of being moved to a correct position by the surface tension of the molten solder even if there is a slight displacement between the solder ball 2 and the pads 41 and 48 on the other side. Further, at the time of solder ball bonding, since the sealing resin has not been interposed yet, the movement of the substrate is not hindered by the resin, and the self-alignment effect is easily generated. Therefore, alignment between the substrates is easy. When sealing the substrates with resin, the substrates 11 to 15 are
Only the gap opening end 10 is slightly immersed in the resin bath 61 while standing vertically to zero. Therefore, the resin sealing operation can be performed without soiling the conductor circuit 4.

【0032】なお,本例においては,半田ボール2を予
め接合する部分は,図4に示すごとく電子部品3を搭載
した側の基板表面であるが,電子部品を搭載していない
側の表面であってもよい。また,各基板11〜15間の
間隙には,下側の基板にのみ搭載された電子部品3を配
置しているが,上側及び下側の両基板に搭載された電子
部品を配置してもよい。
In this embodiment, the portion where the solder balls 2 are bonded in advance is the substrate surface on which the electronic component 3 is mounted as shown in FIG. 4, but the surface on which the electronic component 3 is not mounted. There may be. The electronic components 3 mounted only on the lower substrate are disposed in the gaps between the substrates 11 to 15, but the electronic components mounted on both the upper and lower substrates may be disposed. Good.

【0033】(実施例2)本例は,基板間の樹脂封止を
行うにあたって,図7に示すごとく,半田ボール2にて
接続された基板11〜15の全体を,樹脂浴61の中に
浸している。基板11〜15は,浴面60に対して僅か
に傾斜させて配置し,この状態で静かに樹脂浴61の中
に浸す。すると,基板間に残っている空気が間隙開口端
部10から逃げ,そこへ樹脂が充填される。なお,予め
外形の一辺に切断エリアを設けておき,上記樹脂の充填
後に,上記切断エリアを削除することにより,基板表面
の導体回路が樹脂により汚染されることを防止すること
ができる。本例においても,基板間の樹脂封止,及び基
板間の位置合わせを容易に行うことができる。
(Embodiment 2) In this embodiment, when performing resin sealing between the substrates, the entirety of the substrates 11 to 15 connected by the solder balls 2 is placed in a resin bath 61 as shown in FIG. I'm soaking. The substrates 11 to 15 are arranged slightly inclined with respect to the bath surface 60, and gently dipped in the resin bath 61 in this state. Then, the air remaining between the substrates escapes from the gap opening end portion 10 and is filled with the resin. By providing a cutting area on one side of the outer shape in advance and deleting the cutting area after filling with the resin, it is possible to prevent the conductive circuit on the substrate surface from being contaminated by the resin. Also in this example, resin sealing between the substrates and alignment between the substrates can be easily performed.

【0034】(実施例3)本例は,図8,図9に示すご
とく,基板11〜15間の周縁部71のみに樹脂6を充
填し,中央部72は樹脂を充填しない例である。樹脂6
は,図8,図9に示すごとく,上記基板12〜15に配
設された半田ボール2が埋まる程度まで充填する。本例
においては,上記のごとく,基板間の周縁部71に樹脂
6を充填している。このため,基板間の間隙全体に樹脂
を充填した場合と同様に,周縁部71の樹脂により,湿
気の侵入を抑制でき,中央部72に収容した電子部品3
を湿気から保護することができる。
Embodiment 3 In this embodiment, as shown in FIGS. 8 and 9, only the peripheral portion 71 between the substrates 11 to 15 is filled with the resin 6, and the central portion 72 is not filled with the resin. Resin 6
As shown in FIGS. 8 and 9, the solder balls 2 are filled until the solder balls 2 disposed on the substrates 12 to 15 are filled. In this example, as described above, the resin 6 is filled in the peripheral portion 71 between the substrates. Therefore, as in the case where the entire space between the substrates is filled with the resin, the resin at the peripheral portion 71 can suppress the invasion of moisture, and the electronic components 3 accommodated in the central portion 72
Can be protected from moisture.

【図面の簡単な説明】[Brief description of the drawings]

【図1】実施例1の多層電子部品搭載用基板の断面図。FIG. 1 is a cross-sectional view of a multilayer electronic component mounting board according to a first embodiment.

【図2】実施例1における,最上段の基板の平面図。FIG. 2 is a plan view of an uppermost substrate according to the first embodiment.

【図3】実施例1における,最上段の基板以外の基板の
平面図。
FIG. 3 is a plan view of a substrate other than the uppermost substrate in the first embodiment.

【図4】実施例1における,積層前の各基板の断面図。FIG. 4 is a cross-sectional view of each substrate before lamination in Example 1.

【図5】実施例1における,半田ボールにて接続された
基板の断面図。
FIG. 5 is a cross-sectional view of the boards connected by solder balls in the first embodiment.

【図6】実施例1における,基板間の樹脂封止方法の説
明図。
FIG. 6 is an explanatory diagram of a resin sealing method between substrates in the first embodiment.

【図7】実施例2における,基板間の樹脂封止方法の説
明図。
FIG. 7 is an explanatory view of a method of sealing a resin between substrates in Embodiment 2.

【図8】実施例3の多層電子部品搭載用基板の断面図。FIG. 8 is a sectional view of a multilayer electronic component mounting board according to a third embodiment.

【図9】実施例3における,基板間の樹脂封止状態を示
す説明図。
FIG. 9 is an explanatory view showing a resin-sealed state between substrates in Example 3.

【図10】従来例の多層電子部品搭載用基板の断面図。FIG. 10 is a cross-sectional view of a conventional multilayer electronic component mounting substrate.

【図11】従来例における,多層電子部品搭載用基板の
製造方法を示す説明図。
FIG. 11 is an explanatory view showing a method of manufacturing a multilayer electronic component mounting board in a conventional example.

【符号の説明】[Explanation of symbols]

11〜15...基板, 2...半田ボール, 3...電子部品, 4...導体回路, 41,43,44,48...パッド, 5...絶縁基板, 6...樹脂, 11-15. . . substrate, 2. . . Solder balls, 3. . . Electronic components, 4. . . Conductor circuit, 41, 43, 44, 48. . . pad, 5. . . Insulating substrate, 6. . . resin,

フロントページの続き (51)Int.Cl.7 識別記号 FI テーマコート゛(参考) H05K 1/18 H05K 3/46 N 3/28 Q 3/46 H01L 25/08 Z Fターム(参考) 5E314 AA24 BB02 BB13 CC04 FF05 FF21 GG01 5E336 AA04 AA13 AA16 BB03 BB15 BC31 CC32 CC49 CC55 EE01 GG11 5E344 AA01 AA23 AA26 AA28 BB01 BB02 BB04 CC15 CD09 CD12 CD31 DD02 DD14 EE06 EE21 5E346 AA02 AA12 AA15 AA22 AA35 AA41 BB01 BB11 BB16 CC02 CC09 CC31 CC40 EE43 FF37 FF45 GG01 GG25 GG28 GG40 HH07 Continued on the front page (51) Int.Cl. 7 Identification symbol FI Theme coat II (reference) H05K 1/18 H05K 3/46 N 3/28 Q 3/46 H01L 25/08 Z F term (reference) 5E314 AA24 BB02 BB13 CC04 FF05 FF21 GG01 5E336 AA04 AA13 AA16 BB03 BB15 BC31 CC32. GG25 GG28 GG40 HH07

Claims (7)

【特許請求の範囲】[Claims] 【請求項1】 少なくとも2つの基板からなり,両基板
間に電子部品を配置している多層電子部品搭載用基板の
製造方法において,絶縁基板に導体回路を設けてなる基
板を複数準備する工程と,上記基板に,積層時に基板間
に配置されるべき電子部品を搭載する工程とを行い,次
いで,上記複数の基板を積層して,上記電子部品を上記
基板間に配置するとともに,隣合う上記基板に設けた上
記導体回路同士の間を接続端子により電気的に接続し,
その後上記基板間の間隙を樹脂により封止することを特
徴とする多層電子部品搭載基板の製造方法。
1. A method for manufacturing a multilayer electronic component mounting substrate comprising at least two substrates, wherein electronic components are arranged between the two substrates, comprising the steps of: preparing a plurality of substrates having conductive circuits provided on an insulating substrate; Mounting electronic components to be arranged between the substrates on the substrate, and then laminating the plurality of substrates, disposing the electronic components between the substrates, and The conductor circuits provided on the substrate are electrically connected to each other by connection terminals,
Thereafter, the gap between the substrates is sealed with a resin.
【請求項2】 請求項1において,上記基板間の間隙を
樹脂により封止するにあたっては,積層された上記基板
を樹脂浴面に対して垂直方向に立てて,上記基板間の開
口端部側を,溶融状態にある樹脂浴に浸すことを特徴と
する多層電子部品搭載基板の製造方法。
2. The method according to claim 1, wherein, when the gap between the substrates is sealed with a resin, the stacked substrates are set upright in a direction perpendicular to a resin bath surface, and an opening end side between the substrates is provided. Immersing the substrate in a molten resin bath.
【請求項3】 請求項1において,積層時に隣合う上記
基板間の間隔の高さは10~150μmであることを特
徴とする多層電子部品搭載基板の製造方法。
3. The method for manufacturing a multilayer electronic component mounting board according to claim 1, wherein a height of an interval between the adjacent substrates at the time of lamination is 10 to 150 μm.
【請求項4】 請求項1または2において,搭載された
上記電子部品の上記基板表面からの突出量は150μm
以下であることを特徴とする多層電子部品搭載用基板の
製造方法。
4. The electronic device according to claim 1, wherein the mounted electronic component has a protrusion amount of 150 μm from the substrate surface.
A method for manufacturing a multilayer electronic component mounting board, characterized by the following.
【請求項5】 請求項1〜4のいずれか1項において,
隣合う上記基板に設けた上記導体回路同士の間を接続端
子により電気的に接続するにあたっては,上記基板の上
記導体回路と上記接続端子との間を,半田を用いて接着
することを特徴とする多層電子部品搭載用基板の製造方
法。
5. The method according to claim 1, wherein:
When electrically connecting the conductor circuits provided on the adjacent substrates with connection terminals, the conductor circuits of the substrate and the connection terminals are bonded using solder. Of manufacturing a multilayer electronic component mounting substrate.
【請求項6】 導体回路を有する基板を少なくとも2つ
積層して,両基板間に電子部品を配置している多層電子
部品搭載用基板であって,隣合う上記基板に設けた上記
導体回路同士の間は接続端子により電気的に接続されて
おり,上記基板間の間隙は樹脂により封止されており,
かつ上記基板間の間隔の高さは10~150μmである
ことを特徴とする多層電子部品搭載基板。
6. A multilayer electronic component mounting board in which at least two boards each having a conductor circuit are stacked and an electronic component is arranged between both boards, wherein said conductor circuits provided on adjacent boards are connected to each other. Are electrically connected by connection terminals, and the gap between the substrates is sealed with resin.
A multilayer electronic component mounting substrate, wherein the height of the interval between the substrates is 10 to 150 μm.
【請求項7】 導体回路を有する基板を少なくとも2つ
積層して,両基板間に電子部品を配置している多層電子
部品搭載用基板であって,隣合う上記基板に設けた上記
導体回路同士の間は接続端子により電気的に接続されて
おり,上記基板間の間隙は樹脂により封止されており,
かつ上記電子部品の上記基板表面からの突出量は150
μm以下であることを特徴とする多層電子部品搭載基
板。
7. A multilayer electronic component mounting board in which at least two boards each having a conductor circuit are stacked and an electronic component is arranged between both boards, wherein said conductor circuits provided on adjacent boards are connected to each other. Are electrically connected by connection terminals, and the gap between the substrates is sealed with resin.
The amount of protrusion of the electronic component from the surface of the substrate is 150
A multilayer electronic component mounting substrate having a thickness of not more than μm.
JP2002149660A 2002-05-23 2002-05-23 Multilayer electronic parts mounting substrate and its fabricating method Pending JP2003347722A (en)

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Country Link
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JP2008147628A (en) * 2006-12-07 2008-06-26 Stats Chippac Inc Multilayer semiconductor package
JP2008159955A (en) * 2006-12-26 2008-07-10 Shinko Electric Ind Co Ltd Substrate incorporating electronic component
EP1962342A1 (en) * 2005-12-14 2008-08-27 Shinko Electric Industries Co., Ltd. Substrate with built-in chip and method for manufacturing substrate with built-in chip
JP2009130196A (en) * 2007-11-26 2009-06-11 Shinko Electric Ind Co Ltd Semiconductor device
JP2010153651A (en) * 2008-12-25 2010-07-08 Canon Inc Stacked semiconductor package
US7754535B2 (en) 2007-05-21 2010-07-13 Shinko Electric Industries Co., Ltd. Method of manufacturing chip integrated substrate
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