JP2003216254A - Semiconductor integrating device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor integrating device capable of realizing high power efficiency with a simple configuration when used as a direct current power supply of a portable device in which fluctuation width and fluctuation time width of a load current are large. <P>SOLUTION: This semiconductor integrating device is provided with an inverter 30 for signal inversion being a switching means for exclusively turning on/off a switching regulator 10 and a series regulator 20 and a CPU 40 being a predicting means for predicting the state of a load connected to an output terminal OUT in addition to the switching regulator 10 and the series regulator 20. The switching regulator 10 and the series regulator 20 and exclusively turned on/off by monitoring the operation of a DSP (digital signal processor) such as a portable telephone set as a load from its incoming call up to a series of operation completion with the CPU 40. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor integrated device forming a power supply control circuit between a DC input terminal and a DC output terminal, and more particularly, a switching regulator circuit including a switching transistor and a series regulator circuit are connected in parallel. The present invention relates to a semiconductor integrated device.

[0002]

2. Description of the Related Art FIG. 3 shows a general pulse width modulation control (P
FIG. 3 is a circuit diagram showing a configuration of a WM: Pulse Width Modulation) type switching regulator.

A PWM control type switching regulator 10 shown in FIG. 3 includes a triangular wave oscillator 11 and an error amplifier 1.
2, a PWM comparator 13, a driver 14, and switching MOSFETs Q1 and Q2.
The DC voltage Vin supplied to the input terminal IN of the switching regulator 10 is converted into a predetermined DC voltage Vout by a smoothing circuit composed of an inductance L1 and a capacitance C1 connected to the output terminal OUT1 and supplied to the load from the output terminal OUT. Is configured.

DC voltage V output from the output terminal OUT
Out is detected by the resistors R1 and R2 for voltage detection, and is input to the inverting input terminal (−) of the error amplifier 12. The reference voltage Vref of the standard power supply E1 is supplied to the non-inverting input terminal (+) of the error amplifier 12, and the error output thereof becomes the input signal on the positive side of the PWM comparator 13. R
Reference numeral 3 denotes an output resistance, and the resistance R4 and the capacitance C2 in the switching regulator 10 constitute a negative feedback circuit of the error amplifier 12.

Such a switching regulator 10
Is suitable as a DC-DC converter used in a power supply circuit of a computer device or the like in order to cope with a sudden load change. However, in a device such as a mobile phone that uses a battery as an energy source, when the DC power supply voltage is converted to a constant DC voltage by the switching regulator 10, the battery life and the weight thereof are reduced, and the power conversion efficiency of the switching regulator is increased. It becomes a problem.

FIG. 4 is a characteristic diagram showing an example of voltage conversion efficiency of the switching regulator shown in FIG. In FIG. 4, the horizontal axis represents the output current value (I
out) is logarithmically displayed and the vertical axis shows the conversion efficiency (η = Pout / Pin) of the switching regulator.
As shown here, the switching regulator operates with high efficiency under heavy load, but the voltage conversion efficiency deteriorates rapidly as the load current decreases.

In Japanese Patent Laid-Open No. 11-3126, a parallel circuit of a PWM switching regulator circuit and a series regulator circuit is provided between a DC input terminal and a DC output terminal, and the voltage at this DC output terminal is higher than a predetermined voltage. Sometimes, the PWM type switching regulator circuit is operated, and when the voltage of the DC output terminal is equal to or lower than a predetermined voltage, the PWM type switching regulator circuit and the series regulator circuit are operated simultaneously. Has been done.

According to this prior art, even if the load current is reduced, the response can be improved without significantly lowering the voltage conversion efficiency. Also, FIG.
There is an advantage that the capacitance value of the capacitance C1 externally attached to the output terminal OUT side of the semiconductor integrated device shown in FIG.

As a method for improving the voltage conversion efficiency, a PWM switching regulator is used under light load to perform pulse frequency modulation (PFM).
A semiconductor integrated device is also considered in which the circuit is switched to an on) type circuit.

FIG. 5 is a characteristic diagram showing an example of the voltage conversion efficiency of the switching regulator when switching between the PWM system and the PFM system. As is clear from comparison with the characteristic diagram of FIG. 4, by detecting the load state, the output current Iout is PWM in the range of 10 mA to 100 mA.
And PFM can be switched to further improve the voltage conversion efficiency.

[0011]

By the way, in the case where the operation mode is switched and used like a mobile phone, a large amount of calculation is required in the receiving state and the current consumption is large, and the operation is hardly performed in the standby state. Therefore, current consumption is low.

FIG. 6 is a diagram showing an example of a change over time of a load current flowing through a mobile phone or the like. In an operation mode of a general mobile device, as shown in FIG. 6, a heavy load is often set for a short time (t1) and a light load is set for the remaining long time (t2). This is because the weight of not only the mobile phone but also the mobile device is reduced and the battery life is extended.

Particularly, in a mobile phone, t1 / t2
The ratio of 1 is often 1:10 or more, and there is a difference of 1: 100 or more in the current consumption ratio (i1 / i2) at that time. Therefore, even if the switching regulator has a function for switching to the PFM, the PW
There was a problem that the efficiency during the total time T during M control was extremely low.

Further, when the load is light, a pulse frequency modulation type (P
In order to switch to the FM system, the PWM circuit and PFM
There is also a problem that the circuit configuration becomes complicated because it is necessary to include both circuits.

An object of the present invention is to provide a semiconductor integrated device capable of realizing high power efficiency with a simple structure when used as a DC power source of a portable device having a large fluctuation range of load current and a large fluctuation time range. is there.

[0016]

To achieve the above object, a switching regulator circuit including a switching transistor and a series regulator circuit are connected in parallel to form a power supply control circuit between a DC input terminal and a DC output terminal. Provided is a semiconductor integrated device. This semiconductor integrated device exclusively turns on / off a predicting unit that predicts a state of a load connected to the DC output terminal, and the switching regulator circuit and the series regulator circuit according to a prediction result of the predicting unit. And switching means.

Also, monitoring means for monitoring the output current to the load connected to the DC output terminal, comparing means for comparing the current value monitored by the monitoring means with a predetermined reference current value, and the comparing means. The semiconductor integrated device may include a switching unit that exclusively turns on and off the switching regulator circuit and the series regulator circuit in accordance with the comparison result in 1.

According to the present invention, the switching regulator having a high conversion efficiency is used at the time of heavy load, and the series regulator of the low current consumption type is used at the time of light load, so that the total power efficiency of the semiconductor integrated device forming the power supply control circuit is improved. Can be increased.

[0019]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings. (First Embodiment) FIG. 1 is a circuit diagram showing a structure of a semiconductor integrated device according to a first embodiment of the present invention. In FIG. 1, IN is a DC voltage from the DC power supply, for example, Vdd = +
4 shows a power supply input terminal to which 4V is supplied, and OUT shows an output terminal capable of outputting a constant DC voltage, for example, Vout = 3.3V.

In the first embodiment, a parallel circuit of the switching regulator 10 and the series regulator 20 is provided between the DC input terminal IN and the output terminal OUT. The switching regulator 10 and the series regulator 20 are power supply control circuits having a 3-input 2-output 1-chip configuration, and as will be described below, a semiconductor integrated device having a power supply input terminal IN and an output terminal OUT in common is used. Constitute.

The switching regulator 10 is of a general PWM control type, and the triangular wave oscillator 1 is used in the same manner as the conventional device described in FIG.
1, an error amplifier 12, a PWM comparator 13, a driver 14, switching MOSFETs Q1, Q2, etc. This switching regulator 10
Has an output terminal OUT1 and the output terminal O
A smoothing circuit including an inductance L1 and a capacitance C1 is connected to UT1 to form an output terminal OUT.

Further, the switching regulator 10 has an enable (ENABLE) terminal ET1 and is configured to prohibit an output from the output terminal OUT1 of the switching regulator 10 when an enable signal is supplied to the enable terminal ET1. There is.

On the other hand, the series regulator 20 is composed of an error amplifier 21, a control MOSFET Q3 and the like, and has a second output terminal OUT2 in addition to the output terminal OUT1. In this series regulator 20, the source electrode of the control MOSFET Q3 is connected to the input terminal IN, and the drain electrode of the control MOSFET Q3 is connected to the output terminal OUT via the output terminal OUT2. Also, the output terminal OUT2 and the output terminal OU
The connection point with T is grounded through a series circuit of resistors R1 and R2, and the connection point of these resistors R1 and R2 is connected to the inverting input terminal (−) of the error amplifier 21, and
The non-inverting input terminal (+) of the error amplifier 21 is grounded via the standard power source E2 having the reference voltage Vref.

Further, the series regulator 20 has an enable (ENABLE) terminal ET2, and
The output from the second output terminal OUT2 is prohibited according to the enable signal supplied to the enable terminal ET2.

Here, the resistors R1 and R2 for voltage detection of the series regulator 20 are shared with the switching regulator 10, and also for the reference power source E2 which is shown as a separate structure in FIG. , Can be shared with the reference power supply E1 that supplies the same reference voltage Vref.

FIG. 1 predicts the switching regulator 10 and the series regulator 20 as well as the state of a load connected to the output terminal OUT and an inverter 30 for signal inversion which is a switching means for exclusively turning them on and off. The CPU 40, which is a prediction means, is shown.

The enable terminal ET1 of the switching regulator 10 is connected to the CPU 40.
The enable signal based on the prediction of the load state is directly input from the. Further, the enable terminal ET2 of the series regulator 20 is connected to the CPU 4 via the inverter 30.
It is connected to 0, and the enable signal from the CPU 40 is inverted and input by the inverter 30.

Next, the operation of the semiconductor integrated device having the above configuration will be described. The switching regulator 10 is a PWM
A pulse-width-modulated control signal having a predetermined cycle, which is obtained at the output side of the comparator 13, is supplied to each gate electrode of the switching MOSFETs Q1 and Q2 via the driver 14, and alternately turns on and off at a predetermined timing. As a result, the output terminal OUT1 of the switching regulator 10
Is converted into a predetermined DC voltage Vout by a smoothing circuit composed of an inductance L1 and a capacitance C1, and a predetermined voltage, for example 3.3V, is output to the output terminal OUT.
It is possible to obtain a DC voltage of.

In the series regulator 20, the control MOSFET Q3 is normally off. However, when the voltage of the output terminal OUT becomes equal to or lower than the predetermined voltage, the control MOSFET Q3 becomes conductive and the output terminal OUT2
A bias current flows from the output terminal, and a predetermined voltage is applied to the load connected to the output terminal OUT.

The CPU 40 predicts the state of the load connected to the output terminal OUT, inputs an enable signal to either of the enable terminals ET1 and ET2 according to the load state, and switches the switching regulator 10 and the series regulator 20. Either of them is operated selectively.

When the above semiconductor integrated device is used as a DC power source of a mobile phone, for example, it is possible to connect a DSP as a load. It is known that the DSP consumes a large amount of current in the receiving state because it executes many calculations, and it hardly operates in the standby state, and thus consumes a small amount of current. Therefore, in the above-described semiconductor integrated device of the first embodiment, the operation of the DSP as the load is monitored by the CPU 40 from the arrival of the call to the completion of the series of operations, whereby the switching regulator 10
And the series regulator 20 are exclusively turned on and off.

Next, the conversion efficiency of the semiconductor integrated device having the above configuration will be described. Now, the voltage conversion efficiency of the switching regulator 10 of the semiconductor integrated device has a characteristic as shown in FIG.
It is assumed that the power consumption at 0 is 0.05 mW.

As shown in the case of FIG. 5, when the input voltage Vin of the semiconductor integrated device is 4.0 V, the efficiency is 70% when the output current Iout is 10 mA. Therefore, in order to obtain 3.3V as the output voltage Vout,
Input power is 47mW (= 3.3V × 10mA ÷ 0.7)
Becomes Therefore, the power loss in the switching regulator 10 is 14 mW (= 47-33).

On the other hand, the efficiency when the series regulator 20 is operated is as follows. That is, assuming that the current consumption in the error amplifier 21 of the series regulator 20 is 0.05 mA, the same input voltage Vin = 4.0V is input to the series regulator 20 to obtain the output voltage Vout = 3.3V. The power loss there is (4V-3.3V) × 10mA + 4V ×
Since it can be calculated as 0.05 mA, it becomes 7.2 mW.

Therefore, if the switching regulator 10 and the series regulator 20 of the semiconductor integrated device can be turned on and off exclusively according to the time change of the load current, the series regulator 20 is operated in the case of a light load, and a heavy load is caused. Switching regulator 10 at load
Is operated, power consumption can be reduced by an amount corresponding to the difference between 14 mW and 7.2 mW (= 6.8 mW). Therefore, in the case of the semiconductor integrated device used for the mobile phone in the operating state as shown in FIG. 6, the power consumption of 6.8 mW is saved over the standby time t2 hours, which is a low current consumption type when the load is light. The effect of using the series regulator 20 is extremely large. (Second Embodiment) In a second embodiment described below,
It is assumed that the load current variation due to the CPU cannot be predicted depending on the load application.

FIG. 2 is a circuit diagram showing the semiconductor integrated device of the second embodiment. In FIG. 2, a current detection / comparator 31 is means for monitoring the output current flowing through the DC output terminal and comparing the monitored current value with a reference value. The inverter 32 excludes the switching regulator 10 and the series regulator 20. It is a switching means for turning on and off.

In the second embodiment, the resistor R3 for detecting the load state is arranged in series immediately before the output terminal OUT, and the current flowing therethrough is detected. The current detection / comparator 31 compares the reference current value and outputs an enable signal. The other configurations of the second embodiment are the same as those of the first embodiment, and detailed description thereof will be omitted.

According to the semiconductor integrated device of the second embodiment, even when the CPU 40 cannot predict the load state as in the first embodiment, the switching regulator 10 and the series regulator 20 are controlled according to the load current. It is intended to switch and operate exclusively. Therefore, a low current consumption series regulator can be used when the load is light, and the semiconductor integrated device can achieve high power efficiency.

[0039]

As described above, according to the present invention, a power supply control circuit in which a switching regulator circuit including a switching transistor and a series regulator circuit are connected in parallel between a DC input terminal and a DC output terminal. As a result, a semiconductor integrated device capable of realizing high power efficiency can be provided.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing a configuration of a semiconductor integrated device according to a first embodiment of the present invention.

FIG. 2 is a circuit diagram showing a semiconductor integrated device of a second embodiment.

FIG. 3 is a circuit diagram showing a configuration of a general pulse width modulation type switching regulator.

4 is a characteristic diagram showing an example of voltage conversion efficiency of the switching regulator shown in FIG.

FIG. 5 is a characteristic diagram showing an example of voltage conversion efficiency when the PWM method and the PFM method are switched.

FIG. 6 is a diagram showing an example of a change over time of a load current in a mobile phone.

[Explanation of symbols]

10 ... Switching regulator 11 ... Triangle wave oscillator 12 ... Error amplifier 13 ... PWM comparator 14 ... driver 20 ... Series regulator 21 ... Error amplifier 30 ... Inverter 31 ... Current detection / comparator 32 ... Inverter 40 ... CPU Q1, Q2 ... Switching MOSFET L1 ... Inductance C1 ... Capacitance ET1, ET2 ... Enable terminals

Claims (4)

[Claims] 1. A semiconductor integrated device in which a switching regulator circuit including a switching transistor and a series regulator circuit are connected in parallel, and a power supply control circuit is formed between a DC input terminal and a DC output terminal, wherein the semiconductor integrated device is connected to the DC output terminal. And a switching unit that exclusively turns on and off the switching regulator circuit and the series regulator circuit in accordance with a prediction result of the prediction unit. Accumulation device. 2. The switching regulator circuit comprises:
The semiconductor integrated device according to claim 1, wherein the semiconductor integrated device is a pulse width modulation type switching regulator circuit. 3. A semiconductor integrated device in which a switching regulator circuit including a switching transistor and a series regulator circuit are connected in parallel, and a power supply control circuit is formed between a DC input terminal and a DC output terminal, wherein the semiconductor integrated device is connected to the DC output terminal. Means for monitoring the output current to the selected load, comparing means for comparing the current value monitored by the monitoring means with a predetermined reference current value, and the switching regulator circuit according to the comparison result by the comparing means. And a switching means for exclusively turning on and off the series regulator circuit. 4. The switching regulator circuit comprises:
4. The semiconductor integrated device according to claim 3, wherein the semiconductor integrated device is a pulse width modulation type switching regulator circuit.