JP2003204369A - Signal transmission/reception apparatus, circuit and loop- back test method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an apparatus in which mounting cost and power consumption are reduced by reducing the number of high-speed signal lines connecting a group of transmission circuits to a group of reception circuits which are necessary, in performing a loop-back test of a signal transmission/reception apparatus for signal communication. <P>SOLUTION: Reference numeral 101 denotes a communication apparatus A for transmitting/receiving a parallel signal, reference numeral 103 denotes a communication apparatus B for transmitting/receiving a serial signal, and a reference numeral 102 denotes a signal transmission/reception apparatus provided between the apparatuses 101 and 103 to convert the parallel signal to the serial signal and vice versa. The apparatus 102 consists of a transmission circuit IC 104 and a reception circuit IC 108. The IC 104 comprises a serializer 105 and a transmission driver 107, and the IC 108 comprises an input buffer 111 and a deserializer 109. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of confirming that communication is normally performed by a signal transmitting / receiving device using an optical or electric signal. In particular, it relates to a loopback test method performed between a communication device and a signal transmitting / receiving device.

[0002]

2. Description of the Related Art Conventionally, an optical or electric signal transmitter / receiver in which a transmitter circuit and a receiver circuit are paired for signal transmission between communication devices has been used in exchanges, routers and the like used in signal communication. It In such a signal transmission / reception device, in order to test whether communication is normally performed, a test is performed in which a test signal sent from the communication device is returned from the transmission circuit to the reception circuit as it is and returned to the communication device. The communication device compares the test signal transmitted by the communication device with the test signal returned from the signal transmission / reception device to determine whether communication is normally performed. This test method is called a loopback test method. This conventional technique includes, for example, the method described in US Pat. No. 5,787,114.

[0003]

The problem of the conventional loopback test method will be described with reference to FIG. In FIG. 10, reference numeral 1001 is a communication device A for transmitting / receiving parallel signals, 1003 is a communication device B for transmitting / receiving serial signals, and 1002 is signal transmission / reception for mutually converting serial signals and parallel signals between the communication devices for signal transmission. It is a device. 1004 is a transmitter circuit IC, 10
Reference numeral 08 denotes a receiving circuit IC, and in this figure, the case is shown where each is configured by a different IC. 1005 is a serializer that converts a parallel signal into a serial signal, 1007 is a transmission driver that drives the serial signal TX, and 1011 is a serial signal
An input buffer for receiving RX, 1009 is a deserializer that converts a serial signal into a parallel signal. This signal transmission / reception device transmits a serial signal TX obtained by performing parallel-serial conversion of the parallel signal TXD sent from the communication device A to the communication device B during normal communication, and vice versa. Performs the function of transmitting a parallel signal RXD, which is the serial-parallel conversion of the signal RX, to the communication device A.
On the other hand, in the loopback test, the serializer output signal TX of the test signal sent from the communication device A is passed through the wiring 1006 connecting the transmission circuit IC and the reception circuit IC,
Communication device A is returned as it is and input to the deserializer.
I am sending it back to. However, in this conventional method, the same amount of signal as the test signal must be sent between the transmitting circuit group and the receiving circuit group. Therefore, a circuit configuration and a transfer time for signal transfer are required. In particular, when it becomes necessary to configure the signal transmitter / receiver with a separate module for the transmission circuit group and the reception circuit group, or an IC, a circuit having the same transmission speed as the data signal connecting the transmission circuit group and the reception circuit group for signal folding. Is required. Recent data signals are generally transmitted at high speeds exceeding 1 Gbps, and high-speed signal lines and IC pins connecting the transmission circuit group and the reception circuit group are required. However, high-speed signal lines and IC pins are generally more expensive than low-speed ones, which causes an increase in mounting cost. In addition, an increase in the number of signal lines requires extra input / output circuits, resulting in an increase in power consumption. Also, if inexpensive ones are used for these configurations, the signal transmission cannot be speeded up, and the device performance will be degraded.

It is an object of the present invention to reduce the overhead caused by transferring a test signal as it is in a device in a conventional loopback test. More specifically, the present invention provides a device that reduces the mounting cost and power consumption by reducing the number of high-speed signal lines that connect the transmission circuit group and the reception circuit group, which are necessary for the loopback test.

[0005]

In the test method of the present invention for solving the above problems, a signal transmitting / receiving apparatus having a transmitting circuit and a receiving circuit tests the state of communication with another communication apparatus. Loopback test method
Instead of returning the test signal sent from the communication device from the receiving circuit to the transmitting circuit as it is and returning it to the communication device, the first step of evaluating the transmission state of the test signal in the receiving circuit, the reception Second transmission of an evaluation result signal based on the above evaluation from the circuit to the transmission circuit
And the receiving circuit includes the third step of returning a test signal or a signal different from the test signal to the communication device based on the evaluation result.

In the first step, the transmission state (eg error rate) of the test signal is evaluated by comparing the test signal sent from the communication device in the receiving circuit with a predetermined correct test signal, for example. To do. In the second step, the information amount of the evaluation result signal is smaller than the information amount of the test signal. In the third step, the transmitting circuit creates a signal different from the test signal by inverting at least one bit of the predetermined correct test signal based on the evaluation result, and returns the signal to the communication device. On the communication device side, the communication state can be determined by detecting whether or not the returned test signal is a correct test signal.

The signal transmitting / receiving device may have a function of converting a parallel signal sent from the communication device into a serial signal and transferring the serial signal to another communication device, for example. In this case, the test signal may be a parallel signal. The evaluation result signal preferably has a smaller amount of information than the test signal, and may be, for example, a 1-bit signal indicating whether the test signal is correct or incorrect. When the receiving circuit and the transmitting circuit are formed by different chips, the above 1-bit evaluation result signal can be transferred between one pin. Further, if the evaluation result signal having a transfer speed slower than that of the test signal is used, the cost of the circuit used can be reduced. For this purpose, for example, the pulse width of the evaluation result signal may be made wider than the pulse width of the test signal.

According to another aspect of the present invention, there is provided a signal transmission / reception device having a first circuit for receiving a signal and a second circuit for transmitting the signal, wherein
Circuit detects the presence or absence of an error in the input test signal pattern, and when an error is detected, transmits an error signal indicating the error to the second circuit, and the second circuit outputs the error signal. It is characterized by transmitting either a correct test signal pattern or an erroneous test signal pattern based on the above.

As a concrete example, the first circuit has a parallel degree a (a
The parallel signal of ≧ 1) is the received signal, the second circuit is the parallel signal of the parallel degree b (b ≧ 1) as the outgoing signal, and the error signal is the serial signal or the parallel degree c (a> c, b>).
It is a parallel signal of c). Usually, a = b is sufficient. A more specific configuration of the present invention is as follows: (1) A signal having a parallel degree n (n ≧ 1) and a signal having a parallel degree m (m ≧ 1) using optical or electric signals are mutually converted between communication devices. A signal transmission / reception device that performs transmission and reception by transmitting a signal of parallel degree n, converts it to a signal of parallel degree m, and transmits it, and receives a signal of parallel degree m and converts it to a signal of parallel degree n. In a signal transmission / reception device configured by a reception circuit group for transmitting by transmitting, a transmission circuit group has an error detection circuit for a test signal sent from the communication device, and a reception circuit group has a test signal generation circuit equivalent to the communication device. A test circuit that transmits error information detected by the error detection circuit of the transmission circuit group to the reception circuit group at a speed lower than the signal transmission speed, and includes a test in the test signal generation circuit based on the error information. Generates a signal to the communication device It is characterized by having a loopback function for sending back.

(2) In the signal transmission / reception apparatus according to (1) above, the error detection circuit detects the presence or absence of an error in the test signal received by the transmission circuit group, and the presence or absence of the error is detected.
It has a circuit that transmits bit information from the transmission circuit group to the reception circuit group, and the test signal generation circuit of the reception circuit group generates a test signal including the presence or absence of error from the information on the presence or absence of error, and sends it back to the communication device. It features a loopback function.

(3) In the signal transmission / reception device according to (1), the error detection circuit detects the number of error bits in the test signal received by the transmission circuit group, and the error bit number information is transmitted to the transmission circuit. From the group to the receiving circuit group, generate a test signal containing the same error bit number as the signal received by the test signal generating circuit of the receiving circuit group from the information of the bit number of the error, and send it back to the communication device It features a loopback function.

(4) In the signal transmission / reception device according to (1), the error detection circuit detects the error bit position of the test signal received by the transmission circuit group, and the error bit position information is transmitted to the transmission circuit. From the group to the receiving circuit group, generate a test signal containing the same error bit position as the signal received by the test signal generating circuit of the receiving circuit group from the information of the error bit position, and send it back to the communication device It features a loopback function to return.

(5) In the signal transmitting / receiving device according to (1), the error detection circuit detects an error in the test signal received by the transmission circuit group, and the error information is sent at a speed lower than the signal transmission speed. It has a circuit that transmits from the transmitting circuit group to the receiving circuit group by bit serial signal, reproduces the test signal containing the same error as the signal received by the test signal generating circuit of the receiving circuit group from the error information, and sends it back to the communication device. It features a loopback function. Further, (6) the signal transmission / reception device according to any one of (1) to (5) above, including a circuit for transmitting a timing signal of the test signal received by the transmission circuit group from the transmission circuit group to the reception circuit group, and the timing signal. Based on the above, the test signal generating circuit generates a test signal including error information synchronized with the test signal received by the test signal generating circuit, and sends it back to the communication device. (7) In the signal transmission / reception device according to (1) to (6) above, a circuit for transmitting error information from the transmission circuit group to the reception circuit group controls the presence or absence of transmission of the error information to generate an error. It is characterized by a loopback function capable of specifying whether the place is the transmitting circuit side or the receiving circuit side.

[0014]

BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings using an example. FIG. 1 is a basic configuration example of a communication device and a signal transmitting / receiving device according to the present invention. In this figure, 101 is a communication device A for transmitting and receiving parallel signals, 103
Is a communication device B that transmits and receives serial signals.
The signal transmitting / receiving device 102 converts parallel signals and serial signals between two communication devices to transmit / receive signals. The loopback test method with the configuration like this example may be a loopback between the communication device A and the signal transmitting / receiving device and a loopback between the communication device B and the signal transmitting / receiving device. Therefore, only the loopback test between the communication device A and the signal transmitting / receiving device is shown.

In this example, the signal transmitter / receiver is a transmitter circuit.
IC104 and receiver circuit IC108 has different transmitter and receiver circuits.
Composed of IC. The transmission circuit IC includes a serializer 105 that converts a parallel signal into a serial signal and a transmission driver 107 that drives the serial signal TX.
Is composed of an input buffer 111 that receives the serial signal RX and a deserializer 109 that converts the serial signal into a parallel signal. During normal communication, that is, during the non-loopback test, the parallel signal TXD transmitted from the communication device A is converted into the serial signal TX by the transmission circuit IC and transmitted to the communication device B, and vice versa. The serial signal RX is converted into a parallel signal RXD by the receiving circuit IC and transmitted to the communication device A.

In this example, the loopback test circuit, which is a feature of the present invention, is the error detection circuit 10 in the transmission circuit IC.
6, test signal generating circuit 110 in the receiving circuit IC, and wiring 112 for transmitting error information from the transmitting circuit IC to the receiving circuit IC
Composed of. The error detection circuit 106 detects an error by, for example, sequentially comparing a test signal pattern and a received signal pattern, which are predetermined with the communication device A, with each other. On the other hand, the test signal generation circuit generates a test signal pattern defined in advance with the communication device A,
Any bit of the test signal pattern can be inverted based on the error information.

A specific example of the operation of the loopback test of the present invention will be described with reference to FIG. 2 in which the presence or absence of an error is transmitted from the transmission circuit IC to the reception circuit IC as error information. TP1 and TP2 are test signal patterns determined in advance with the communication device A. The signal TR received by the transmission circuit IC is compared with TP1 by the error detection circuit 106, and if there is a discrepancy between the two, such as E1, it is detected as an error. When the error detection circuit 106 detects an error, the error signal DE
H level is output to. The error signal DE is transmitted to the test signal generating circuit of the receiving circuit IC through the wiring 112. In the test signal generation circuit, the error signal DE from the transmission circuit is L
In the case of the level, the test signal pattern TP2 defined with the communication device A is generated, but when the H level of the error signal DE is received, for example, the signal TT in which 1 bit (E2) of the test signal pattern TP2 is inverted is received. To occur. Since this signal TT is transmitted to the communication device A, it is possible to test whether or not there is an error in the loopback path between the communication device and the signal transmission / reception circuit by this loopback test. Here, the transmission speed of the error signal DE can be made as low as the one cycle time TPC of the test signal pattern. Therefore, the wiring connecting the transmitter circuit IC and the receiver circuit IC and the IC pin having a low speed can be used, and the mounting cost can be reduced. Figure 3
With the same device configuration as in Fig. 1, the transmitter circuit IC to the receiver circuit IC
An example of the operation of the loopback test in the case of transmitting the number of errors as the error information is described. TP1 and TP2 are test signal patterns determined in advance with the communication device A. The signal TR received by the transmitter circuit IC is compared with TP1 by the error detection circuit, and if there is a discrepancy between the two like E1, it is detected as an error, and the counter in the error detection circuit detects an error within one cycle of the test signal pattern. The number is counted. In the next cycle of the test signal pattern, for example, an error signal DE that repeats L level and H level by the number of errors is output, and the receiving circuit IC is passed through the wiring 112.
Is transmitted to the test signal generating circuit. In the example of FIG. 3, there are three errors E1, and the error signal DE is a signal in which the L level and the H level are repeated three times. The test signal generation circuit generates a signal TT which is the bit (E2) of TP2 inverted by the number of errors transmitted by the error signal DE. Since this signal TT is sent to the communication device A, this loopback test can test the number of errors in the loopback path. Here, the amount of signals transmitted to the transmitting circuit IC and the receiving circuit IC can be compressed to a bit number that is twice the number of errors, and the transmission speed of the error signal DE can be slower than that of the transmission / reception signal. Therefore, as in the above example, the wiring connecting the transmission circuit IC and the reception circuit IC and the IC pin can be low speed, and the mounting cost can be reduced. In FIG. 3, due to space limitations, the time relationship between the signals (TR, TP1), the signal DE, and the signal (TT, TP2) is different, as shown by the time T. Further, the time scale of the signal DE is smaller than that of other signals.
In this example, a method of repeating the L level and the H level by the number of errors is used as a method of transmitting the number of errors, but a method of transmitting the number of errors by a 2-bit signal of a binary signal and a clock signal Any method capable of transmitting the number may be used. In FIG. 4, an operation example of the loopback test in the case of transmitting the position of the error on the test signal pattern as the error information from the transmission circuit IC to the reception circuit IC with the same device configuration as in FIG. 1 will be described. TP1 and TP2 are test signal patterns determined in advance with the communication device A. Transmission circuit
The signal TR received by the IC is compared with TP1 in the error detection circuit, and if there is a discrepancy between the two like E1, it is detected as an error, and the position of the error on the test signal pattern is recorded in the memory in the error detection circuit. It In the next cycle of the test signal pattern, the error signal DE including the error position information is output and transmitted to the test signal generation circuit of the reception circuit IC through the wiring 112. In the example of FIG. 4, the error E1
There are three error signals, and the error signal DE is a signal including a data set of position information of each error, ER1, ER2, and ER3. The test signal generation circuit generates a signal TT by inverting the bit (E2) of TP2 that reproduces the error position information from the error signal DE. Since this signal TT is transmitted to the communication device A, a loopback test that reproduces the error position can be performed. Here, the amount of signals transmitted to the transmitting circuit IC and the receiving circuit IC can be compressed to about (the number of errors) × (the number of bits of the test signal pattern expressed in binary number),
The transmission speed of the error signal DE can be set lower than that of the transmission / reception signal. Therefore, as in the above example, the transmitter circuit IC
It is possible to use low-speed wiring and IC pins that connect the and receiving circuit ICs, and reduce the mounting cost. In FIG. 4, due to space limitations, the time relationship between the signals (TR, TP1), the signal DE, and the signal (TT, TP2) is different as shown by the time T. Also, the signal D
The time scale of E is smaller than the other signals. In FIG. 5, with the same device configuration as in FIG. 1, the transmitter circuit IC to the receiver circuit
A description will be given of an operation example of the loopback test when the error information to the IC is transmitted by a bit serial signal having a speed lower than the signal transmission speed. TP1 and TP2 are test signal patterns determined in advance with the communication device A. Transmitter circuit IC
The signal TR received at is compared with TP1 by the error detection circuit, and if there is a discrepancy between the two like E1, it is detected as an error, and error information is recorded in the memory in the error detection circuit. In the next cycle of the test signal pattern, the error signal DE is output as a bit serial signal having a speed lower than the transmission speed of the transmission / reception signal, and is transmitted to the test signal generation circuit of the reception circuit IC through the wiring 112. The test signal generation circuit generates a signal TT by inverting the bit (E2) of TP2 that reproduces the test signal received by the transmission circuit IC from the error signal DE. In the example of FIG. 5, one cycle of the test signal pattern is sent as the error signal DE at 1/100 low speed as it is and sent from the transmission circuit IC to the reception circuit IC. in this case,
It takes 100 times as long as the signal transmission time from the transmitter circuit IC to the receiver circuit IC, that is, 100 times the cycle time TPC of the test signal pattern to perform the loopback test.
Send back the test signal received by the transmitter circuit IC as it is,
A test equivalent to the conventional loopback test can be performed. Since the transmission speed of the error signal DE is lower than that of the transmission / reception signal, the wiring connecting the transmission circuit IC and the reception circuit IC and the IC pin having a low speed can be used, and the mounting cost can be reduced. In FIG. 5, due to space limitations, signals (TR, TP1), signals DE and signals (TT,
As shown by the time T of TP2), the time relationship is shifted.
Further, the time scale of the signal DE is smaller than that of other signals.

FIG. 6 shows a second configuration example of the communication device and the signal transmitting / receiving device according to the present invention. Configuration of communication device and signal transmission / reception device, transmission circuit IC and reception circuit IC in the signal transmission / reception device
The configuration of is the same as that of the above basic configuration example. In this figure, 601
Is a communication device A for transmitting and receiving parallel signals, and 603 is a communication device B for transmitting and receiving serial signals. The signal transmitting and receiving device 602 converts the parallel signal and the serial signal between these two communication devices to transmit and receive signals. Is. Similar to FIG. 1, FIG. 6 shows only the loopback test between the communication device A and the signal transmitting / receiving device for simplification.

In this example, the signal transmitter / receiver is a transmitter circuit.
IC604 and receiver circuit IC608 has separate transmitter and receiver circuits.
Composed of IC. The transmission circuit IC includes a serializer 605 that converts a parallel signal into a serial signal and a transmission driver 607 that drives the serial signal TX.
Is composed of an input buffer 611 that receives the serial signal RX and a deserializer 609 that converts the serial signal into a parallel signal. During normal communication, that is, during the non-loopback test, the parallel signal TXD transmitted from the communication device A is converted into the serial signal TX by the transmission circuit IC and transmitted to the communication device B, and vice versa. The serial signal RX is converted into a parallel signal RXD by the receiving circuit IC and transmitted to the communication device A.

In this example, the loopback test circuit is
Error detection circuit 606 in the transmitter circuit IC, test signal generation circuit 610 in the receiver circuit IC, wiring 612 for transmitting error information from the transmitter circuit IC to the receiver circuit IC, timing information of the test signal from the transmitter circuit IC to the receiver circuit IC It is composed of the wiring 613 which transmits to. The error detection circuit is previously installed in the communication device A.
An error is detected by, for example, successively comparing the test signal pattern and the received signal pattern defined between the above and the above. The error detection circuit also extracts the timing information of the test signal pattern as another function. On the other hand, the test signal generation circuit
It is possible to generate a predetermined test signal pattern with the communication device A and invert any bit of the test signal pattern based on the error information. Further, the test signal generation circuit can control the generation timing of the test signal pattern based on the timing information.

An operation example of the loopback test in the second specific example will be described with reference to FIG. 7 in which the presence or absence of an error is transmitted as error information from the transmitting circuit IC to the receiving circuit IC. TP1 is a test signal pattern determined in advance with the communication device A. Signal TR received by transmitter circuit IC
Is compared with TP1 by the error detection circuit, and if there is a discrepancy between the two like E1, it is detected as an error. When the error detection circuit detects an error, an H level is output to the error signal DE. The error signal is transmitted to the test signal generation circuit of the reception circuit IC through the wiring 612. Further, the error detection circuit extracts the start timing of the test signal pattern and outputs the H level as the timing signal DT. The timing signal DT is transmitted to the test signal generation circuit of the reception circuit IC through the wiring 613. The test signal generation circuit
Generation of the test signal pattern is started based on the timing signal DT from the transmission circuit. The error signal from the transmitter circuit is L
In the case of the level, the test signal pattern TP1 defined with the communication device A is generated, but when the H level of the error signal DE is received, for example, the signal TT in which 1 bit (E2) of the test signal pattern TP1 is inverted is generated. To occur. Since this signal TT is transmitted to the communication device A, it is possible to test whether or not there is an error in the loopback path by this loopback test. In this second example, since the test signal pattern received from the communication device A and the test signal pattern transmitted to the communication device A can be synchronized, the loopback signal from the communication device A that loops back the conventional received signal as it is. Looks equivalent to

FIG. 8 shows a third configuration example of the communication device and the signal transmitting / receiving device according to the present invention. Configuration of communication device and signal transmission / reception device, transmission circuit IC and reception circuit IC in the signal transmission / reception device
The configuration of is the same as that of the above basic configuration example. In this figure, 801
Is a communication device A that transmits and receives parallel signals, and 803 is a communication device B that transmits and receives serial signals. It is the signal transmission and reception device 802 that converts parallel signals and serial signals between these two communication devices and transmits and receives signals. Is. Similar to FIG. 1, FIG. 8 shows only the loopback test between the communication device A and the signal transmitting / receiving device for simplification.

In this example, the signal transmitter / receiver is a transmitter circuit.
IC804 and receiver circuit IC808 has separate transmitter and receiver circuits.
Composed of IC. The transmission circuit IC is composed of a serializer 805 that converts a parallel signal into a serial signal and a transmission driver 807 that drives the serial signal TX.
Is composed of an input buffer 811 for receiving the serial signal RX and a deserializer 809 for converting the serial signal into a parallel signal. During normal communication (non-loopback test)
The parallel signal TXD transmitted from the communication device A is converted into a serial signal TX by the transmission circuit IC and transmitted to the communication device B, while the serial signal RX transmitted from the communication device B is a parallel signal transmitted by the reception circuit IC. It is converted to RXD and transmitted to communication device A.

In this example, the loopback test circuit is
Error detection circuit 806 in the transmitter circuit IC, test signal generation circuit 810 in the receiver circuit IC, wiring 812 for transmitting error information from the transmitter circuit IC to the receiver circuit IC, timing information of the test signal from the transmitter circuit IC to the receiver circuit IC It is composed of a wire 813 for transmitting to. The switch 814 controls whether or not the error signal can be transmitted from the transmission circuit IC to the reception circuit IC. The error detection circuit detects an error by, for example, successively comparing the test signal pattern and the received signal pattern, which are predetermined with the communication device A, with each other. The error detection circuit also extracts the timing information of the test signal pattern as another function.
On the other hand, the test signal generation circuit can generate a test signal pattern defined in advance with the communication device A and can invert any bit of the test signal pattern based on the error information. Further, the test signal generation circuit can control the generation timing of the test signal pattern based on the timing information. An operation example of the loopback test in the third specific example will be described with reference to FIG. 9 in which the number of errors is transmitted from the transmission circuit IC to the reception circuit IC as error information. TP1 and TP2 are communication devices in advance
It is a test signal pattern defined with A. The signal TR received by the transmission circuit IC is compared with TP1 by the error detection circuit, and if there is a discrepancy between them, it is detected as an error (E1), and the counter in the error detection circuit detects the number of errors in one cycle of the test signal pattern. Is counted. In the next cycle of the test signal pattern, for example, the number of errors L
An error signal DE that repeats the level and the H level is output and transmitted to the test signal generating circuit of the receiving circuit IC through the wiring 812. In the example of FIG. 9, there are three errors E1 and the error signal DE is a signal that repeats L level and H level three times. The error detection circuit also extracts the start timing of the test signal pattern and outputs it as the timing signal DT.
H level is output. The timing signal DT is transmitted to the test signal generating circuit of the receiving circuit IC through the wiring. The test signal generator circuit uses the timing signal DT from the transmitter circuit.
The test signal pattern starts to be generated based on
The signal TT is generated by inverting the bit (E2) of TP2 by the number of errors transmitted by DE. Since this signal TT is transmitted to the communication device A, this loopback test can obtain the number of errors in the loopback path. Here, by controlling the transmission of the error signal from the transmitting circuit IC to the receiving circuit IC, it is possible to identify whether the error occurred on the receiving side or the transmitting side, and a failure during the loopback test. It is effective as a countermeasure. In FIG. 9, due to space limitations, the time relationship between the signals (TR, TP1), the signal DE, and the signal (TT, TP2) is different as shown by the time T. Further, the time scale of the signal DE is smaller than that of other signals.

Further, as shown in the above specific example, the present invention is
Compared with the conventional loopback method that loops back the received signal as it is, the transmission speed of the signal transmitted from the transmission circuit IC to the reception circuit IC is made slower, so the number of high-speed input / output circuits in the transmission circuit IC and the reception circuit IC can be reduced. The power consumption can be reduced.

The example shown above is a transmission / reception device that performs serial-parallel conversion between two communication devices. Generally, a signal with parallel degree n (n ≧ 1) and a signal with parallel degree m (m ≧ 1) are used. It can be easily applied to a transmission / reception device that converts and.

[0027]

The signal transmitted from the transmitting circuit IC to the receiving circuit IC at the time of the loopback test is limited to necessary error information instead of returning the transmitted / received signal as it is. Therefore, a high-speed signal line connecting the transmitting circuit IC and the receiving circuit IC. And IC pins can be reduced, and mounting cost can be reduced. Also, the number of high-speed input / output circuits in the transmitter circuit IC and the receiver circuit IC can be reduced,
Power consumption can be reduced.

[Brief description of drawings]

FIG. 1 is a block diagram of a basic configuration example of a signal transmission / reception circuit to which the present invention is applied.

2 is a waveform diagram 1 of signal timing relationships during a loopback test of the signal transmitting / receiving circuit of FIG.

FIG. 3 is a waveform diagram 2 of signal timing relationships during a loopback test of the signal transmitting / receiving circuit of FIG.

FIG. 4 is a waveform diagram 3 of signal timing relationships during a loopback test of the signal transmitting / receiving circuit of FIG.

5 is a waveform diagram 4 of signal timing relationships during a loopback test of the signal transmitting / receiving circuit of FIG.

FIG. 6 is a block diagram of a second configuration example of the signal transmission / reception circuit of the present invention.

7 is a waveform diagram of signal timing relationships during a loopback test of the signal transmission / reception circuit of FIG.

FIG. 8 is a block diagram of a third configuration example of the signal transmission / reception circuit of the present invention.

9 is a waveform diagram of signal timing relationships during a loopback test of the signal transmission / reception circuit of FIG.

FIG. 10 is a block diagram of a basic configuration example of a conventional signal transmitting / receiving circuit.

[Explanation of symbols]

101, 601, 801, 1001 Communication device A 103, 603, 803, 1003 Communication device B 102, 602, 802, 1002 Signal transmission / reception device 104, 604, 804, 1004 Transmission circuit IC 105, 605, 805, 1005 Serializer 106, 606, 806 Error detection circuit 107, 607, 807, 1007 Driver circuit 108, 608, 808, 1008 Receiver circuit IC 109, 609, 809, 1009 Deserializer 110, 610, 810 Test signal generation circuit 111, 611, 811, 1011 Input Buffer circuit 112, 612, 812 Error signal transmission wiring 613, 813 Timing signal transmission wiring 814 Error signal transmission control switch 1020 Loopback signal transmission wiring TXD transmission parallel signal RXD reception parallel signal TX transmission serial signal RX reception serial signal TR Error detection circuit input signal DE Error information signal TT Test signal generation circuit output DT Timing signal DL Conventional loopback signal E1, E2 Error bit TPC test signal pattern cycle time TP1, TP2 Determined between communication device A Test belief Pattern T time.

   ─────────────────────────────────────────────────── ─── Continued front page    (72) Inventor Hiroki Yamashita             1-280, Higashi Koikekubo, Kokubunji, Tokyo             Central Research Laboratory, Hitachi, Ltd. (72) Inventor Yusuke Takeuchi             3 shares at 6-16 Shinmachi, Ome City, Tokyo             Hitachi Device Development Center (72) Inventor Satoru Isomura             3 shares at 6-16 Shinmachi, Ome City, Tokyo             Hitachi Device Development Center F-term (reference) 2G132 AA00 AB01 AC03 AD06 AG01                       AH03 AK07 AL09                 5K035 AA01 BB01 DD02 GG01 GG08                       JJ05 MM03 MM06

Claims (19)

[Claims] 1. A parallel degree n (n ≧ n) using optical or electrical signals.
A signal transmission / reception device for converting a signal of 1) and a signal of parallelism m (m ≧ 1) between communication devices to perform transmission / reception, receiving a signal of parallelism n and converting it to a signal of parallelism m. In a signal transmitting / receiving device configured by a transmitting circuit group for transmitting and transmitting a signal of parallelism m, converting the signal into a signal of parallelism n and transmitting the signal, a test signal transmitted from the communication device to the transmitting circuit group. Error detection circuit, the receiving circuit group has a test signal generation circuit equivalent to the communication device, and the information of the error detected by the error detection circuit of the transmitting circuit group is received at a speed lower than the signal transmission speed. A signal transmitting / receiving apparatus having a circuit for transmitting to a group, having a loopback function of generating a test signal containing an error in the test signal generating circuit based on the error information and sending the test signal back to the communication apparatus. 2. An error detection circuit detects the presence or absence of an error in a test signal received by the transmission circuit group, and has a circuit for transmitting 1-bit information indicating the presence or absence of the error from the transmission circuit group to the reception circuit group. The test signal generation circuit of the receiving circuit group generates a test signal including the presence or absence of an error from the information on the presence or absence,
The signal transmitting / receiving apparatus according to claim 1, wherein the signal transmitting / receiving apparatus has a loopback function of sending back to the communication apparatus. 3. A test signal received by a transmission circuit group is detected by an error detection circuit to detect an error bit number, and a circuit for transmitting information on the error bit number from the transmission circuit group to the reception circuit group is provided. 2. The signal transmission / reception according to claim 1, wherein a test signal including the same error bit number as the signal received by the test signal generating circuit of the receiving circuit group is generated from the information of the bit number and sent back to the communication device. apparatus. 4. An error detection circuit detects a bit position of an error in a test signal received by the transmission circuit group, and transmits information of the bit position of the error from the transmission circuit group to the reception circuit group. The signal according to claim 1, wherein a test signal including a bit position having the same error as the signal received by the test signal generating circuit of the receiving circuit group is generated from the bit position information and is sent back to the communication device. Transceiver. 5. A circuit for detecting an error in a test signal received by a transmission circuit group by an error detection circuit, and transmitting error information from the transmission circuit group to the reception circuit group by a bit serial signal slower than the signal transmission speed. The signal transmission / reception according to claim 1, further comprising: a loopback function of reproducing a test signal including the same error as the signal received by the test signal generation circuit of the reception circuit group from the error information and sending the test signal back to the communication device. apparatus. 6. A circuit for transmitting a timing signal of a test signal received by a transmitting circuit group from the transmitting circuit group to the receiving circuit group, and synchronizing with a test signal received by the test signal generating circuit based on the timing signal. The signal transmitting / receiving apparatus according to claim 1, wherein the signal transmitting / receiving apparatus has a loopback function of generating a test signal including error information and sending the test signal back to the communication apparatus. 7. A circuit for transmitting error information from a transmission circuit group to a reception circuit group controls presence / absence of transmission of error information, thereby making it possible to specify whether the error occurrence location is on the transmission circuit side or the reception circuit side. 6. The signal transmitting / receiving apparatus according to claim 1, wherein the signal transmitting / receiving apparatus has a simple loopback function. 8. A signal transmission / reception device having a first circuit for receiving a signal and a second circuit for transmitting a signal, wherein the first circuit detects the presence or absence of an error in an input test signal pattern. If an error is detected, an error signal indicating an error is transmitted to the second circuit, and the second circuit outputs a correct test signal pattern or an erroneous test signal pattern based on the error signal. A signal transmission / reception circuit characterized by transmitting either of them. 9. The first circuit uses a parallel signal with parallelism a (a ≧ 1) as a received signal, and the second circuit has parallelism b (b).
A parallel signal of ≧ 1) is used as a transmission signal, and the error signal is a serial signal or a parallel degree c (a> c, b> c).
9. The signal transmitting / receiving circuit according to claim 8, wherein the signal transmitting / receiving circuit is a parallel signal. 10. The transmission circuit IC having a serializer for converting a received parallel signal into a serial signal and a transmission driver for transmitting the serial signal, wherein the first circuit is a transmission circuit IC. Signal transmitting and receiving circuit. 11. The signal transmission / reception according to claim 8, wherein the second circuit is a reception circuit IC having an input buffer for receiving a serial signal and a deserializer for converting the serial signal into a parallel signal. circuit. 12. The signal transmission / reception circuit according to claim 8, wherein the first circuit compares a predetermined test signal pattern with an input test signal pattern to detect the presence or absence of an error. . 13. The second circuit has a test signal generation circuit for generating a predetermined test signal pattern and inverting and transmitting an arbitrary bit of the test signal pattern based on error information. 9. The signal transmitting / receiving circuit according to claim 8. 14. The error signal has two levels, L and H, and the test signal generation circuit generates a test signal pattern when the error signal is at L level, but when the H level is received, the test signal pattern is generated. 14. The signal transmission / reception circuit according to claim 13, wherein at least one bit of the signal is inverted and transmitted. 15. A test method, in which a signal transmitting / receiving device having a transmitting circuit and a receiving circuit tests the state of communication with another communication device, wherein a test signal sent from the communication device is Rather than returning from the receiving circuit to the transmitting circuit as it is and returning it to the communication device, a first step of evaluating the transmission state of the test signal in the receiving circuit, evaluation from the receiving circuit to the transmitting circuit based on the evaluation A loopback test method comprising a second step of transmitting a result signal and a third step of returning the test signal or a signal different from the test signal to the communication device based on the evaluation result by the transmission circuit. . 16. The test signal transmitted from the communication device in the receiving circuit in the first step,
16. The loopback test method according to claim 15, wherein the transmission state of the test signal is evaluated by comparing with a predetermined correct test signal. 17. The loopback method according to claim 15, wherein in the second step, the information amount of the evaluation result signal is smaller than the information amount of the test signal. 18. The loopback method according to claim 15, wherein, in the second step, the transfer rate of the evaluation result signal is lower than the transfer rate of the test signal. 19. In the third step, the transmitting circuit creates a signal different from the correct test signal by inverting at least one bit of the predetermined correct test signal based on the evaluation result. The loopback test method according to claim 15, wherein the loopback test is performed by returning to the communication device.