JP2003202993A - Intermediate code execution system, intermediate code execution method, and intermediate code execution program - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an intermediate code execution system that has high performance in executing an intermediate code, an intermediate code execution method, and an intermediate code execution program. <P>SOLUTION: The intermediate code execution system 10 which has processing modules 11 and 12 which execute each of commands included in a predetermined command system and sequentially interprets and executes intermediate codes prepared in accordance with the command system comprises a first command execution portion 15 which makes judgment upon whether a command taken out from an intermediate code corresponds to each of subsets selected from the command system, and executes the processing module 11 corresponding to the command if the taken-out command corresponds to each of the subsets, and a second processing command execution portion 17 which specifies a type of a processing command which has not been executed in the first processing command execution portion 15, and executes the processing module 12 corresponding to the processing command. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an intermediate code execution system for executing intermediate code, an intermediate code execution method, and an intermediate code execution program.

[0002]

2. Description of the Related Art For the purpose of providing a program that does not depend on a computer platform such as hardware or OS, a virtual machine (VM) is created on each platform by a software method or a hardware method. A method of constructing and executing intermediate code between source code and object code (hereinafter referred to as intermediate code) on this virtual machine has been proposed. As one of the programming languages adopting such a method, there is Java (R) which adopts an intermediate code format called a class file.
In the following, the hardware and the virtual machine constructed on the hardware may be collectively referred to as an intermediate code execution system.

According to the above method, since a single program code can be supplied to various platforms and executed, it is not necessary to prepare an object code that can be executed only on each platform. As a result, not only can the distribution of the program be simplified, but also the software development can be made efficient. Therefore, virtual machines are being constructed on various computer platforms. Furthermore, recently, in various electronic devices (hereinafter referred to as embedded devices) equipped with a processor, a virtual computer is starting to be built on the processor.

Here, as a virtual computer, an interpreter system is known which is constructed on a platform by software and sequentially interprets and executes bytecode instructions contained in a class file.

However, the interpreter type virtual machine requires a process of extracting each bytecode instruction from the class file and interpreting its contents, and this process may become an overhead of the system. . To reduce such overhead and improve performance, a JIT compiler (Just In Time C) that compiles class files into native code specific to each hardware and then executes them.
ompiler) method and AOT compiler (Ahead Of Time C)
ompiler) method has been proposed. Further, it has been attempted to construct a virtual machine in hardware, such as a Java (R) chip specially designed to directly execute bytecode instructions.

Since the compiler system such as JIT or AOT described above executes the native code of the processor, it is superior to the interpreter system only in terms of instruction execution speed. However, in the compiler method, the work memory necessary for the compilation work itself,
There is a problem in that a larger amount of memory is required than in the interpreter method because an area for storing a native code that is 4 to 10 times larger than the class file is required.

[0007] Such a problem becomes remarkable especially in an embedded device in which hardware resources are more restricted than in an ordinary computer. In addition, when starting the compilation after instructing the execution of the class file, there is a possibility that the compilation work becomes an overhead and sufficient performance cannot be obtained.

According to the above Java (R) chip, it is possible to execute a class file with high performance without compiling. However, a large amount of development cost is required for developing such a dedicated chip. That is, the cost of the chip itself cannot be avoided. Further, in view of the fact that the version of the language specification is appropriately upgraded or modified according to technological progress and market needs, it is not always preferable to configure the virtual machine as hardware. In particular, for virtual machines in embedded devices, due to the strong demand for cost reduction and the specification upgrade in a short cycle, Java
The adoption of (R) chips is not practical.

As described above, the compiler method and J
The technology of the ava (R) chip and the like has problems in terms of cost, required hardware resources, etc., and it is particularly difficult to apply them to embedded devices with severe restrictions. Therefore, it is desired to improve the performance of the virtual machine or the intermediate code execution system by another method in view of the application to the embedded device.

[0010]

SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and has a low cost.
An object is to provide an intermediate code execution system, an intermediate code execution method, and an intermediate code execution program capable of improving the performance when executing the intermediate code in a limited hardware environment.

[0011]

In order to solve the above problems, according to a first aspect of the present invention, a system for executing an intermediate code obtained by converting a source code created in a predetermined programming language. The first storage means, the second storage means that is slower than the first storage means, and the first storage means are stored and correspond to a subset of the instruction set of the programming language. Extracted from the intermediate code by a first interpreter module, a second interpreter module stored in the second storage means and corresponding to the remaining instructions of the instruction set, and the first interpreter module. That subset of the subsets corresponds to the subset, and if the subset is in the subset, execute it, while If not in the subset, the second
The interpreter module of 1. provides a control means for specifying and executing which one of the remaining instructions the instruction corresponds to, and an intermediate code execution system.

According to a second aspect of the present invention, a predetermined programming language is provided by the control means to which at least the first storage means and the second storage means, which is slower than the first storage means, are connected. An intermediate code execution method for executing an intermediate code obtained by converting the source code created in 1., wherein the control means intermediates a first interpreter module corresponding to a subset of an instruction set of the programming language. The step of determining which of the subsets the instruction fetched from the code corresponds to, and executing the instruction if the corresponding one is in the subset, and the control means, the corresponding one is not in the subset In this case, by the second interpreter module corresponding to the remaining instructions of the instruction set,
And executing which one of the remaining instructions the instruction corresponds to, and executing the intermediate code execution method.

Further, according to a third aspect of the present invention, at least a first storage means and a control means to which a second storage means, which is slower than the first storage means, is connected, is used to control a predetermined program language. A program that executes the intermediate code obtained by converting the source code created in
A first interpreter module corresponding to a subset of the instruction set of the programming language and stored in the first storage means, and corresponding to the remaining instructions of the instruction set and stored in the second storage means. A second interpreter module according to the present invention, wherein the control means determines, by the first interpreter module, which one of the subsets the instruction fetched from the intermediate code corresponds to, and the corresponding one is the above-mentioned one. If it is in the subset, it is executed, and if it is not in the subset, the second interpreter module identifies and executes which of the remaining instructions the instruction corresponds to. An intermediate code execution program is provided.

According to the present invention having the above-mentioned configuration, the first interpreter module corresponding to the subset of the instruction set of the predetermined programming language and the second interpreter module corresponding to the remaining instructions of the instruction set. And the instructions included in the subset are executed by the first interpreter module stored in the fast first storage means, and the other instructions are executed by the first interpreter module stored in the slow second interpreter module. Since it is executed by the second interpreter module, it is possible to speed up the execution of the instructions included in the subset. In the present invention, the execution speed of the instructions not included in the subset is not increased, but the effect of increasing the speed of execution of the instructions included in the subset is significant. Therefore, an intermediate code execution system for executing a predetermined intermediate code is provided. Performance can be improved. Since the present invention does not require special hardware, it can be implemented at low cost, and the performance of intermediate code execution can be improved without significantly increasing the memory consumption, so that embedded devices can be implemented. Can be suitably applied to.

In the present invention, the predetermined programming language is Java (R) language and the intermediate code is Java.
A class file containing (R) bytecode instructions, said instructions may be Java (R) bytecode instructions.

Further, it is preferable that the subset is a set in which instructions included in the intermediate code at a predetermined frequency or more are selected, and is preset in accordance with an environment to which the present invention is applied. As a result, the high-frequency instructions set according to the environment can be executed at high speed by the first interpreter module, so that it is possible to further improve the performance when executing the intermediate code.

[0017]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings. [First Embodiment] First, a first embodiment of the present invention will be described with reference to FIGS. FIG. 1 is a diagram schematically showing a hardware configuration of an intermediate code execution system according to the first embodiment of the present invention, and FIG. 2 is a functional block diagram of the intermediate code execution system according to the first embodiment of the present invention. is there.

As shown in FIG. 1, the hardware configuration of the intermediate code execution system has a processor (processor core) 2 and a high speed memory 3, a chip 1 forming a processing unit, and a storage section having a RAM 7 and a ROM 8. 6 and. In addition to these, an input device, a display device, an external interface, and the like may be provided, but these do not have a direct relationship with the configuration and the operational effects of the present invention, and are therefore omitted here.

When the elements described in the claims are compared with the configuration shown in FIG. 2, the control means described in the claims corresponds to the processor 2 and the first storage means corresponds to the high speed memory 3. And the second storage means corresponds to the storage unit 6.

Here, while the processor 2 and the storage unit 6 are connected via the external bus 5, the processor 2 and the high-speed memory 3 have a bus width wider than the external bus 4 and a high-speed internal bus. Connected via 4 and high speed memory 3
Can transfer data to the processor 2 faster than the storage device 5. Although such a high-speed memory 3 is composed of a volatile memory, the RO forming the storage unit 6
Since the cost is higher than that of M or RAM, a small capacity is usually mounted. Although a built-in memory or a cache memory can be used as the high-speed memory 3, in the present embodiment,
As an example, a case where a built-in memory is used is shown.

In the hardware configuration as described above,
By executing various software stored in the storage unit 6 by the processor 2, the intermediate code execution system 10 having a functional block diagram as shown in FIG. 2 is realized.

The intermediate code execution system 10 executes platform-independent intermediate code. In the first embodiment, a class file obtained by compiling a source code created in Java (R) language is created. The case when executing is shown.

Each functional block will be described below.
The intermediate code execution system 10 includes a processing instruction acquisition unit 1
3, a first processing instruction executing section 15 and a second processing instruction executing section 17 are provided. The instruction acquisition unit 13 sequentially extracts the instruction code to be executed next from the class file, and the instruction code extracted by the instruction acquisition unit 13 is passed to the first processing instruction execution unit 15.

The first processing instruction executing section 15 is provided with a selection instruction determining section 14, a processing module and 11, and has a Ja
It has a function of sequentially interpreting and executing a subset of bytecode instructions selected from all bytecode instructions included in the va (R) language instruction system. More specifically, the selection instruction determination unit 14 compares the instruction code extracted by the processing instruction acquisition unit 13 with each of the bytecode instructions included in the above-mentioned subset, and if they are the same, The processing module 11 corresponding to the bytecode instruction is executed.

The processing module 11 is a software program which is provided corresponding to each bytecode instruction included in the above-mentioned subset and causes the processor 2 to execute the processing according to the definition content of each bytecode instruction.
When there is no identical bytecode instruction included in the subset, the fetched instruction code is passed to the second processing instruction execution unit 17.

The second processing instruction executing section 17 includes a non-selection instruction specifying section 16 and a processing module 12, and has a function of sequentially interpreting and executing bytecode instructions not included in the above-mentioned subset. have. More specifically, in the non-selected instruction specifying unit 16, the fetched instruction code is compared with each of the bytecode instructions not included in the above-mentioned subset, and if they are the same, the bytecode instruction is determined to be the same. The corresponding processing module 12 is executed.

By the combination of the first processing instruction executing section 15 and the second processing instruction executing section 17 as described above, a predetermined processing is executed in the processing module 11 or 12 corresponding to the fetched instruction code.

As described above, in the first embodiment,
The bytecode instruction is divided into two, one that is executed by the first processing instruction execution unit 15 and one that is executed by the second processing instruction execution unit 17. Here, the byte code instructions in the Java (R) language are four arithmetic operation instructions (iadd, isub, imul, idiv, ...) And bit operation instruction (ior, iand, ishl, ...) With small granularity. , Memory manipulation instructions with medium granularity (iload, istore, iaload, ...), and instructions specific to Java (R) with large granularity (new, invokespecial, ...
・) The frequency of appearance in the class file generally has a tendency that it is high for instructions with small granularity and low for instructions with large granularity.

In view of this, in the first embodiment, an instruction with a small granularity and a high appearance frequency is selected in advance from all bytecode instructions, and the selected processing instruction bytecode instruction is executed by the first processing instruction executing section 15. The second processing instruction executing unit 17 executes the remaining bytecode instructions and executes the remaining bytecode instructions. That is, the first processing instruction execution unit 15 has the processing module 11 corresponding to each of the selected bytecode instructions. Then, the selection command determination unit 1
4 compares the operation code of the given instruction code with the operation code of the selected bytecode instruction one by one, and when they are the same, executes the corresponding processing module 11. In addition, the second processing instruction execution unit 17 has a processing module 12 corresponding to each of the remaining bytecode instructions. Then, the non-selected instruction specifying unit 16 compares the operation code of the given instruction code with the operation codes of the remaining bytecode instructions one by one, and if they are the same, executes the corresponding processing module 12.

However, which of the bytecode instructions has a high frequency may depend on the environment in which the intermediate code execution system 10 is installed. For example, since the purpose of use and the situation of use are different depending on whether it is installed in a mobile phone, a car navigation system, or a PDA, commands that are frequently used in one environment may be different from those in another. The system does not always have a high frequency.

Therefore, the appearance frequency of bytecode instructions is investigated according to the environment in which the intermediate code execution system 10 is installed, and the first processing instruction execution section 1 is based on the examination result.
More preferably, the bytecode instructions to be executed at 5 are selected.

Further, in the first embodiment, the class file is stored with the software program (first interpreter module) forming the first processing instruction execution unit 15 configured as described above stored in the high speed memory 3. To execute. For example, the intermediate code execution system 10 may copy the code of the software program forming the first processing instruction execution unit 15 from the storage unit 6 to the high-speed memory 3 before executing the class file. As described above, in order to store the software program forming the first processing instruction executing unit 15 in the high speed memory 3, the number of bytecode instructions to be executed by the first processing instruction executing unit 15 is adjusted to make the first processing instruction executing unit 15.
It is preferable that the software program forming the processing instruction execution unit 15 has a size that can be stored in the high-speed memory 3.

On the other hand, the second processing instruction executing section 17
The code of the software program (second interpreter module) forming the above may remain stored in the storage unit 6.

Next, the operation of the intermediate code execution system 10 according to the first embodiment will be described with reference to FIG. This operation is configured by sequentially executing a series of software programs stored in the storage unit 6 on the processor 2.

For example, the intermediate code execution system 10 is
A Java (R) application class file is received from an information input side (not shown), and the received class file is stored in the RAM 7 of the storage unit 6 (S1). Next, the intermediate code execution system 10 executes the class file by the following series of operations. At this time, the software program (first interpreter module) forming the first processing instruction execution unit 15 is stored in the high-speed memory 3 in advance. The following operation also corresponds to the intermediate code execution method in the first embodiment.

First, the processor 2 executes a predetermined software program to configure the processing instruction acquisition unit 13, and one instruction code is extracted from the class file (S2). Then, the software program (first interpreter module) forming the first processing instruction execution unit 15 stored in the high-speed memory 3 is executed, and S
It is determined whether the instruction code fetched in 2 can be specified as one of the selected bytecode instructions (S3), and if possible, the processing module 11 corresponding to the instruction code.
Is executed (S4). More specifically, the processing here is to compare the operation code of the instruction code fetched by the selection instruction determination unit 14 of the first processing instruction execution unit 15 with the operation code of the selected bytecode instruction one by one. ,
When they are the same, the corresponding processing module 11 is executed.

When it is not determined that the operation is possible in S3, that is, when the operation code of the instruction code fetched by the selection instruction determination unit 14 is not determined to be the same as any of the operation codes of the selected bytecode instructions. , The software program (second interpreter module) forming the second processing instruction execution unit 17 is executed, and the instruction code is identified as one of the remaining bytecode instructions (S5), and the identified instruction code is specified. The processing module 12 corresponding to is executed (S6).

More specifically, the processing in S6 is performed by combining the operation code of the instruction code given by the non-selected instruction specifying unit 16 of the second processing instruction execution unit 17 with the operation code of the remaining byte code instruction. They are compared one by one, and if they are the same, the corresponding processing module 12 is executed.

Thereafter, the same procedure as described above is performed for the next instruction code contained in the class file, and the class file is executed by repeating this procedure.

According to the above operation, the selected bytecode instruction of all bytecode instructions is L
It is executed by the process forming the inner loop (inner loup) indicated by 1 and the remaining bytecode instructions are executed by the process forming the outer loop (outer loup) indicated by L2.

As described above, in the first embodiment,
A bytecode instruction having a small granularity and a high appearance frequency is selected in advance from all bytecode instructions, and the first processing instruction execution unit 15 corresponding to the selected bytecode instruction interprets and executes the instruction code and cannot be executed. The second processing instruction executing unit 17 is configured to interpret and execute the generated instruction code. Therefore, it is possible to preferentially perform the interpretation and the execution of the bytecode instruction having a high appearance frequency. Furthermore, since the software program (first interpreter module) forming the first processing instruction execution unit 15 is stored in the high-speed memory 3, the first processing instruction execution unit 1
5 can interpret and execute a bytecode instruction having a high appearance frequency at high speed.

Therefore, according to the first embodiment, it is possible to preferentially and rapidly execute a bytecode instruction that frequently appears. On the other hand, since the second processing instruction executing unit 17 interprets and executes a bytecode instruction having a low appearance frequency, it is not possible to speed up the execution of the bytecode instruction. However, the first processing instruction execution unit 1
5, the effect of preferentially executing a bytecode instruction having a high appearance frequency at a high speed is extremely high, and the performance of the intermediate code execution system 10 is improved when the whole process of executing a class file is considered.

Further, in the first embodiment, the software program forming the first processing instruction execution section 15 (first
The interpreter module of 1) may have a structure optimized for execution of the selected instruction code, and in such a case, the performance of the intermediate code execution system 10 can be further improved.

For example, both the software program (first interpreter module) forming the first processing instruction execution unit 15 and the software program (second interpreter module) forming the second processing instruction execution unit 17 are both. Although it may be created in a high-level language such as C or C ++, the performance of the intermediate code execution system 10 can be further improved by incorporating the former into a structure optimized in assembly language.

Further, in the selected instruction judging unit 14, in comparing the opcode of the fetched instruction code with the opcode of the selected bytecode instruction to judge whether they are the same or not, the bytecode instruction having a higher frequency is used. It is more preferable to compare in order from. The same applies to the non-selected instruction specifying unit 16.

Here, the first embodiment is as follows from the viewpoint of a computer program product for executing the intermediate code. That is, at least the high-speed memory 3 and the processor 2 to which the low-speed storage unit 6 is connected as compared to the high-speed memory 3,
A program for executing a class file obtained by converting a source code created in the (R) language, which is Ja
A first interpreter module corresponding to a subset of the va (R) language instruction set and stored in the high speed memory 3, and a second interpreter module corresponding to the remaining instructions of the instruction set and stored in the storage unit 6. An interpreter module is included, and the processor 2 determines, by the first interpreter module, which one of the subsets the instruction fetched from the class file corresponds to. It is an intermediate code execution program that executes it, and if the corresponding one does not exist in the subset, the second interpreter module identifies and executes which of the remaining instructions the instruction corresponds to.

[Second Embodiment] Next, a second embodiment of the present invention will be described with reference to FIGS. Figure 4
It is a functional block diagram of intermediate code execution system 20 of a 2nd embodiment of the present invention. In FIG. 4, the same components as those in the first embodiment are designated by the same reference numerals. Intermediate code execution system 20 according to the second embodiment
Has the same basic configuration as that of the first embodiment,
The difference is that the first processing instruction execution unit 15 in the first embodiment is replaced with a first selection instruction execution unit 24 and a second selection instruction execution unit 26. Hereinafter, this difference will be mainly described.

The first selection instruction execution unit 24 includes a first selection instruction determination unit 23 and a processing module 21, and is a first bytecode instruction selected from all bytecode instructions.
Has a function of sequentially interpreting and executing a subset of.

The second select instruction executing section 26 includes a second select instruction determining section 25 and a processing module 22. Bytes selected from the remaining bytecode instructions excluding the first subset. It has a function of sequentially interpreting and executing the second subset of code instructions.

The processing module 21 is a software program that causes the processor 2 to execute the processing according to the definition content of each bytecode instruction belonging to the first subset, and the processing module 22 of each bytecode instruction belonging to the second subset. It is a software program that causes the processor 2 to execute processing according to the definition content.

The specific functions of the first selection instruction executing section 24 and the second selection instruction executing section 26 are substantially the same as those of the processing instruction executing section 15 in the first embodiment, and the fetched instruction code. Is the same as one of the bytecode instructions belonging to the first subset or the second subset, the bytecode instruction is executed.

Here, the first subset contains the bytecode instructions with the highest frequency of occurrence in the class file, and the second subset has the second highest frequency of occurrence in the class file. Contains level bytecode instructions.

In the second embodiment, the code of the software program forming the first selection instruction execution unit 24 is stored in the high speed memory 3. The code of the software program forming the second selection instruction execution unit 26 is preferably stored in the high-speed memory 3 when there is a free space, but when the free space is insufficient in the high-speed memory 3. May be stored in the storage unit 6.

Next, the operation of the intermediate code execution system 20 will be described with reference to FIG. First, as in the first embodiment, the intermediate code execution system 10 accepts a Java (R) application class file from an information input side (not shown), and stores the accepted class file in the RAM 7 of the storage unit 6 (S11). ), The first selection instruction execution unit 2
The class file is executed according to the following procedure with the software program forming the item 4 stored in the high-speed memory 3.

That is, first, one instruction code is taken out from the class file as in the first embodiment (S12).
Subsequently, the software program forming the first selection instruction execution unit 24 stored in the high-speed memory 3 is executed, and it is determined whether the fetched instruction code can be specified as any bytecode instruction of the first subset ( S13), if possible, the processing module 2 corresponding to the instruction code
1 is executed (S14). If not determined in S13, the software program forming the second selection instruction execution unit 17 is executed, and it is determined whether the instruction code can be specified as any bytecode instruction of the second subset (S15). ), If possible, the processing module 22 corresponding to the instruction code is executed (S1).
6).

Further, if it is not determined in S15 that it is possible, the software program forming the second processing instruction executing section 17 is executed to identify which of the remaining bytecode instructions is the instruction code. (S1
7) Then, the processing module 12 corresponding to the specified instruction code is executed (S18).

Thereafter, the same procedure as described above is performed for the next instruction code contained in the class file, and the class file is executed by repeating this procedure.

According to the second embodiment in which the class file is executed by the above operation, the first execution of the bytecode instruction having the highest frequency of appearance in the class file is executed.
As in the embodiment, it can be executed preferentially and at high speed, and the bytecode instruction having the next highest frequency in the class file can be executed with priority over the remaining bytecode instructions.

In the above operation, the code of the software program forming the first selection instruction executing section 24 is stored in the high speed memory 3 in advance. However, the free space of the high speed memory 3 is detected when the class file is executed. However, when there is a free space, the code of the software program forming the second selection instruction execution unit 26 may be stored in the high speed memory 3.

Although the intermediate code execution systems according to the first and second embodiments of the present invention have been described above, the present invention is not limited to these, and various improvements and changes can be made without departing from the spirit of the invention. Of course, it is possible. For example, in the above embodiment, the case where the built-in memory is used as the high speed memory 3 has been shown, but the present invention is not limited to this, and the high speed memory 3 may be a cache memory. Further, the present invention is not limited to the example of the hardware configuration shown in FIG. 1 and may be applied to any hardware configuration in which a relatively high speed memory and a relatively low speed memory are mixed. Is possible. The chip 1 may be, for example, an MPU or CPU alone, and further peripheral I / O
It may be a microcontroller including a bus interface, a ASIC specialized for a specific purpose,
It may be an SoC equipped with the main functions of the system. Further, it may be configured to include a plurality of processors 2.

When a cache memory is used as the high speed memory 3 in the first embodiment, the code of the first interpreter module may be stored in the storage unit 6 and the execution of the class file may be started. Even in this case, if the code is stored in the cache memory which is the high-speed memory 3 by the predetermined cache management mechanism, the performance of the intermediate code execution system 10 can be improved as in the above embodiment. You can The same applies when a cache memory is used in the second embodiment.

However, when a cache memory is used as the high speed memory 3, the contents of the cache memory are managed by the cache management mechanism and cannot be explicitly operated. Therefore, in this case, it is desirable that the code of the first interpreter module be efficiently cached by the cache management mechanism. In addition, even if the code of the first interpreter module is cached, if a cache miss occurs, the cache management mechanism releases a part of the cache memory and writes new contents. A part of the code of the printer module may be lost, and the effect of the present invention may not be obtained. From this point of view, it is preferable to use an internal memory that can be explicitly operated as the high-speed memory 3 rather than the cache memory.

In each of the above embodiments, the case where the Java (R) class file is executed as the intermediate code has been described, but the present invention is not limited to this.

Further, the software program forming the intermediate code execution system may be stored in the storage unit 6 in advance, or may be provided from outside the intermediate code execution system as needed. At this time, the form to be provided from the outside of the intermediate code execution system is not limited to the download from the server via the network, but may be provided by a storage medium such as a CD-ROM or a portable memory.

Furthermore, by adopting a configuration in which at least a part of the processing module is hardware logic, it is possible to further improve the performance. For example, if the processing module 11 of the first processing instruction execution unit 15 in the first embodiment is a hardware logic, it is possible to further speed up the execution of high-frequency bytecode instructions. In such a case, by adjusting the number of bytecode instructions to be selected, the number of gates required for hardware logic conversion can be kept within an allowable range.

[0066]

According to the present invention, the first interpreter module corresponding to the subset of the instruction set of the predetermined programming language and the second interpreter module corresponding to the remaining instructions of the instruction set are used. , The instructions included in the subset are executed by the first interpreter module stored in the high speed first storage means,
Since the other instructions are executed by the second interpreter module stored in the slower second interpreter module, it is possible to speed up the execution of the instructions included in the subset. In the present invention, the execution speed of the instructions not included in the subset is not increased, but the effect of increasing the speed of execution of the instructions included in the subset is significant. Therefore, an intermediate code execution system for executing a predetermined intermediate code is provided. Performance can be improved. Since the present invention does not require special hardware, it can be implemented at low cost, and the performance of intermediate code execution can be improved without significantly increasing the memory consumption, so that embedded devices can be implemented. Can be suitably applied to.

[Brief description of drawings]

FIG. 1 is a conceptual diagram of a hardware configuration applicable to a first embodiment of the present invention.

FIG. 2 is a functional block diagram of an intermediate code execution system applicable to the first embodiment of the present invention.

FIG. 3 is a flowchart illustrating an operation of the intermediate code execution system applicable to the first exemplary embodiment of the present invention.

FIG. 4 is a functional block diagram of an intermediate code execution system applicable to the second embodiment of the present invention.

FIG. 5 is a flowchart illustrating an operation of the intermediate code execution system applicable to the second exemplary embodiment of the present invention.

[Explanation of symbols]

1 chip 2 processors 3 high speed memory 4 internal bus 5 external buses 6 memory 7 RAM 8 ROM

[Procedure amendment]

[Submission date] April 14, 2003 (2003.4.1)
4)

[Procedure Amendment 1]

[Document name to be amended] Statement

[Name of item to be amended] Claims

[Correction method] Change

[Correction content]

[Claims]

[Procedure Amendment 2]

[Document name to be amended] Statement

[Correction target item name] 0011

[Correction method] Change

[Correction content]

[0011]

In order to solve the above problems, according to a first aspect of the present invention, a system for executing an intermediate code obtained by converting a source code created in a predetermined programming language. The first storage means, the second storage means that is slower than the first storage means, and the first storage means are stored and correspond to a subset of the instruction set of the programming language. Extracted from the intermediate code by a first interpreter module, a second interpreter module stored in the second storage means and corresponding to the remaining instructions of the instruction set, and the first interpreter module. That subset of the subsets corresponds to the subset, and if the subset is in the subset, execute it, while If not in the subset, the second
The interpreter module of 1. provides a control means for specifying and executing which one of the remaining instructions the instruction corresponds to, and an intermediate code execution system. In the second aspect of the present invention, the predetermined program is
Obtained by converting the source code created in the programming language
And a control means for executing the generated intermediate code.
A first storage means connected to the control means;
It is connected to the control means and is slower than the first storage means.
A second storage means and the first storage means,
By executing by the control means, the intermediate code
The issued instructions are supported by the instruction set of the programming language.
The instructions contained in the
If there is the same instruction, the function to execute the instruction
A first interpreter module to be realized;
Stored in the second storage means and executed by the control means
The instruction fetched from the intermediate code by
Lives not included in the instruction set subset of the programming language
Compared with the order, if there is the same command,
The second interpreter module that realizes the function to execute
When executing the intermediate code,
The first interpreter module by means of
The instruction fetched from the intermediate code
Determine which of the following subsets apply and apply
If something is in the subset, it executes it
And if there is no match in the subset,
Is the second interpreter module in the control means.
By executing the
And execute any of the instructions not included in
Intermediate code execution system characterized by performing
Are provided.

[Procedure 3]

[Document name to be amended] Statement

[Correction target item name] 0012

[Correction method] Change

[Correction content]

Further, according to a third aspect of the present invention, a predetermined programming language is provided by the control means to which at least the first storage means and the second storage means, which is slower than the first storage means, are connected. An intermediate code execution method for executing an intermediate code obtained by converting the source code created in 1. , wherein the intermediate code is stored in the first storage means by the control means.
By executing the first interpreter module
The instruction extracted from the intermediate code is the program
Determining whether to correspond to any subset of the language instruction set, when performing a it when that apply is in the subset, those which the person is not in the subset, in the control means The second storage means
Executes a second interpreter module stored in
Accordingly , the intermediate code executing method is provided, which comprises a step of specifying which of the remaining instructions the instruction corresponds to and executing the instruction. The present invention
In a fourth aspect, at least the first storage means and the first storage means
The second storage means, which is slower than the first storage means, is connected
Created in a predetermined programming language by the control means
Execute the intermediate code obtained by converting the source code
An intermediate code execution method, wherein the control means includes the first
First interpreter module stored in the storage means of
Run from the intermediate code by executing
Instruction code and sub of instruction set of the programming language
Identical by comparing the instruction codes included in the set one by one
If the opcode is in the subset,
The same steps as the corresponding steps are
When not in the set, the second memory device is controlled by the control means.
Run the second interpreter module stored in the column
The instruction fetched from the intermediate code by
Code and a subset of the instruction set of the programming language
Compare the instruction codes not included in the
Instruction code that is the same as the instruction code extracted from the
To specify the command and perform the processing corresponding to the command
And an intermediate code execution method characterized by having
Be served.

[Procedure amendment 4]

[Document name to be amended] Statement

[Correction target item name] 0013

[Correction method] Change

[Correction content]

Furthermore, in the fifth aspect of the present invention, performed in at least a first storage means and said first control means is slow second storage means connected in comparison with the storage means
By doing so, the function to execute the intermediate code obtained by converting the source code created in a predetermined programming language is provided.
A program to be realized , which corresponds to a subset of the instruction set of the programming language, corresponds to a first interpreter module stored in the first storage means, and corresponds to the remaining instructions of the instruction set, and a second interpreter module which is stored in the second storage means, before Symbol first interpreter module, the system
By executing by the control means, to determine whether instructions fetched from the intermediate code corresponds to any of the subset, the if that apply it is in said subset
The second interpreter that realizes the function of executing instructions.
The target module specifies which of the remaining instructions the instruction corresponds to by executing the instruction by the control means when the applicable one is not in the subset.
An intermediate code execution program is provided which is characterized by realizing a function .

[Procedure Amendment 5]

[Document name to be amended] Statement

[Correction target item name] 0014

[Correction method] Change

[Correction content]

According to the present invention having the above-mentioned configuration, the first interpreter module corresponding to the subset of the instruction set of the predetermined programming language and the second interpreter module corresponding to the remaining instructions of the instruction set. And the instructions included in the subset are executed by the first interpreter module stored in the fast first storage means, and the other instructions are executed in the slow second storage means.
Execution by the second interpreter module stored in the stage can speed up the execution of the instructions included in the subset. In the present invention, the execution speed of the instructions not included in the subset is not increased, but the effect of increasing the speed of execution of the instructions included in the subset is significant. Therefore, an intermediate code execution system for executing a predetermined intermediate code is provided. Performance can be improved. Since the present invention does not require special hardware, it can be implemented at low cost, and the performance of intermediate code execution can be improved without significantly increasing the memory consumption, so that embedded devices can be implemented. Can be suitably applied to.

[Procedure correction 6]

[Document name to be amended] Statement

[Name of item to be corrected] 0023

[Correction method] Change

[Correction content]

Each functional block will be described below.
The intermediate code execution system 10 includes a processing instruction acquisition unit 1
3, the first processing command execution unit 1 4, and a second processing command execution portion 17. Instruction acquisition unit 13, which takes out an instruction code to be executed next from the class file sequentially, the instruction code fetched by the instruction acquisition unit 13 is passed to the first processing command execution unit 1 4.

[Procedure Amendment 7]

[Document name to be amended] Statement

[Name of item to be corrected] 0024

[Correction method] Change

[Correction content]

The first processing command execution unit 1 4 is provided with a selection and processing life <br/> Order determining section 1 5 and the processing module and 11,
It has a function of sequentially interpreting and executing a subset of bytecode instructions selected from all bytecode instructions included in the Java (R) language instruction system.
More specifically, in the selected processing instruction determination unit 15 , the instruction code extracted by the processing instruction acquisition unit 13 is compared with each of the bytecode instructions included in the above-mentioned subset, and if they are the same, Executes the processing module 11 corresponding to the bytecode instruction.

[Procedure Amendment 8]

[Document name to be amended] Statement

[Correction target item name] 0026

[Correction method] Change

[Correction content]

The second processing instruction executing section 17 includes a non-selection processing instruction specifying section 16 and a processing module 12, and sequentially interprets bytecode instructions not included in the above-mentioned subset. It has a function to execute. More specifically, in the non-selection processing instruction specifying unit 16, the fetched instruction code is compared with each of the bytecode instructions not included in the aforementioned subset, and if they are the same, the bytecode instruction concerned. The processing module 12 corresponding to is executed.

[Procedure Amendment 9]

[Document name to be amended] Statement

[Name of item to be corrected] 0027

[Correction method] Change

[Correction content]

[0027] The combination of the first processing command execution unit 1 4 and the second processing command execution portion 17 as described above, predetermined processing in the processing module 11 or 12 corresponding to the instruction code fetched are executed .

[Procedure Amendment 10]

[Document name to be amended] Statement

[Name of item to be corrected] 0029

[Correction method] Change

[Correction content]

[0029] Therefore, in the first embodiment, in advance of which particle size of all bytecode instructions have selected the ones with high small occurrence frequency, the first processing command execution unit 1 4 for byte code instructions that are the selected The second processing instruction execution unit 17 executes the remaining bytecode instructions. That is, the first processing command execution unit 1 4 includes a processing module 11 corresponding to each of the bytecode instructions said selected. The selection processing command judgment portion 1 5 and the operation code of the selected and the opcode for a given instruction code bytecode instructions one by one comparison, executes the processing module 11 corresponding to the case were identical. In addition, the second processing instruction execution unit 17 uses the processing module 1 corresponding to each of the remaining bytecode instructions.
Have two. Then, the non-selection processing instruction specifying unit 16
Compares the operation code of the given instruction code with the operation code of the remaining bytecode instructions one by one, and executes the corresponding processing module 12 when they are the same.

[Procedure Amendment 11]

[Document name to be amended] Statement

[Correction target item name] 0031

[Correction method] Change

[Correction content]

Therefore, the appearance frequency of bytecode instructions is investigated according to the environment in which the intermediate code execution system 10 is installed, and the first processing instruction execution section 1 is based on the examination result.
More preferably, the bytecode instructions to be executed at 4 are selected.

[Procedure Amendment 12]

[Document name to be amended] Statement

[Name of item to be corrected] 0032

[Correction method] Change

[Correction content]

Furthermore, in the first embodiment, the class in the state where the first processing command execution unit 1 4 eggplants software program that is configured (first interpreter module) is stored in the high-speed memory 3 as described above Execute the file. For example, the intermediate code execution system 10 may be from the storage unit 6 before executing the class file to copy the code of the software program constituting the first processing command execution unit 1 4 fast memory 3. Thus to store the software program constituting the first processing command execution unit 1 4 fast memory 3, by adjusting the number of bytecode instructions to be executed by the first processing command execution unit 1 4, the 1
It is preferable that the software program forming the processing instruction execution unit 15 has a size that can be stored in the high-speed memory 3.

[Procedure Amendment 13]

[Document name to be amended] Statement

[Correction target item name] 0035

[Correction method] Change

[Correction content]

For example, the intermediate code execution system 10 is
A Java (R) application class file is received from an information input side (not shown), and the received class file is stored in the RAM 7 of the storage unit 6 (S1). Next, the intermediate code execution system 10 executes the class file by the following series of operations. In this case, the software program constituting the first processing command execution unit 1 4 (first interpreter module) is kept in a state of being stored in advance in the high-speed memory 3. The following operation also corresponds to the intermediate code execution method in the first embodiment.

[Procedure Amendment 14]

[Document name to be amended] Statement

[Correction target item name] 0036

[Correction method] Change

[Correction content]

First, the processor 2 executes a predetermined software program to configure the processing instruction acquisition unit 13, and one instruction code is extracted from the class file (S2). Then, the software program (first interpreter module) forming the first processing instruction execution unit 15 stored in the high-speed memory 3 is executed, and S
It is determined whether the instruction code fetched in 2 can be specified as one of the selected bytecode instructions (S3), and if possible, the processing module 11 corresponding to the instruction code.
Is executed (S4). Processing here is, more specifically, selected processing command judgment portion 1 of the first processing command execution unit 1 4
The operation code of the instruction code fetched in 5 and the operation code of the selected bytecode instruction are compared one by one, and if they are the same, the corresponding processing module 11 is executed.

[Procedure Amendment 15]

[Document name to be amended] Statement

[Name of item to be corrected] 0037

[Correction method] Change

[Correction content]

[0037] When it is not judged to be in the above S3, i.e., if it is not determined that the identical to any of the opcode byte code instructions opcode of the instruction code fetched in the selected processing command judgment portion 1 5 is selected Is a software program (second interpreter module) that constitutes the second processing instruction execution unit 17.
Is executed to identify which of the remaining bytecode instructions the instruction code is (S5), and the processing module 12 corresponding to the identified instruction code is executed (S6).

[Procedure Amendment 16]

[Document name to be amended] Statement

[Correction target item name] 0038

[Correction method] Change

[Correction content]

More specifically, in the processing in S6, the operation code of the instruction code given by the non-selected processing instruction specifying unit 16 of the second processing instruction execution unit 17 and the operation code of the remaining bytecode instructions are combined. They are compared one by one, and if they are the same, the corresponding processing module 12 is executed.

[Procedure Amendment 17]

[Document name to be amended] Statement

[Correction target item name] 0041

[Correction method] Change

[Correction content]

As described above, in the first embodiment,
Select the one previously is small frequency higher among particle size of all bytecode instructions, first, in the first processing command execution unit 1 4 corresponding to the byte code instructions that are selected interprets and executes the instruction code, can be executed Since the second instruction processing unit 17 interprets and executes the missing instruction code, it is possible to preferentially interpret and execute the bytecode instruction having a high appearance frequency. Further, since the software program (first interpreter module) forming the first processing instruction execution unit 14 is stored in the high-speed memory 3, the first processing instruction execution unit 1
4 can interpret and execute a bytecode instruction that frequently appears at high speed.

[Procedure 18]

[Document name to be amended] Statement

[Correction target item name] 0043

[Correction method] Change

[Correction content]

[0043] In the first embodiment, the software program constituting the first processing command execution unit 1 4 (first
The interpreter module of 1) may have a structure optimized for execution of the selected instruction code, and in such a case, the performance of the intermediate code execution system 10 can be further improved.

[Procedure Amendment 19]

[Document name to be amended] Statement

[Correction target item name] 0044

[Correction method] Change

[Correction content]

[0044] For example, the software program constituting the first processing command execution unit 1 4 eggplants software program (first interpreter module) and the second processing command execution portion 17 (second interpreter module) is one May be created in a high-level language such as C or C ++, but the performance of the intermediate code execution system 10 can be further improved by incorporating the former into a structure optimized in assembly language.

[Procedure amendment 20]

[Document name to be amended] Statement

[Name of item to be corrected] 0045

[Correction method] Change

[Correction content]

Further, in the selection processing instruction determination unit 15 , in comparing the operation code of the fetched instruction code with the operation code of the selected bytecode instruction to determine whether or not they are the same, the byte with higher frequency is used. It is more preferable to compare the code instructions in order. The same applies to the non-selected instruction specifying unit 16.

[Procedure correction 21]

[Document name to be amended] Statement

[Correction target item name] 0066

[Correction method] Change

[Correction content]

[0066]

According to the present invention, the first interpreter module corresponding to the subset of the instruction set of the predetermined programming language and the second interpreter module corresponding to the remaining instructions of the instruction set are used. , The instructions included in the subset are executed by the first interpreter module stored in the high speed first storage means,
Since other instructions are executed by the second interpreter module stored in the slower second storage means ,
It is possible to speed up the execution of the instructions included in the subset. In the present invention, the execution speed of the instructions not included in the subset is not increased, but the effect of increasing the speed of execution of the instructions included in the subset is significant. Therefore, an intermediate code execution system for executing a predetermined intermediate code is provided. Performance can be improved. Since the present invention does not require special hardware, it can be implemented at low cost, and the performance of intermediate code execution can be improved without significantly increasing the memory consumption, so that embedded devices can be implemented. Can be suitably applied to.

Claims (8)

[Claims] 1. A system for executing an intermediate code obtained by converting a source code created in a predetermined programming language, comprising: a first storage means; and a speed lower than that of the first storage means. A second storage means, a first interpreter module stored in the first storage means and corresponding to a subset of the instruction set of the programming language, and an instruction set stored in the second storage means. A second interpreter module corresponding to the remaining instructions of the first and the first interpreter module determines which of the subsets the instruction extracted from the intermediate code corresponds to, and the corresponding one is the subset. If it is in the subset, then it is executed by the second interpreter module. The intermediate code execution system, characterized in that the instruction comprises a control means for executing identify whether corresponds to any of the remaining instructions, the. 2. The predetermined programming language is Java
The intermediate code execution system according to claim 1, wherein the intermediate code is a (R) language, the intermediate code is a Java (R) class file, and the instruction is a Java (R) bytecode instruction. 3. The subset is a set in which instructions included in the intermediate code at a predetermined frequency or more are selected, and is preset according to an environment in which the intermediate code execution system is used. The intermediate code execution method according to claim 1 or claim 2. 4. A source code created in a predetermined programming language is converted by control means connected to at least a first storage means and a second storage means that is slower than the first storage means. An intermediate code execution method for executing the intermediate code obtained by the above, wherein the control unit controls the subset extracted from the intermediate code by the first interpreter module corresponding to the subset of the instruction set of the programming language. The step of deciding which of the above is applicable and executing it if the applicable one is in the subset; and, if the applicable one is not in the subset, the rest of the instruction set by the control means. By the second interpreter module corresponding to the instruction of, Intermediate code execution method characterized by comprising the steps of run, the. 5. The predetermined programming language is Java
The intermediate code executing method according to claim 4, wherein the intermediate code is a (R) language, the intermediate code is a Java (R) class file, and the instruction is a Java (R) bytecode instruction. 6. The subset is a set in which instructions included in the intermediate code at a predetermined frequency or more are selected, and is preset according to an environment to which the intermediate code execution method is applied. 4. The intermediate code execution method according to claim 4 or claim 5. 7. A source code created in a predetermined programming language is converted by a control means to which at least a first storage means and a second storage means that is slower than the first storage means are connected. A program for executing the obtained intermediate code, which corresponds to a subset of the instruction set of the programming language and is stored in the first storage means; and a remaining part of the instruction set. A second interpreter module corresponding to the instruction and stored in the second storage means, wherein the control means includes the instruction extracted from the intermediate code by the first interpreter module from the subset. It is determined which is applicable, and if the applicable is in the subset, it is executed. In the absence, the by a second interpreter module, the intermediate code execution program to which the instruction and executes to identify whether corresponds to any of the remaining instructions. 8. The subset is a set in which instructions included in the intermediate code at a predetermined frequency or more are selected, and is preset according to an environment in which the intermediate code execution program is used. 7. The intermediate code execution program according to 7.