JP2003198650A - Synchronous detection device and method therefor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To improve both acquisition characteristics and BER characteristics by avoiding an incompatible relationship between acquisition characteristics and BER characteristics with respect to a characteristic frequency, in a Costas type carrier wave reproducing circuit and a detection feedback type carrier wave reproducing circuit. <P>SOLUTION: In the Costas type carrier wave reproducing circuit, a pair of loop filters 5 and 7 having respective characteristics different from each other are prepared in advance, and one of output signals (ε<SB>large</SB>and ε<SB>small</SB>) of the pair of loop filters 5 and 7 is selected as a control signal ε to be outputted to a VCO 11 based on the output signal (error signal ε<SB>costas</SB>) of a Costas type phase error detection circuit 3. The output signal (ε<SB>large</SB>) of the loop filter 5 having a large characteristic frequency ωn is selected to improve the acquisition characteristics of an asynchronous state in the asynchronous state before a lock-up at the beginning of reception of a burst signal, and the output signal (ε<SB>small</SB>) of the loop filter 7 having a small characteristic frequency ωn is selected to improve the BER characteristics of a synchronous state in the synchronous state kept after the lock-up. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital phase modulation (PSK: Phase Shift) for a digital wireless communication system.
The present invention relates to a synchronous detection device and a synchronous detection method used in the t Keying) method.

[0002]

2. Description of the Related Art Carrier recovery circuits required for synchronous detection of digital phase modulation signals are mainly remodulation type, inverse modulation type, multiplication type, Costas type, decision feedback type and the like. Among them, the Costas carrier wave regenerating circuit, which has a relatively simple circuit configuration, and the decision feedback carrier wave regenerating circuit, which is known for its excellent static characteristics, are promising methods.

The Costas carrier recovery circuit and the decision feedback carrier recovery circuit have the following features.

First, since both the Costas type carrier recovery circuit and the decision feedback type carrier recovery circuit are composed of a baseband stage, compared with the re-modulation type, inverse modulation type and multiplication type composed of the carrier stage. The circuit configuration is simple and there are few adjustment points. In particular, the Costas type, even compared to the decision feedback type,
It can be realized with a very simple circuit configuration.

Secondly, in the Costas-type carrier recovery circuit and the decision feedback-type carrier recovery circuit, phase jitter due to the modulation error of the re-modulator and the inverse modulator, which is a problem in the re-modulation type and the inverse modulation type, does not occur.

Thirdly, since the decision feedback type carrier recovery circuit is a discrete time system including sample value processing, the Nyquist transmission is performed if the sample and the identification time point are matched with the optimum time point as compared with the Costas type of the continuous time system. In the system, phase jitter due to intersymbol interference does not occur.

Fourth, the continuous-time system Costas-type carrier recovery circuit is, compared with the discrete-time decision-feedback carrier recovery circuit, the synchronization acquisition characteristic and the synchronization tracking characteristic with respect to the frequency change of the received signal due to the Doppler effect or the like. Is excellent.

As described above, the Costas-type carrier recovery circuit and the decision feedback carrier-recovery circuit have some advantages as compared with other carrier-recovery circuits. It has excellent characteristics such as synchronous acquisition characteristics and synchronous tracking characteristics with respect to frequency changes, and the decision feedback carrier recovery circuit has excellent static characteristics when stable synchronization is achieved (Technical Report of IEICE, RCS).
97-152, pp.29-34, NOV 1997, "Rms Phase Jitter of
Decision Feedback Carrier Recovery Loop for QPS
K "； IEICE TRANS. COMMUN., VOL.E82-B, NO.6 JUNE 199
9, "Experiments onDecision Feedback Carrier Recove
ry Loop for QPSK ").

[0009]

However, in both the Costas type carrier recovery circuit and the decision feedback carrier recovery circuit, how to set the value of the characteristic frequency ωn, which is an important parameter of the carrier recovery circuit, in the design stage thereof. As a result, the performance of the carrier recovery circuit and the performance of the receiving device equipped with the carrier recovery circuit are greatly affected.

Specifically, in the Costas-type carrier recovery circuit and the decision feedback-type carrier recovery circuit, the bit error rate (BER: Bit Error Rat) increases as the characteristic frequency ωn is set smaller.
e) The characteristics are improved, but on the other hand, the lockup time (the time required to secure stable synchronization) tends to increase as ωn is set smaller. Further, in both circuits, the lock-up time is shortened as the characteristic frequency ωn is set larger, and the excellent acquisition characteristic (synchronization acquisition characteristic) is obtained, but the BER characteristic is deteriorated as the value ωn is set larger. End (IEICE TRANS. COMMU
N., VOL.E82-B, NO.6JUNE 1999, "Experiments on Decis
ion Feedback Carrier Recovery Loop for QPSK "; IEICE Technical Report, RCS99-225, MW99-245 (2000-02)," Experimental study of Costas type and decision feedback type carrier recovery circuit in roll-off band limiting system ").

The BER characteristic is the most important index for determining the transmission quality, and the acquisition characteristic requires high speed in a burst transmission environment such as the TDMA (Time Division Multiple Access) system. It can be said that this is an important evaluation item.

As described above, both the BER characteristic and the acquisition characteristic are indispensable positions, but both the Costas carrier recovery circuit and the decision feedback carrier recovery circuit both have an acquisition characteristic and a BER with respect to the characteristic frequency ωn.
It is known that the characteristics have a reciprocal relationship. Therefore, the designer is forced to make a trade-off between the acquisition characteristic and the BER characteristic when determining the value of the characteristic frequency ωn.

Therefore, in the above-mentioned conventional Costas type carrier reproducing circuit and decision feedback type carrier reproducing circuit, when determining the value of the characteristic frequency ωn, ωn is set as small as possible within a range satisfying the required acquisition characteristic. It was necessary to keep BER small.

However, with this method, when high-speed acquisition characteristics are required, such as when a signal with a high transmission rate is received, there may arise a situation in which ωn must be set large to sacrifice the BER characteristics.

The present invention has been made in view of the above point, and in the Costas type carrier recovery circuit and the decision feedback type carrier recovery circuit, the acquisition characteristic is avoided by avoiding the reciprocal relationship between the acquisition characteristic relating to the characteristic frequency and the BER characteristic. It is an object of the present invention to provide a synchronous detection device and a synchronous detection method capable of improving both the BER characteristics and the BER characteristics.

[0016]

(1) In the synchronous detection device of the present invention, a phase error detecting means for detecting a phase error between a carrier component of a received signal and a reproduced carrier and different characteristic frequencies are set and set. A plurality of loop filters for extracting the low frequency component of the output signal of the phase error detection means based on the characteristic frequency, a synchronization state detection means for detecting the synchronization state of the received signal, the detection result of the synchronization state detection means In accordance with the above, the selection means for selecting at least one loop filter output signal for reproducing the carrier wave synchronized with the reception signal from the output signals of the plurality of loop filters is adopted.

According to this structure, a plurality of loop filters having different characteristic frequencies are prepared in advance, and the output signals of the plurality of loop filters are output according to the detection result of the synchronization state detecting means (the synchronization state of the received signal). In order to select at least one loop filter output signal for reproducing the carrier wave synchronized with the received signal from among, for example, in the asynchronous state before lockup (securing stable synchronization) at the start of burst signal reception, the acquisition characteristic The output signal of the loop filter with a large characteristic frequency can be selected by giving priority to the carrier signal because the output signal of the loop filter with a small characteristic frequency can be selected by giving priority to the BER characteristic in the synchronization holding state after lockup. Characteristics of the regenerative circuit (for example, Costas type carrier regenerating circuit or decision feedback type carrier regenerating circuit) It is possible to avoid reciprocal relationship Akujishon characteristics and BER characteristics relates wavenumber, it can be both improved both Akujishon characteristics and BER performance.

(2) The synchronous detection device of the present invention comprises a Costas type phase error detection circuit for detecting a phase error between the carrier component of the received signal and the reproduced carrier, and different characteristic frequencies are set and the set characteristics are set. Based on the output signal of the Costas type phase error detection circuit, a plurality of loop filters for extracting the low frequency components of the output signal of the Costas type phase error detection circuit based on the frequency, of the output signals of the plurality of loop filters And a loop filter output signal selection circuit that selects at least one loop filter output signal for reproducing a carrier wave synchronized with the received signal from the inside.

According to this structure, in the Costas type carrier recovery circuit, a plurality of loop filters having different characteristic frequencies are prepared in advance, and the output signal of the Costas type phase error detection circuit (the carrier component of the received signal and the reproduced carrier is Of the output signal of the plurality of loop filters based on the phase error of (1), and the synchronization state of the received signal can be detected using this, at least one loop for reproducing a carrier wave synchronized with the received signal. In order to select the filter output signal, for example, in the asynchronous state before lockup at the start of burst signal reception, the output signal of the loop filter with a large characteristic frequency is selected by giving priority to the acquisition characteristic, and the synchronization hold state after lockup is selected. Then BER
Since the output signal of the loop filter having a small characteristic frequency can be selected by giving priority to the characteristic, it is possible to avoid the reciprocal relation between the characteristic characteristic frequency-related acquisition characteristic and the BER characteristic in the Costas type carrier recovery circuit, and Both of the BER characteristics can be improved.

(3) In the synchronous detection device of the present invention, a decision feedback type phase error detection circuit for detecting a phase error between the carrier component of the received signal and the reproduced carrier, and different characteristic frequencies are set and set. A plurality of loop filters for extracting the low frequency component of the output signal of the decision feedback type phase error detection circuit based on the characteristic frequency, and a Costas type phase error detection for detecting the phase error between the carrier component of the received signal and the reproduced carrier. And at least one loop filter output signal for reproducing a carrier wave synchronized with the received signal from the output signals of the plurality of loop filters based on the output signal of the circuit and the Costas type phase error detection circuit. And a loop filter output signal selection circuit.

According to this structure, in the decision feedback type carrier recovery circuit, a plurality of loop filters having different characteristic frequencies are prepared in advance, and the output signal of the Costas type phase error detection circuit (the carrier component of the received signal and the reproduced carrier). Based on the phase error of the received signal and the synchronization state of the received signal can be detected), at least one of the output signals of the plurality of loop filters for reproducing the carrier wave synchronized with the received signal is output. In order to select the loop filter output signal, for example, in the asynchronous state before lockup at the start of burst signal reception, the output signal of the loop filter with a large characteristic frequency is selected by giving priority to the acquisition characteristic, and the synchronization is maintained after lockup. In the state, BER
Since the output signal of the loop filter having a small characteristic frequency can be selected by giving priority to the characteristic, it is possible to avoid the reciprocal relationship between the acquisition characteristic regarding the characteristic frequency and the BER characteristic in the decision feedback type carrier recovery circuit. Both BER characteristics and BER characteristics can be improved.

(4) The synchronous detection device of the present invention comprises a Costas type phase error detection circuit for detecting a phase error between the carrier component of the received signal and the reproduced carrier, and a phase error between the carrier component of the received signal and the reproduced carrier. Decision feedback type phase error detection circuit for detecting the
A first loop filter for extracting a low frequency component of the output signal of the Costas type phase error detection circuit based on the set characteristic frequency, and an output signal of the decision feedback type phase error detection circuit based on the set characteristic frequency Of a plurality of loop filters including a second loop filter for extracting the low frequency component of the, and an output signal of the plurality of loop filters based on the output signals of the Costas type phase error detection circuit. And a loop filter output signal selection circuit that selects at least one loop filter output signal for reproducing the generated carrier wave.

According to this structure, the Costas type carrier recovery circuit and the decision feedback type carrier recovery circuit are used together, and a plurality of loop filters having different characteristic frequencies (the first loop filter corresponding to the Costas type phase error detection circuit is determined. A second loop filter corresponding to the feedback type phase error detection circuit is prepared in advance, and the output signal of the Costas type phase error detection circuit (the phase error between the carrier component of the received signal and the reproduced carrier wave is shown). Based on this, it is possible to detect the synchronization state of the received signal), and to select at least one loop filter output signal for regenerating a carrier wave synchronized with the received signal from the output signals of the plurality of loop filters. , For example, in the asynchronous state before lockup at the start of burst signal reception, the acquisition characteristics are given priority and the synchronous acquisition is performed.・ Select the output signal of the 1st loop filter (the characteristic frequency is set to a large value) corresponding to the Costas type carrier recovery circuit with excellent follow-up characteristics, and prioritize the BER characteristics in the synchronization hold state after lockup. Since it is possible to select the output signal of the second loop filter (the characteristic frequency is set to be small) corresponding to the decision feedback type carrier recovery circuit having excellent static characteristics after the synchronous acquisition, the Costas carrier recovery circuit and In the decision feedback carrier recovery circuit, it is possible to avoid the reciprocal relationship between the acquisition characteristic and the BER characteristic regarding the characteristic frequency, and to improve both the acquisition characteristic and the BER characteristic. Further, it is possible to realize a synchronous detection device having the excellent features of both the Costas type carrier wave reproducing circuit and the decision feedback type carrier wave reproducing circuit.

(5) The radio communication apparatus of the present invention has a configuration having the synchronous detection apparatus described in any of the above.

According to this structure, it is possible to realize a radio communication device (for example, a base station device, a mobile station device or other radio communication terminal device) having the same effects as the above.

(6) In the synchronous detection method of the present invention, a phase error detecting step of detecting a phase error between a carrier component of a received signal and a reproduced carrier and a plurality of loop filters each having a different characteristic frequency are set. , An extraction step of extracting a low frequency component of the output signal in the phase error detection step based on a set characteristic frequency, a synchronization state detection step of detecting a synchronization state of a received signal, and a detection result in the synchronization state detection step According to the above, there is a selection step of selecting at least one loop filter output signal for reproducing a carrier wave synchronized with the received signal from the output signals of the plurality of loop filters in the extraction step. .

According to this method, a plurality of loop filters having different characteristic frequencies are prepared in advance, and the carrier wave synchronized with the received signal is selected from the output signals of the plurality of loop filters according to the synchronization state of the received signals. In order to select at least one loop filter output signal for reproducing the signal, for example, in an asynchronous state before lockup (stable synchronization is secured) at the start of burst signal reception, a loop with a large characteristic frequency is given priority to the acquisition characteristic. When the output signal of the filter is selected and in the synchronization holding state after lockup, the output signal of the loop filter having a small characteristic frequency can be selected by giving priority to the BER characteristic, so that the carrier recovery circuit (for example, Costas carrier recovery) is selected. Circuit and decision feedback type carrier recovery circuit) It is possible to avoid reciprocal relationship BER characteristics can be both improved both Akujishon characteristics and BER performance.

[0028]

BEST MODE FOR CARRYING OUT THE INVENTION The inventor determines the performance of a carrier recovery circuit (especially Costas type carrier recovery circuit and decision feedback type carrier recovery circuit) which is indispensable when synchronously detecting a digital phase modulation signal. The value of the characteristic frequency ωn, which is an important parameter, is
There is a reciprocal relationship between the ER characteristics (If ωn is set to a large value, the acquisition characteristics are improved, but the BER characteristics are degraded,
By setting ωn to be small, the BER characteristic is improved but the acquisition characteristic is deteriorated), and by switching ωn to an appropriate value according to the synchronization state, a Costas type carrier regeneration circuit and a decision feedback type carrier regeneration circuit It was found that the above-mentioned reciprocal relationship that occurs in 1. can be avoided, and the present invention has been completed.

That is, the essence of the present invention is that the characteristic frequency ω
In order to switch the value of n, a plurality of loop filters with different values of ωn are prepared in advance, and by using the error signal selection circuit, the loop filter to be used is appropriately switched according to the synchronization state of the received signal, The reason is that both the value of ωn excellent in the acquisition characteristic and the value of ωn excellent in the BER characteristic can be satisfied, and the reciprocal relationship between the acquisition characteristic and the BER characteristic concerning the characteristic frequency ωn can be avoided.

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

(Embodiment 1) FIG. 1 is a block diagram showing a configuration of a synchronous detection apparatus according to Embodiment 1 of the present invention.

The synchronous detection device 100 shown in FIG. 1 is installed in a receiving device used in, for example, satellite communication, microwave communication, millimeter wave communication, mobile communication, and other wireless communication devices. This receiving device is, for example, QPSK.
(Quaternary Phase Shift Keying) Wireless communication is performed by the transmission method. As described above, the Costas type carrier reproducing circuit and the decision feedback type carrier reproducing circuit are effective as the carrier reproducing circuit used in the QPSK transmission system.

The synchronous detection apparatus 100 shown in FIG. 1 is a synchronous detection apparatus using a Costas type carrier recovery circuit, and includes a demodulation unit 1 for demodulating a received signal (QPSK signal), a Costas type phase error detection circuit 3 and It has two loop filters 5 and 7 having different characteristic frequencies and an error signal selection circuit 9. The demodulation unit 1 includes a voltage-controlled oscillator (VCO: Voltage-Co).
ntrolled oscillator) 11, an I-channel product modulator 13, and a Q-channel product modulator 15. A 90 degree (π / 2) phase shifter 17 is provided between the VCO 11 and the product modulator 15 for the Q channel. The Costas type carrier recovery circuit is composed of the Costas type phase error detection circuit 3, the loop filter 5 or 7, and the VCO.
It is composed of 11.

The Costas type phase error detection circuit 3 removes the modulation information by continuously analog-multiplying the demodulated signal obtained by demodulating the received signal in the demodulation section 1 and multiplying by 4. Then, phase error information of the reproduced carrier with respect to the received signal, that is, phase error information between the carrier component of the received signal and the reproduced carrier is output as an error signal ε _costas . As described above, the Costas type phase error detection circuit 3 has a function of detecting a phase error between the carrier component of the received signal and the reproduced carrier. The error signal ε _costas is output to each loop filter 5, 7 and the error signal selection circuit 9.

The respective loop filters 5 and 7 use the Costas type phase error detection circuit 3 based on the set characteristic frequency ωn.
The low frequency component of the output signal (error signal ε _costas ) of is extracted. Here, the characteristic frequency ωnL of the loop filter 5 is set to a large value, and the characteristic frequency ωnS of the loop filter 7 is set to a small value (ωnL> ωnS). Output signal of loop filter 5 (low frequency component ε of error signal ε _costas ε
_large ) and the output signal of the loop filter 7 (low frequency component ε _small of the error signal ε _costas ) are given to the error signal selection circuit 9.

The error signal selection circuit 9 is, for example, in an asynchronous state before lockup at the start of burst signal reception (synchronization is secured from the moment the burst signal is received, depending on the synchronization state of the received signal. Until it locks up in a stable manner) or the synchronization hold state after the lockup,
Output signals of the two loop filters 5, 7 ε _large , ε _s
Select either _mall . The selected loop filter output signal ε _large or ε _small is used as the control signal ε for controlling the oscillation frequency of the VCO 11
Applied to. Here, the synchronization state of the received signal is detected using the output signal (error signal ε _costas ) of the Costas type phase error detection circuit 3. That is, the content of the output signal (control signal ε) of the error signal selection circuit 9 is the output signal (error signal ε _costas ) of the Costas type phase error detection circuit 3.
Can be switched based on. The error signal selection circuit 9
The specific configuration and operation of will be described in detail later.

The VCO 11 is an oscillator whose oscillation frequency is a function of the voltage of the input signal, and when the output signal (control signal ε) of the error signal selection circuit 9 is input, the VCO 11 reproduces a carrier wave synchronized with the received signal. . The regenerated carrier wave is supplied to the product modulator 13 for the I channel and the 90-degree phase shifter 1
7 to the product modulator 15 for the Q channel. In each of the product modulators 13 and 15, the received signal (QPSK signal) is multiplied by the reproduced carrier wave, and the received signal is demodulated.

As described above, in reproducing the carrier wave in the synchronous detection device 100, the error signal ε _costas output from the Costas type phase error detection circuit 3 is input to each loop filter 5, 7, and each loop filter 5, 7 is input. This is performed by selectively applying the low frequency components ε _large and ε _small to the VCO 11 via the VCO 11.

At this time, the coherent detection apparatus 100 uses the QPS
When receiving a K burst signal, in the asynchronous state before lockup at the start of burst signal reception, the acquisition characteristic is prioritized, the characteristic frequency ωn is set large to shorten the lockup time, and the synchronization after lockup is performed. In the holding state, BER characteristics are prioritized, and ωn is set small to obtain BE.
Operates to keep R small. That is, VCO1
A control signal epsilon given to 1, depending on the synchronization state of the received signal, selects the output signal epsilon _small loop filter 7 output signal epsilon _{l arge} and .omega.n small loop filter 5 large .omega.n, appropriately switched.

Here, in order to recognize the synchronization state of the received signal, it is necessary to extract the beat component generated from the difference between the carrier frequency on the transmission side and the reproduced carrier frequency from the demodulated signal and detect this. Regarding the extraction of the beat component, it is necessary to remove the modulation component from the demodulated signal, and therefore the above-mentioned function of the Costas type phase error detection circuit 3 can be applied as it is. Also, the beat component is detected using the threshold value, the synchronization state is recognized from the detection result, and the VCO 11
The error signal selection circuit 9 performs a series of processes for appropriately switching the loop filter output signal applied to the. The set value of the threshold value for detecting the beat component is determined in consideration of the propagation environment used and the system configuration.

Next, the specific structure and operation of the error signal selection circuit 9 will be described with reference to FIG. FIG. 2 is a configuration diagram showing an example of the error signal selection circuit 9.

When the synchronous detection apparatus 100 receives a burst signal of QPSK, first, it is in an asynchronous state before lockup at the start of burst signal reception (from the moment the burst signal is received until synchronization is secured and stable lockup is performed). )
In the above, since the output signal (error signal ε _costas ) of the Costas type phase error detection circuit 3 is not synchronized between the carrier wave on the transmission side and the reproduced carrier wave,

[Equation 1] Frequency 4 the alternating voltage (f _T -f _R). Where f _T
Is the carrier frequency of the transmitting side, f _R is the frequency of the regenerated carrier,
A is the amplitude of the demodulated signal, K _m is the gain coefficient of the Costas type phase error detection circuit 3, and φ is the phase error.

In this case, in the error signal selection circuit 9, when the output signal (error signal ε _costas ) of the Costas type phase error detection circuit 3 which is an AC voltage is input, the capacitor 21 immediately after the amplifier 19 becomes conductive. The error signal ε _costas that has passed through the capacitor 21 is rectified by the half-wave rectifier circuit 25, smoothed by the capacitor 27, and passed through the variable resistor 29 to a constant voltage beat signal (indicating the magnitude of the beat component). Signal) and input to the comparator 31. Turn-on level (threshold value) of comparator 31
Is set by the reference voltage source 33 (Vth). The comparator 31 outputs a constant voltage (high: H) when the input exceeds a specific turn-on level (threshold value), and its voltage output is lower than another specific turn-on level (threshold value) when the input drops. Persist until low. In this case, since the beat signal rises, the switch signal output from the comparator 31 becomes high (H). Thus, in the asynchronous state, the switch 35 is on the output signal ε _{l arge} side of the loop filter 5 having a large characteristic frequency ωn. The resistor 23 cooperates with the capacitor 21 to form a filter that passes only the beat component.

Then, after a certain lock-up time,
If the loop of the stass type carrier recovery circuit is locked stably
Output signal of the Costas type phase error detection circuit 3 (error signal
Issue ε _costas) Is synchronized with the carrier wave on the transmission side and the carrier wave for reproduction
4 (f_T-F_R) Becomes zero and the phase
Since it can be assumed that the error φ is constant, the following (Equation 2),

[Equation 2] It becomes the DC voltage shown in.

In this case, in the error signal selection circuit 9, when the output signal (error signal ε _costas ) of the Costas type phase error detection circuit 3 which is a DC voltage is input, the signal is cut by the capacitor 21 immediately after the amplifier 19, The beat signal input to the comparator 31 has a low voltage, and the switch signal output from the comparator 31 has a low (L) level. As a result, in the synchronization holding state, the switch 35
Switches to the output signal ε _small side of the loop filter 7 having a small characteristic frequency ωn. After that, the switch 35 remains on the output signal ε _small side of the loop filter 7 as long as the synchronization is achieved even during the burst signal reception. In this way, in the synchronization holding state after lockup, the switch 35 is on the output signal ε _small side of the loop filter 7 having a small characteristic frequency ωn.

Then, in the process of receiving one burst signal and receiving the next burst signal, the error signal selection circuit 9 repeats the same operation as described above.

FIG. 3 is a timing chart showing an example of the switching operation of the switch 35 when the synchronous detection apparatus 100 receives a QPSK burst signal.

In the asynchronous state before lockup at the start of burst signal reception, the output signal (error signal ε _costas ) of the Costas type phase error detection circuit 3 is an AC voltage whose amplitude value is gradually attenuated by the time of lockup. After being rectified by the half-wave rectifying circuit 25, the beat signal (signal indicating the magnitude of the beat component) smoothed by the capacitor 27 and passing through the variable resistor 29 draws the envelope of the attenuated AC voltage. It becomes a waveform.

The switch 35 keeps the output signal ε _large side of the loop filter 5 having a large characteristic frequency ωn while the beat signal is equal to or higher than the turn-on level (threshold value) set by the reference voltage source 33 (Vth). When the beat signal is selected and becomes lower than the turn-on level (threshold value), it is switched to the output signal ε _small side of the loop filter 7 having a small characteristic frequency ωn.

After the reception of one burst signal is completed, the switch 35 selects the output signal ε _small side of the loop filter 7 having the small characteristic frequency ωn until the reception of the next burst signal is started.

The specific configuration of the error signal selection circuit 9 is not limited to the example shown in FIG. Error signal selection circuit 9
As for the reception characteristic improving method, as shown in FIG.
Any specific configuration may be used as long as it can realize the function satisfying the processing procedure shown in FIG. The example shown in FIG. 2 described above naturally satisfies the processing procedure shown in FIG.

In the processing procedure shown in FIG. 4, first, in step S100, the Costas type phase error detection processing is performed, and the beat component generated from the demodulated signal due to the difference between the carrier frequency on the transmission side and the reproduced carrier frequency based on the above principle. To extract. This Costas type phase error detection processing is performed by the Costas type phase error detection circuit 3. The output signal (error signal ε _costas ) of the Costas type phase error detection circuit 3 indicates the extracted beat component.

Then, steps S200 to S6.
At 00, the beat component extracted at step S100 is used to recognize the synchronization state of the received signal, and a series of error signal selection processing is performed. This series of error signal selection processing is performed by the error signal selection circuit 9.

First, in step S200, a filtering process for passing only the beat component is performed. By this filtering process, the DC component is cut and only the beat component is obtained.

Then, in step S300, a half-wave rectification process is performed to convert the beat component into a constant voltage εbeat. That is, in steps S200 and S300,
It plays the role of peak hold that extracts the amplitude value of the beat component and holds that value.

Then, in step S400, the values of εbeat and Vth are compared using an appropriate threshold value Vth, and εbe
It is determined whether the value of at is greater than or equal to the value of Vth. Based on the result of this comparison process, one of the signal outputs of the two loop filters 5 and 7 having different characteristic frequencies ωn is selected and output as the control signal ε applied to the VCO 11. That is, when the value of εbeat is equal to or more than the value of Vth (S
400: YES), it is determined that the received signal is in the asynchronous state, the process proceeds to step S500, and if the value of εbeat is less than the value of Vth (S400: NO), it is determined that the received signal is in the synchronous holding state. Then, the process proceeds to step S600.

In step S500, the output signal ε _large of the loop filter 5 having a large characteristic frequency ωn is selected as the control signal ε to the VCO 11.

On the other hand, in step S600, the VCO 11
The output signal ε _small of the loop filter 7 having a small characteristic frequency ωn is selected as the control signal ε to the control signal ε.

As described above, the synchronous detection device 100 is
In the stass type phase error detection circuit 3, the demodulated signal
Carrier frequency and playback carrier frequency on the transmitting side
Error signal selection circuit that extracts the beat component caused by the difference between
9. Detect the beat component using an appropriate threshold value
Then, the control signal ε to the VCO 11 is fed to the loop filters 5 and 7
By selecting and switching from the output signals of
In the asynchronous state before lockup at the start of
Output signal ε of loop filter 5_largeAfter lockup
In the sync hold state of the loop fill until the next sync loss
Output signal ε _smallTo VCO 11 respectively
Works to continue.

As described above, according to the present embodiment, the Costas carrier recovery circuit has different characteristic frequencies.
Prepare one loop filter 5 and 7 in advance,
Output signal of the Costas type phase error detection circuit 3 (error signal ε
_costas ), one of the output signals ε _large and ε _small of the two loop filters 5 and 7 is appropriately VC
Since it is selected as the control signal ε to the O11, in the asynchronous state at the start of burst signal reception, the output signal ε _large of the loop filter 5 having a large characteristic frequency ωn is used as the control signal ε to the VCO 11 to obtain an asynchronous signal. The characteristics can be improved. On the other hand, in the synchronization hold state after lockup, the BER characteristics at the time of synchronization can be improved by switching the control signal ε to the output signal ε _small of the loop filter 7 having a small ωn. . That is,
In the Costas type carrier recovery circuit, it is possible to avoid the reciprocal relationship between the acquisition characteristic and the BER characteristic regarding the characteristic frequency ωn, and it is possible to improve both the acquisition characteristic and the BER characteristic. As a result, it is possible to realize a circuit that makes full use of the characteristics of the Costas-type carrier recovery circuit, which has excellent synchronization acquisition characteristics and synchronization tracking characteristics.

In the present embodiment, the method of selecting and switching the two types of characteristic frequencies ωn using the two loop filters 5 and 7 has been described, but the number of loop filters to be prepared is not limited to this. It is also possible to use three or more loop filters to select and switch ωn so as to match a desired acquisition characteristic.

(Second Embodiment) In the second embodiment, in a decision feedback type carrier recovery circuit having better static characteristics than the Costas type carrier recovery circuit, the reciprocal relationship between the acquisition characteristic regarding the characteristic frequency ωn and the BER characteristic is avoided. This is the case.

FIG. 5 is a block diagram showing the structure of the synchronous detection device according to the second embodiment of the present invention. The synchronous detection device 200 shown in FIG. 5 is the same as the synchronous detection device 1 shown in FIG.
It has the same basic configuration as that of 00, the same components are given the same reference numerals, and the description thereof will be omitted.

The feature of this embodiment is that in addition to the Costas type phase error detection circuit 3, the decision feedback type phase error detection circuit 37 is provided.
The output signal of the decision feedback type phase error detection circuit 37 (error signal ε _DF ) is input to the two loop filters 5 and 7 instead of the output signal of the Costas type phase error detection circuit 3 (error signal ε _costas ). Is to be done. The decision feedback type carrier recovery circuit is a decision feedback type phase error detection circuit 37,
It is composed of the loop filter 5 or 7, and the VCO 11. Of these, only the phase error detection circuits 3 and 37 have different configurations between the Costas type carrier recovery circuit and the decision feedback type carrier recovery circuit, so that the loop filters 5 and 7 and the VCO 11 are different.
Can be diverted from each other.

In reproducing the carrier wave in the synchronous detection device 200, the error signal ε _DF output from the decision feedback type phase error detection circuit 37 is input to each loop filter 5 and 7, and the error signal ε _DF is output via each loop filter 5 and 7. Low frequency component ε _large , ε
_{This is performed} by selectively applying _small to the VCO 11.

At this time, the synchronous detection device 200 uses the output signal (error signal ε _costas ) of the Costas type phase error detection circuit 3 in the error signal selection circuit 9 as in the case of the first embodiment. Of the control signal .epsilon. To the VCO 11 is selected and switched according to the synchronization state.

Specifically, the error signal selection circuit 9 has a characteristic frequency ωn in an asynchronous state at the start of burst signal reception.
, The output signal ε _large of the loop filter 5 is selected, and in the synchronization holding state after lockup, the output signal ε of the loop filter 7 having a small ωn until the next synchronization is lost.
Select _small and operate so as to continue to apply to each VCO 11.

As described above, according to the present embodiment, in the decision feedback type carrier recovery circuit, the characteristic frequencies are different from each other.
Prepare one loop filter 5 and 7 in advance,
Output signal of the Costas type phase error detection circuit 3 (error signal ε
_costas ) based on the decision feedback type phase error detection circuit 37
Either one of the output signals ε _large and ε _small of the two loop filters 5 and 7 that inputs the error signal ε _DF from
Since it is appropriately selected as the control signal ε to the VCO 11,
In the asynchronous state before lockup at the start of burst signal reception, by using the output signal ε _large of the loop filter 5 having a large characteristic frequency ωn as the control signal ε to the VCO 11, the acquisition characteristic at the time of asynchronous can be improved. On the other hand, in the synchronous hold state after lockup, ωn
By switching the control signal ε to the output signal ε _small of the loop filter 7 having a _{small value} , the BER characteristic at the time of synchronization can be improved. That is, it is possible to avoid the reciprocal relationship between the acquisition characteristic and the BER characteristic regarding the characteristic frequency ωn in the decision feedback carrier recovery circuit, and to improve both the acquisition characteristic and the BER characteristic. As a result, it is possible to realize a circuit that makes full use of the characteristics of the decision feedback type carrier recovery circuit having excellent static characteristics.

In the present embodiment as well, the method of selecting and switching between two types of characteristic frequencies ωn using the two loop filters 5 and 7 has been described, but the number of loop filters to be prepared is not limited to this. Is the same as in the first embodiment.

(Third Embodiment) In the third embodiment, a Costas type carrier recovery circuit, which has a better synchronization acquisition characteristic than the decision feedback type carrier recovery circuit, is used for the lockup function at the start of burst signal reception, and By using the decision feedback type carrier recovery circuit, which has better static characteristics than the carrier recovery circuit, for the synchronization holding function after lockup,
It has the excellent features of both circuits, and the characteristic frequency ω
This is a case where the reciprocal relationship between the acquisition characteristic and the BER characteristic regarding n is avoided.

FIG. 6 is a block diagram showing the structure of the synchronous detection apparatus according to the third embodiment of the present invention. The synchronous detection device 300 shown in FIG. 6 corresponds to the synchronous detection device 2 shown in FIG.
It has the same basic configuration as that of 00, the same components are given the same reference numerals, and the description thereof will be omitted.

The feature of this embodiment is that the output signal of the Costas type phase error detection circuit 3 is input to the loop filter 5 having a large characteristic frequency ωn, not the output signal of the decision feedback type phase error detection circuit 37 (error signal ε _DF ). (Error signal ε _costas ) is input. The Costas type carrier recovery circuit is composed of the Costas type phase error detection circuit 3, the loop filter 5 and the VCO 11, and the decision feedback type carrier recovery circuit is the decision feedback type phase error detection circuit 37, the loop filter 7 and the VCO 11. Composed of.

In reproducing the carrier wave in the synchronous detection device 300, the error signal ε _costas output from the Costas type phase error detection circuit 3 is _applied to the loop filter 5 and the error signal ε _DF output from the decision feedback type phase error detection circuit 37. To the loop filter 7, and the low frequency components ε _large and ε _small are selectively VC through the loop filters 5 and 7.
It is performed by applying to O11.

At this time, in the synchronous detection device 300, as in the case of the first embodiment, the error signal selection circuit 9 uses the output signal (error signal ε _costas ) of the Costas type phase error detection circuit 3 to receive the received signal. Of the control signal .epsilon. To the VCO 11 is selected and switched according to the synchronization state.

More specifically, the error signal selection circuit 9 receives the error signal ε from the Costas type phase error detection circuit 3 in the asynchronous state before lockup at the start of burst signal reception.
_When the output signal ε _large of the loop filter 5 having a large characteristic frequency ωn for inputting _costas is selected and in the synchronization hold state after lockup, the error signal ε from the decision feedback type phase error detection circuit 37 until the next synchronization is lost. Input _DF ωn
Selects the output signal ε _small of the loop filter 7 having a small value of 1 and continues to apply it to the VCO 11, respectively.

Thus, according to the present embodiment, the cost
TAS type carrier wave regeneration circuit and decision feedback type carrier wave regeneration circuit
And two loop filters 5 and 7 with different characteristic frequencies
Is prepared in advance and the Costas type phase error detection
Output signal of path 3 (error signal ε _costas) Based on
Error signal ε from the Tas-type phase error detection circuit 3_costasEnter
Output of loop filter 5 with large characteristic frequency ωn
Signal ε_largeFrom the decision feedback type phase error detection circuit 37
Error signal ε_DFLoop filter with small ωn
7 output signal ε_smallEither one of the
Burst signal to select as control signal ε to 11
In the asynchronous state before lockup at the start of reception, the characteristic frequency
Output signal ε of loop filter 5 with large wave number ωn_largeTo
Used as a control signal ε to the VCO 11, that is, ωn
By using a costas type carrier wave reproduction circuit with a large
It is possible to improve the acquisition characteristics during synchronization.
On the other hand, ωn is small in the synchronization hold state after lockup.
Output signal ε of loop filter 7_{s mall}Turn off the control signal ε
Change, that is, decision feedback type carrier wave reproduction with small ωn
Using a circuit can improve the BER characteristics during synchronization.
You can That is, the Costas type carrier recovery circuit and
And decision feedback type carrier recovery circuit, characteristic frequency ωn
The reciprocal relationship between the acquisition characteristics and the BER characteristics regarding
Both the acquisition characteristic and the BER characteristic can be avoided.
It is possible to improve both
Costas carrier recovery circuit with excellent tracking characteristics and synchronous capture
A decision-feedback carrier recovery circuit with excellent static characteristics after capture.
It is possible to realize a circuit that combines these excellent features.
It

In the present embodiment as well, the method of selecting and switching the two types of characteristic frequencies ωn using the two loop filters 5 and 7 has been described, but the number of loop filters to be prepared is not limited to this. Is the same as in the first embodiment.

Further, the receiving device equipped with the synchronous detection devices 100, 200 and 300 according to each of the above-mentioned first to third embodiments further includes a wireless communication device such as a base station device,
It can be installed in a mobile station device and other wireless communication terminal devices.

[0079]

As described above, according to the present invention,
In the Costas carrier recovery circuit and the decision feedback carrier recovery circuit, both the acquisition characteristic and the BER characteristic can be improved by avoiding the reciprocal relationship between the acquisition characteristic and the BER characteristic regarding the characteristic frequency.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of a synchronous detection device according to a first embodiment of the present invention.

2 is a configuration diagram showing an example of an error signal selection circuit in FIG.

FIG. 3 is a timing chart showing an example of a switching operation of switches in FIG.

FIG. 4 is a flowchart showing an example of a processing procedure of the synchronous detection method of the present invention.

FIG. 5 is a block diagram showing a configuration of a synchronous detection device according to a second embodiment of the present invention.

FIG. 6 is a block diagram showing a configuration of a synchronous detection device according to a third embodiment of the present invention.

[Explanation of symbols]

1 Demodulator 3 Costas type phase error detection circuit 5,7 loop filter 9 Error signal selection circuit 11 Voltage controlled oscillator 37 Judgment feedback type phase error detection circuit 100,200,300 Synchronous detector

Claims (6)

[Claims] 1. A phase error detecting means for detecting a phase error between a carrier component of a received signal and a reproduced carrier, and different characteristic frequencies are set respectively, and an output signal of the phase error detecting means is based on the set characteristic frequencies. A plurality of loop filters for extracting low frequency components, a synchronization state detecting means for detecting a synchronization state of a received signal, and a detection result of the synchronization state detecting means, among the output signals of the plurality of loop filters. A selecting means for selecting at least one loop filter output signal for reproducing a carrier wave synchronized with the received signal, and a synchronous detection device. 2. A Costas type phase error detection circuit for detecting a phase error between a carrier component of a received signal and a reproduced carrier, and different characteristic frequencies are set respectively, and the Costas type phase error is based on the set characteristic frequencies. A plurality of loop filters for extracting low frequency components of the output signal of the detection circuit, based on the output signal of the Costas type phase error detection circuit, among the output signals of the plurality of loop filters, a carrier wave synchronized with the reception signal At least one for playing
A loop filter output signal selection circuit for selecting one loop filter output signal, and a synchronous detection device comprising: 3. A decision feedback type phase error detection circuit for detecting a phase error between a carrier component of a received signal and a reproduced carrier, and different characteristic frequencies are set respectively, and the decision feedback type is based on the set characteristic frequencies. A plurality of loop filters for extracting low frequency components of the output signal of the phase error detection circuit, a Costas type phase error detection circuit for detecting a phase error between the carrier component of the received signal and the reproduced carrier wave, and the Costas type phase error detection At least one for reproducing a carrier wave synchronized with the received signal from the output signals of the plurality of loop filters based on the output signal of the circuit
A loop filter output signal selection circuit for selecting one loop filter output signal, and a synchronous detection device comprising: 4. A Costas type phase error detection circuit for detecting a phase error between a carrier component of a received signal and a reproduced carrier, and a decision feedback type phase error for detecting a phase error between a carrier component of a received signal and a reproduced carrier. A detection circuit, different characteristic frequencies are set, respectively, a first loop filter for extracting a low frequency component of an output signal of the Costas type phase error detection circuit based on the set characteristic frequencies, and a set characteristic frequency Second for extracting a low frequency component of the output signal of the decision feedback type phase error detection circuit
A plurality of loop filters including the above loop filter, and at least one for reproducing a carrier wave synchronized with the received signal from the output signals of the plurality of loop filters based on the output signals of the Costas type phase error detection circuit.
A loop filter output signal selection circuit for selecting one loop filter output signal, and a synchronous detection device comprising: 5. A wireless communication device comprising the synchronous detection device according to any one of claims 1 to 4. 6. A phase error detecting step of detecting a phase error between a carrier component of a received signal and a reproduced carrier, and a plurality of loop filters each having a different characteristic frequency set, based on the set characteristic frequency. An extraction step of extracting a low frequency component of the output signal in the phase error detection step, a synchronization state detection step of detecting a synchronization state of the received signal, and a detection result in the synchronization state detection step,
A selection step of selecting at least one loop filter output signal for reproducing a carrier wave synchronized with the reception signal from the output signals of the plurality of loop filters in the extraction step; Method.