JP2003133432A - Semiconductor device and manufacturing method thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a structure having a plurality of elements of the small number of processes and different oxygen quantity to conditions, wherein an increase of the number of further LSI manufacturing processes is predicted when a high dielectric constant gate insulation film is used for a next generation MIS field effect transistor, and to provide a manufacturing method for forming it. SOLUTION: A semiconductor device is formed by providing a plurality of semiconductor elements having at least a silicon substrate 101, a gate insulation film 109 comprising at least a metallic element formed on the silicon substrate 101, and a gate electrode formed on the gate insulation film 109 by an element isolation region 102. The oxygen quantity in the gate insulation film 109 of the plurality of semiconductor elements is constituted to be variant.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device having a plurality of semiconductor elements and a method of manufacturing the semiconductor device.

[0002]

2. Description of the Related Art Various types of transistors are required for the structure of a semiconductor integrated circuit, and the characteristics required for a gate insulating film differ depending on each application. The input / output (I / O) transistor is required to have a withstand voltage, but the arithmetic unit (logic) transistor is first required to have a high capacity. Further, as various functions are mixedly mounted on the same chip, an arithmetic unit that requires high performance and a unit that most requires low leakage current to achieve low power consumption are being mixedly mounted. . In order to satisfy such requirements, it is necessary to form transistors having different thicknesses (different gate capacitances) in the same chip. Conventionally, the film thickness of the SiO ₂ film is controlled by changing the oxidation time of each transistor using a lithography technique (PEP process) and a barrier film having oxidation resistance such as SiN. However, in this case, it is necessary to repeat the PEP step and the steps of barrier film deposition, oxidation, and barrier film peeling according to various transistors, and an increase in cost due to an increase in the number of steps cannot be avoided.
In addition, attempts have been made to add nitrogen to SiO ₂ in order to increase the dielectric constant of a necessary part, but the number of steps for forming a barrier layer in the part where SiO ₂ is not added is increased, and nitrogen is segregated to the Si interface. Problem is unavoidable. These situations do not change even when a high dielectric constant insulating film is used for a next-generation transistor.

Further, partial modification of the capacitance of the gate insulating film of a single transistor is also being used as a useful means in the prior art, and is a technology that is being developed in the future. In particular, the drain edge is excellent in withstand voltage and reliability because deterioration of the insulating film in the overlap region due to carriers formed by electron-hole pair generation due to impact ionization due to electric field concentration and deterioration of the PN junction become problems. It is desirable that the film is simply thickened to relax the electric field. Next-generation MIS
Type field effect transistor, the gate insulating film capacitance is Si
Since a capacitance corresponding to a thickness of 2 nm or less in terms of O ₂ is required, it has been attempted to use a material having a higher dielectric constant than SiO ₂ as the gate insulating film. In that case, in order to partially change the capacitance of the gate insulating film, a method of partially removing or protecting the gate insulating film by using lithography and filling or depositing a different insulating film material in that part is considered. Has been. However, in this case, a PEP step, a step of depositing a barrier film for etching, etc. are required, and an increase in cost due to an increase in the number of steps is unavoidable.

Therefore, a conventional specific manufacturing method is shown in FIG.
This will be described with reference to FIG. 4 and 5 are process diagrams of an LSI in which insulating films having different gate capacitances are separately formed.

As is clear from the figure, when three types of element groups, a logical operation portion A, a low power consumption portion B, and an input / output portion C are formed through the isolation region 12 (1 in FIG. 5), metal oxidation is performed. After the deposition of the object 19, the lithography process (FIG. 4-a,
g) and the barrier film (SiN film) 13 deposition process (FIG.
c, FIG. 5-h) and the peeling process (FIGS. 1-d, f,
FIG. 5-i, k), oxidation step (FIG. 1-e, FIG. 5-j),
It is necessary to perform the step for the number of element groups, which requires complicated steps such as forming a barrier film and many steps.

Next, another conventional manufacturing method is shown in FIG.
This will be described with reference to FIG. 6 and 7 are process diagrams in the case where the gate end portion of the gate insulating film of the transistor has a lower capacity than the central portion. First, a low dielectric constant gate insulating film 18 such as SiO ₂ is formed (FIG. 6-a), and a central portion is opened by using lithography and etching (FIGS. 6-b and c).
Then, a high dielectric constant gate insulating film 19 is formed (FIG. 6-
d), the gate electrode film 14 is formed (FIG. 6-e), the opening is aligned, and lithography is performed so that the end of the gate electrode covers the low dielectric constant gate insulating film layer (FIG. 6-).
f, FIG. 7-g), the source / drain diffusion layer 15 is subjected to implantation and oblique implantation (FIG. 7-h), and a diffusion layer is formed by heat treatment so as to cover the lower portion of the electrode.

Alternatively, first, the high dielectric constant gate insulating film 1
9 (FIG. 8A), the center portion of the gate of the gate insulating film 19 is protected by lithography using a resist 20 (FIGS. 8B and 8C), the edges are etched, and SiO _{2 is formed} there.
A low dielectric constant film 18 such as
d), the gate electrode 14 is formed according to this gate portion (FIGS. 8E and 8F), the source / drain diffusion layer is implanted and the oblique implantation is performed (FIG. 9G), and the lower portion of the electrode 14 is subjected to heat treatment. A diffusion layer 15 is formed on the substrate (FIG. 9-
g, h).

In any case, when the conventional method is used, it is unavoidable that the cost is increased due to the complicated process such as a plurality of film forming processes and complicated alignment, and the increase in the number.

[0009]

As described above, the conventional technique cannot avoid an increase in the number of LSI manufacturing steps, and such a situation is accompanied by a high dielectric constant gate insulating film for future MIS field effect transistors in the future. The same is true when is used.

The present invention has been made in view of this problem, and an object thereof is to provide a method for forming a plurality of elements having different oxygen contents by a small number of steps.

[0011]

According to the present invention, firstly, a film thickness and a metal oxide film which satisfy the required gate capacitance are set to S.
By forming a film on an i substrate, adding oxygen to a necessary portion, and performing heat treatment collectively, it is possible to dramatically reduce the number of steps. Further, also in the MIS field-effect transistor, by selectively adding oxygen to the gate end portion and performing heat treatment, it is possible to reduce the number of steps as compared with the conventional method and realize the formation easily.

Therefore, the present invention provides a semiconductor device having at least a silicon substrate, a gate insulating film formed on the silicon substrate and containing at least a metal element, and a gate electrode formed on the gate insulating film. In a semiconductor device including a plurality of semiconductor devices, the amounts of oxygen in the gate insulating films of the plurality of semiconductor elements are different from each other.

Further, the present invention has at least a silicon substrate, a gate insulating film formed on the silicon substrate and containing at least a metal element and silicon atoms, and a gate electrode formed on the gate insulating film. A semiconductor device having a plurality of semiconductor elements is characterized in that the plurality of semiconductor elements have different amounts of oxygen in the gate insulating film.

Furthermore, the manufacturing method of the present invention is characterized in that, when the semiconductor device is manufactured, the amount of oxygen added to the gate insulating film is changed by using a protective film deposited or formed on the surface of the silicon substrate. To do.

Further, as a method for adding oxygen, it is preferable to use oxygen ion implantation, and it is more preferable to use a step of performing heat treatment after performing the plurality of kinds of oxygen adding steps.

It is preferable that the oxygen addition step is performed by ion implantation at an acceleration voltage of 10 keV or less. Further, in the present invention, the gate insulating film containing a metal element is Zr, Hf, La, Ce, Ti, Al, Y, M.
A metal oxide containing any one of g, Ta, Bi and Pr is desirable.

Furthermore, a silicon substrate, a gate insulating film containing a metal element formed on the silicon substrate,
A gate electrode formed on the gate insulating film, wherein a gate end portion of the gate insulating film formed between the silicon substrate and the gate electrode has a higher oxygen concentration than a central portion thereof. . At this time, it is preferable that a silicon oxide film layer is formed between the gate end portion of the gate insulating film formed between the silicon substrate and the gate electrode and the interface of the Si substrate, and the silicon substrate and the gate electrode. It is preferable that the oxygen concentration of the gate end portion of the gate insulating film formed between the two has a peak in the insulating film and the concentration decreases on the insulating film surface and the Si substrate surface. In the manufacturing method, at least a step of implanting oxygen into the gate end portion of the gate insulating film formed between the silicon substrate and the gate electrode by oxygen ion implantation is provided.

[0018]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a diagram for explaining the first embodiment of the present invention, and is a process diagram of a method of separately forming insulating films having different gate capacitances.

First, a groove for element isolation is formed on a Si substrate 101 by reactive ion etching, and for example, LP (low pressure) -TEOS (Tetraethylor) is formed.
A device isolation region 102 is formed by embedding a thosilicate (ethyl silicate) film.

Next, for example, by using the sputter film forming method,
For example, in an atmosphere with an oxygen partial pressure of 5 Pa, the substrate temperature is 300 ° C.
Then, a metal oxide 109 made of HfO _{2 is} deposited on the silicon substrate 101 to a thickness of 4 nm. After that, 600 ℃
It is desirable to densify the metal oxide 109 by annealing in an atmosphere of oxygen, nitrogen or an inert gas at ˜800 ° C. (FIG. 1-a). Alternatively, the metal oxide 109 may be formed by a CVD film formation method. In this case, for example, a mixed gas of C ₁₆ H ₃₆ HfO ₄ gas and oxygen gas, a mixed gas of HfCl ₄ gas, NH ₃ gas and oxygen gas, or a mixed gas of Hf (SO ₄ ) ₂ gas, NH ₃ gas and oxygen gas A mixed gas of Hf-containing gas and oxygen gas at a pressure of 1 Pa to 10 ⁴ Pa, 1 sccm to 1000
After supplying and exhausting each at a flow rate of sccm and depositing the substrate at a room temperature in the temperature range of about 800 ° C., 600 ° C.
Metal oxide 1 by annealing in an oxygen atmosphere at 900 ° C 1
It is desirable to densify 09.

Then, a resist 110a is deposited by a lithography process, an element group to be thickened is opened (FIG. 1-b), and an oxygen implanter 111a is added, for example, 1 to 1.
With an energy of 0 KeV, 10 ¹⁷ to 10 ²⁰ cm ⁻²
It is added at a dose of about the same (FIG. 1-c). In this way, the metal oxide 109 made of HfO _{2 has} a concentration of 10 ¹⁷ −.
The metal oxide 109B made of HfO ₂ to which oxygen of about 10 ²⁰ cm ⁻² (dose) is added is formed. Then, the resist 110a is peeled off (FIG. 1-d),
A lithography step for opening another element group is performed using the resist 110b (FIG. 1-e). Then, oxygen implanter 111b is added with an energy of, for example, 1 to 10 KeV and at a dose of about 10 ²⁰ to 10 ²² cm ⁻² (FIG. 1-f). By doing so, the metal oxide 109 made of HfO ₂ can be added to 10 ²⁰ to 10 ²² cm ^−2.
The metal oxide 109C made of HfO ₂ to which oxygen (dose amount) is added is formed. The amount of oxygen added can be changed according to the required gate insulating film capacity and thickness. Thereafter, by collectively performing heat treatment at 600 ° C. to 1000 ° C., the added oxygen repairs the defects in the insulating film and the excess oxygen oxidizes the Si substrate to realize a thicker insulating film (FIG. 1). -G). The metal oxide made of HfO ₂ to which oxygen is not newly added by ion implantation is 109A.

As is apparent from FIG. 1, according to the first embodiment of the present invention, a complicated step of depositing a barrier layer is not required, and only a lithography step and an oxygen addition step are performed.
Insulating films 109A, 109B, 109C having different oxygen concentrations
It is possible to form a logical operation part A, a low power consumption part B, and an input / output part C having the above, and by finally performing heat treatment collectively, it is possible to greatly reduce the number of steps and the cost.

Incidentally, the steps after the formation of the insulating films having different oxygen contents are similar to those in the manufacturing process of a usual MIS field effect transistor, for example, arsenic ions at an acceleration voltage of 20 KeV and a dose of 1 × 10 ¹⁵ cm ^−2. Implantation is performed to form source / drain regions, an interlayer insulating film made of silicon oxide is deposited on the entire surface by chemical vapor deposition, and contact holes are opened in this interlayer insulating film. Subsequently, an Al film is deposited on the entire surface by a sputtering method, and the Al film is patterned by reactive ion etching to form a wiring. Through these steps, MIS field effect transistor element groups having different gate capacitances and thicknesses can be selectively formed.

Finally, it is possible to obtain the structure shown in L of FIG. 5 in which the thickness of the insulating film is not changed as shown in the conventional example.

In the first embodiment, HfO ₂
A metal oxide 109 made of Zr, La, Ce, Ti, Al, Y, Mg, Ta, B was used instead of Hf.
Any material containing i or Pr may be used. Also,
The place where the oxygen amount of the metal oxide 109 made of HfO ₂ is changed is not limited to 3 places (the logic operation unit, the low power consumption unit, the input / output unit), but may be 2 places, and naturally 4 or more places. Is also good. Furthermore, if a floating gate is formed in the middle of the gate insulating film of the transistor used in this embodiment, it can be applied to a storage device such as PROM or EEPROM.

Next, a second embodiment of the present invention will be described with reference to FIG. FIG. 2 is a process chart for making the gate end portion of the gate insulating film of the transistor have a lower capacity than the central portion, and finally, a plurality of the transistors are formed on the Si substrate.

First, a metal oxide gate insulating film 109 is deposited on a Si substrate (FIG. 2-a). For example, using a sputter film formation method, after depositing a metal oxide 109 made of HfO ₂ with a thickness of 4 nm on the silicon substrate 101 at a substrate temperature of 300 ° C. in an atmosphere with an oxygen partial pressure of 5 Pa, 6
It is desirable that the metal oxide 109 be densified by annealing in an atmosphere of oxygen, nitrogen, or an inert gas at 00 ° C. to 800 ° C.

Further, the metal oxide 1 is formed by using the CVD film forming method.
09 may be formed. In this case, for example, C ₁₆ H
₃₆ HfO ₄ gas and oxygen gas mixture or HfCl
Mixed gas of ₄ gas, NH ₃ gas and oxygen gas or Hf
A mixed gas of Hf-containing gas and oxygen gas, such as a mixed gas of (SO ₄ ) ₂ gas, NH ₃ gas, and oxygen gas, is 1 Pa to.
At a pressure of 10 ⁴ Pa and a flow rate of 1 sccm to 1000 sccm, each is supplied and exhausted, and the substrate temperature is room temperature 800 ° C.
It is desirable to densify the metal oxide 109 by annealing in an oxygen atmosphere at 600 ° C. to 900 ° C. after the deposition in a temperature range of about 600 ° C.

Then, a MIS transistor is formed according to a normal MIS transistor manufacturing process (FIG.
b, c, d, e). That is, the gate electrode forming portion is opened and the resist 110 is applied (FIG. 2B), and the gate electrode layer 1 is formed.
04 (FIG. 2-C). Next, after forming the source / drain regions 105, sidewalls 106 of an insulator are provided on the gate electrode 104. After that, in this embodiment, oxygen is obliquely implanted with low energy (10 keV or less).
(FIG. 2-f), by forming a metal oxide 113 containing a high concentration of oxygen at the gate end portion and performing heat treatment (FIG. 2-g), excess oxygen diffuses and Si is oxidized to form SiO ₂
The film 114 is formed. Such easy and few steps,
Further, it is possible to reduce the capacitance and increase the film thickness only at the gate end portion while following the highly accurate transistor process without misalignment.

The metal oxide at the end portion of the insulating film thus formed can be a highly reliable film 113 with a sufficient number of oxygen defects, which is highly reliable. The SiO ₂ film 114 on the interface of the Si substrate formed by the diffusion of excessive oxygen is less damaged and forms an insulating film excellent in withstand voltage.

In this structure, oxygen implantation is performed at low energy, and by providing a peak concentration in the metal oxide film, direct injection of oxygen into the Si substrate is avoided, and damage is reduced. To be realized.

As described above, by using the present invention, it is possible to increase the film thickness and increase the reliability of only the gate end portion with a small number of steps.

Next, an example is shown in which the optimum implantation energy of oxygen ions is calculated when oxygen implantation is performed on the high dielectric constant metal oxide gate insulating film.

FIG. 3 shows oxygen ions at each implantation energy in an 8 nm thick HfO ₂ film (converted film thickness of about 1.8 nm) having a capacitance of 2 nm or less in film thickness of SiO ₂ required for the next-generation MIS transistor. The result of calculating the density distribution in the depth direction when added is shown. As is apparent from FIG. 3, when oxygen ions are implanted with an energy of 10 KeV or more, the peak concentration reaches the Si substrate, and it is understood that a large amount of oxygen directly reaches the Si substrate.
Since it is predicted that the Si substrate will be greatly damaged under such conditions, it is desirable that the implantation of oxygen ions is performed at an energy of 10 Kev or less.

Although some embodiments of the present invention have been described above, the present invention is not limited to the above range.

For example, instead of oxygen ion implantation, a method of lower energy, such as an ion shower, may be used, or if oxygen can be added in a temperature range that the resist mask can withstand, It can be used as the technique of the present invention.

[0038]

As described above, according to the present invention, a lithographic step and an implantation step of adding oxygen are performed in a gate insulating film made of a metal oxide, and then heat treatment is collectively performed to obtain various element groups. This is a technique that can change the oxygen amount in an arbitrary portion such as a gate end of a transistor, and can provide a highly reliable transistor with reduced cost through easy steps and few steps.

[Brief description of drawings]

FIG. 1 is a process drawing for explaining a first embodiment of the present invention.

FIG. 2 is a process drawing for explaining the second embodiment of the present invention.

FIG. 3 is a diagram showing a density distribution in the depth direction when oxygen ions are added to an 8 nm HfO ₂ metal oxide at each implantation energy.

FIG. 4 is a diagram for explaining a conventional example.

FIG. 5 is a diagram for explaining a conventional example.

FIG. 6 is a diagram for explaining a conventional example.

FIG. 7 is a diagram for explaining a conventional example.

FIG. 8 is a diagram for explaining a conventional example.

FIG. 9 is a diagram for explaining a conventional example.

[Explanation of symbols]

101 ... silicon substrate 102 ... isolation region 103 ... barrier layer (SiN, etc.) 104 ... gate electrode 105 ... source / drain regions 108 ... low dielectric constant gate insulating film (SiO ₂ etc.) 109 ... metal oxide gate insulating film 110 ... resist 111 ... oxygen implantation 112 ... oxygen oblique implantation 113 ... SiO ₂ film oxygen defects by reaction with excess encased oxygen and the substrate Si on the high dielectric constant metal oxide film 114 ... upper metal oxides repaired

Claims (10)

[Claims] 1. A plurality of semiconductor elements provided with at least a silicon substrate, a gate insulating film formed on the silicon substrate and containing at least a metal element, and a gate electrode formed on the gate insulating film. In the semiconductor device, the amount of oxygen in the gate insulating films of the plurality of semiconductor elements is different from each other. 2. A plurality of semiconductor elements having at least a silicon substrate, a gate insulating film formed on the silicon substrate and containing at least a metal element and silicon atoms, and a gate electrode formed on the gate insulating film. A semiconductor device provided, wherein the plurality of semiconductor elements are configured to have different amounts of oxygen in the gate insulating film. 3. The gate insulating film containing the metal element is Z
r, Hf, La, Ce, Ti, Al, Y, Mg, Ta,
The semiconductor device according to claim 1 or 2, wherein the semiconductor device is a metal oxide containing any one of Bi and Pr. 4. The gate insulating film formed between the silicon substrate and the gate electrode has a higher oxygen concentration at an end portion of the gate insulating film than at a central portion thereof. Semiconductor device. 5. The silicon oxide film layer is provided between the end of the gate insulating film formed between the silicon substrate and the gate electrode and the interface of the Si substrate.
The semiconductor device described. 6. The gate insulating film formed between the silicon substrate and the gate electrode has an oxygen concentration at an end portion of the gate insulating film in the gate insulating film in a film thickness direction of the gate insulating film. 3. The semiconductor device according to claim 1, wherein the semiconductor device has a profile having a peak and a concentration decreasing on the surface of the gate insulating film and the surface of the Si substrate. 7. A step of forming a gate insulating film containing at least a metal element on a silicon substrate, and a step of forming a gate electrode on the gate insulating film, which is formed between the silicon substrate and the gate electrode. In a method of manufacturing a semiconductor device, wherein a plurality of semiconductor elements are formed so that the amount of oxygen introduced into the formed gate insulating film is different, the gate insulating film is formed by using a protective film deposited or formed on the surface of the silicon substrate. A method of manufacturing a semiconductor device, wherein the amount of oxygen added in the film is changed. 8. A step of forming a gate insulating film containing at least a metal element on a silicon substrate, and a step of forming a gate electrode on the gate insulating film, which are formed between the silicon substrate and the gate electrode. In a method of manufacturing a semiconductor device in which a plurality of types of semiconductor elements are formed so that different amounts of oxygen are introduced into the gate insulating film, the introduction of oxygen into the gate insulating film is performed by ion implantation. A method for manufacturing a characteristic semiconductor device. 9. The method of manufacturing a semiconductor device according to claim 7, wherein a step of heat treatment is performed after the step of introducing and adding oxygen into the gate insulating film. 10. Introduction of oxygen into the gate insulating film comprises:
9. The method of manufacturing a semiconductor device according to claim 8, wherein the ion implantation is performed at an acceleration voltage of 10 keV or less.