JP2003128494A - Method for producing semiconductor device and semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method for producing a semiconductor device, and the semiconductor device in which high strain relaxation rate is attained even in a strained SiGe film having thickness equal to or thinner than critical film thickness and high Ge concentration formed on a semiconductor substrate, through dislocation density is reduced, undulation of a second SiGe film surface formed on it is inhibited and smoothness can be enhanced. SOLUTION: The method for producing the semiconductor device includes following steps: (a) a step of forming a first SiGe film thickness in thickness equal to or thinner than the critical film thickness on the substrate whose surface is composed of silicon, (b) a step of forming a first cap semiconductor film on the first SiGe film, (c) a step of subjecting the obtained substrate to ion implantation, (d) a step of annealing the substrate having the first cap semiconductor film on it's surface, (e) a step of forming second SiGe film on the first cap semiconductor film, and (f) a step of forming a second cap semiconductor film on the second SiGe film.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device and a semiconductor device, and more particularly to a method for manufacturing a semiconductor device using a semiconductor substrate having a strained SiGe film.

[0002]

2. Description of the Related Art In a semiconductor device, improving the mobility of electrons and holes moving in a semiconductor element is one of the effective means for improving the performance. However, generally, in a semiconductor device formed on a substrate made of a silicon single crystal, the upper limit of the mobility of electrons moving in the silicon single crystal is determined based on the physical property of the silicon single crystal. On the other hand, in recent years, it has been reported that the electron mobility in a strained silicon crystal is higher than that in a strainless silicon crystal.

Therefore, conventionally, a SiGe crystal layer having a large lattice constant with respect to silicon is formed in a virtual lattice shape on a silicon substrate, and the strain of the SiGe film due to the mismatch of the lattice constant with the Si substrate is misfit dislocation. There is known a method of forming a Si film as a cap layer on the SiGe film after the relaxation by the introduction of Si. The Si film is distorted by being pulled by the SiGe film having a larger lattice constant, whereby the band structure is changed and the carrier mobility is improved. As a method for relaxing the strain of the SiGe film, there is known a method of forming a SiGe film with a thickness of several μm and increasing the strain elastic energy of the SiGe film to relax the lattice. For example, YJ Mii et al.
l. Phys. Lett. 59 (13), 1611 (1991), S
He announced the strain relaxation of the SiGe film by gradually increasing the Ge concentration in the iGe film and forming a concentration-graded SiGe film of about 1 μm.

As a method of relaxing the strain of the thin SiGe film, ion implantation of hydrogen or the like is performed, and then annealing is performed at a high temperature so that the defect layer 5 in the silicon substrate 1 is formed as shown in FIG. The resulting stacking fault causes slippage,
A method is known in which misfit dislocations are generated at the SiGe film 2 / Si substrate 1 interface to relax the strain. For example
D. M. Fo11staedt et al. Appl. Phys. Lett. 69 (1
4), 2059 (1996), H. Trinkaus et al. Phys. Lett. 76 (2
4), 3552 (2000), announced the strain relaxation by H ion implantation.

Further, as shown in FIG. 7, first, a first Si _0.7 Ge _0.3 film 2 and a first cap Si film 3 are formed on a silicon substrate 1 at a low temperature of 400 ° C. and annealed at 600 ° C. Then, low density misfit dislocations are generated at the SiGe film 2 / Si substrate 1 interface. Subsequently, when the second Si _0.7 Ge _0.3 film 6 is grown at a high temperature of 600 ° C., SiG
The strain field of the misfit dislocation generated at the interface of the e film 2 / Si substrate 1 causes a waviness on the surface of the second SiGe film 6 in the growth process, and the compressive stress applied to the valley part of the waviness becomes a new dislocation generation site. As a result, a method of relaxing strain while growing the second SiGe film 6 has been reported (Sugimoto et al., Japan Society for the Promotion of Science, Semiconductor Interface Control Technology, 154th Committee, 31st Research Meeting, page 29). . In this method, SiGe
Threading dislocations in the film, which are derived from misfit dislocations at the interface of the film 2 / Si substrate 1, are reduced by forming the first cap Si film 3, and the first Si _0.7 containing high concentration Ge is further added. Even when the Ge _0.3 film is used, the second SiGe film can be relaxed by about 90%.

[0006]

As described above, the Si
In the method of forming a Ge film as a thick film and relaxing the lattice by increasing the strain elastic energy of the SiGe film, the critical film thickness for obtaining a perfect crystal is exceeded.
A large number of defects occur in the e film. Further, in the method of annealing at a high temperature after implanting ions of hydrogen or the like, since there is only a heterostructure of the first SiGe film and the first cap Si film, there is a misfit at the SiGe / Si substrate interface. There is a problem that threading dislocations derived from dislocations reach a high density (about 10 ⁷ / cm ² ) up to the surface, which causes a large increase in junction leakage current when forming an element. Further, there is a problem that a protrusion called a crosshatch is generated on the surface due to threading dislocations and residual strain energy.

Further, the first cap Si film / first S
In the method of relaxing the strain while growing the second SiGe film on the iGe film / Si substrate structure, the effect of the strain field due to the low density misfit dislocation and the film growth at high temperature
Waviness (rm) of very large amplitude on the surface of the second SiGe film
s: about 9 nm) remains. The present invention has been made in view of the above problems, and achieves a high degree of strain relaxation even in a strained SiGe film formed on a semiconductor substrate and having a high Ge concentration and having a critical film thickness or less, The second SiG formed on the threading dislocation density is reduced.
An object of the present invention is to provide a semiconductor device manufacturing method and a semiconductor device capable of suppressing waviness on the surface of an e film and improving smoothness.

[0008]

According to the present invention, (a)
A step of forming a first SiGe film with a film thickness not more than a critical film thickness on a substrate whose surface is made of silicon; and (b) a first Si film.
A step of forming a first cap semiconductor film on the Ge film,
(C) a step of implanting ions into the obtained substrate, and (d)
A step of annealing a substrate having a first cap semiconductor film on its surface; (e) a step of forming a second SiGe film on the first cap semiconductor film; and (f) a step of forming a second SiGe film on the second SiGe film. And a step of forming a cap semiconductor film of No. 2 are provided.

Further, according to the present invention, there is provided a semiconductor device in which the first, second, third and fourth semiconductor films are laminated on the semiconductor substrate, and crystal defects are formed on the surface of the semiconductor substrate. The first semiconductor film has a lattice constant different from that of the semiconductor substrate, the second semiconductor film has a lattice constant different from that of the first semiconductor film, and the third semiconductor film has a lattice constant different from that of the second semiconductor film. Except that the fourth semiconductor film has substantially the same lattice constant as the third semiconductor film.

[0010]

BEST MODE FOR CARRYING OUT THE INVENTION In the method of manufacturing a semiconductor device of the present invention, in step (a), a first SiGe film is formed on a substrate whose surface is made of silicon to a film thickness not more than a critical film thickness. A substrate whose surface is made of silicon means amorphous,
A microcrystal, a single crystal, a polycrystal, a silicon substrate in which two or more of these crystal states are mixed, or a so-called SOI substrate having a silicon layer of these on its surface is included.
Of these, a single crystal silicon substrate is preferable.

The first SiGe film can be formed by various known methods such as a CVD method, a sputtering method, a vacuum vapor deposition method and a MEB method. Among them, C
It is preferably formed by an epitaxial growth method by the VD method. In this case, the film forming conditions may be selected from those known in the art, and particularly the film forming temperature is, for example, about 400 to 650 ° C. This SiGe
In the film, the Ge concentration is not particularly limited, but is, for example, about 10 to 40 atom%, preferably 20 to 30 atom%. The film thickness of SiGe needs to be less than or equal to the critical film thickness. The critical film thickness means the limit film thickness at which the SiGe film can grow strained on the substrate. Specifically, when a SiGe film having a Ge concentration in the above range is formed on a silicon substrate, the thickness is about 500 nm or less, about 5 to 500 nm, and more preferably about 10 to 300 nm. In addition,
The Ge concentration may change continuously or stepwise in the film thickness direction and the layer surface direction (in-plane direction), but is preferably uniform.

In step (b), a first cap semiconductor film is formed on the first SiGe film. The first cap semiconductor layer is not particularly limited as long as it has a diamond structure similar to silicon.
Examples thereof include Si, SiC, a SiGe film having a Ge concentration lower than that of the first and second SiGe films described later. SiC
The C concentration in is not particularly limited, and may be, for example, about 0.1 to 7 atom%. Also, S
The Ge concentration in iGe is preferably about 10 atom% or less. The first cap semiconductor layer is the first SiG.
It can be formed by the same method as the e film. In this case, the substrate temperature is preferably about 400 to 650 ° C. The first cap semiconductor film is preferably formed to have a film thickness equal to or less than the critical film thickness.
It is preferable that the higher the germanium concentration of the e film is, the thinner the film is. Specifically, 1 to 100 nm
The degree is about 5 to 30 nm.

In step (c), ions are implanted into the obtained silicon substrate. Ion implantation is suitably performed using an element capable of introducing a crystal defect into the surface of silicon used as a substrate, an element capable of forming a microcavity in a silicon substrate in annealing after ion implantation, for example, , Hydrogen, an inert gas, and a Group 4 element. Specific examples thereof include hydrogen, helium, neon, silicon, carbon, germanium and the like, and among them, hydrogen is preferable. The acceleration energy of ion implantation can be appropriately adjusted depending on the ion species used, the film thickness of the first SiGe film, the material and film thickness of the first cap semiconductor layer, and the like. For example, so that the implantation peak is on the silicon substrate side of the first SiGe film / substrate interface, and more specifically, at a position deeper than the interface by about 20 nm or more (preferably at a position of about 30 to 70 nm) from the interface. It is desirable to set the peak so as to suppress defects in the SiGe layer and prevent thinning of the SiGe layer. For example, the implantation energy is about 20 to 150 keV, and more specifically, the film thickness of the SiGe layer is 2 or less.
When the hydrogen is used in the case of about 00 nm, 18 to
It may be about 25 keV. The dose is, for example, 1 ×
10 ¹⁵ to 1 × 10 ¹⁷ cm ^-2 , more preferably 1 × 1
0 ¹⁶ to 1 × 10 ¹⁷ cm ⁻² can be mentioned.

The ion implantation does not necessarily have to be performed after forming the first cap semiconductor layer, and may be performed, for example, after forming a protective film on the first SiGe film. The material and the film thickness of the protective film here are not particularly limited, and may be an insulating film or a semiconductor film. Specifically, thermal oxide film, low temperature oxide film: LTO
The film may be a high temperature oxide film: an HTO film, a silicon oxide film formed by P-CVD, a silicon nitride film, or the like. Also,
For example, a film thickness of about 20 to 150 nm can be mentioned.

In step (d), the substrate having the first cap semiconductor film on the surface is annealed. Annealing
Methods and conditions known in the art can be used, except that the first cap semiconductor layer is formed on the first SiGe film. Specific examples include furnace anneal, lamp anneal, RTA, and the like. In an inert gas atmosphere, an air atmosphere, a nitrogen gas atmosphere, an oxygen gas atmosphere, a hydrogen gas atmosphere, etc., in a temperature range of 600 to 900 ° C., 5 It can be performed for about 30 minutes.

In step (e), a second SiGe film is formed on the first cap semiconductor film. Second SiGe
The film can be formed by the same method, the same Ge concentration, and the same film thickness as those of the first SiGe film. However, the Ge concentration and the film thickness are not necessarily the same as those of the first SiGe.

In step (f), a second cap semiconductor film is formed on the second SiGe film. The second cap semiconductor film can be formed by the same method, the same material concentration, and the same film thickness as those of the first cap semiconductor film. Especially, it is preferable to use Si. The film thickness is preferably equal to or less than the critical film thickness, specifically, about 1 to 100 nm,
More preferably, it is about 5 to 40 nm. In the method of manufacturing a semiconductor device of the present invention, the steps (a) to
It is not always necessary to perform (f) in this order. For example, after the step (b), a protective film is formed on the first cap semiconductor film, the ion implantation in the step (c) and the annealing in the step (d) are performed. May be performed, and then the protective film may be removed, and step (e) may be performed. The type and film thickness of the protective film are as described above, and the protective film can be removed by a method known in the art, for example,
Wet etching using an acid or alkaline solution, dry etching and the like can be mentioned.

Alternatively, after the step (a), a protective film is formed on the first cap semiconductor film, the ion implantation of the step (c) is performed, and then the protective film is removed, and then the step of the step (b) is performed. 1
The first cap semiconductor film may be formed on the SiGe film and the annealing in step (d) may be performed. After the first SiGe film, the first cap semiconductor film, the second SiGe film and the second cap semiconductor film are formed on the substrate as described above, the device isolation region is formed according to a normal semiconductor process. Formation, formation of gate insulating film and gate electrode, L
Various processes such as formation of the DD region and / or source / drain region, formation of an interlayer insulating film, formation of a wiring layer, etc. are performed,
A semiconductor device can be completed.

The semiconductor device of the present invention is a semiconductor device in which the first, second, third and fourth semiconductor films are laminated on a semiconductor substrate, and crystal defects are introduced into the surface of the semiconductor substrate. The first semiconductor film has a lattice constant different from that of the semiconductor substrate, the second semiconductor film has a lattice constant different from that of the first semiconductor film, and the third semiconductor film has a lattice constant different from that of the second semiconductor film. Differently, the fourth semiconductor film has substantially the same lattice constant as the third semiconductor film. As a result, the first semiconductor layer in which the strain is relieved significantly and the fourth semiconductor layer in which the strain is intrinsic with a low defect density
It is possible to obtain a semiconductor substrate having excellent flatness by suppressing the threading dislocation reaching the surface, the crosshatch at the outermost surface, and the like.

It is necessary for the semiconductor substrate to have crystal defects introduced near its surface. Crystal defects can be introduced by ion implantation and / or annealing as described above. The defect density in this case is not particularly limited as long as it can be introduced under the above-mentioned ion implantation and / or annealing conditions. The position of the crystal defect may be a position deeper than the substrate surface by about 20 nm or more, preferably a position of about 30 to 70 nm.

The first semiconductor layer has a diamond structure similar to that of the substrate, that is, silicon, and its lattice constant needs to be different from that of silicon. For example, when it is large, SiGe is used, and when it is small, SiC is used. As described above, the thickness of the first semiconductor layer is preferably the critical film thickness or less. Specifically, it is about 5 to 500 nm. As a result, the strain of the first semiconductor layer is relaxed, but it is slightly larger or smaller than the original lattice constant of the material of the first semiconductor layer.

The second semiconductor layer preferably has a diamond structure and needs to have a lattice constant different from that of the first semiconductor layer. For example, when the lattice constant of the first semiconductor layer is larger than that of silicon, the lattice constant of the second semiconductor layer is preferably smaller than that of the first semiconductor layer, and the lattice constant of the first semiconductor layer is silicon. When it is smaller than the above, the lattice constant of the second semiconductor layer is preferably larger than that of the first semiconductor layer. The degree of difference in lattice constant is preferably smaller than the difference in lattice constant between silicon and germanium when the lattice constant of the second semiconductor layer is smaller than that of the first semiconductor layer. When the lattice constant is larger than that of the first semiconductor layer, it is preferably smaller than the difference in lattice constant between silicon and carbon. As a result, the second semiconductor layer has a strain therein and is smaller or larger than the original lattice constant of the material of the second semiconductor layer. Examples of the second semiconductor layer include Si, SiC, SiGe and the like. The film thickness is
The thickness is about 1 to 100 nm.

The third semiconductor layer preferably has a diamond structure and needs to have a lattice constant different from that of the second semiconductor layer. For example, when the lattice constant of the second semiconductor layer is larger than that of silicon, the lattice constant of the third semiconductor layer is preferably smaller than that of the second semiconductor layer, and the lattice constant of the second semiconductor layer is silicon. When it is smaller than the above, the lattice constant of the third semiconductor layer is preferably larger than that of the second semiconductor layer. The degree of difference in lattice constant can be set in the same manner as above or according to the above. As a result, the strain of the third semiconductor layer is relaxed, but the strain is still present, and is slightly larger or smaller than the original lattice constant of the material of the third semiconductor layer. As an example of the third semiconductor layer, a semiconductor made of the same material as the first semiconductor layer is preferable, but the composition (ratio) of each element is not necessarily the same. Film thickness is 5
About 500 nm.

The fourth semiconductor layer needs to have a diamond structure and have a lattice constant substantially equal to that of the third semiconductor layer. Here, substantially the same means that the lattice of the fourth semiconductor layer substantially matches the lattice of the third semiconductor layer,
Therefore, the fourth semiconductor layer is in a state in which strain is inherently present and is slightly smaller or larger than the original lattice constant of the material of the fourth semiconductor layer, and there is almost no threading dislocation from the lower layer. As the fourth semiconductor layer, Si single crystal is preferable. The film thickness is about 1 to 100 nm. Hereinafter, embodiments of a method for manufacturing a semiconductor device and a semiconductor device according to the present invention will be described in detail with reference to the drawings.

Embodiment 1 First, on a silicon substrate, boiled sulfuric acid is used as a pretreatment.
And RCA cleaning, and silicon substrate with 5% dilute hydrofluoric acid
The native oxide film on the surface was removed. Next, in FIG.
As shown, use low pressure vapor deposition (LP-CVD) equipment
And German (GeH_Four) And disilane (Si₂H₆)When
With a Ge concentration of 20% on the silicon substrate 1
First Si_0.8Ge_0.2The film 2 is formed into a virtual lattice with a film thickness of 200
epitaxial growth at 500 ° C until
It was The first Si film formed under these conditions _0.8Ge_0.2Membrane 2
It is less than or equal to the boundary film thickness. Then, as shown in FIG.
On the first SiGe film 2 at 500 ° C.
The cap Si film 3 of No. 1 is hypothesized by an LP-CVD device.
Epitaxially grow to a thickness of 10 nm
It was

As shown in FIG. 1C, an implantation energy of 25 keV and a dose of 4 × are applied to the obtained silicon substrate 1.
Four hydrogen ions were implanted under the conditions of 10 ¹⁶ cm ^-2 and tilt angle of 7 °. After that, perform RCA cleaning and
Annealing was performed for 0 minutes. As a result, as shown in FIG. 1D, an elliptical defect 5 is formed at a position approximately 50 nm from the interface of the silicon substrate 1 / first SiGe film 2 to the substrate side, and the first SiGe film 2 is formed. The lattice matching strain of was able to be relaxed almost completely (90% or more).

Then, as shown in FIG.
Using a CVD apparatus, using germane and disilane as raw materials, a second Si _0.8 Ge _0.2 film 6 having a Ge concentration of 20% is formed on the first cap Si film 3 until a film thickness of 200 nm is formed in a virtual lattice pattern. Epitaxial growth was performed at 500 ° C.
When the roughness of the surface of the second SiGe film 6 formed under these conditions was observed by an atomic force microscope (AFM), the average value rms of irregularities on the surface was very smooth, less than 1 nm. Further, since the second SiGe film 6 is formed on the first SiGe film 2 which is almost completely strain-relieved and the first cap Si layer 3 which is in a state of being stretched by the virtual SiGe film 6, it is very relaxed. In a state of relaxation (relaxation rate 90
%that's all). Finally, as shown in FIG. 1F, a second cap Si film 7 is formed on the smooth strain-relaxed second SiGe film 6 in a virtual lattice shape by using an LP-CVD apparatus. Epitaxial growth was performed at 500 ° C. until the thickness became 20 nm.

With respect to the obtained silicon substrate 1, the threading dislocation density reaching the second cap Si film 7 derived from the misfit dislocation generated at the interface between the silicon substrate 1 and the first SiGe film 2, It was revealed in an etch pit using hydrofluoric acid + chromic acid and measured with an optical microscope. As a result, it was about 1 × 10 ³ cm ^-2 , which was a significant reduction compared to the conventional case. In this way, hydrogen ions are implanted and annealed after the first SiGe film 2 and the first cap Si film 3 are formed, so that the strain of the first SiGe film 2 is almost completely relaxed. And the first cap S
By forming the i film 3 and forming the second SiGe film 6 at a low temperature, it becomes possible to significantly reduce the threading dislocation reaching the surface.

In addition, the first SiGe film 2 is replaced with the second SiG film.
By relaxing the strain before the formation of the e film 6, it becomes possible to form the second SiGe film 6 at a low temperature.
The waviness of the surface of the iGe film 6 was suppressed, and a very smooth surface could be obtained. In addition, in the same manner as above, the first Si
After forming the Ge film (film thickness 160 nm) and the first cap Si film (film thickness 5 nm), hydrogen ion implantation is performed under the conditions of an implantation energy of 15 keV and a dose of 3 × 10 ¹⁶ cm ⁻² , and then nitrogen. XRD analysis was performed on the substrate annealed at 800 ° C. for 9 minutes in a gas atmosphere.
As a result, the germanium concentration of the first SiGe film is 2
A relaxation rate of 79.9% was obtained at 8.7%.

Embodiment 2 The strain S having the SiGe layer formed as described above is formed.
PM using an i substrate and a normal bulk silicon substrate
An OS transistor was formed. The gate length and the gate width were each 10 μm. The Id-Vd characteristics and Vg-Gm characteristics of the obtained PMOS transistor are shown in FIGS. 2 and 3, respectively. From FIG. 2 and FIG. 3, the threshold value V
_{Although th} was lower in the PMOS transistor on the strained Si substrate using SiGe, the hole mobility was improved and the increase in current value was observed.

Third Embodiment As shown in FIG. 4, a silicon oxide film 8 is formed on the first cap Si film 3 in order to prevent contamination by contaminants during ion implantation.
Was deposited to a film thickness of 20 nm, and then hydrogen ion 4 implantation and annealing were performed under the same conditions. Then, the silicon oxide film 8 is removed to 5
% Etched off with dilute hydrofluoric acid.

Fourth Embodiment As shown in FIG. 5A, a silicon oxide film 8 having a film thickness of 20 nm was formed on the first SiGe film 2. After that, FIG.
As shown in (b), hydrogen ion 4 implantation was performed under the same conditions as above. As shown in FIG. 5D, the oxide film was removed by etching with 5% dilute hydrofluoric acid, and the first cap Si film 3 was formed into a virtual lattice of 10 n at 500 ° C. by an LP-CVD apparatus.
Epitaxially grows to a film thickness of m,
Annealing was performed for 0 minutes.

[0033]

According to the present invention, by introducing a crystal defect into the silicon surface of the substrate, the crystal defect causes a slip to the surface of the substrate, and a high density misfit dislocation at the substrate / first SiGe film interface. Can be generated. Therefore, the strain of the first SiGe film can be relaxed almost completely. In addition, after forming the first cap semiconductor film,
By performing the annealing, the threading dislocations derived from the misfit dislocations are partly offset and disappear due to the high density of the misfit dislocations, and a part of the remaining threading dislocations is also part of the first cap semiconductor film / first Associated with the misfit-fit dislocations at the SiGe film interface, the transition loops can be formed or reach the substrate edge, and the dislocations can be significantly reduced.

Further, by growing a second SiGe film thereon, preferably at a low temperature of 500 ° C. or lower, misfit dislocations generated at a high density at the substrate / first SiGe film interface are formed. Of the surface of the second SiGe film due to the influence of the strain field of the second SiGe film can be suppressed, and the second SGe is formed on the strain-relaxed first SiGe film.
Since the iGe film is to be formed, the second SiGe
The strain energy of the film becomes very small, and it becomes possible to make the surface of the second SiGe film very smooth together with the waviness of a small amplitude.

In particular, as the first cap semiconductor layer, S
When iC is used, since the lattice constant is smaller than that of silicon and the strain stress is large, threading dislocations can be suppressed in the first cap semiconductor film, and further surface roughness can be suppressed. On the other hand, when SiGe is used, since the Ge concentration is smaller than the Ge concentrations of the first and second SiGe films, the lattice constant is larger than that of silicon and the stress is smaller. Although the effect of suppressing the roughness is slightly small, the critical film thickness is increased instead, and the film thickness can be increased. Therefore, controllability is facilitated and manufacturing can be performed more easily.

[Brief description of drawings]

FIG. 1 is a schematic cross-sectional view of a main part for explaining an embodiment of a method for manufacturing a semiconductor device of the present invention.

FIG. 2 is a graph showing Id-Vd characteristics of a PMOS using a substrate obtained by the method for manufacturing a semiconductor device of the present invention.

FIG. 3 is a graph showing Vg-Gm characteristics of a PMOS using a substrate obtained by the method for manufacturing a semiconductor device of the present invention.

FIG. 4 is a schematic cross-sectional view of a main part for explaining another embodiment of the method for manufacturing a semiconductor device of the present invention.

FIG. 5 is a schematic cross-sectional view of a main part for explaining yet another embodiment of the method for manufacturing a semiconductor device of the present invention.

FIG. 6 is a schematic cross-sectional view of a main part for explaining a conventional method for manufacturing a semiconductor device.

FIG. 7 is a schematic cross-sectional view of a main part for explaining another conventional method for manufacturing a semiconductor device.

[Explanation of symbols]

1 silicon substrate (substrate) 2 first SiGe film (first semiconductor film) 3 first cap Si film (first cap semiconductor film,
Second semiconductor film) 4 Hydrogen ions 5 Defect (defect layer) 6 Second SiGe film (third semiconductor film) 7 Second cap Si film (second cap semiconductor film,
Fourth semiconductor film) 8 Silicon oxide film (protective film)

Front page continuation (51) Int.Cl. ⁷ Identification code FI theme code (reference) H01L 29/161 H01L 29/78 301B 29/78 618B 29/786 21/265 QF term (reference) 4G077 AA03 BA04 DB01 ED06 EE06 EF01 TC14 TC16 5F045 AA06 AB01 AC01 AD09 AF03 BB11 DA62 HA15 HA16 5F052 AA17 AA24 DA03 DB02 DB05 DB06 DB07 EA02 GC01 HA01 HA06 5F110 AA07 AA18 BB03 CC02 DD05 DD17 DD24 DD25 GG01 GG28A15 A24 A05 A15 ABA A17 BC12 CD01 CD06

Claims (9)

[Claims] 1. A step of: (a) forming a first SiGe film with a film thickness equal to or less than a critical film thickness on a substrate whose surface is made of silicon; and (b) a first cap semiconductor on the first SiGe film. A step of forming a film, (c) a step of implanting ions into the obtained substrate, (d) a step of annealing a substrate having a first cap semiconductor film on the surface, and (e) a first cap semiconductor film Forming a second SiGe film thereon,
(F) forming a second cap semiconductor film on the second SiGe film. 2. The method according to claim 1, wherein after forming a protective film on the first cap semiconductor film, ion implantation and annealing are performed, and then the protective film is removed. 3. A protective film is formed on the first SiGe film,
After the ion implantation, the protective film is removed, and the first SiGe
The method of claim 1, wherein a first cap semiconductor film is formed on the film and annealed. 4. Ion implantation using hydrogen, an inert gas and 4
The method according to claim 1, wherein the method is performed using an element selected from the group consisting of group elements. 5. The ion implantation is performed so that the implantation peak is on the substrate side of the first SiGe film / substrate interface.
4. The method according to any one of 4. 6. The first cap semiconductor film is formed of Si, Si
The method according to any one of claims 1 to 5, which is formed of C or a SiGe film having a Ge concentration lower than that of the first and second SiGe films. 7. The method according to claim 1, wherein the substrate is an SOI substrate. 8. A semiconductor device comprising first, second, third and fourth semiconductor films stacked on a semiconductor substrate, wherein crystal defects are introduced into the surface of the semiconductor substrate. The first semiconductor film has a lattice constant different from that of the semiconductor substrate, the second semiconductor film has a lattice constant different from that of the first semiconductor film, the third semiconductor film has a lattice constant different from that of the second semiconductor film, and the fourth semiconductor film has A semiconductor device, wherein the semiconductor film has substantially the same lattice constant as the third semiconductor film. 9. The first and third semiconductor films are made of SiGe, and the second and fourth semiconductor films are made of Si.
The semiconductor device according to.