JP2003110367A - Semiconductor integrated circuit device for sensor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve EMC (electroMagnetic compatibility) resistance capacity, while suppressing the increase in the chip area and the cost rise. SOLUTION: A semiconductor integrated circuit device 1 for a sensor comprises, as main constituents, a signal processing circuit 8 at an input stage and a signal processing circuit 10 at an output stage for signal processing an output of the circuit 8. To prevent noises from entering from terminals 8a, 8b, an RC filter circuit is provided in the input portions of operational amplifiers OP1, OP2. To prevent noises from entering from an output terminal OUT, a resistor is connected in series with load transistors, constituting a differential pair of an operational amplifier OP3, and a resistor is connected in series with a phase compensation circuit. This constitution eliminates the need for connecting a capacitor having a large capacity for filter to a power supply terminal Vcc.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an input stage signal processing circuit for inputting and processing a detection signal from a sensor section, and a detection signal output from this input stage signal processing circuit for output from an output terminal. The present invention relates to a semiconductor integrated circuit device for a sensor including an output stage signal processing circuit.

[0002]

In this type of semiconductor integrated circuit device for a sensor (hereinafter abbreviated as integrated circuit),
The resistance of the device to external noise such as electromagnetic noise from other electronic devices (hereinafter referred to as EMC (Electro Magnetic Compa
tibility), which is called tolerance. Conventionally, as shown in FIG.
Chip capacitor C between the power supply line (each line connected to Vcc and GND) connected between the terminal of the power supply line and the terminal provided in the resin product case B, and between the power supply line and the output line. Was provided. Further, as shown in FIG. 13B, the metallic shield case D is provided inside the product case B, and the feedthrough capacitor E is provided on the signal line and the power supply line extending from the integrated circuit A to the outside. As a result, the invasion of external noise can be blocked. However, if external components such as the chip capacitor C and the feedthrough capacitor E are used, the cost and the number of assembling steps increase.

Since there is also a demand for miniaturization of products, means for improving the EMC resistance by adding a circuit for external noise countermeasure inside the integrated circuit A is being studied. However, assuming that a high-frequency removing RC filter is interposed in the power supply line inside the integrated circuit A, for example, a current for operating the entire integrated circuit A needs to flow through the power supply line. Can only be set to a small value. For this reason, in the case of constructing a plurality of stages of RC filters with large attenuation at frequencies above the cutoff frequency, it is inevitable that the capacitance value of the capacitor must be set to a large value. Then, the area occupied by the capacitors in the integrated circuit A increases, so that the area per chip of the integrated circuit A increases. That is, since the number of effective chips (integrated circuits) that can be formed per wafer is reduced, the cost is increased and the productivity is deteriorated.

On the other hand, due to the recent development of wireless communication technology, wireless telephones and mobile phones of specific low power for communicating in a high frequency band, wireless communication terminals used for amateur radio and the like have become widespread, and these devices are used. There is also a circumstance that electromagnetic waves generated from the intruders often come in as external noise. Since it is expected that these wireless communication terminals and the like will become more and more popular in the future, there is an increasing demand for improvement in the EMC resistance of semiconductor integrated circuit devices for sensors installed in vehicles, for example.

The present invention has been made in view of the above circumstances, and an object thereof is to provide a semiconductor integrated circuit device for a sensor capable of increasing the EMC resistance while suppressing an increase in chip area and an increase in cost. It is in.

[0006]

According to a first aspect of the present invention, there is provided an input stage signal processing circuit for inputting and processing a detection signal from a sensor section, and a detection signal output from the input stage signal processing circuit. In a semiconductor integrated circuit device for a sensor including an output stage signal processing circuit for processing and outputting from an output terminal, a first high frequency cutoff circuit including a capacitor in an input line of an operational amplifier forming the input stage signal processing circuit is provided. Since it is provided, for example, the external noise that enters from around the sensor unit is attenuated, and the external noise that enters the circuit can be reduced.

Further, since the second high-frequency cutoff circuit made up of a resistor is connected to the load circuit (for example, load transistor) of the differential input transistors in the operational amplifier forming the output stage signal processing circuit, it enters from the power supply line. The external noise is attenuated by the resistance, and the noise that enters the circuit is reduced. As a result, the EMC resistance can be increased.

Further, according to the present means, the capacitance value of the capacitor connected between the input line of the operational amplifier forming the input stage signal processing circuit and the power supply line assumes that the capacitor is interposed in the power supply line or the like. When compared with the above, the capacitance value is significantly smaller than the capacitance value of the capacitor. Further, the high frequency cutoff circuit is provided in the input stage signal processing circuit and the output stage signal processing circuit which are most effective in preventing the intrusion of noise. As a result, it is possible to suppress an increase in chip area and cost of the semiconductor integrated circuit device for a sensor.

According to a second aspect of the present invention, in the invention of the first aspect, the phase connected between the differential amplifier circuit in the operational amplifier forming the output signal processing circuit and the output terminal of the operational amplifier. Since the resistance is provided in series with the compensation circuit, it is possible to increase the attenuation rate of the external noise that enters the differential amplifier circuit from the output terminal side of the operational amplifier forming the output stage signal processing circuit.

At this time, even if the capacitance value of the capacitor provided in the operational amplifier forming the input stage signal processing circuit and the capacitance value of the capacitor provided in the phase compensation circuit are summed up, the capacitor should be interposed in the power supply line or the like. Can be made smaller than the capacitance value of the capacitor under the assumption.

According to a third aspect of the present invention, in the invention of the first or second aspect, a signal output is provided between the output terminal of the operational amplifier forming the output stage signal processing circuit and the output terminal of the output stage signal processing circuit. Since the RC filter is provided in the path, it is possible to particularly increase the attenuation rate of the external noise entering from the signal output path.

In this case, the RC provided in the signal output path
The capacitance value of the capacitor that constitutes the filter can be made smaller than the capacitance value of the capacitor that is conventionally assumed to be present in the power line or the like, even if the capacitance values of the capacitors that constitute the first high-frequency cutoff circuit are summed up. .

According to the fourth aspect of the invention, in the invention according to any one of the first to third aspects, since the RC filter is provided for the power supply line of the operational amplifier, the external noise entering from the power supply line is prevented. The damping capacity can be further enhanced.

By the way, the capacitors constituting the RC filter provided in the power supply line are often required to have a higher breakdown voltage than the capacitors used for other circuit configurations. A high withstand voltage capacitor requires a larger area on the wafer than a low withstand voltage capacitor,
In the conventional configuration, the occupied area may occupy several tens of percent per integrated circuit chip. In contrast,
According to the present invention, the capacitance value of the capacitor forming the RC filter can be reduced by providing the first high-frequency cutoff circuit as described above, and, as described in claim 5, the RC filter provided in the signal output path is provided. Since the capacitors to be formed are low withstand voltage products, the area occupied by the capacitors in the integrated circuit can be reduced and the increase in the chip area of the integrated circuit can be prevented as much as possible.

According to the means of claim 6, since the RC filter is composed of a high-frequency cutoff T-type filter,
It is also possible to add it when necessary for further measures for improving the EMC tolerance.

[0016]

BEST MODE FOR CARRYING OUT THE INVENTION (First Embodiment) A first embodiment of a semiconductor integrated circuit device for a sensor in which the present invention is applied to a semiconductor pressure sensor device will be described with reference to FIGS.
Will be described with reference to. 1 (a) and 1 (b),
1 shows an electrical schematic configuration of a semiconductor pressure sensor device.

This semiconductor pressure sensor device (hereinafter abbreviated as sensor device) 1 is configured as one integrated circuit, and has a control circuit 2 for controlling the whole and a D / A connected to this control circuit 2. It is composed of a converter 3, a signal processing unit 4 connected to the D / A converter 3, and a gauge unit 5 as a sensor unit connected to the signal processing unit 4.

The control circuit 2 is mainly composed of a logic circuit, a PROM and the like, and outputs an instruction signal to the signal processing section 4 via the D / A converter 3. Further, the signal processing unit 4 is composed of a circuit mainly having a two-stage amplification function. Signal processing unit 4 and gauge unit 5
Are formed separately on different semiconductor chips, but the signal processing unit 4 and the gauge unit 5 may be formed on the same semiconductor chip.

The gauge portion 5 is formed by using a semiconductor chip having a large piezoresistive coefficient and has resistances Ra and R.
It is configured by bridge-connecting b, Rc, and Rd as shown. These resistances Ra, Rb, Rc, and Rd have a resistance value shown by an arrow in FIG. 1 in response to an increase in applied pressure (an upward arrow indicates that the resistance value increases, and a downward arrow indicates that the resistance value increases). It shows that it decreases).

Therefore, one output terminal 5c of the gauge section 5
The potential at (the common connection point of the resistors Ra and Rb) decreases with an increase in the applied pressure, and the other output terminal 5d (the resistor R
The potential of the common connection point of c and Rd) rises in accordance with the increase of the applied pressure, and from the output terminals 5c and 5d,
A detection signal having a voltage level corresponding to the applied pressure is output. The gauge portion 5 may be formed by diffusion resistance on a diaphragm provided on the semiconductor chip.

The drive circuit 6 in the signal processing section 4 is composed of a plurality of operational amplifiers and transistors (not shown), and operates when power is supplied to the power supply terminal Vcc2. Then, drive power is supplied to the gauge section 5 based on the instruction signal from the D / A converter 3. As shown in FIG. 1B, a DC voltage of, for example, 5V is applied from a power supply circuit (not shown) between the power supply terminal Vcc and the ground GND, and the inside of the signal processing unit 4 or the like is supplied via the resistors Rv1 and Rv2. The power is supplied to the power supply terminal Vcc2. The power supply voltage applied to the power supply terminal Vcc is equal to the power supply terminal Vcc.
1 is also being supplied.

The adjusting circuit 7 is composed of a plurality of operational amplifiers, transistors, and the like (not shown), and operates when power is supplied to the power supply terminal Vcc2. Then, based on the instruction signal for fine adjustment from the D / A converter 3, the adjustment signal is output to the operational amplifier OP3 described later.

The operational amplifiers OP1 and OP2 are connected to the power supply terminal V
It is designed to operate with the power supply supplied to cc2.
The output terminal 5d of the gauge unit 5 is connected to the non-inverting input terminal of the operational amplifier OP1 via the resistor R1 and the terminal 8b.
The output terminal 5c of the gauge section 5 is connected to the non-inverting input terminal of the operational amplifier OP2 via the terminal 8a and the resistor R4. Input stage signal processing circuit 8 (input stage signal processing circuit)
Are operational amplifiers OP1 and OP2, and resistors R1 to R8.
With the connection configuration shown in the figure, the function of the differential amplifier circuit is mainly configured.

The constant voltage generating circuit 9 is formed by connecting resistors R9 to R12 for generating a reference voltage and an operational amplifier OP4 as shown in the figure, and outputs a DC voltage Va of, for example, about 1.5V. ing. The output terminal of the constant voltage generating circuit 9 is also connected to the non-inverting input terminal of the operational amplifier OP3 via the resistor R13.

An operational amplifier OP3 and resistors R13 to R15 are provided between the signal processing circuit 8 and the output terminal OUT of the signal processing unit 4.
And an output stage signal processing circuit (output stage signal processing circuit) 10 composed of R27.

The output terminal of the operational amplifier OP1 which is the output node of the signal processing circuit 8 is connected to the non-inverting input terminal of the operational amplifier OP3 via the resistor R14. A resistor R15 is connected between the inverting input terminal and the output terminal of the operational amplifier OP3. The operational amplifier OP3 has a power supply voltage Vc.
It is operated by receiving the supply of c2.

Since the operational amplifier OP3 has an open collector output form, its output terminal is pulled up to the power supply terminal Vcc1 via the resistor R27.

The configuration of the operational amplifiers OP1 to OP3 will be described below. <Regarding Configurations of Operational Amplifiers OP1 and OP2> The operational amplifiers OP1 and OP2 have the same configuration in this embodiment. FIG. 2 shows a schematic electrical configuration of the operational amplifier OP1. The operational amplifier OP1 has a non-inverting input terminal I
The RC filter circuit 11 (first high frequency cutoff circuit) connected to the N + and the inverting input terminal IN−, the differential amplifier circuit 12 connected to the latter stage of the RC filter circuit 11, and the differential amplifier circuit 12 Output circuit 13 connected to the latter stage
And a bias circuit 14 having a well-known structure for generating a reference current for the differential amplifier circuit 12 and the output circuit 13.
And a phase compensating capacitor 15 as main components.

Non-inverting input terminal IN + of operational amplifier OP1
Is connected to the base of a PNP transistor Tr1 via a resistor R16p. The inverting input terminal IN- of the operational amplifier OP1 is connected to the base of a PNP type transistor Tr2 via a resistor R16m. And the resistor R1
The common connection point between 6p and the transistor Tr1 is connected to the ground terminal GND through the capacitor C1p, and the common connection point between the resistor R16m and the transistor Tr2 is connected to the ground terminal GND through the capacitor C1m. . The input line of the operational amplifier in the present invention is a line from the non-inverting input terminal IN + to the transistor Tr1 or
A line from the inverting input terminal IN- to the transistor Tr2 is shown.

In the differential amplifier circuit 12, the emitters of the transistors Tr1 and Tr2 (differential input transistors) are commonly connected, and a multi-collector type transistor Tr3 forming a constant current source and a current limiting resistor R17.
Is connected to the power supply line Vc2 (power supply terminal Vcc2) via. Here, the base of the transistor Tr3 is connected to the bias circuit 14.

An active load (load circuit) composed of NPN transistors Tr4 and Tr5 is connected between the collectors of the transistors Tr1 and Tr2 and the ground terminal GND. These transistors Tr4 and Tr5 have the same circuit configuration as the current mirror circuit.

The common connection point of the transistors Tr1 and Tr4 is connected to the base of a PNP type transistor Tr6. The collector and the emitter of the transistor Tr6 are connected to the ground terminal GND and the collector of the transistor Tr3, respectively. The emitter of the transistor Tr6 is connected to the base of the NPN type transistor Tr7. The collector of the transistor Tr7 is connected to the power supply line Vc2 via the resistor R18, and the emitter is connected to the ground terminal GN via the resistor R19.
Connected to D.

On the other hand, the common connection point between the transistor Tr2 and the transistor Tr5 is a PNP type transistor Tr8.
Connected to the base of. The collector of the transistor Tr8 is connected to the ground terminal GND, and the emitter is connected to the collector of the transistor Tr3 via the emitter-collector of the NPN type transistor Tr9.

The PNP transistor Tr10 constitutes a circuit similar to the current mirror circuit, and its emitter is connected to the collector of the transistor Tr9.
The collectors corresponding to the input side and the output side of the current mirror circuit are the base of the transistor Tr9,
It is connected to the bases of the transistors Tr4, Tr5, Tr8. The transistors Tr6 to Tr8 and the resistors R18 and R19 have a function as a buffer circuit. This buffer circuit prevents interference (interaction) between the input stage circuit and the output stage circuit as much as possible, and may be provided as necessary.

The output circuit 13 includes PNP type transistors Tr12 and N between the power supply line Vc2 and the ground terminal GND.
It has a circuit configuration in which a PN type transistor Tr11 is connected in series.

The bases of the transistors Tr11 and Tr12 are
The emitter of the transistor Tr7 is connected to the bias circuit 14, and the collectors of the transistors Tr11 and Tr12 are connected to the output terminal OP1OUT. A common connection point of the transistor Tr1 and the transistor Tr4,
A phase compensation capacitor 15 is connected between the output terminal OP1OUT and the output terminal OP1OUT.

FIG. 3 shows an electrical configuration of the bias circuit 14. The bias circuit 14 includes a transistor Tr13.
To Tr15 and resistors R20 and R21 are connected as shown in the figure, and a power supply voltage is applied from a power supply terminal Vcc2 through a power supply line Vc2 to generate a bias voltage.

<Regarding Configuration of Operational Amplifier OP3> FIG.
Shows a schematic electrical configuration of the operational amplifier OP3, and the description of the same components as those of the operational amplifier OP1 shown in FIG. 2 will be omitted. The operational amplifier OP3 includes a differential amplifier circuit 16 and an output circuit 17 connected to the subsequent stage.
And a capacitor 18 as a phase compensation circuit.

Non-inverting input terminal IN of operational amplifier OP3
+ And IN- are transistors Tr16 and Tr17 as differential input transistors via resistors R24p and R24m, respectively.
Connected to each base. The emitters of the transistors Tr16 and Tr17 are connected in common, and the collector-emitter of the transistor Tr18 and the current limiting resistor R25 are connected.
Is connected to the power supply line Vc2 (power supply terminal Vcc2) via. A bias voltage is applied to the base of the transistor Tr18 from the bias circuit 14 (see FIG. 2).

Between the transistors Tr16 and Tr17 and the ground terminal GND, a load circuit 40 including the transistors Tr19 and Tr20 and a high frequency cutoff circuit 39 (second high frequency cutoff circuit) including the resistors R28 and R29 are connected in series. It is connected. That is, the emitters of the transistors Tr19 and Tr20 are connected to the ground terminal GN via the resistors R28 and R29, respectively.
Connected to D. The collectors of the transistors Tr16 and Tr17 each have a level shift transistor T
r21 and Tr25 are connected.

The emitter of the transistor Tr21 is N
The transistor Tr22 is connected to the base of the PN type transistor Tr22, and the collector of the transistor Tr22 is connected to the power supply line Vc2 via the resistor R26.

The emitter of the transistor Tr22 is connected to the ground terminal GND through the collector-emitter of the diode-connected transistor Tr23. The collector and emitter of the transistor Tr24 are connected between the output terminal OP3OUT and the ground terminal GND, and these transistors Tr23 and Tr24 form an output circuit having a circuit form of a current mirror. The collector of the transistor Tr24 is connected to the output terminal OUT of the output stage signal processing circuit 10 through the output terminal OP3OUT of the operational amplifier, and the resistor R27.
Is connected to the power supply terminal Vcc1 via. A capacitor 18 is connected between the common connection point of the transistors Tr16 and Tr19 and the output terminal OP3OUT of the operational amplifier OP3.

Next, the operation of the above configuration will be described with reference to FIGS. <Explanation of Measurement Environment> FIG. 5 shows an EMC resistance measurement environment of the sensor device 1, and a test method by G-TEMCELL. In the EMC withstand measurement environment of the present embodiment, the sensor device 1 includes the high frequency source 3 in the shield case 30.
1 is installed together with the power source terminal V of the sensor device 1.
The cc, the ground terminal GND, and the output terminal OUT are connected to the measuring instrument 32 installed outside the shield case 30 by a single wire 33, respectively. The single wire 33 is not shielded.

The single wire 33 is inserted into the ferrite bead 34 outside the shield case 30. Single wire 33 inside the shield case 30
The length X of each is set to 15 cm.

The high frequency source 31 is configured to irradiate a radio wave of a predetermined frequency (for example, electric field strength of 100 V / m) into the shield case. In addition, the measuring device 32
The voltage value between the output terminal OUT and the ground terminal GND before and during the irradiation of the radio wave from the high frequency source 31 can be measured via the single wire 33. Here, the high frequency source 31 and the measuring instrument 32 are configured to be capable of mutual communication.

<Description of Operation> When the sensor device 1 is irradiated with radio waves from the high frequency source 31, noise generated by the high frequency source 31 enters the inside of the sensor device 1. In this case, noise particularly enters from the gauge section 5, the power supply terminal Vcc1, the output terminal OUT, and the ground terminal GND.

The noise particularly affects the signal processing section 4 and the gauge section 5 which form an analog circuit. In this case, the noise that has entered the sensor device 1 also reaches the drive circuit 6, the adjustment circuit 7, and the operational amplifier OP4 through the power supply terminal Vcc and the ground terminal GND in the signal processing unit 4. However, even if countermeasures are taken for the operational amplifier used for the drive circuit 6, the adjustment circuit 7, the operational amplifier OP4 of the constant voltage generation circuit 9 and its peripheral circuits, the EM
It has been clarified by the experiments of the inventors that it does not contribute much to the improvement of the C resistance.

Noise that has entered from the power supply terminal Vcc, the output terminal OUT, and the ground terminal GND reaches the differential amplifier circuit 16 (see FIG. 4), especially through the power supply line Vc2 and the ground line in the operational amplifier OP3 at the output stage.
In particular, the first stage differential amplifier circuit 16 in the operational amplifier OP3
Affect. At this time, the transistors Tr19 and T
The resistors R28 and R29 inserted between the emitter of r20 and the ground terminal GND greatly attenuate the noise that has entered from the ground terminal GND. It is desirable to set the resistors R28 and R29 to the same resistance value in order to maintain the symmetry of the differential amplifier circuit 16. If the noise is blocked in the differential amplifier circuit 16 in the first stage of the operational amplifier OP3, it is possible to prevent the noise component from being amplified.

As described above, the resistors R28 and R29 have a great effect of blocking external noise, but instead of (or together with) the resistors R28 and R29, resistors are provided between the transistors Tr16 and Tr19 and between the transistors Tr17 and Tr20. May be inserted.

On the other hand, noise penetrating from the gauge section 5 is
Operational amplifiers OP1 and OP via input terminals 8a and 8b
It is input to the signal processing circuit 8 composed of two components. In this case, the noise inputted from the inverting input terminal IN− and the non-inverting input terminal IN + is the RC filter circuit 11 shown in FIG.
The signal in the high frequency band is reduced by. Therefore, the noise amplified by the signal processing circuits 8 and 10 is reduced.

<Measurement Result> FIG. 6 shows the measurement result of the amount of change in the voltage value between the output terminal OUT and the ground terminal GND. The measurement results shown in FIG.
In the circuit configuration shown in FIG.
The figure shows the difference voltage between the voltage of the output terminal OUT before applying the electric wave of 00 V / m to the sensor device 1 and the voltage of the output terminal OUT when applying the electric wave.

On the other hand, the measurement result indicated by the broken line in
A two-stage RC filter as shown in FIG.
The resistors Rv1 and Rv2 shown in (b) are used to form the capacitors 35 and 36 together, and the operational amplifier OP3.
Between the output terminal OP3OUT and the output terminal OUT of FIG.
This is obtained when a two-stage RC filter (resistors R28 and R29, capacitors 37 and 38) as shown in (b) is connected. The radio wave conditions are the same as, and the measurement result of the voltage of the difference appearing at the output terminal OUT is shown.

The resistors Rv1 and Rv shown in FIG.
The resistance value of 2 is set to 350Ω, and the capacitance values of the capacitors 35 and 36 are set to 50 pF.
The resistance values of the resistors R28 and R29 shown in FIG.
Each is set to 250Ω, and the capacitance values of the capacitors 37 and 38 are set to 25 pF, respectively. As other circuit constants, C1p = C1m = 3pF and the voltage applied between the power supply terminal Vcc and the ground terminal GND is 5V. still,
FIG. 7C is a simplified view of the above-described FIGS. 7A and 7B collectively.

In FIG. 6, it can be seen that the change amount dV0 [mV] indicated by is decreased over the entire measurement frequency range. In particular, it can be seen that the external noise measured at the output terminal OUT is remarkably reduced in the frequency band of about 200 MHz to 600 MHz. That is, it was confirmed that the means of removing the resistors and inserting the resistors R28 and R29 into the load circuit 40 is more effective in reducing noise than forming the two-stage RC filter in the power supply line and the signal line.

According to such a first embodiment, in the operational amplifiers OP1 and OP2, the transistor Tr
Since the first high-frequency cutoff circuit 11 including the capacitors C1p and C1m is provided between the bases of 1 and Tr2 and the ground terminal GND, the external noise that enters from the periphery of the gauge section 5 is attenuated and the signal processing is performed. External noise entering the circuit 8 can be reduced.

Further, with respect to the operational amplifier OP3, the resistance R
Since the second high-frequency cutoff circuit 39 composed of R 28 and R 29 is provided, noise penetrating from the power line on the ground side (ground line) is reduced. Therefore, the noise amplified by the signal processing circuit 8 or 10 is reduced, so that the EM
The C resistance can be increased.

Even if the capacitance values of the capacitors C1p and C1m are summed up, it is significantly smaller than the capacitance value of the capacitor in the case of interposing the capacitor in the power supply line in the conventional configuration. Further, since the first and second high-frequency cutoff circuits 11 and 39 are provided only in the signal processing circuit 8 and the signal processing circuit 10 which are most effective in preventing the intrusion of noise, the effect is achieved by the minimum necessary circuit configuration. Can be reached As a result, it is possible to suppress an increase in the chip area of the sensor device 1 and an increase in cost. Since the chip area can be suppressed, the number of sensor devices 1 that can be formed on one wafer is increased, so that productivity can be improved.

The detection signal of the gauge section 5 that is generally used is often a minute signal, and is particularly effective when an amplifier circuit having at least two stages of operational amplifiers is required. Further, since no feedthrough capacitor or chip capacitor is used externally, the cost can be reduced.

Conventionally, the EMC withstand capability can be improved in the configuration in which the capacitors 35 and 36 of the high withstand voltage product, for example, of the two-stage RC filter which is supposed to be interposed in the power supply line are deleted. In addition, operational amplifier OP3O
Capacitor 3 forming a two-stage RC filter that is supposed to be provided between the UT and the output terminal OUT
With the configuration in which 7, 38 are deleted, the EMC resistance can be increased.

(Second Embodiment) FIG. 8 shows a second embodiment of the present invention.
However, the difference from the first embodiment is that the circuit configuration of the operational amplifier OP3 has a configuration in which a resistor is provided in series with a capacitor 18 as a phase compensation circuit. That is, the common connection point of the transistors Tr16 and Tr19 and the output terminal O of the operational amplifier OP3.
A capacitor 18 and a resistor 19 are connected in series between P3OUT and P3OUT. In this case, the external noise entering from the output terminal OP3OUT of the operational amplifier OP3 is the resistance 1
Attenuated by 9. As a result, especially the differential amplifier circuit 16
It is possible to enhance the ability of attenuating external noise that invades.

<Measurement Result 1> FIG. 9 shows the result of measurement performed in the same measurement environment as the environment described in the first embodiment in comparison with the measurement result described above (see FIG. 6). The capacitance value of the capacitor 18 is set to 30 pF. The measurement results shown in Fig. 7 are obtained by using the high-frequency source 3 in the circuit configurations shown in Figs. 1 to 3 and 8 without providing a two-stage RC filter as shown in Figs. 7 (a) and 7 (b).
1 shows the voltage difference between the voltage of the output terminal OUT before applying the electric wave of 1 to 100 V / m of electric field strength to the sensor device 1 and the voltage of the output terminal OUT when applying the electric wave.

In FIG. 9, it can be seen that the change amount dV0 [mV] indicated by is markedly reduced over the entire measurement frequency range. Even when compared with the measurement result described in the first embodiment, the EMC resistance can be further reduced.

The capacitance value of the capacitor 18 (30 pF) and the capacitance values of the capacitors C1p and C1m in the operational amplifiers OP1 and OP2 forming the signal processing circuit 8 (each 3 p
Even if F) is summed, it can be made smaller than the sum of the capacitance values of the capacitors 35 to 38 (150 pF) shown in FIGS. 7A and 7B. As a result, the chip area of the sensor device 1 can be reduced.

<Measurement Result 2> FIG. 10 shows the measurement result of the amount of change measured at another measurement site (conforming to the European EMC standard, the electric field strength from the high frequency source 31 is 150 V / m). The amount of change is generally proportional to the square of the electric field strength, but even when this measurement result is converted into the amount of change under the electric field strength of 200 V / m that is often used for recent evaluations, the required specifications are sufficiently satisfied. It is a very small value.

(Third Embodiment) FIG. 11 shows a third embodiment of the present invention. The difference from the first embodiment is that the output terminal OP3OUT of an operational amplifier OP3 forming an amplifier circuit 10 is the same as that of the first embodiment. A T-type one-stage RC filter is provided in the signal output path to the output terminal OUT.

That is, the capacitor 4 is provided between the common connection point of the resistors Rv1 and Rv2 and the ground terminal GND.
1 is connected and R as a high cutoff T-type filter
The C filter 42 is configured. Further, as shown in FIG. 11B, a capacitor 43 is connected between the common connection point of the resistors R28 and R29 and the ground terminal GND, and an RC filter 44 as a high cutoff T-type filter is connected. I am configuring. The capacitance value of the capacitor 43 is set to 25 pF.

The withstand voltages of the capacitors C1p and C1m forming the RC filter circuit 11 are determined by the capacitors 41 and 4 of the RC filter 42 and the RC filter 44, respectively.
The breakdown voltage is lower than the breakdown voltage of 3. Further, the withstand voltage of the capacitor 18 forming the phase compensation circuit is also lower than the withstand voltage of the capacitors 41 and 43. It should be noted that FIG. 11C shows the above-mentioned FIG.
(B) is shown in a simplified form.

In this case, the external noise entering from the power supply terminal Vcc is attenuated by the RC filter 42, and the external noise entering from the output terminal OUT is attenuated by the RC filter 44.

According to this embodiment, a one-stage RC filter (high-frequency cutoff T-type filter) is provided in the signal output path between the output terminal OP3OUT and the output terminal OUT of the operational amplifier OP3.
Since the above is provided, it is possible to particularly increase the amount of attenuation with respect to external noise that enters from the signal output path.

In this case, even if the capacitance value (25 pF) of the capacitor 43 provided in the signal output path is the sum of the capacitance values (each 3 pF) of the capacitors C1p and C1m in the operational amplifiers OP1 and OP2 of the signal processing circuit 8, it is conventional Capacitors 35 and 36 (Fig.
It can be made smaller than the capacitance value of (c).

In this case, since RC filters are provided for the power supply lines of the operational amplifiers OP1 to OP3, the amount of attenuation of external noise that enters from the power supply lines can be further increased. Here, the capacitors C1p and C1m are the capacitors 4
Since the breakdown voltage is set to be lower than those of Nos. 1 and 43, the area occupied by the chip in the integrated circuit of the sensor device 1 can be reduced. Further, since the capacitor 18 is set to have a lower breakdown voltage than the capacitors 41 and 43,
The area occupied by the chip in the integrated circuit of the sensor device 1 can be reduced.

(Fourth Embodiment) FIG. 12 shows a fourth embodiment of the present invention. The difference from the first embodiment is that the power supply path is divided for each circuit block and the power supply concerned is divided. This is where an RC filter is provided in the path.

That is, with respect to the drive circuit 6 shown in FIG. 1A, an RC filter 51 composed of a resistor Rv3 and a resistor Rv4 connected to the power supply terminal Vcc and a capacitor 50.
And the drive circuit 6 can be operated from the power supply terminal Vcc3 to which the voltage filtered by the RC filter 51 is supplied. Also, the third
By providing the RC filter 51 for each circuit block together with the RC filters 42 and 44 described in the above embodiment, mutual influence between the circuits can be eliminated as much as possible.

(Other Embodiments) The present invention is not limited to the above-mentioned embodiments but can be applied as follows.

In the above-described embodiment, the description has been given by using the two-stage amplifier circuit in the signal processing circuits 8 and 10. However, by setting the amplification degree for amplifying the output of the gauge section 5,
An intermediate amplifier circuit may be provided between the signal processing circuit 8 and the signal processing circuit 10. In this case, it is not necessary to provide the intermediate amplifier circuit with the capacitor, the resistor and the high frequency cutoff circuit according to the present invention.

In the above-described embodiment, the semiconductor pressure sensor is applied, but not limited to the pressure sensor, various semiconductor sensors such as a rotation sensor, a speed sensor, an acceleration sensor, an angular velocity sensor, a displacement sensor, and a position sensor. Applicable to

In the third embodiment, the RC filter 4
2 and the RC filter 44 are provided, the configuration may be provided in only one of them.

[Brief description of drawings]

FIG. 1 is an electrical configuration diagram of a semiconductor integrated circuit device for a sensor showing a first embodiment of the present invention.

FIG. 2 is an electrical configuration diagram of an operational amplifier that constitutes an input stage signal processing circuit.

FIG. 3 is an electrical configuration diagram of a bias circuit.

FIG. 4 is an electrical configuration diagram of an operational amplifier forming an output stage signal processing circuit.

FIG. 5 is a diagram showing a measurement system.

FIG. 6 is a diagram showing measurement results.

FIG. 7 is a diagram showing a part of a comparison target circuit ((a) electrical configuration diagram near a power supply line, (b) electrical configuration diagram near an output terminal, (c) electrical configuration in a semiconductor integrated circuit device for a sensor) (Schematic of configuration)

FIG. 8 is a view corresponding to FIG. 4 showing a second embodiment of the present invention.

FIG. 9 is a view corresponding to FIG.

FIG. 10 is a diagram showing measurement results at another measurement site.

FIG. 11 is a diagram showing a part of an electrical configuration showing a third embodiment of the present invention ((a) an electrical configuration diagram near a power supply line;
(B) Electrical configuration diagram near the output terminal, (c) Electrical configuration diagram in the semiconductor integrated circuit device for sensor)

FIG. 12 is a diagram showing a fourth embodiment of the present invention ((a) is a diagram corresponding to FIG. 1 (b), and (b) is a diagram showing a drive circuit).

FIG. 13 is a diagram corresponding to FIG. 7C showing a conventional example.

[Explanation of symbols]

1 is a sensor device (sensor semiconductor integrated circuit device), 5 is a gauge part (sensor part), 8 is a signal processing circuit (input stage signal processing circuit), 10 is a signal processing circuit (output stage signal processing circuit), 11 is RC filter (first high frequency cutoff circuit),
12, 16 are differential amplifier circuits, 15 and 18 are capacitors (phase compensation circuits), 19 is a resistor, 39 is a high frequency cutoff circuit (second high frequency cutoff circuit), 40 is a load circuit, and 42, 4
4 is a high frequency cutoff T-type filter, OP1, OP2 and OP3 are operational amplifiers, OP1OUT and OP3OUT are output terminals,
OUT is an output terminal, C1p and C1m are capacitors, Tr16,
Tr17 is a transistor (differential input transistor).

Continued front page    F term (reference) 5J092 AA01 CA41 CA51 FA20 HA05                       HA08 HA19 HA25 HA29 HA42                       KA01 KA02 KA03 KA09 KA12                       KA18 KA34 KA42 MA09 SA15                       TA01 TA03 UR12 UR14                 5J500 AA01 AC41 AC51 AF20 AH05                       AH08 AH19 AH25 AH29 AH42                       AK01 AK02 AK03 AK09 AK12                       AK18 AK34 AK42 AM09 AS15                       AT01 AT03 RU12 RU14

Claims (6)

[Claims] 1. An input stage signal processing circuit for inputting and processing a detection signal from a sensor section, and an output stage signal processing circuit for processing a detection signal output from this input stage signal processing circuit and outputting it from an output terminal. In a semiconductor integrated circuit device for a sensor including: a first high-frequency cutoff circuit including a capacitor is provided in an input line of an operational amplifier forming the input stage signal processing circuit, and an operational amplifier forming the output stage signal processing circuit is provided. A semiconductor integrated circuit device for a sensor, wherein a second high-frequency cutoff circuit composed of a resistor is provided in series with a load circuit of a differential input transistor. 2. A resistor is provided in series with a phase compensation circuit connected between a differential amplifier circuit provided in an operational amplifier forming the output stage signal processing circuit and an output terminal of the operational amplifier. The semiconductor integrated circuit device for a sensor according to claim 1. 3. An RC filter is provided in a signal output path between an output terminal of an operational amplifier forming the output stage signal processing circuit and an output terminal of the output stage signal processing circuit. Alternatively, the semiconductor integrated circuit device for a sensor according to the item 2. 4. The semiconductor integrated circuit device for a sensor according to claim 3, wherein an RC filter is provided for the power supply line of the operational amplifier. 5. The capacitor of the first high frequency cutoff circuit and the phase compensation circuit has a low breakdown voltage as compared with the capacitor of the RC filter. Semiconductor integrated circuit device for sensors. 6. The semiconductor integrated circuit device for a sensor according to claim 3, wherein the RC filter is composed of a high-frequency cutoff T-type filter.