JP2003059948A - Semiconductor device and production method therefor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce the costs of a GaN compound semiconductor device. SOLUTION: A buffer layer 2 is provided with the structure of alternately laminating a plurality of first layers 8 composed of Al and second layers 9 composed of GaN on a wafer 1 composed of silicon. A gallium-nitride semiconductor region 3 for HEMT element is formed on the buffer layer 2.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device such as MESFET or HEMT using a nitride compound semiconductor and a manufacturing method thereof.

[0002]

2. Description of the Related Art Metal semiconductor field effect transistor or MESFET using gallium nitride compound semiconductor
(Metal Semiconductor Filed Effect Transistor) and high electron mobility transistor
Semiconductor devices such as bility transistors) are known. In a conventional semiconductor device using a typical gallium nitride-based compound semiconductor, a low-temperature buffer made of GaN or AlN formed on an insulating substrate made of sapphire at a relatively low substrate temperature of about 500 to 600 ° C. A compound semiconductor is formed through a layer (hereinafter, simply referred to as a low temperature buffer layer).

That is, when forming a MESFET, an operating layer or a channel layer made of an n-type GaN layer doped with Si is formed on an insulating substrate made of sapphire via a low temperature buffer layer made of GaN or AlN. Then, a source electrode, a drain electrode and a gate electrode are formed on the surface of the operating layer. Also,
When forming a HEMT, an electron transit layer or channel layer made of undoped GaN and an n-type are formed on an insulating substrate made of sapphire through a low-temperature buffer layer made of GaN or AlN.
An electron supply layer made of AlGaN is laminated to form a source electrode, a drain electrode, and a gate electrode on the surface of the electron supply layer.

[0004]

By the way, in this type of gallium nitride-based or nitride-based semiconductor device, as is well known, a wafer having a large number of elements is cut out by dicing, scribing, cleavage, or the like. Formed. At this time, since the insulating substrate made of sapphire has high hardness, it was difficult to perform the dicing with high productivity. Also, because sapphire is expensive,
The cost of semiconductor devices has increased. Also, when crystallizing a nitride compound semiconductor on a sapphire substrate,
In order to obtain a flat nitride-based compound semiconductor layer, it is necessary to form the low temperature buffer layer as described above. By crystal-growing the nitride-based compound semiconductor layer at a high temperature via the low-temperature buffer layer, a relatively flat nitride-based compound semiconductor film can be formed on the sapphire substrate. However, when a low-temperature buffer layer made of GaN or AlN is formed, ammonia, which is a nitrogen source, is hardly decomposed at low temperatures, so that the low-temperature buffer layer becomes an amorphous layer containing metallic Ga and Al. Since the channel layer, that is, the operation layer is crystal-grown on the buffer layer in the amorphous state, the density of crystal defects becomes very high in the region near the low temperature buffer layer. Since this region having a high defect density functions as a low-resistance n-type semiconductor layer, current leaks to this n-type semiconductor layer in addition to the operation layer (channel layer) when the device is operated. As a result, good pinch-off characteristics cannot be obtained. As a method for solving this problem, in JP-A-2000-299325, an AlGaN layer is interposed between a buffer layer and a channel layer,
A method for suppressing current leakage into a low resistance n-type semiconductor layer has been proposed. However, the interposition of the AlGaN layer causes strain in the epitaxial layer due to lattice misalignment, which lowers the electron mobility of the channel layer and further causes cracks in the channel layer. For this reason,
The amount of A1 and the thickness of the AlGaN layer were limited, and as a result, it was difficult to sufficiently suppress the leak current.

The thermal conductivity of the sapphire substrate is 0.12
Since it is as small as 6 W / cm · K, it is not possible to sufficiently release the heat generated during the operation of the device, resulting in deterioration of various characteristics of the transistor such as reduction of withstand voltage and gain of the device. Furthermore, in GaN-based HEMTs, AlGaN is generally formed on the GaN layer.
However, when AlGaN is grown on the GaN layer, lattice strain causes tensile strain in the in-plane direction in AlGaN. Due to this stress, a piezoelectric polarization electric field is generated at the interface, and when combined with spontaneous polarization, an electric field of several MV / cm is generated at the hetero interface. Due to this electric field, a two-dimensional electron gas on the order of 10 ¹³ cm ^-2 or 2DEG is accumulated in the channel, the channel sheet resistance is reduced, and the drain current can be increased. This is G
This is an advantage of the GaN-based HEMT that employs a heterostructure in which AlGaN is laminated on the aN layer.

However, since the sapphire substrate has a larger coefficient of thermal expansion than the nitride-based compound semiconductor, thermal strain causes compressive strain in the epitaxial layer. This compressive strain acts in the direction of canceling the tensile strain in AlGaN due to the lattice misalignment, and therefore reduces the piezoelectric polarization electric field. As a result, the electron concentration of 2DEG also decreases, and AlGaN / Ga
The performance of N HEMT cannot be fully exerted.

Therefore, an object of the present invention is to solve the above-mentioned problems by using a nitride compound semiconductor such as MESFET or HEMT.
To provide a semiconductor device such as the above and a manufacturing method thereof.

[0008]

The present invention for solving the above problems and achieving the above objects is a semiconductor device having a nitride compound semiconductor, and a substrate made of silicon or a silicon compound, and the substrate. A semiconductor layer for a semiconductor element, the buffer layer being disposed on one of the main surfaces, the semiconductor layer including at least one nitride compound semiconductor layer disposed on the buffer layer, and the surface of the semiconductor region for a semiconductor element. a first main electrode disposed on, and a second main electrode and a control electrode, the buffer layer, wherein the chemical formula _{Al x M y Ga 1-xy} N, wherein M is an in (indium) B (boron)
At least one element selected from, And a chemical formula of Al _a M _b Ga _{1 -ab} N, wherein M is at least one selected from In (indium) and B (boron). Elements of The present invention relates to a semiconductor device characterized by comprising a composite layer with a second layer made of a material represented by

As described in claim 2, the first layer is Al _x Ga _1-x N and the second layer is AlaGa _1-a.
It can be N. Moreover, as shown in claim 3,
The first layer is Al _x In _y Ga _1-xy N, and the second layer is
Can be Al _a In _b Ga _{1 -ab} N, and In (indium) can be contained in at least one of the first and second layers. In addition, as described in claim 4, the first
Of the layer, the _{Al x B y Ga 1-xy} N, said second layer,
Al _a B _b Ga _{1 -ab} N, and B (boron) can be contained in at least one of the first and second layers. Further, as described in claim 5, it is preferable that the buffer layer includes a plurality of the first and second layers, and the first layer and the second layer are alternately laminated. . The buffer layer may have a thickness of the first layer of 0.5 nm to 50 nm and a thickness of the second layer of the second layer.
The layer thickness is preferably 0.5 nm to 200 nm. As described in claim 7, the main surface of the substrate on the side where the buffer layer is arranged is a (111) just plane or a (111) plane in a crystal plane orientation indicated by a Miller index.
It is desirable that the surface is tilted within a range of -4 degrees to +4 degrees from the surface. Further, as described in claim 8, the nitride-based compound semiconductor layer is a GaN (gallium nitride) layer, A
lInN (Indium Aluminum Nitride) layer, AlG
aN (gallium aluminum nitride) layer, InGaN
(Indium gallium nitride) layer and AlInGaN
It is preferably selected from the (gallium indium aluminum nitride) layer. Further, as set forth in claim 9, the semiconductor region is a plurality of semiconductor layers for forming a field effect transistor, the first main electrode is a source electrode, and the second main electrode is a drain electrode. The control electrode can be a gate electrode.
Further, as described in claim 10, the semiconductor region can be a plurality of semiconductor layers for forming a high electron mobility transistor (HEMT). In addition, claim 11
As shown in, the semiconductor region can be a plurality of semiconductor layers for forming a metal semiconductor field effect transistor (MESFET). In a method of manufacturing a semiconductor device having a nitride-based compound semiconductor, a step of preparing a substrate made of silicon or a silicon compound, and a step of providing the substrate on the substrate,
By vapor deposition, wherein the chemical formula _{Al x M y Ga 1-xy} N, wherein M is, an In (indium) and B (boron)
At least one element selected from And a chemical formula of Al _a M _b Ga _{1 -ab} N, wherein M is at least 1 selected from In (indium) and B (boron). Seed element, A step of sequentially forming a second layer made of a material represented by the following formula to obtain a buffer layer, and a semiconductor device comprising at least one nitride-based compound semiconductor layer on the buffer layer. It is desirable to have a step of forming a semiconductor region by a vapor phase epitaxy method and a step of forming first and second main electrodes and a control electrode on the surface of the semiconductor region for a semiconductor element.

[0010]

According to the invention of each claim, the following effects can be obtained. (1) Since a substrate made of silicon or a silicon compound that is low in cost and excellent in workability is used, material cost and production cost can be reduced. Therefore, the cost of the semiconductor device can be reduced. (2) The buffer layer formed on the one main surface of the substrate and having the first layer 8 and the second layer having a lattice constant between silicon and GaN has a good crystal orientation of the substrate. You can take over. As a result, the nitride semiconductor region can be favorably formed on one main surface of the buffer layer with the crystal orientations aligned. Therefore, the flatness of the semiconductor region is improved, and the electrical characteristics of the semiconductor device are also improved. If a buffer layer is formed only on the GaN semiconductor at a low temperature on one main surface of a substrate made of silicon, the difference in lattice constant between silicon and GaN is large, and thus the upper surface of the buffer layer has excellent flatness. Nitride-based semiconductor regions cannot be formed. (3) The buffer layer composed of the composite layer of the first layer 8 and the second layer 9 can be crystal-grown at a higher temperature than a conventional low temperature buffer layer composed of a single layer of GaN or AlN. it can. For this reason, ammonia serving as a nitrogen source can be decomposed well, and the buffer layer does not become an amorphous layer. Therefore, the density of crystal defects in the epitaxial growth layer, that is, the semiconductor region, formed on the buffer layer can be sufficiently reduced, and the occurrence of leak current can be prevented. (4) Since the substrate is formed of silicon or a silicon compound, which has a higher thermal conductivity than sapphire, the heat generated during the operation of the device can be radiated satisfactorily through the substrate, and the device withstand voltage, gain, etc. The various characteristics of are obtained. According to the invention of claim 3, indium is contained in at least one of the first layer and the second layer forming the buffer layer. When at least one of the first and second layers is a nitride-based compound semiconductor containing indium (indium nitride-based compound semiconductor), the stress relaxation effect between the substrate and the nitride-based semiconductor region can be more excellently obtained. . That is, an indium nitride-based compound semiconductor, such as InN or In, forming at least one of the first and second layers.
GaN, AlInN, AlInGaN, etc. are other nitride-based compound semiconductors that do not contain In as a constituent element, for example,
The coefficient of thermal expansion is more similar to that of a substrate made of silicon or a silicon compound as compared with GaN, AlN, and the like. Therefore, by including indium in at least one of the first layer and the second layer forming the buffer layer,
Strain in the semiconductor region due to the difference in thermal expansion coefficient between the substrate and the nitride-based semiconductor region can be effectively prevented. According to the invention of claim 4, the first layer and the second layer constituting the buffer layer are provided.
B (boron) is contained in at least one of the layers. A buffer layer containing B (boron) has a thermal expansion coefficient closer to that of a substrate made of silicon or a silicon compound than a buffer layer containing no B (boron). Therefore, according to the buffer layer containing B (boron), the strain in the nitride-based semiconductor region due to the difference in the thermal expansion coefficient between the substrate made of silicon or a silicon compound and the nitride-based semiconductor region can be effectively prevented. it can. In the fifth aspect of the invention, the plurality of first layers and the plurality of second layers are alternately laminated to form the buffer layer, so that the plurality of thin first layers are dispersed. As a result, a good buffer function can be obtained as the entire buffer layer, and the crystallinity of the semiconductor region formed on the buffer layer is improved. Claim 6
According to the invention, the buffer function of the buffer layer is improved,
The flatness of the nitride semiconductor region can be improved.
According to the invention of claim 7, the buffer layer and the semiconductor region can be favorably formed on the substrate. That is, by making the plane orientation of the main surface of the substrate a (111) just plane or a plane having a small off-angle from the (111) just plane, atomic steps of the crystal surface of the buffer layer and the semiconductor region, that is, steps at the atomic level. Can be eliminated or reduced. If the buffer layer and the semiconductor region are formed on the main surface having a large off-angle from the (111) just plane, a relatively large step occurs at the atomic level. If the epitaxially grown layer is relatively thick, some steps are not a problem, but in the case of a semiconductor device having a thin layer, the characteristics may be deteriorated. On the other hand, if the main surface of the substrate is (11
1) If it is a just surface or a surface with a small off angle, the number of steps is small, and the buffer layer and the semiconductor region are well formed. According to the invention of claim 12, a semiconductor device having excellent characteristics can be formed inexpensively and easily.

[0011]

First Embodiment Next, a HEMT using a gallium nitride-based compound semiconductor according to the first embodiment of the present invention will be described with reference to FIGS.

The HE according to the first embodiment of the present invention shown in FIG.
MT is a substrate made of silicon, that is, a substrate 1, a buffer layer 2, a semiconductor region 3 for HEMT elements, a source electrode 4 as a first electrode, and a drain electrode 5 as a second electrode.
And a gate electrode 6 as a control electrode and an insulating film 7.

The HEMT device semiconductor region 3 includes an electron transit layer 10 made of GaN which is not doped with impurities and an undoped Al _0.2 Ga layer.
_0.8 a spacer layer 11 made of N, the electron supply layer 1 made of n-type Al _0.2 Ga _0.8 N which is doped with Si as n-type impurity
2 and. Each layer 10, 1 of the element semiconductor region 3
1 and 12 are composed of gallium nitride compound semiconductors based on nitrogen and gallium. The electron transit layer 10 disposed on the buffer layer 2 can also be called a channel layer, and has a thickness of 500 nm, for example. The spacer layer 11 disposed on the electron transit layer 10 is, for example, 7n
Silicon having a thickness of m and serving as an n-type impurity of the electron supply layer 12 is suppressed from diffusing into the electron transit layer 10. The electron supply layer 12 arranged on the spacer layer 11 can also be called an active layer, an operation layer, or a channel layer, and has a thickness of 10 nm, for example. The source electrode 4 and the drain electrode 5 are in ohmic contact with the electron supply layer 12, and the gate electrode 6 is in Schottky contact with the electron supply layer 12. A contact layer having a high n-type impurity concentration can be provided between the source electrode 4 and the drain electrode 5 and the electron supply layer 12. The insulating film 7 made of SiO 2 covers the surface of the semiconductor region 10.

Since the electron supply layer 12 and the spacer layer 11 are extremely thin films, they function as an insulator in the horizontal direction and as a conductor in the vertical direction. Therefore, during operation of the HEMT, the source electrode 4, the electron supply layer 12, the spacer layer 11, the electron transit layer 10, the spacer layer 11, and the electron supply layer 1
2, electrons flow through the path of the drain electrode 5. The flow of electrons, that is, the flow of current is adjusted by the control voltage applied to the gate electrode 6.

The substrate 1 is made of a p-type silicon single crystal containing a group 3 element such as B (boron) as a conductivity determining impurity. The main surface 1a of the substrate 1 on the side where the buffer layer 2 is arranged is (1
11) Just surface. The impurity concentration of the substrate 1 is
The substrate 1 has a relatively low value, for example, about 1 × 10 ¹³ cm ⁻³ to 1 × 10 ¹⁶ cm ⁻³ in order to reduce the leak current passing through the substrate 1, and the resistivity of the substrate 1 is relatively high, for example, 1 ．
It is about 0 Ω · cm to 500 Ω · cm. The substrate 1 has a relatively large thickness of about 350 μm and functions as a support for the semiconductor region 3 and the buffer layer 2.

The buffer layer 2 arranged so as to cover the whole one main surface of the substrate 1 is a composite layer in which a plurality of first layers 8 and a plurality of second layers 9 are alternately laminated. . Figure 1
Although only part of the buffer layer 2 is shown for convenience of illustration, in practice, the buffer layer 2 has 20 first layers 8 and 20 second layers 9. .

The first layer 8 is formed of a material which can be represented by the chemical formula Al _x Ga _1-x N, where x is any numerical value satisfying 0 <x ≦ 1. That is, the first layer 8 is
It is formed of AlN (aluminum nitride) or AlGaN (gallium aluminum nitride). In the embodiment of FIGS. 1 and 2, Al corresponding to the material in which x in the above formula is 1.
N (aluminum nitride) is used for the first layer 8. The first layer 8 is an extremely thin film having an insulating property. The lattice constant and the thermal expansion coefficient of the first layer 8 are closer to the silicon substrate 1 than the second layer 9.

The second layer 9 may be represented by GaN (gallium nitride) or the chemical formula Al _y Ga _1-y N, where y is any numerical value satisfying y <x and 0 <y <1. It is an extremely thin film made of a possible material. Al _y Ga _1-y N as the second layer 9
In the case of using a semiconductor containing no conductivity determining impurities, the y is set to a value satisfying 0 <y <0.8, that is, a value greater than 0 in order to prevent cracks that may occur due to increase in Al (aluminum). It is desirable to be large and smaller than 0.8. The second embodiment of the first embodiment
Layer 9 is made of GaN corresponding to y = 0 in the above chemical formula.
Consists of. The second layer, wherein the chemical formula _{Al y Ga 1-y N,} y can also be expressed by a numerical value, which satisfies y <x and 0 ≦ y <1.

The preferred thickness of the first layer 8 of the buffer layer 2 is 0.5 nm to 50 nm or 5 to 500 angstroms. If the thickness of the first layer 8 is less than 0.5 nm, the flatness of the element semiconductor region 3 formed on the upper surface of the buffer layer 2 cannot be maintained well. The thickness of the first layer 8 is 50 n
When it exceeds m, it occurs in the first layer 8 due to the lattice mismatch between the first layer 8 and the second layer 9 and the difference in thermal expansion coefficient between the first layer 8 and the substrate 1. The tensile strain may cause cracks in the first layer 8.

The preferred thickness of the second layer 9 is 0.5 nm.
.About.200 nm or 5 to 2000 angstroms. When the thickness of the second layer 9 is less than 0.5 nm, it becomes difficult to grow the element semiconductor region 3 grown on the first layer 8 and the buffer layer 2 flat. Also,
When the thickness of the second layer 9 exceeds 200 nm, the second layer 9
Due to the compressive stress generated in the second layer 9 due to the lattice mismatch between the first layer 8 and the first layer 8, the electron density of the channel layer 10 is reduced and the characteristics of the HEMT are deteriorated. More preferably, the thickness of the second layer 9 should be larger than the thickness of the first layer 8. In this way, the strain generated in the first layer 8 due to the lattice mismatch between the first layer 8 and the second layer 9 and the difference in the thermal expansion coefficient between the first layer 8 and the substrate 1. The size of the first layer 9
It is advantageous in suppressing the occurrence of cracks and maintaining the electron concentration of the channel layer 10 at a high concentration.

Next, a method of manufacturing a semiconductor semiconductor device in which the first layer 8 is AIN and the second layer 9 is GaN will be described.

First, a substrate 1 made of a p-type silicon semiconductor having a p-type impurity introduced therein is prepared as shown in FIG. One main surface 1a of the silicon substrate 1 for forming the buffer layer 2 is a (111) just surface, that is, an exact (111) surface in the crystal plane orientation indicated by the Miller index. However, the main surface 1a of the substrate 1 can be tilted in the range shown by −θ to + θ with respect to the (111) just surface shown by 0 in FIG. The range of −θ to + θ is −4 ° to +
It is 4 °, preferably −3 ° to + 3 °, more preferably −2 ° to + 2 °. The crystal orientation of the main surface 1a of the silicon substrate 1 is set to (111) just plane or (11)
1) By using a surface having a small off angle from the just surface, it is possible to eliminate or reduce steps at the atomic level when epitaxially growing the buffer layer 2 and the device semiconductor region 3.

Next, as shown in FIG.
The buffer layer 2 on the surface 1a is formed by the well-known MOCVD (Metal).
  Organic Chemical Vapor Deposition)
A first layer 8 made of AlN by a chemical vapor deposition method;
To repeatedly stack the second layer 9 of GaN
Therefore, it is formed. That is, pretreatment with an HF-based etchant
Reaction of a p-type silicon single crystal substrate 1 in a MOCVD apparatus
First, place it indoors and run thermal at 950 ° C for about 10 minutes.
Annealing is applied to remove the oxide film on the surface. next,
TMA (trimethylaluminum) gas and N in the reaction chamber
H₃(Ammonia) gas is supplied for about 65 seconds, and the substrate 1
A first AlN layer having a thickness of about 10 nm on one main surface of the first
Layer 8 is formed. In this embodiment, the heating temperature of the substrate 1 is set to 1
After the temperature is 120 ° C, the flow rate of TMA gas, that is, the supply of Al
About 63 μmol / min, NH ₃ Gas flow rate N
H₃ Was supplied at about 0.14 mol / min. Continued
The heating temperature of the substrate 1 to 1120 ° C.
After stopping the supply, TMG (Trimethylgalliu)
Mu) gas and NH₃ Provide with (ammonia) gas for about 90 seconds
The AlN formed on one main surface of the substrate 1.
On the upper surface of the first layer 8 made of n-type G having a thickness of about 30 nm.
A second layer 9 made of aN is formed. In this embodiment, T
The flow rate of MG gas, that is, the supply amount of Ga is about 60 μmol / m
in, NH₃ Gas flow rate, NH₃ Supply of about 0.1
It was 4 mol / min. In the present embodiment, the above-mentioned AlN
Of a first layer 8 of GaN and a second layer 9 of GaN
The first layer 8 of AlN and GaN
And a second layer 9 consisting of 40 layers in total.
The fur layer 2 is obtained. Of course, the first layer 8 made of AlN, Ga
The second layer 9 made of N can be made into any number such as 50 layers.
You can change it.

Next, a well-known MOC is formed on the upper surface of the buffer layer 2.
The HEMT element-shaped semiconductor region 3 is formed by the VD method. That is, the substrate 1 on which the buffer layer 2 is formed is
It is placed in a reaction chamber of an OCVD apparatus, and trimethylgallium gas, that is, TMG gas and NH ₃ (ammonia) gas are first supplied into the reaction chamber for 15 minutes, and undoped GaN having a thickness of about 500 nm, that is, conductivity type, is provided on the upper surface of the buffer layer 2. The electron transit layer 10 made of GaN that does not contain the determining impurities is formed. In this embodiment, the flow rate of TMG gas, that is, the supply amount of Ga is about 62 μmol / min, and the flow rate of NH ₃ gas, that is, the supply amount of NH ₃ is about 0.23 mol / min.

Next, TMG gas and ammonia gas are supplied to the TMA gas in the reaction chamber for 85 seconds so that the upper surface of the electron transit layer 10 is undoped, that is, Al containing no conductivity determining impurities.
_A spacer layer 11 made of _0.2 Ga _0.8 N is formed with a thickness of 7 nm. In this embodiment, the flow rate of TMA gas, that is, the supply amount of Al is about 8.4 μmol / min, the flow rate of TMG gas is about 15 μmol / min, and the flow rate of NH ₃ gas is about 0.23 m.
ol / min.

Next, after interrupting the crystal growth for about 15 seconds,
An electron supply layer 1 made of Al _0.2 Ga _0.8 N is formed on the upper surface of the spacer layer 11 by supplying TMA gas, TMG gas, ammonia gas, and SiH ₄ (silane) gas into the reaction chamber for about 98 seconds.
2 is formed to a thickness of about 10 nm. In this embodiment, the flow rate of the TMA gas at this time is about 8.4 μmol / min, TM
The flow rate of G gas was about 15 μmol / min, the flow rate of ammonia gas was about 0.23 mol / min, and the flow rate of SiH ₄ gas was about 21 nmol / min.

After that, the silicon substrate 1 on which the semiconductor region 3 and the buffer layer 2 are formed is taken out from the MOCVD apparatus, and an insulating film 7 made of a silicon oxide film is formed on the entire surface of the semiconductor region 3 by well-known plasma CVD. The thickness of the insulating film 7 is about 100 nm.

Although one HEMT is shown in FIG. 1, a large number of HEMTs are simultaneously manufactured by using one semiconductor wafer, that is, the substrate 1 in this manufacturing. Therefore, the element isolation regions of the semiconductor region 3 and the buffer layer 2 are etched to the silicon substrate 1 by photolithography by reactive ion etching using a mixed gas of boron trichloride (BCI ₃ ) and hydrogen, and the HEMT device Perform separation.
By separating the elements in this way, the electrical characteristics of each element region can be satisfactorily tested without being affected by other elements.

Next, after forming openings for forming the source electrode and the drain electrode in the insulating film 7 by using photolithography and a hydrofluoric acid-based etchant, Ti (titanium) and Al ( Aluminum) is sequentially laminated and lifted off to form the source electrode 4 and the drain electrode 5. Also when forming the gate electrode, an opening is formed in the insulating film 7 by the same procedure, Pd (palladium), Ti (titanium), and Au (gold) are vapor-deposited by electron beam vapor deposition, and lift-off is performed to form a shutter barrier electrode. The gate electrode 6 having the function as is formed. After that, the epitaxial wafer is cut and separated in the element isolation region by a well-known dicing process or the like to obtain a semiconductor device (HEMT).
Chip) to complete.

According to the HEMT of this embodiment, the following effects can be obtained. (1) Since the substrate 1 made of silicon is used at low cost and has good workability, the material cost and the production cost can be reduced. Therefore, the HEMT cost can be reduced. (2) The buffer layer 2 formed of the first layer 8 and the second layer 9 made of AlN having a lattice constant between one of silicon and GaN formed on one main surface of the substrate 1 is made of silicon. The crystal orientation of the substrate 1 made of can be favorably inherited. As a result, the GaN-based semiconductor region 3 can be favorably formed on one main surface of the buffer layer 2 with the crystal orientations aligned. Therefore, the flatness of the semiconductor region 3 is improved,
The electrical characteristics of HEMT are also improved. If a buffer layer is formed on only one main surface of the substrate 1 made of silicon at a low temperature by using only a GaN semiconductor, since the difference in lattice constant between silicon and GaN is large, the upper surface of the buffer layer has excellent flatness. It is impossible to form a GaN-based semiconductor region. (3) The buffer layer 2 made of a composite layer of the first layer 8 made of AlN and the second layer 9 made of GaN is the conventional G layer.
Crystals can be grown at a higher temperature than a low temperature buffer layer composed of a single layer of aN or AlN. For this reason, ammonia serving as a nitrogen source can be decomposed well, and the buffer layer 2 does not become an amorphous layer. Therefore, the density of crystal defects in the epitaxial growth layer formed on the buffer layer 2, that is, the semiconductor region 3 can be sufficiently reduced, and the generation of leak current can be prevented. As a result, it is possible to provide a HEMT having a good pinch-off characteristic. (4) Since the substrate 1 is made of silicon, which has a higher thermal conductivity than sapphire, the heat generated during the operation of the device can be radiated satisfactorily through the substrate 1, and the device withstand voltage, gain, etc. Various characteristics are satisfactorily obtained. (5) Since the silicon substrate 1 has a smaller coefficient of thermal expansion than the nitride-based compound semiconductor, tensile strain due to thermal imperfections is added to the epitaxial layer. Therefore, the space layer 1
The tensile stress at the AlGaN / GaN interface between the No. 1 and the electron transit layer 10 can be further strengthened, and as a result, the piezoelectric field effect can be enhanced. Therefore, the electron density of the electron transit layer 10, that is, the channel can be made higher than that of the HEMT using the sapphire substrate, and the sheet resistance of the electron transit layer 10, that is, the channel can be reduced to increase the drain current. Is possible.

[0031]

Second Embodiment Next, a MESFET of the second embodiment will be described with reference to FIG. However, in FIG. 4, parts that are substantially the same as those in FIG. 1 are given the same reference numerals, and descriptions thereof are omitted. The MESFET of FIG. 4 is the HEMT of FIG.
The semiconductor region 3 is provided with an n-type semiconductor region 3a made of a GaN compound semiconductor layer doped with Si as an n-type impurity. That is, in the MESFET of FIG. 4, the silicon substrate 1, the buffer layer 2, the source electrode 4, the drain electrode 5, the gate electrode 6, and the insulating film 7 are formed in the same manner as those shown by the same reference numerals in FIG. The n-type semiconductor region 3 a, which can also be called a channel layer or an active layer, is arranged on the buffer layer 2. The source electrode 4 and the gate electrode 5 make ohmic contact with the n-type semiconductor region 3a, and the gate electrode 6
Is in Schottky barrier contact with the n-type semiconductor region 3a.

GaN semiconductor region 3 of the MESFET of FIG.
The manufacturing method other than a is the same as that of the first embodiment. G
When forming the aN semiconductor region 3a, TMG gas, NH ₃ gas, and SiH ₄ (silane) gas are supplied to the reaction chamber used for forming the buffer layer 2 for about 450 seconds to form on the one main surface of the substrate 1. An n-type semiconductor region 3a having a thickness of about 150 nm is formed on the upper surface of the formed buffer layer 2. In this embodiment, the flow rate of TMG gas, that is, the supply amount of Ga is about 6
The flow rate of NH ₃ gas was 0 μmol / min, that is, the supply amount of NH ₃ was 0.23 mol / min, and the flow rate of SiH ₄ gas, that is, the supply amount of Si was 21 nmol / min.

The MESFET of FIG. 4 has the same effects as (1), (2), (3) and (4) described in the section of the description of the effect of HEMT of FIG. That is, making the substrate 1 inexpensive, improving the flatness and crystallinity of the semiconductor region 3a, and
It is possible to improve the characteristics of the FET and to dissipate the heat of the semiconductor region 3a satisfactorily through the silicon substrate 1.

[0034]

Third Embodiment The configuration of the buffer layer 2 of the first and second embodiments can be changed. FIG. 5 shows a part of the buffer layer 2a according to the third embodiment that can be used for HEMTs and MESFETs. The buffer layer 2a of FIG.
Comprises a plurality of first layers 8a and a plurality of second layers 9a alternately stacked. The first layer 8a is represented by the chemical formula Al _x In _y Ga _1-xy N, where x and y are represented by 0 <x ≦ 1, 0 ≦ y <1, and x + y ≦ 1. It is made of a material that can That is, the first layer 8a is made of AlN (aluminum nitride), AlGaN (gallium aluminum nitride),
AlInN (Indium Aluminum Nitride), and A
It is formed of a material selected from 1GaInN (gallium indium aluminum nitride). In the embodiment of FIG. 5, the formula of x is 0.5, y is equivalent to material which is a _{0.01 Al 0.5 In 0.01 Ga 0.4 9} N first layer 8a
Is used for. The first layer 8a is an extremely thin film having an insulating property. The lattice constant and thermal expansion coefficient of the first layer 8a containing aluminum have values between the lattice constant and thermal expansion coefficient of the silicon substrate 1 and the lattice constant and thermal expansion coefficient of the semiconductor region 3a.

The second layer 9a has a chemical formula of Al _a In _b Ga _{1 -ab} N, where a and b are arbitrary values satisfying 0≤a <1, 0≤b <1, a + b≤1. It is a thin film of semiconductor made of the materials that can be shown. That is, the second layer 9a is formed of, for example, GaN, AlN, InN, InGaN, AlGaN, A.
It is formed of one selected from lInN and AlInGaN. In the embodiment of FIG. 5, a in the above equation is 0.05,
Al _0.05 In _0.35 corresponding to the material in which b is _0.35
Ga _0.6 N is used for the second layer 9a. The gap between the valence band and the conduction band of the second layer 9a, that is, the band gap, is larger than the band gap of the first layer 8a.

Next, the first layer 8a is formed of Al _0.5 In _0.01 G.
a _0.49 N, the second layer 9a is Al _0.05 In _0.35 Ga _0.6 N
A method of manufacturing the buffer layer 2a that has been described will be described. The buffer layer 2a is formed on the main surface 1a of the substrate 1 similar to that of the first embodiment. This buffer layer 2a is a well-known MOCV.
D (Metal Organic Chemical Vapor Deposition)
That is, Al _0.5 In _{0.01 is formed} by metalorganic chemical vapor deposition.
First layer 8a made of Ga _0.49 N and Al _0.05 In _0.35 G
It is formed by repeatedly laminating the second layer 9a made of a _0.6 N. That is, the silicon single crystal substrate 1 is placed in the reaction chamber of the MOCVD apparatus, and first, thermal annealing is performed to remove the oxide film on the surface. Next, in the reaction chamber, TMA (trimethylaluminum) gas, TM
About 24 G (trimethylgallium) gas, TMIn (trimethylindium) gas and NH3 (ammonia) gas
It is supplied for 2 seconds, and the thickness T1 is about 5n on one main surface of the substrate 1.
m or about 50 Å of Al _0.5 In _0.01 Ga
_A first layer 8a of _0.49 N is formed. In this embodiment, after the heating temperature of the substrate 1 is set to 800 ° C., the flow rate of TMA gas, that is, the supply amount of Al is about 14 μmol / min, TM
The G gas flow rate is 31 μmol / min, the TMIn gas flow rate is 47 μmol / min, and the NH ₃ gas flow rate, that is, N
The supply amount of H ₃ was set to about 0.23 mol / min. Subsequently, the supply of TMA gas, TMG gas, and TMIn gas is stopped, the heating temperature of the substrate 1 is lowered to 750 ° C., and thereafter, TMA gas, TMG gas, TMIn gas, and NH.
₃ (ammonia) gas being fed about 83 seconds, the upper surface of the first layer 8a, the thickness T2 to form the second layer 9a made of 30nm i.e. 300 Å Al _0.05 In _0.35 Ga _0.6 N. Note that SiH ₄ gas may be simultaneously supplied to introduce Si as an impurity into the formed film. In this embodiment, the flow rate of TMA gas is 2.8 μmol.
/ Min, the flow rate of TMG gas is 46 μmol / min,
The flow rate of TMIn gas is 59 μmol / min, the flow rate of NH ₃ gas, that is, the supply amount of NH ₃ is about 0.23 mol / mi.
It was set to n. In the present embodiment, the above-mentioned Al _0.5 In _0.01 Ga is used.
First layer 8a of _0.49 N and Al _0.05 In _0.35 Ga
The formation of the second layer 9a made of _0.6 N is repeated 10 times to form the first layer 8a made of Al _0.5 In _0.01 Ga _0.49 N and the layer A
l _{0.0 5} In _0.35 Ga _0.6 and a second layer 9a made of N to form a buffer layer 2 which is 20 layers alternately stacked. Of course A
Al _0.5 In _0.01 Ga _0.49 N first layer 8a, Al ₀
The second layers 9a made of _.05 In _0.35 Ga _0.6 N can be changed to any number such as 50 layers.

The buffer layer 2a of the third embodiment shown in FIG. 5 has the same effect as that of the first embodiment shown in FIG. 1, and since the buffer layer 2a contains indium, the buffer layer 2a has the same effect. Buffer layer 2 as compared to the case where indium is not included
It has an effect that the coefficient of thermal expansion of a can be approximated to that of the silicon substrate 1.

[0038]

Fourth Embodiment A buffer layer 2b according to a fourth embodiment shown in FIG. 6 is a modification of the buffer layer 2 shown in FIGS. 1 and 4, in which first and second layers 8b and 9b are alternately arranged. It consists of a laminate. The first layer 8b is here formula _{Al x B y Ga 1-xy} N, x, y are, 0 <x ≦ 1, 0 ≦ y <1, any numerical value satisfying x + y ≦ 1 be represented by, It is made of a material that can That is, the first layer 8b is formed of AlN (aluminum nitride), AlGaN (gallium aluminum nitride),
AlBN (Boron Nitride Aluminum) and AlBG
It is made of a material selected from aN (gallium boron aluminum nitride). In the embodiment of FIG. 6, Al _0.5 corresponding to a material in which x is 0.5 and y is 0 in the above formula.
Ga _0.5 N is used for the first layer 8b. The first layer 8b is an extremely thin film having an insulating property. First layer 8b
The lattice constant and the thermal expansion coefficient of are closer to those of the silicon substrate 1 than those of the second layer 9b.

The second layer 9b has a chemical formula of Al _a B _b Ga _{1 -ab} N, where a and b are any numerical values satisfying 0 ≦ a <1, 0 ≦ b <1, a + b ≦ 1, It is a thin film of semiconductor made of a material that can be represented by. That is, the second layer 9b is made of Al,
A layer containing at least one element selected from B and Ga and N, for example, GaN, BN, AlN, BGa
It is formed of one selected from N, AlGaN, AlBN, and AlBGaN. In the embodiment of FIG. 6, B _0.3 Ga corresponding to a material in which a is 0 and b is 0.3 in the above formula
_0.7 N is used for the second layer 9b. Second layer 9b
The gap between the valence band and the conduction band, that is, the band gap is larger than the band gap of the first layer 8b.

The buffer layer 2b is formed on the main surface 1a of the substrate 1 having the (111) just surface by the well-known MOCVD (Metal) method.
Organic Chemical Vapor Deposition), that is, a first layer 8b made of Al _0.5 Ga _0.5 N and a second layer 9b made of B _0.3 Ga _0.7 N are repeatedly laminated by an organic metal chemical vapor deposition method. That is, the silicon single crystal substrate 1 is placed in the reaction chamber of the MOCVD apparatus, and first, thermal annealing is performed to remove the oxide film on the surface. Next, in the reaction chamber, TMA (trimethylaluminum) gas, TMG (trimethylgallium) gas,
NH ₃ (ammonia) gas is supplied for about 27 seconds, and the first layer 8b made of Al _0.5 Ga _0.5 N having a thickness T1 of about 5 nm, that is, about 50 angstroms is formed on one main surface of the substrate 11.
To form. In this embodiment, the heating temperature of the substrate 1 is 1080
After the temperature is set to ℃, the flow rate of TMA gas, that is, the supply amount of Al is about 31 μmol / min, and the flow rate of TMG gas is 31 μmo.
The flow rate of NH ₃ gas, that is, the supply amount of NH ₃ was set to about 0.14 mol / min. Then, the supply of TMA gas is stopped, the heating temperature of the substrate 1 is lowered to 1120 ° C.,
Then, TEB (triethylboron) gas, TMG gas, and NH ₃ (ammonia) gas are supplied for about 85 seconds, and the thickness T 2 is 30 nm, that is, 3 on the upper surface of the first layer 8b.
A second layer 9b of n-type B _0.3 Ga _0.7 N of 00 Å is formed. At the same time, SiH ₄ gas may be supplied to introduce Si as an impurity into the formed film. In this embodiment, the flow rate of TEB gas, that is, the supply amount of boron is 75 μmol / min, the flow rate of TMG gas, that is, the supply amount of gallium is 63 μmol / min, and the flow rate of NH ₃ gas, that is, the supply amount of NH ₃ is about 0.14 mol / min. mi
It was set to n. In this embodiment, the first layer 8b made of Al _0.5 Ga _0.5 N and the second layer 9 made of B _0.3 Ga _0.7 N described above are used.
The formation of b is repeated 50 times to form a buffer layer 2b in which a first layer 8b made of Al _0.5 Ga _0.5 N and a second layer 9b made of B _0.3 Ga _0.7 N are alternately laminated in a total of 100 layers. . Of course, the first layer 8b made of Al _0.5 Ga _0.5 N
And a second layer 9b made of B _0.3 Ga _0.7 N, respectively.
It can be changed to an arbitrary number such as 5 layers.

The buffer layer 2b of FIG. 6 has the same effect as the buffer layer 2 of FIG. 1, and further, since the second layer 9b contains boron, the second layer 9b does not contain boron. As compared with the case, it is more robust, and has an effect that the second layer 9b can be formed relatively thick while preventing the occurrence of cracks.

[0042]

[Modification] The present invention is not limited to the above-described embodiment, and the following modifications are possible. (1) The substrate 11 can be made of polycrystalline silicon other than single crystal silicon or a silicon compound such as SiC. (2) The conductivity type of each layer of the semiconductor regions 3 and 3a can be reversed from that of the embodiment. (3) GaN (gallium nitride), AlInN (indium aluminum nitride), AlGaN (gallium aluminum nitride), I
nGaN (Indium gallium nitride), and AlIn
A gallium nitride-based compound semiconductor or an indium nitride-based compound semiconductor selected from GaN (gallium nitride indium aluminum) can be used. (4) In the HEMT of FIG. 1, an electron supply layer similar to the electron supply layer 12 can be provided between the active layer, that is, the electron transit layer 10 and the buffer layer 2. (5) An insulated gate coulombic effect transistor can be provided instead of the HEMT and MESFET. (6) First layers 8, 8 of the buffer layers 2, 2a, 2b
The number of a and 8b is one more than that of the second layers 9, 9a and 9b, and the uppermost layer of the buffer layers 2, 2a and 2b is the first layer 8,
8a, 8b. On the contrary, the number of the second layers 9, 9a and 9b can be increased by one layer more than the number of the first layers 8, 8a and 8b. (7) First layers 8, 8a, 8b and second layers 9, 9
a and 9b may contain impurities as long as they do not hinder these functions.

[Brief description of drawings]

FIG. 1 is a central longitudinal sectional view schematically showing a HEMT according to a first embodiment of the present invention.

FIG. 2 is a plan view of the HEMT shown in FIG.

FIG. 3 is a cross-sectional view showing the structure of the HEMT of FIG. 1 in an enlarged manner in the order of manufacturing steps.

FIG. 4 is a cross-sectional view showing a MESFET of the second embodiment.

FIG. 5 is a sectional view showing a part of a substrate and a buffer layer according to a third embodiment.

FIG. 6 is a sectional view showing a part of a substrate and a buffer layer according to a fourth embodiment.

[Explanation of symbols]

1 Substrate made of silicon single crystal 2, 2a, 2b buffer layer 8, 8a, 8b First layer 9, 9a, 9b Second layer 3, 3a Semiconductor region

   ─────────────────────────────────────────────────── ─── Continued front page    F-term (reference) 5F045 AA04 AB14 AB17 AC01 AC08                       AC12 AD12 AD14 AD15 AF03                       BB08 BB12 BB16 CA06 CA07                       DA53 DA54                 5F102 GB01 GC01 GD01 GD10 GJ03                       GJ10 GK04 GK08 GK09 GL04                       GL08 GL09 GM04 GM06 GM08                       GM09 GM10 GQ01 GR01 GT02                       GT03 GV07 HC02 HC21                 5F140 AA24 AA34 AB08 BA06 BA20

Claims (12)

[Claims] 1. A semiconductor device having a nitride-based compound semiconductor, comprising: a substrate made of silicon or a silicon compound; a buffer layer disposed on one main surface of the substrate; and a buffer layer disposed on the buffer layer. A semiconductor region for a semiconductor device including at least one nitride compound semiconductor layer, and a first main electrode, a second main electrode and a control electrode arranged on the surface of the semiconductor region for a semiconductor device. wherein the buffer layer is herein formula _{Al x M y Ga 1-xy} N, wherein M is an in (indium) B (boron)
At least one element selected from, And a chemical formula of Al _a M _b Ga _{1 -ab} N, wherein M is at least one selected from In (indium) and B (boron). Elements of And a second layer made of a material represented by a numerical value that satisfies 2. The semiconductor device according to claim 1, wherein the first layer is made of Al _x Ga _1-x N, and the second layer is made of Al _a Ga _1-a N. 3. The first layer is Al _x In _y Ga _1-xy N
The second layer is made of Al _a In _b Ga _{1 -ab} N, and In is contained in at least one of the first and second layers.
The semiconductor device according to claim 1, wherein the semiconductor device contains (indium). Wherein said first _{layer, Al x B y Ga 1-} xy N
The second layer is made of Al _a B _b Ga _{1 -ab} N and at least one of the first and second layers contains B (boron). 1. The semiconductor device according to 1. 5. The buffer layer comprises a plurality of the first and second layers, and the first layers and the second layers are alternately laminated. Alternatively, the semiconductor device according to 2 or 3 or 4. 6. The buffer layer according to claim 1, wherein the first layer has a thickness of 0.5 nm to 50 nm, and the second layer has a thickness of 0.5 nm to 200 nm. The semiconductor device described. 7. The main surface of the substrate on the side where the buffer layer is arranged is in the (111) just plane or in the range of −4 degrees to +4 degrees from the (111) plane in the crystal plane orientation indicated by the Miller index. The semiconductor device according to claim 1, wherein the semiconductor device is a surface inclined at. 8. The nitride-based compound semiconductor layer is GaN
(Gallium nitride) layer, AlInN (indium aluminum nitride) layer, AlGaN (gallium aluminum nitride) layer, InGaN (gallium indium nitride) layer,
2. The semiconductor device according to claim 1, which is selected from an AlInGaN (gallium indium aluminum nitride) layer. 9. The semiconductor region comprises a plurality of semiconductor layers for forming a field effect transistor,
2. The semiconductor device according to claim 1, wherein the main electrode is a source electrode, the second main electrode is a drain electrode, and the control electrode is a gate electrode. 10. The semiconductor device according to claim 1, wherein the semiconductor region is composed of a plurality of semiconductor layers for forming a high electron mobility transistor (HEMT). 11. The semiconductor device according to claim 1, wherein the semiconductor region comprises a plurality of semiconductor layers for forming a metal semiconductor field effect transistor (MESFET). 12. A method of manufacturing a semiconductor device having a nitride-based compound semiconductor, comprising: preparing a substrate made of silicon or a silicon compound; and forming a chemical formula Al _x M on the substrate by vapor phase epitaxy. _y Ga _1-xy N where M is In (indium) and B (boron)
At least one element selected from And a chemical formula of Al _a M _b Ga _{1 -ab} N, wherein M is at least 1 selected from In (indium) and B (boron). Seed element, A step of sequentially forming a second layer made of a material represented by the following formula to obtain a buffer layer, and a semiconductor device comprising at least one nitride-based compound semiconductor layer on the buffer layer. A semiconductor device comprising: a step of forming a semiconductor region by a vapor deposition method; and a step of forming first and second main electrodes and a control electrode on the surface of the semiconductor region for a semiconductor element. Production method.