JP2003018595A - Video encoding system, video decoding system, video encoding method, and video decoding method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To suppress propagation of error between frames at encoding of a video signal. SOLUTION: The video encoding system comprises a block formation device 11 in which the input of video signal for a single screen is divided into macro block units to which prescribed numbers are sequentially allocated, and the macro block, K (rows)×L (columns), which occupies the single screen is assumed as a single macro block group, so that the video signal for the single screen is processed by the macro block group unit, and a high efficiency encoder 12 in which, based on the macro block group unit, the in-frame coding or the inter-frame prediction coding is performed with the video signal of the macro block unit, to provide encoded data. The macro block group is a range of error propagation between the macro blocks within the group.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a video coding apparatus and the like for intra-frame coding or inter-frame predictive coding of video signals.

[0002]

2. Description of the Related Art In recent years, in digital signal processing of images in digital video equipment and the like, high-efficiency encoding technology has been actively developed in order to realize recording / reproduction at a limited transmission rate. High-efficiency coding is a coding method that compresses the amount of data using the redundancy of the video signal, such as data compression using spatial correlation within a frame or temporal correlation between frames. .

As a data compression method utilizing a spatial correlation in a frame, that is, a feature that an arbitrary pixel and other neighboring pixels in the frame often have a close value, a block of 8 pixels × 8 pixels is used. In many cases, a method of dividing the data into (orthogonal transform blocks), performing orthogonal transform in units of orthogonal transform blocks, and compressing is used. The orthogonal transform coefficient calculated by the orthogonal transform is quantized, variable-length coding that is statistically determined is performed, and the recording is performed with improved compression efficiency. An orthogonal transformation block of four luminance signals adjacent to each other on the screen and an orthogonal transformation block of two color difference signals representing color information at the same position as them are collectively referred to as a macro block. Encode and decode video.

Further, as a data compression method utilizing the temporal correlation between frames, that is, a pixel block existing at a certain position in a frame often exists at almost the same position in a neighboring frame, the frame is to be compressed. It is common to encode the difference data between the pixel data and the pixel data of the neighboring frame. In particular, when recording a moving image, it is possible to improve the compression efficiency by accurately predicting the temporal position of a certain pixel block from neighboring frames and taking the difference from the predicted pixel block. Such a method is generally called motion compensation prediction. In the motion compensation prediction method, coded data obtained by highly efficient coding of differential data and a motion vector indicating motion information are transmitted. The video signal input here is an I frame encoded in a frame without using motion compensation prediction, a P frame predicted using a past frame as a reference image, a prediction using a past frame as a reference image, or Highly efficient coding is performed by selecting from B frames to which prediction with the highest compression efficiency is applied among predictions using future frames as reference images or predictions using both. In addition,
The motion-compensated prediction is performed in block units called macroblocks, each of which is composed of four orthogonal transform blocks of luminance signals and two orthogonal transform blocks of color difference signals as described above.

Since the coded data which has been subjected to such high efficiency coding is variable length coded, if it is simply recorded as it is, the following problems occur. First, when the variable-length coded codeword is decoded, it is possible to decode all the codewords by sequentially decoding the words one by one.

However, depending on the state of the recording medium and the transmission system, there are cases where the reproduced data cannot be obtained correctly. This is called an error. The code word is not correctly decoded at the location where the error occurs, and further the code words after that are not correctly decoded. This is called error propagation.

Then, the reproduction image quality is significantly deteriorated due to the error propagation. As a method of suppressing this error propagation, there is a slice structure generally defined by the international standard of high efficiency coding called MPEG.

A slice is a one-dimensional array structure in which a plurality of macroblocks are horizontally grouped in each frame. Encoded data to which header information, screen position information, and the like are added is recorded for each slice. Therefore, although the error is propagated to the macro block after the location where the error occurs, it is possible to reset the error propagation in the next slice by recognizing the header information for each slice.

As described above, when an error occurs in a certain slice, the image quality deteriorates due to the error of the length of the slice, but the error can be recovered in the next slice and the influence of the error can be reduced. it can. It is preferable to form a slice structure for each macro block.

However, since the header information of the slice is additional data unrelated to the video data, if it is added unnecessarily in a limited recording capacity or transmission capacity,
It causes unnecessary consumption of data. Therefore, the capacity allocation to the image data is reduced by that amount, and the reproduction image quality is deteriorated. Therefore, as illustrated in FIG. 4A, in practice, it is common to form a slice structure in which a plurality of macroblocks are arranged in a row. At this time, the slice structure is not formed across a plurality of lines in the screen.

On the other hand, when performing interframe predictive coding,
Such error propagation extends between frames. That is,
This means that when an error occurs in an I frame or a P frame that is a reference image during interframe predictive coding, the error is also propagated to a frame in which motion compensation predictive coding is performed by referring to them.

For example, when one slice of the I frame has an error, of the encoded data of the P frame and the B frame which refer to this reference image, the macroblock which refers to this error slice is not correctly decoded. . This error propagation continues until the next I frame arrives. Therefore, it is possible to set an error recovery point by inserting I frames periodically.

In MPEG, as a method for improving the coding efficiency, a method of transmitting a motion vector has been devised in the case of a frame subjected to interframe predictive coding. In other words, for each slice described above, the motion vector of the leading macroblock transmits the actual value, but the motion vector of the subsequent macroblock is variable-length coded for the difference from the motion vector of the preceding macroblock. There is. This is based on the fact that the motion vectors of adjacent macroblocks often have similar values.

As described above, a video recording apparatus using a high-efficiency coding method for video signals as defined by MPEG is general.

[0015]

However, in such a video recording apparatus, when a slice structure is formed by a plurality of macroblocks as described above, the probability that each slice is referred to by a macroblock for motion compensation is high. The problem is that it is high and the error propagation between frames is large. When the number of macroblocks forming a slice becomes large, an error extends in the horizontal direction, and the image quality deterioration is visually noticeable.

In view of the above-mentioned problems, the present invention is capable of suppressing error propagation between frames, visually suppressing image quality deterioration, and improving compression efficiency at that time. It is intended to provide an encoding method and the like.

[0017]

In order to achieve the above object, in the first invention (corresponding to claim 1), a predetermined number is sequentially assigned to the input of a video signal for one screen. K divided into macroblock units and occupying one screen
Block processing means for processing the video signals for one screen in macroblock group units, each of which includes (row) × L (column) macroblocks, and based on the macroblock group unit And an encoding unit that obtains encoded data by performing intra-frame encoding or inter-frame predictive encoding on the video signal of the macro block unit, and the macro block group includes an error between the macro blocks in the group. It is a video encoding device that is the range of propagation.

The second invention (corresponding to claim 2)
Is the video encoding device according to the first aspect of the present invention, wherein the order of arrangement of K × L macroblocks in the group is such that macroblocks having the predetermined numbers are adjacent to each other.

The third invention (corresponding to claim 3)
Is a decoding means for decoding the encoded data obtained by the video encoding device of the first aspect of the present invention to obtain the video signal in the macroblock unit, and the decoding means for obtaining the video signal in the macroblock group unit. And a reverse block processing means for rearranging the video signals in units of the macroblocks in the order of forming the one screen.

The fourth invention (corresponding to claim 4)
Divides an input video signal for one screen into macroblock units sequentially assigned a predetermined number, and sets K (rows) × L (columns) of the macroblocks occupying one screen to 1 As one macroblock group, processing the video signal for one screen in units of the macroblock group, and based on the macroblock group unit, intraframe coding or interframe prediction for the video signal in the macroblock unit And a step of performing coding to obtain coded data, wherein the macroblock group is a video coding method which is a range of error propagation between the macroblocks in the macroblock group.

The fifth invention (corresponding to claim 5)
Is a step of decoding the encoded data obtained by the video encoding method of the fourth aspect of the present invention to obtain the video signal in the macroblock unit, and the decoding unit obtained by the decoding unit based on the macroblock group unit. And a step of rearranging video signals in macro block units in the order of forming the one screen.

A sixth invention (corresponding to claim 6)
Is a block (K) that occupies the inside of one screen by dividing the input of the video signal for one screen of the video encoding device of the first aspect of the invention into macroblock units sequentially assigned a predetermined number.
A block processing means for processing the video signal for one screen in macroblock group units, with the macroblocks of × L (columns) as one macroblock group, and the macroblocks based on the macroblock group units. It is a program for causing a computer to function as all or a part of a coding unit that performs intra-frame coding or inter-frame predictive coding on a block-unit video signal to obtain coded data.

The seventh invention (corresponding to claim 7)
Is a decoding means for decoding the coded data obtained by the video encoding apparatus of the first present invention to obtain the video signal of the macroblock unit, and the macro of the video decoding apparatus of the fourth present invention. A program for causing a computer to function as a whole or a part of an inverse block processing unit that rearranges the video signal in the macro block unit obtained by the decoding unit in the order of forming the one screen based on a block group unit. Is.

The eighth invention (corresponding to claim 8)
Is a block (K) that occupies the inside of one screen by dividing the input of the video signal for one screen of the video encoding device of the first aspect of the invention into macroblock units sequentially assigned a predetermined number.
A block processing means for processing the video signal for one screen in macroblock group units, with the macroblocks of × L (columns) as one macroblock group, and the macroblocks based on the macroblock group units. A medium carrying a program for causing a computer to function as all or part of an encoding means for performing intra-frame encoding or inter-frame predictive encoding on a block-unit video signal to obtain encoded data, the computer comprising: It is a medium characterized by being processable by.

The ninth invention (corresponding to claim 9)
Is a decoding means for decoding the coded data obtained by the video encoding apparatus of the first present invention to obtain the video signal of the macroblock unit, and the macro of the video decoding apparatus of the fourth present invention. A program for causing a computer to function as a whole or a part of an inverse block processing unit that rearranges the video signal in the macro block unit obtained by the decoding unit in the order of forming the one screen based on a block group unit. It is a medium that carries, and is characterized by being processable by a computer.

The present invention as described above is, for example, a video recording apparatus for recording a video signal by intra-frame coding or inter-frame predictive coding, in which the video signal is input and the screen is divided into blocks. , A block grouper that collects K × L blocks into one group, rearranges video signals in a predetermined order in each group, and further rearranges blocks in the group in a predetermined order and outputs the block. A high-efficiency encoder that performs intra-frame coding or inter-frame predictive coding, and a header adder that adds header information and position information for each group to the encoded data encoded by the high-efficiency encoder , A recorder for recording the output data from the header adder on a recording medium.

As a result, when an error occurs during reproduction, it is possible to reduce the influence of error propagation on other frames.

Further, according to the present invention, for example, in a video recorder, in a blocker, the order of K × L blocks in a group is set to be a block order in which the blocks are always adjacent from one end to the other end in the group area. Alternatively, the video signals may be rearranged according to this order, and the video signals may be rearranged and output according to this order.

As a result, recording can be performed so as to suppress error propagation, and recording can be performed with improved compression efficiency.

[0030]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings.

(First Embodiment) The operation of the video recording apparatus according to the first embodiment of the present invention will be described below. FIG. 1 is a block diagram of a video recording apparatus according to this embodiment. Figure 1
, 10 is a video input terminal, 11 is a blocker,
Reference numeral 12 is a high efficiency encoder, 13 is a header adder, 14 is a recording circuit, 15 is a recording head, and 16 is a recording medium.

The operation of the video recording apparatus configured as described above will be described below, and an embodiment of the video encoding method of the present invention will be described. First, a video signal is input from the video input terminal 10. The blocker 11 blocks the input video signal into macroblocks for each frame. Further, the blocker 11 collects K × L (K and L: both natural numbers of 2 or more) macroblocks into one group, divides the frame into a plurality of groups, and rearranges the video signals for each group. Output.

The detailed operation of the blocker 11 is shown in FIG.
And it demonstrates using FIG. 2 and 6 are concrete conceptual diagrams of the operation of the blocker 11.

First, FIG. 2A shows one frame of the input video signal, which corresponds to the video signal for one screen of the present invention. The blocker 11 converts this frame into FIG.
It is divided into macro blocks like. As mentioned earlier,
A macro block is block data composed of four orthogonal transformation blocks (Y0 to Y3) of luminance signals and two orthogonal transformation blocks (Cr, Cb) of two color difference signals.

First, as shown in FIG. 6A, in one frame, macroblocks are assigned a predetermined number of M1 to M45 in a horizontal row from the left uppermost part to the right end of one frame, and then in the next stage. Are arranged in a horizontal line from the left end to the right end for each stage, and the numbers are allocated in the order of arrangement. In this case, one frame is divided into 1350 macroblocks, 45 in the horizontal direction and 30 in the vertical direction.

Next, a predetermined number of macroblocks are taken out from the macroblock shown in FIG. 6A to form one group. At this time, the method of extracting the macroblock is K from the macroblock in the row direction within one screen.
(K is an integer greater than or equal to 2), L (L is an integer greater than or equal to 2) from the macro block in the column direction, and so on so as to span the area of the plane. FIG. 2B shows 3 (rows) × 3 (columns) of these macroblocks (K = in FIG. 2B).
3 and L = 3).

Further, this group defines the range of error propagation of macroblocks included in the group, similarly to the MPEG2 slice. However, the slice is composed of macroblocks arranged in one horizontal row, whereas this group is composed of macroblocks arranged in the row direction and the column direction in the screen.

Next, as in the case of the macroblock, a predetermined number is assigned to this group and arranged in one frame. For example, a group is assigned a predetermined number of G1 to G15 in a horizontal row from the left top of one frame to the right end, and is assigned a number of G16 to G30 in the next row.

By thus grouping, as shown in FIG. 2A, a plurality of groups are formed in the frame. In the video signal of FIG. 2, G1 to G1
There are formed 150 groups, each of which is assigned a number of 50.

Then, the blocker 11 outputs each group in a predetermined order. As an example, the output may be performed in the assigned order (G1 to G150) as shown in FIG. 2A, or may be output in an order different from the order of the assigned numbers.

Now, there are a total of 9 macroblocks in each group. The blocker 11 outputs these macroblocks in each group in a predetermined order. For example, the output may be performed in the order as shown in FIG. 2B (M1 to M9), or may be output in an order different from the order of the assigned numbers.

The blocker 11 rearranges the video signals as described above and outputs the data in macroblock units.

Next, the high-efficiency encoder 12 performs intraframe coding or interframe predictive coding on the input data in macroblock units. For example, if the current frame is an I-frame, then all macroblocks are intra-frame coded. If it is other than the I frame, it is subjected to interframe predictive coding using motion compensation prediction. However, a macroblock whose coding efficiency does not increase due to motion compensation prediction may be intraframe coded. FIG. 3 shows a specific configuration of the high efficiency encoder 12.

In FIG. 3, 110 is a subtractor, 111 is an orthogonal transformation circuit, 112 is a quantization circuit, 113 is a variable length coding circuit, 114 is an inverse quantization circuit, 115 is an inverse orthogonal transformation circuit, and 116 is an adder. 117 is a memory, 118 is a motion compensation circuit, and 119 is a switch.

First, when the macroblock data of the I frame is input to the subtractor 110, since the I frame is intraframe-coded, the switch 119 is turned on.
Set to ff. Therefore, the subtractor 110 outputs the input macroblock data as it is. Next, the macroblock data is orthogonally transformed by the orthogonal transformation circuit 111 and quantized by the quantization circuit 112. Here, the discrete cosine transform (DCT) is usually used for the orthogonal transform circuit, but other methods may be used. The output of the quantization circuit 112 is input to the variable length coding circuit 113 and the inverse quantization circuit 114. The variable length coding circuit 113 performs variable length coding on the quantized macroblock data and outputs it as coded data to be recorded to a circuit in the subsequent stage.

On the other hand, since the data input to the inverse quantization circuit 114 is the data used to create the reference screen of another frame, it is subjected to the decoding process.

First, the inverse quantization circuit 114 inversely quantizes the quantized macroblock data. The data output from the inverse quantization circuit 114 is inverse orthogonal transformed by the inverse orthogonal transformation circuit 115 and input to the adder 116. Since the switch 119 is turned off as described above, the adder 116 outputs the input data as it is. The macroblock data is then stored in the memory 117 and delayed. Note that this memory is for holding the reference screen. However, since the macro block data input to the memory 117 is rearranged in the order shown in FIG. 2 as described above, the macro block data is rearranged so as to return to the original screen and is retained in the memory 117.

Next, when the macroblock data of the P frame is input to the subtractor 110, the P frame is immediately preceding I.
Alternatively, since the motion-compensated inter-frame prediction coding is performed using the P frame as the reference screen, the switch 119 is turned on.
n to be set. Here, the macroblock data is also input to the motion compensation circuit 118. Motion compensation circuit 11
When the macro block data is input, the reference numeral 8 inputs the data of the immediately preceding I or P frame which has been decoded as a reference screen.

Then, the reference screen is searched within a preset search range, the block area having the strongest correlation is found, and the block area is output as prediction data. Switch 119 is on
Therefore, the prediction data output from the motion compensation circuit 118 is input to the subtractor 110. Further, the motion compensation circuit 118 outputs the positional shift between the macroblock and the predicted block area to the variable length coding circuit 113 as a motion vector. The subtractor 110 calculates the difference between the input macroblock and the prediction data, and outputs the difference data. This difference data is obtained by the orthogonal transformation circuit 11
It is orthogonally transformed by 1 and quantized by the quantization circuit 112.
The output of the quantization circuit 112 is input to the variable length coding circuit 113 and the inverse quantization circuit 114. Variable length coding circuit 1
In 13, variable-length coding is performed on the quantized difference data,
The motion vector data is incorporated and output as encoded data to be recorded to a circuit in the subsequent stage. As a method of incorporating a motion vector, for example, a configuration may be considered in which it is incorporated at a specific position of code data of each macroblock, and a difference value from the motion vector in the immediately preceding macroblock is variable-length encoded and incorporated. However, since the macro block at the head of the group cannot take the difference, the actual value must be incorporated. The method of incorporating the motion vector is not limited to this, and various configurations are conceivable.

On the other hand, the data input to the dequantization circuit 114 is used for creating a reference screen of another frame, and therefore is subjected to decoding processing. First, the inverse quantization circuit 1
At 14, the quantized macroblock data is inversely quantized. The data output from the inverse quantization circuit 114 is inverse orthogonal transformed by the inverse orthogonal transformation circuit 115 and input to the adder 116. At this time, since the switch 119 is turned on, the prediction data output from the motion compensation circuit 118 is also input to the adder 116. The adder 116 outputs the result of adding the output data from the inverse orthogonal transform circuit 115 and the prediction data output from the motion compensation circuit 118. The output from adder 116 is stored in memory 117 and delayed. However, since the macro block data input to the memory 117 is rearranged in the order shown in FIG. 2 as described above, the macro block data is rearranged so as to return to the original screen and is retained in the memory 117.

Next, when the macroblock data of the B frame is input to the subtractor 110, the B frame is motion-compensated inter-frame predictive coding using the I frame or P frame coded immediately before as a reference screen. Therefore, the switch 119 is set to be turned on. Here, the macroblock data is also input to the motion compensation circuit 118.
When the macro block data is input, the motion compensation circuit 118 inputs the decoded data of the I frame and the P frame encoded immediately before from the memory 117 as a reference screen. Of course, since the B frame can be bidirectionally predicted from two frames located in the past and the future in time, two reference screens are input. And
The reference screen is searched in the search range set in advance, the block area with the strongest correlation is found, and it is output as prediction data. Since the switch 119 is turned on, the prediction data output from the motion compensation circuit 118 is input to the subtractor 110.

The motion compensation circuit 118 also outputs the motion vector to the variable length coding circuit 113. Subtractor 110
Then, the difference between the input macroblock and the prediction data is calculated, and the difference data is output. The difference data is orthogonally transformed by the orthogonal transformation circuit 111 and quantized by the quantization circuit 112. The output of the quantization circuit 112 is input to the variable length coding circuit 113. The variable length coding circuit 113 performs variable length coding on the quantized difference data, incorporates the motion vector data as described above, and outputs the coded data to be recorded to the circuit at the subsequent stage. Since the B frame data does not become the reference screen, the decoding process as described above is not performed.

The coded data thus highly efficient coded is input to the header adder 13. The encoded data is data in units of macro blocks, and
They are rearranged in the order of groups and macroblocks as shown in (a) to (c). The header adder 13 inserts header information and position information into this encoded data in units of groups. The header information is, for example, a special fixed-length code that can be recognized by the device at the time of decoding without depending on the continuity of codewords. With this header information, it is possible to identify delimiters in group units. Become. Further, the header information may have any form as long as the data has such a function.

Next, the position information is information indicating at which position on the screen each group is data. For example, when encoded in the order shown in FIG. 2A, the number of each group may be used as the position information. The position information may have any form as long as it has data having such a function.

The recording circuit 14 processes this encoded data so as to be suitable for recording. Usually, the encoded data is divided into fixed sizes to generate recording blocks, the error correction encoding process is performed for each recording block, and the modulation suitable for recording is performed. The output of the recording circuit 14 is recorded on the recording medium 16 by the recording head 15.

Next, FIG. 7 shows a configuration of a video reproducing apparatus for decoding and reproducing the video signal coded and recorded by the above operation. 7, the same parts as those in FIG. 1 or the corresponding parts are denoted by the same reference numerals, and detailed description thereof will be omitted.
Further, 70 is a reproducing head, 71 is a reproducing circuit, 72 is a decoder, and 73 is an inverse array device.

The video reproducing apparatus as described above decodes and reproduces the data recorded on the recording medium 16 in the reverse order of the above-mentioned video recording apparatus. That is, the reproducing head 70
However, when the data is read from the recording medium 16, the reproduction circuit 7
1 combines the recording blocks to restore the encoded data. The restored encoded data is decoded by the decoder 72.
By performing a decoding operation that is the reverse of the operation of the high-efficiency encoder 12, one frame shown in FIG. 2A is restored.

Further, the reconstructed one frame is rearranged into macroblocks in the reverse sequencer 73 in the reverse procedure of the blocker 11 so that the original one-screen video signal shown in FIG. Is reproduced and output to a circuit in the subsequent stage or a device such as a display.

By the way, when the video signal is decoded and reproduced by the above-mentioned video reproducing apparatus, the data may not be reproduced correctly depending on the state of the recording medium 16.
Although some error is corrected to correct data by error correction processing, reproduction data that cannot be corrected becomes an error in units of macroblocks. The variable-length coded data cannot be completely decoded unless they are correctly decoded word by word.

First, in decoding a video signal in one frame, if data continuity is interrupted due to an error during decoding, subsequent macroblock data cannot be decoded. However, header information is added in units of groups at the time of encoding, and error correction is performed using this header information. Therefore, the propagation of this error is reset in units of groups, and macroblocks in groups after the group containing the error are reset. Is successfully decoded.

Next, the case of error propagation in decoding a video signal between frames will be described in detail with reference to FIG.
FIG. 4 is a diagram showing a reproduction screen at the time of error.

FIG. 4A shows a state of error propagation at the time of reproduction when encoded by the conventional grouping method,
It is assumed that the group is composed of 9 macroblocks. First, since an error occurred in the I frame used as the reference screen, one group has an error.

Next, when a P frame that has been subjected to interframe predictive coding is decoded using this I frame as a reference screen, an error propagates to the macroblock of the P frame that refers to this error group. In addition, in FIG.
For simplicity, it is assumed that the search range of the motion vector is recorded as ± 15 pixels. It is possible to refer to the error group generated in the I frame by the 9 macroblocks (indicated by the shaded portions in the figure) of the P frame at the same position as the error group and the surrounding macroblocks. Therefore, there is a possibility of error propagation to 33 macroblocks as shown in FIG.

On the other hand, FIG. 4 (b) shows a state of error propagation at the time of reproduction when the coding is performed using the grouping means of this embodiment. For comparison with the conventional method, the group structure is set to 9 macroblocks as in the conventional method. As shown in FIG. 4B, one group of 3 × 3 macroblocks is in error during reproduction of an I frame.

Next, when a P frame that has been interframe predictive coded is decoded using this I frame as a reference screen, an error propagates to the macroblock of the P frame that refers to this error group. Further, it is assumed that the motion vector search range is recorded as ± 15 pixels as in the conventional method. It is possible to refer to the error group generated in the I frame by the 9 macroblocks (indicated by the shaded portions in the figure) of the P frame at the same position as the error group and the surrounding macroblocks. Therefore, there is a possibility of error propagation to 25 macroblocks as shown in FIG. That is, in the present embodiment, even if an error occurs in a group including the same number of macroblocks as in the conventional example in a certain I frame, it is possible to refer to this error group for P frames and B frames. The number of macroblocks is
Less than the conventional example. Therefore, the effect of error propagation between frames is reduced.

As described above, according to the first embodiment of the present invention, error propagation during reproduction can be performed only by performing simple control for rearranging macroblocks before performing high efficiency encoding. It can be suppressed to a smaller area than before.

In the above description, the group of macroblocks of K rows × L columns is assumed to have K = 3 and L = 3, but if both K and L are integers of 2 or more, Any value can be used.

Note that the macroblock is composed of four orthogonal transform blocks for luminance signals and two orthogonal transform blocks for color difference signals, but may have another configuration.
The present invention can be applied to any configuration.

[0069] Incidentally, it is assumed the order of macro blocks in the order and group of the group as shown in FIG. 2, can be set in any order in advance.

(Second Embodiment) Next, the operation of the video recording apparatus according to the second embodiment of the present invention will be described.

In the video recorder according to the present embodiment, in the blocker 11, the order of K × L blocks in the group is always the adjacent block order from one end to the other end in the group area. As described above, the video signals are arranged in order, and the video signals are rearranged and output according to the order. The configuration of the video recording apparatus according to this embodiment is the same as that of the first embodiment, and the operation of the blocker 11 in FIG. 1 is different. The different operations will be described below.

FIG. 5 is a diagram showing the order of arrangement of macroblocks grouped by the blocker 11 of the video recording apparatus according to this embodiment. Here, it is assumed that one group is composed of 3 × 3 macroblocks (K = 3 and L = 3). As shown, each macroblock in the group is ordered according to a specific rule (M1 to M9). In other words, the macro block located in the upper left corner of the group area is the first, and the adjacent macro blocks are always selected and numbered in order toward the lower right corner.

The blocker 11 rearranges the macroblocks according to this order and outputs the rearranged circuits to the subsequent circuit. The high-efficiency encoder 12 has the same configuration as the video recording device according to the first embodiment, and the detailed configuration is as shown in FIG. In particular, when the variable-length coding circuit 113 incorporates a motion vector into the quantized data and outputs the encoded data, the method of incorporating the motion vector is set to a difference value from the motion vector of the immediately preceding macroblock block in the group. In the case of variable length coding and incorporation, the macroblocks are rearranged according to the rules described above, so that the data amount can be compressed more efficiently. That is, since the video signal has a two-dimensional correlation in the horizontal direction and the vertical direction, the motion vectors of the two-dimensionally adjacent macroblocks often have a correlation.

For example, if the transmission is performed in the order shown in FIG. 2B, the positions of the macroblock of M3 and the macroblock of M4 are distant from each other, and the correlation is weakened. Therefore, an efficient compression method such as variable length coding of the motion vector difference becomes ineffective.

On the other hand, as in the present embodiment shown in FIG. 5, rearrangement is performed so that macro blocks whose assigned numbers are consecutive are adjacent to each other, so that the correlation of the video signals is more effective. Can be used for data compression.

As described above, according to the second embodiment, in addition to the effect of suppressing the error propagation and the effect of making the image quality deterioration due to the error visually inconspicuous, as in the first embodiment. Further, it is possible to easily improve the compression efficiency.

In the above description, it is assumed that a group of macro blocks of K rows × L columns has K = 3 and L = 3. However, if both K and L are integers of 2 or more, Any value can be used.

It is assumed that the order of the macroblocks in the group is as shown in FIG. 5, but in the area of the group, if the order is such that adjacent macroblocks are always taken from one end to the other end, the other You may add the order.

The order of each group can be freely set in advance.

In each of the above embodiments, the blocker 11 is an example of the block processing means of the present invention, and the high efficiency encoder 12 is an example of the encoding means of the present invention. Further, the group in the embodiment is an example of the macroblock group of the present invention. Also, the decoder 7
2 is an example of the decoding means of the present invention, and the inverse arrayer 73 is an example of the inverse block processing means of the present invention.

Therefore, the present invention is not limited to the video recording apparatus or the video reproducing apparatus as in the above-mentioned embodiment, as long as it can encode or decode the video signal, and the transmitting apparatus, the receiving apparatus and the data transmission can be used. It may be implemented in an apparatus. Further, it may be realized as a single video signal encoding device or a single decoding device.

Further, the present invention allows a computer to execute the functions of all or part of the above-mentioned video encoding device or video decoding device of the present invention (or devices, elements, circuits, sections, etc.). Which is a program that operates in cooperation with a computer.

Further, the present invention is a medium carrying a program for causing a computer to execute all or part of the functions of all or part of the above-mentioned video encoding device or video decoding device of the present invention. And a computer-readable medium in which the read program cooperates with the computer to execute the operation.

Incidentally, a part of the means (or device) of the present invention,
Device, circuit, part, etc.), a part of the steps of the present invention (or,
(Process, action, action, etc.) means some means or steps among those plural means or steps, or a part of a function or a part of one means or steps. It means operation.

A computer-readable recording medium in which the program of the present invention is recorded is also included in the present invention.

Further, one usage form of the program of the present invention may be a mode in which the program is recorded on a computer-readable recording medium and operates in cooperation with the computer.

Further, one usage form of the program of the present invention may be a mode in which the program is transmitted in a transmission medium, read by a computer, and operates in cooperation with the computer.

Further, the recording medium includes a ROM and the like, and the transmission medium includes the Internet, a transmission mechanism such as an optical fiber, and light / radio waves / sound waves.

The computer of the present invention described above is
The hardware is not limited to pure hardware such as a CPU, and may include firmware, an OS, and peripheral devices.

As described above, the configuration of the present invention may be realized by software or hardware.

[0091]

As described above, according to the present invention, macroblocks can be grouped very efficiently, an effect of suppressing error propagation at the time of reproduction can be obtained, and image quality deterioration due to a visual error can be obtained. The effect of making it less noticeable is obtained.

Furthermore, the correlation of video signals can be further utilized,
The effect that the compression efficiency can be improved is obtained.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of a video recording device according to a first embodiment of the present invention.

FIG. 2 (a) is a diagram for explaining the operation of the blocker 11 according to Embodiment 1 of the present invention. (B) Blocking device 11 according to the first embodiment of the present invention
FIG. 7 is a diagram illustrating the operation of FIG. (C) Blocking device 11 according to the first embodiment of the present invention
FIG. 7 is a diagram illustrating the operation of FIG.

FIG. 3 is a block diagram showing a detailed configuration of a high efficiency encoder 12 according to the first embodiment of the present invention.

FIG. 4A is a diagram showing a state of error propagation between frames in the conventional technique. FIG. 6B is a diagram showing a state of error propagation between frames in the first embodiment of the present invention.

[Fig. 5] Fig. 5 is a diagram for explaining a group configuration according to the second embodiment of the present invention.

FIG. 6 is a blocker 1 according to Embodiment 1 of the present invention.
It is a figure explaining operation | movement of 1.

FIG. 7 is a diagram showing a configuration of a video reproduction device according to the first embodiment of the present invention.

[Explanation of symbols]

10 Video input terminal 11 Blocker 12 High efficiency encoder 13 Header adder 14 Recording circuit 15 recording head 16 recording media 110 subtractor 111 Orthogonal transformation circuit 112 Quantization circuit 113 variable length coding circuit 114 inverse quantization circuit 115 Inverse Orthogonal Transform Circuit 116 adder 117 memory 118 motion compensation circuit 119 switch

   ─────────────────────────────────────────────────── ─── Continued front page    (72) Inventor ▲ Yoshi ▼ Katsuhiko Ta             1006 Kadoma, Kadoma-shi, Osaka Matsushita Electric             Sangyo Co., Ltd. F-term (reference) 5C053 FA21 GA11 GB15 GB22 GB26                       GB30 GB32 HB10 KA04                 5C059 KK01 LC08 MA04 MA05 MA21                       MC11 NN01 NN21 RB02 RB09                       RC16 RC38 RC40 RF13 RF19                       SS11 SS20 UA02 UA05 UA33                       UA38 UA39                 5J064 AA02 BA09 BA13 BB05 BC08                       BC16

Claims (9)

[Claims] 1. An input of a video signal for one screen is divided into macroblock units to which predetermined numbers are sequentially assigned,
The K (rows) × L (columns) of the macroblocks occupying the one screen are defined as one macroblock group,
A block processing unit that processes the video signal for one screen in units of this macroblock group, and performs intraframe coding or interframe predictive coding on the video signal in the macroblock unit based on the macroblock group unit. And a coding unit for obtaining coded data, wherein the macroblock group is a range of error propagation between the macroblocks in the group. 2. The video encoding device according to claim 1, wherein the order of arranging K × L macroblocks in the group is such that macroblocks in which the predetermined numbers are consecutive are adjacent to each other. 3. Decoding means for decoding the coded data obtained by the video coding apparatus according to claim 1 to obtain the video signal in the macroblock unit, and the decoding unit based on the macroblock group unit. A video decoding device, comprising: a reverse block processing means for rearranging the video signals in macroblock units obtained by the means in an order of forming the one screen. 4. The input of a video signal for one screen is divided into macroblock units to which predetermined numbers are sequentially assigned,
The K (rows) × L (columns) of the macroblocks occupying the one screen are defined as one macroblock group,
A step of processing the video signal for one screen in units of the macroblock groups; and coding by performing intraframe coding or interframe predictive coding on the video signals in the macroblock units based on the macroblock group units. Obtaining data, wherein the macroblock group is a range of error propagation between the macroblocks in the group. 5. A step of decoding the coded data obtained by the video coding method according to claim 4 to obtain a video signal in units of the macroblocks, and the decoding means based on the unit of the macroblocks. And a step of rearranging the obtained video signals in units of macroblocks in the order of forming the one screen. 6. The video encoding device according to claim 1, wherein an input of a video signal for one screen is divided into macroblock units to which predetermined numbers are sequentially assigned, and K (1) occupies the one screen. 1) of the above macroblocks of (rows) × L (columns)
As one macroblock group, block processing means for processing the video signal for one screen in units of the macroblock group, and intraframe coding or frame processing for the video signal in the macroblock unit based on the macroblock group unit. A program for causing a computer to function as all or part of an encoding unit that performs inter-prediction encoding to obtain encoded data. 7. Decoding means of the video decoding device according to claim 3 for decoding the coded data obtained by the video coding device according to claim 1 to obtain the video signal in units of macroblocks. , Based on the macroblock group unit,
A program for causing a computer to function as a whole or a part of an inverse block processing means for rearranging the video signal of the macro block unit obtained by the decoding means in an order of forming the one screen. 8. The video encoding device according to claim 1, wherein an input of a video signal for one screen is divided into macroblock units to which a predetermined number is sequentially assigned, and K (1) occupies the one screen. 1) of the above macroblocks of (rows) × L (columns)
As one macroblock group, block processing means for processing the video signal for one screen in units of the macroblock group, and intraframe coding or frame for the video signal in the macroblock unit based on the macroblock group unit A medium carrying a program for causing a computer to function as all or part of an encoding means for performing inter-prediction encoding to obtain encoded data, characterized by being processable by the computer. 9. Decoding means of the video decoding device according to claim 3 for decoding the coded data obtained by the video coding device according to claim 1 to obtain the video signal in macroblock units. , Based on the macroblock group unit,
A medium carrying a program for causing a computer to function as the whole or a part of the inverse block processing means for rearranging the video signal of the macroblock unit obtained by the decoding means in the order of forming the one screen. A medium that can be processed by a computer.