JP2003007910A - Semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device which is small in size and low in height and is light-weight and has a built-in matching circuit for an active element and has a high yield and is low-cost. SOLUTION: A second substrate 7 is mounted on one face 6a of a first substrate 6, and the second substrate 7 is sealed with a resin 9 with a part of an electrode member 8a formed on one face 6a of the first substrate 6 being exposed. Due to this structure, the semiconductor device can be guaranteed for final characteristics after being incorporated into a device substrate just by a final inspection of a single body before being incorporated into the device substrate. Furthermore, handling during the secondary mounting and a mounting reliability can also be satisfied.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device used in a device that handles high frequency signals.

[0002]

2. Description of the Related Art In recent years, in devices for handling microwave and millimeter wave bands such as mobile phones, semiconductor devices such as those disclosed in Japanese Patent Laid-Open No. 8-255965 have been developed in order to shorten the development and product cycles. Is mounted on the device substrate to construct an intended electric circuit.

This is because the semiconductor device A is secondarily mounted on the device substrate B via the solder balls 1 as shown in FIGS. 18 (a) and 18 (b) and sealed in the gap as shown in FIG. 18 (c). Stop resin 2
Is filled and assembled.

This semiconductor device A is generally called a module, and after the devices 4 and 5 are flip-chip mounted (or face-up mounted) on the substrate 3, they are connected by wire bonding to form an electric circuit. Has been done.

[0005]

The semiconductor device A is
At the stage of the primary mounting before mounting on the device substrate B, the final characteristic inspection is performed in the on-wafer state through the pads provided on the substrate 3, and the subsequent characteristic inspection is not performed. After that, as shown in FIGS. 18B and 18C, they are assembled in the secondary mounting to form a final assembly.

However, in such an assembly, after the final characteristic inspection, the solder balls 1 are mounted on the device substrate B, and the sealing resin 2 is used for sealing. In an assembly handling a high-frequency signal such as a wave, the performance of the final characteristic inspection described above does not always match the characteristic of the final form, and it is difficult to guarantee the final characteristic.

Further, the semiconductor device A includes the device 4,
Since the substrate 3 on which 5 is mounted is secondarily mounted on the device substrate B before being resin-sealed, resin sealing is not performed at the time of secondary mounting, and the handling and mounting reliability at the time of secondary mounting are improved. There's a problem.

Further, in the usage state where the secondary mounting is completed,
Since the periphery of each of the devices 4 and 5 is sealed with resin, the heat generated by the active elements of the devices 4 and 5 is poorly radiated, and there is a problem in using the semiconductor device having a large output.

The present invention has a structure capable of guaranteeing the final characteristics after the device is mounted on the device substrate only by performing a final inspection by itself before the device is mounted on the device substrate, and also satisfies the handling and mounting reliability during the secondary mounting. An object of the present invention is to provide a semiconductor device having a structure capable of achieving the above.

It is another object of the present invention to provide a semiconductor device having a structure in which heat dissipation generated by an active element or the like is good.

[0011]

According to a first aspect of the present invention, a semiconductor device is formed on a first substrate and a second substrate by mounting a second substrate in parallel on one surface of a first substrate with their surfaces facing each other. A semiconductor device in which an electric circuit is formed by connecting the formed circuits, and an electrode member electrically connected to the electric circuit of the first substrate is provided on the one surface of the first substrate, and a part of the electrode member is exposed. In this state, a part or the whole of the one surface of the first substrate is sealed with resin.

According to a second aspect of the present invention, in the first aspect, the electric circuit of the first substrate and the electrode member are connected by a wiring pattern.

According to a third aspect of the present invention, in the semiconductor device according to the first or second aspect, the electric circuit formed on the first substrate is composed of a passive element of an active element and a passive element. Characterize.

According to a fourth aspect of the present invention, in the semiconductor device according to the first aspect or the second aspect, the electric circuit formed on the second substrate is composed of an active element or an active element and a passive element. To do.

According to a fifth aspect of the present invention, in the semiconductor device according to the fifth aspect, one surface of the first substrate is opposed to one surface of the second substrate, and the second substrate is mounted in parallel on the first substrate. A semiconductor device in which formed circuits are combined to form an electric circuit, wherein an electrode member formed of a conductor and electrically connected to the circuit of the first substrate is provided on the one surface of the first substrate, and the second substrate is provided. The one surface of the first substrate is partially or entirely sealed with a resin while exposing the other surface opposite to the one surface and exposing a part of the electrode member.

A semiconductor device according to a sixth aspect of the present invention is characterized in that, in the fifth aspect, a heat dissipation layer having a good thermal conductivity is provided on the exposed other surface of the second substrate. A semiconductor device according to a seventh aspect of the present invention is the semiconductor device according to the sixth aspect, wherein a via hole is provided in the second substrate.

The semiconductor device according to claim 8 of the present invention is the semiconductor device according to claim 1 or 2, wherein a heat dissipation layer having a good thermal conductivity is provided on the other surface of the second substrate opposite to the one surface thereof. A heat conducting member having a good heat conductivity is provided on the heat dissipation layer, and a part or the whole of the one side of the first substrate is sealed with a resin with a part of the electrode member and a part of the heat conducting member exposed. It is characterized by having stopped.

According to a ninth aspect of the present invention, in the semiconductor device according to the eighth aspect, the second substrate is provided with a via hole connected to the heat dissipation layer. Claim 1 of the present invention
0 is a semiconductor device according to any one of claims 1 to 9.
A heat dissipation layer having a good thermal conductivity is provided on the other surface of the first substrate opposite to the one surface.

A semiconductor device according to claim 11 of the present invention is
In claim 10, a via hole connected to the heat dissipation layer is provided on the first substrate. A semiconductor device according to claim 12 of the present invention is the semiconductor device according to claim 1 to claim 1.
1, the first substrate has a multilayer structure.

A semiconductor device according to claim 13 of the present invention is
In any one of claims 1 to 12, a passive element is formed or mounted on the other surface of the first substrate opposite to the one surface.

A semiconductor device according to claim 14 of the present invention is
In any one of claims 1 to 13, a chip active element is mounted on the other surface of the first substrate opposite to the one surface.

A semiconductor device according to claim 15 of the present invention is
The device according to claim 10, wherein the first substrate is connected to at least one of a circuit formed on the other surface of the first substrate opposite to the one surface and a formed element or a mounted element. The feature is that a via hole is provided.

A semiconductor device according to claim 16 of the present invention is
The electrode member or the heat conducting member according to any one of claims 1 to 9, wherein the electrode member or the heat conducting member has a ball-shaped metal or alloy such as gold, silver, copper, platinum or the like as a core, and a conductive material plated on the surface thereof It is characterized by being

A semiconductor device according to claim 17 of the present invention is
A semiconductor device in which a second substrate is mounted in parallel on one surface of a first substrate with the surfaces thereof facing each other and the circuits formed on the first and second substrates are combined to form an electric circuit. An electrode connected to the second substrate side through a via hole formed in the first substrate is provided on the other surface opposite to the one surface of the first substrate, and the electrode of the first substrate is covered so as to cover the second substrate. It is characterized in that a part or the whole of one side is sealed with a resin.

A semiconductor device according to claim 18 of the present invention is
The first substrate on the other surface of the first substrate according to claim 17,
It is characterized in that an electrode member electrically connected to the circuit of the substrate is provided.

[0026]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to FIGS. (Embodiment 1) FIGS. 1 to 3 show (Embodiment 1) of the present invention.

A semiconductor device A according to the first embodiment of the present invention
As shown in FIG. 1, the second substrate 7 is mounted in parallel on one surface 6a of the first substrate 6 with the surfaces facing each other.
A semiconductor device in which electric circuits formed on substrates 6 and 7 are combined to form an electric circuit, the one side 6 of a first substrate 6 being provided.
A ball 8a serving as an electrode member electrically connected to the electric circuit of the first substrate 6 is provided on the surface a, and the entire one surface 6a of the first substrate 6 is sealed with a resin with a part of the ball 8a exposed. It is configured by sealing with 9.

The first substrate 6 is made of a base material such as semiconductor, glass, quartz and sapphire, and the pad 10a is formed on the one surface 6a by a semiconductor process. The pad 10a includes passive elements such as an inductor, a capacitor, a resistor and a filter, wiring, the outside and the second substrate 7.
Formed for interfacing with.

The second substrate 7 is made of a semiconductor such as GaAs or Si and has a surface 7a facing the one surface 6a of the first substrate 6.
Has a pad 1 for interfacing with the first substrate 6.
0b is formed by a semiconductor process, and in addition, the bump electrode 11 is formed on the pad 10b. Further, active elements such as FETs and BJTs and wirings are formed on the surface 7a of the second substrate 7.

FIG. 2 shows the semiconductor device A configured so as to be used as a front end portion of a general radio device, and includes an LNA block 12 and an interstage filter block 1.
3, including a mixer block 14.

Here, the FET 15 for LNA and the dual gate FET 16 for mixer, which are within the dotted line on the circuit diagram, are formed on the second substrate 7, and the others are the inductor and the capacitor formed on the first substrate 6. , Passive elements such as resistors and filters, and wiring.

Incidentally, the black square marks 15a to 15c, 16
Reference numerals a to 16d denote interface portions between the first substrate 6 and the second substrate 7, and structurally connect the protruding electrodes by soldering or the like. The white circle mark indicates the RF input terminal 1
7, the Lo input terminal 18, the IF output terminal 19, and the power supply connection terminal 20, which is an interface portion with the outside including the ground G, and is all configured by the ball 8a mounted on the first substrate 6. ing.

The semiconductor device A having such a configuration is shown in FIG.
As shown in FIG. 3A, a first aggregate substrate 60 is formed as a repeating pattern of the first substrate 6, and as shown in FIG. 3B, a second aggregate substrate is formed as a repeating pattern of the second substrate 7. A substrate 70 is prepared.

In the second collective substrate 70, the surface 70b, which is the surface 7b opposite to the surface 7a, is polished in advance, and the protruding electrodes 11 are formed on each pad 10b of the surface 7a. After the two substrates 7 are divided, they are arranged on the first collective substrate 60 by flip-chip mounting as shown in FIG. Flip-chip connection is performed by a solder connection method, a method using an anisotropic conductive film, or the like.

Further, as shown in FIG. 3D, the ball 8a is mounted on the first aggregate substrate 60 by solder reflow to electrically and mechanically connect to the pad 10a of the first substrate 6.
When connecting the first substrate 6 and the second substrate 7 with solder,
At this time, it is also possible to perform solder connection at once.

The ball 8a is selected to have a diameter larger than the total thickness of the second substrate 7 and the bump electrode 11. Next, as mechanical protection of the first substrate 6, as shown in FIG. 3E, a part of the balls 8 a is exposed and the entire surface (or part) of the first collective substrate 60 is sealed with the sealing resin 9. It is formed by sealing and dividing and cutting into individual semiconductor devices along dicing lines as shown in FIG.

By adjusting the resin surface in this way,
It is possible to interface with the outside through the ball 8a. Finally, the semiconductor device is obtained by cutting along the dicing line 21.

With this structure, the semiconductor device in the completed state is sealed with the sealing resin 9 so as to seal the mounting portion of the second substrate on the first substrate 6 as shown in FIG. Compared with a form in which a ceramic package covers both sides of one substrate 6, the size is small and the height of parts is low,
Can be lightened.

Further, an active element is mounted on the second substrate 7,
A matching circuit for an active element is built in by forming a passive element such as an inductor, a thin film resistor and a MIM capacitor, and a functional element such as a filter by a semiconductor process on a first substrate 6 which is a separate substrate from the second substrate 7. Functional elements such as filters can also be built in, and active elements with low yields and passive elements with high yields are formed on different substrates, and both are assembled after inspection, resulting in a high total yield, which is achieved by using a semiconductor process. With the accuracy, the ball for the interface is connected, the resin-sealed form becomes the final form, and inspection in the final form is possible, so the final total characteristics can be guaranteed and handling during secondary mounting is possible. The semiconductor device can be easily and highly reliable.

Here, the ball 8a is a conductor such as a metal that does not melt at the reflow temperature at the time of primary mounting for assembling the first substrate 6 and the second substrate 7 and at the reflow temperature at the time of mounting the completed semiconductor device on the device substrate. By doing so, the ball 8a does not melt during the secondary mounting, so that stable mounting can be performed.

As a specific example of the ball 8a, a ball-shaped metal or alloy such as gold, silver, copper, platinum or the like, or a resin having its surface plated with a conductive material can be used. (Embodiment 2) FIG. 4 shows (Embodiment 2) of the present invention.

In the semiconductor device of (Embodiment 1) shown in FIG. 1, the surface 7b of the second substrate 7 is covered with the sealing resin 9. However, in the semiconductor device of (Embodiment 2), The difference is that the surface 7b of the second substrate 7 is exposed from the sealing resin 9.

In the semiconductor device having the shape shown in FIG. 4, for example, as shown in FIG. 3E in (Embodiment 1), the collective substrate 70 which has not been divided after the sealing is completed is divided into the second substrate 7. It can be manufactured by polishing the tip of the ball 8a and the sealing resin 9 so as to expose the surface 7b, and then dividing.

With this structure, when the semiconductor device is mounted on the device substrate, the surface 7 of the second substrate 7 is formed.
Since b directly contacts the device substrate to be secondarily mounted, the heat generated from the active element formed on the second substrate 7 can be efficiently radiated to the device substrate.

(Embodiment 3) FIG. 5 shows (Embodiment 3) of the present invention. In the semiconductor device of (Embodiment 2) shown in FIG. 4, the surface 7b of the second substrate 7 is only exposed from the sealing resin 9, but the semiconductor device having the shape shown in FIG. Further, a metal layer 22 as a heat dissipation layer having a good thermal conductivity is formed on the surface 7b of the second substrate 7 by vapor deposition, plating or the like.

With this structure, the surface 7 of the second substrate 7
b can be connected to the device substrate by soldering or the like, and the heat generated from the active element formed on the second substrate 7 can be more efficiently radiated to the device substrate secondarily mounted.

(Embodiment 4) FIG. 6 shows (Embodiment 4) of the present invention. In addition to the structure of (Embodiment 3) shown in FIG. 5, a via hole 23 is previously formed in the second substrate 7. Has been created.

With this structure, the surface 7 of the second substrate 7
The active element formed in a can be connected to the device substrate through the via hole 23 and the metal layer 22 without passing through the ball 8b, so that stronger grounding can be performed and the characteristics can be improved.

(Fifth Embodiment) FIG. 7 shows (Fifth Embodiment) of the present invention. In the semiconductor device of (Embodiment 1) shown in FIG. 1, the surface 7b of the second substrate 7 is covered with the sealing resin 9. However, in the semiconductor device of (Embodiment 5),
A metal layer 22 as a heat dissipation layer having good thermal conductivity is formed on the surface 7b of the substrate 7 by vapor deposition, plating or the like, and a ball 24 as a heat conducting member having good thermal conductivity is provided on the metal layer 22. The first substrate 6 is provided with the sealing resin 9 so that the balls 24 and 8a are partially exposed.

At this time, the vertices of the balls 8a mounted on the first substrate 6 and the balls 24 mounted on the second substrate 7
So that the heights of the vertices of the balls are about the same.
Select the size of. At this time, the sealing resin surface is the second
The surface 7b of the substrate 7 is buried, but the balls 8a and 24 are partially exposed.

With this configuration, when the semiconductor device is mounted on the device substrate, the heat generated from the active element formed on the second substrate 7 is efficiently transferred to the device substrate via the metal layer 22 and the balls 24. Can dissipate heat.

As specific examples of the balls 8a, 24, ball-shaped metal or alloy such as gold, silver, copper, platinum or the like, or resin whose core is plated with a conductive material can be used.

(Embodiment 6) FIG. 8 shows (Embodiment 6) of the present invention. In addition to the configuration of (Fifth Embodiment) shown in FIG. 7, a via hole 25 is formed in the second substrate 7 in advance. Also, the balls 24 are electrically conductive.

With this structure, the surface 7 of the second substrate 7
The grounding of the active element formed in a is not via the ball 8a, but via the via hole 25 and the metal layer 22 to the ball 24.
Since it can be connected to the device substrate, the grounding can be performed more firmly, leading to improvement in characteristics.

(Embodiment 7) FIG. 9 shows (Embodiment 7) of the present invention. This FIG. 9 shows a heat dissipation layer having a good thermal conductivity by vapor deposition, plating or the like on the other surface 6b of the first substrate 6 of the semiconductor device shown in FIG. 1 opposite to the one surface 6a. And a via hole 27 connected to the metal layer 26 is formed in the first substrate 6.

With this configuration, the heat generated from the active element formed on the second substrate 7 can be efficiently radiated from the metal layer 26 via the via hole 27. In addition, when the metal layer 26 is conductive, the metal layer 2 is formed after the secondary mounting.
By connecting 6 to the ground of the device substrate, the ground of the active element formed on the second substrate 7 can be directly connected to the device substrate without passing through the ball 8a, and a good ground state is obtained. It is possible to improve the high frequency characteristics.

As described above, a layer satisfying at least one of good thermal conductivity and conductivity is formed on the surface 6b of the first substrate 6, and the via hole 27 connected to the layer is formed on the first substrate 6. Providing the same effect can be expected by implementing in each of the above-described embodiments.

(Embodiment 8) The first substrate 6 in each of the above embodiments is a single-layer substrate, but in this embodiment,
The first substrate 6 is a multi-layer substrate.

Specifically, the case of (Embodiment 1) will be described as an example. As shown in FIG. 10, passive elements such as capacitors, inductors and filters can be formed in the inner layer,
More passive elements can be formed than forming passive elements only on the surface 6a of the first substrate 6.

(Embodiment 9) The components are not mounted on the surface 6b of the first substrate 6 of each of the above embodiments, but in this embodiment, the components are also mounted on the surface 6b of the first substrate 6. Has been done.

Specifically, the case of (Embodiment 7) will be described by way of example, as shown in FIG.
By forming or mounting active components 28 such as capacitors, inductors, resistors, and filters on the surface 6b, the passive elements are mainly formed only on the surface 6a of the first substrate 6 without hindering reduction in size and weight. Therefore, many passive elements can be formed.

(Embodiment 10) In the first substrate 6 of each of the above embodiments, no component is mounted on the surface 6b.
In this embodiment, components are also mounted on the surface 6b of the first substrate 6.

Specifically, the case of (Embodiment 7) will be described by way of example, as shown in FIG.
By providing a land capable of component mounting on the surface 6b and mounting the chip component 29, the inductance and capacitance of the spiral inductor, MIM capacitor, etc. formed by pattern formation on the first and second substrates 6 and 7 are large. In this case, it is possible to avoid an increase in the size of the first substrate 6 and an accompanying increase in cost.

(Embodiment 11) Although only the active element is mounted on the second substrate 7 in each of the above-described embodiments, a passive element may be mounted together. Also, FET1 for LNA
5 and the dual gate FET 16 for the mixer are formed on one second substrate, but they are formed on different second substrates, and the two second substrates 7 and 7 are flip-chip mounted on the first substrate 6. You can also do it.

(Embodiment 12) FIGS. 13A to 13C.
(Embodiment 12) of the present invention. In each of the above-described embodiments, the first substrate 6 has the configuration in which the pad 10a is directly electrically connected to the device substrate via the ball 8a.
In this embodiment, as shown in FIG. 13C, the ball 8b is connected to the pad 10a via the rewiring pattern 30.

This is created through FIGS. 13A and 13B. First, as shown in FIG. 13A, the second substrate 7 is covered with the primary resin 9 with the pads 10a of the first substrate 6 exposed.
Then, the rewiring pattern 30 is formed from the pad 10a of the first substrate 6 to the top of the primary resin 9a.
The pad 10c is formed on the other end of the rewiring pattern 30.

Next, in FIG. 13 (b), after further sealing with the secondary resin 9b, a contact hole 31 is formed at the location of the pad 10c to expose it, and as shown in FIG. 13 (c), the pad is formed. A ball 8b is attached to 10c. The ball 8b has conductivity, and the same material as the ball 8a of the above-described embodiment can be used.

The processing shown in FIGS. 13A to 13C is as follows.
As shown in FIG. 3 shown in (Embodiment 1), a collective substrate is processed and then divided into individual semiconductor devices to be manufactured.

(Embodiment 13) FIGS. 14A to 14C.
FIG. 15 shows (Embodiment 13) of the present invention. FIG.
Although the surface 7b of the second substrate 7 is covered with the primary resin 9a in (Embodiment 12) shown in FIG.
In 3), as shown in FIG. 14 (c), the ball 24a as a heat conductive member comes into contact and a part of this ball 24a is exposed from the secondary resin 9b.

This is created through FIGS. 14A and 14B. First, as shown in FIG. 14A, a metal layer 22 is previously formed on the surface 7b of the second substrate 7 by vapor deposition, plating, etc., and a pad 32 to which a ball 24a can be connected is formed at a corresponding portion.
Is formed, the second substrate 7 is sealed with the primary resin 9a in a state where the pad 10a of the first substrate 6 is exposed, and then the rewiring pattern 30 is applied from the pad 10a of the first substrate 6 to the primary resin 9a. And the pad 10c is formed on the other end of the rewiring pattern 30.

Next, in FIG. 14B, after further sealing with the secondary resin 9b, the contact holes 33 are formed at the positions of the pads 10c and 32 to expose the contact holes 33.
As shown in (c), the ball 10b having at least conductivity is attached to the pad 10a, and the ball 24a having at least heat conductivity is attached to the pad 32.

After sealing with the secondary resin 9b, the pads 10c, 3
The holes 2 were opened to mount the balls 8b and 24a,
The ball 24a is sealed with the primary resin 9a after mounting, the ball 8b is sealed with the secondary resin 9b after mounting, and the primary resin 9 is used.
Alternatively, the ball 24a may be mounted by opening after sealing with a, and the ball 8b may be mounted on the rewiring pattern 30 and then sealed with the secondary resin 9b.

The above-described processing of FIGS. 14A to 14C and the like is performed by processing the collective substrate as shown in FIG. 3 shown in (Embodiment 1) and then dividing it into individual semiconductors. It is divided into devices and manufactured.

The sizes of the balls 8b and 24a are selected so that the heights of the vertices of the balls are about the same in the mounted state. Because of this structure, the surface 7 of the second substrate 7
Since b is embedded in the sealing resin, but a part of the ball 24a is exposed, the heat generated from the active element formed on the second substrate 7 can be efficiently radiated to the device substrate secondarily mounted.

Further, as shown in FIG. 15, by forming via holes 34 in the second substrate 7 in advance and using a conductive material for the balls 24a, the active elements formed on the second substrate 7 can be removed. The generated heat can be efficiently dissipated to the device board mounted secondarily, and the active element formed on the surface 7a of the second board 7 is grounded via the ball 8b mounted on the first board 6. Without
It can be directly connected to the device board, more robust grounding can be achieved, and characteristics can be improved.

Here, the balls 8b and 24a are made of a conductor such as a metal that does not melt at the reflow temperature during the primary and secondary mounting, and the balls do not melt during the secondary mounting, so that stable mounting can be performed.

As a concrete example, ball-shaped gold, silver, copper,
It is the same as the other embodiments described above that a metal or alloy such as platinum or a resin having a core as a core and a conductive material plated on the surface can be used.

The types of components mounted on the first and second boards 6 and 7 can be implemented by any of the other embodiments described above. (Embodiment 14) FIGS. 16 and 17 show (Embodiment 14) of the present invention.

In the semiconductor device shown in FIG. 16, the second substrate 7 is mounted in parallel on the surface 6a of the first substrate 6 with the surfaces facing each other, and the electrical devices formed on the first and second substrates 6 and 7 are formed. A semiconductor device in which circuits are combined to form an electric circuit, which is formed on the second substrate 7 through a via hole 35 formed in the first substrate 6 on the other surface 6b opposite to the one surface of the first substrate 6. An electrode 36 to be connected is provided, and part or all of the surface 6a of the first substrate 6 is sealed with a sealing resin 9 so as to cover the second substrate 7.

This semiconductor device is electrically connected to the device substrate by directly connecting the electrodes 36, or is electrically connected to the device substrate through the conductive balls 37 shown by virtual lines. Alternatively, as shown in FIG. 17, a via hole 38 may be formed in the second substrate 7 to form the structure.

[0081]

As described above, according to the present invention, the second substrate is mounted in parallel on one surface of the first substrate with the surfaces thereof facing each other, and the circuits formed on the first and second substrates are combined. An electric circuit is formed, an electrode member electrically connected to the electric circuit of the first substrate is provided on the one surface of the first substrate, and one of the one surface of the first substrate is exposed with a part of the electrode member exposed. Since all parts or the whole is sealed with resin, the final characteristics can be guaranteed after mounting on the device board by just performing a final inspection before mounting it on the device board, and the reliability of handling and mounting during secondary mounting Can be satisfied.

Further, the surface of the second substrate opposite to the surface facing the first substrate is exposed from the resin for sealing, or even if this surface is not exposed, good thermal conductivity can be obtained on this surface. A heat conducting member is brought into contact with the resin, and a part of the heat conducting member is exposed from the resin for sealing, so that the heat generated by the active element or the like formed on the second substrate is satisfactorily radiated. be able to.

[Brief description of drawings]

FIG. 1 is a sectional view of a semiconductor device according to (Embodiment 1) of the present invention.

FIG. 2 is a circuit diagram of the semiconductor device of the same embodiment.

FIG. 3 is a manufacturing process diagram of the semiconductor device of the embodiment.

FIG. 4 is a sectional view of a semiconductor device according to (Embodiment 2) of the present invention.

FIG. 5 is a sectional view of a semiconductor device of (Embodiment 3) of the present invention.

FIG. 6 is a sectional view of a semiconductor device of (Embodiment 4) of the present invention.

FIG. 7 is a sectional view of a semiconductor device according to (Embodiment 5) of the present invention.

FIG. 8 is a sectional view of a semiconductor device of (Embodiment 6) of the present invention.

FIG. 9 is a sectional view of a semiconductor device according to (Embodiment 7) of the present invention.

FIG. 10 is a sectional view of a semiconductor device according to (Embodiment 8) of the present invention.

FIG. 11 is a sectional view of a semiconductor device according to (Embodiment 9) of the present invention.

FIG. 12 is a sectional view of a semiconductor device according to (Embodiment 10) of the present invention.

FIG. 13 is a sectional view of a manufacturing process of a semiconductor device according to (Embodiment 12) of the present invention.

FIG. 14 is a sectional view of a manufacturing process of a semiconductor device according to (Embodiment 13) of the present invention.

FIG. 15 is a sectional view of another example of the same embodiment.

FIG. 16 is a sectional view of a semiconductor device of (Embodiment 14) of the present invention.

FIG. 17 is a sectional view of another example of the same embodiment.

FIG. 18 is a process diagram of mounting a conventional semiconductor device on a device substrate.

[Explanation of symbols]

A semiconductor device 6 First substrate 7 Second substrate 8a ball (electrode member) 9 Sealing resin 22,26 Metal layer (heat dissipation layer) 23,25,27,35 via holes 24, 24a ball (heat conduction member) 28 Passive elements 29 chip active devices 30 Rewiring pattern (wiring pattern) 36 electrodes (electrode members)

Continued front page    (72) Inventor Takehito Kunihisa             1006 Kadoma, Kadoma-shi, Osaka Matsushita Electric             Sangyo Co., Ltd. (72) Inventor Hitoshi Nishida             1006 Kadoma, Kadoma-shi, Osaka Matsushita Electric             Sangyo Co., Ltd.

Claims (18)

[Claims] 1. A semiconductor device in which an electric circuit is formed by mounting a second substrate in parallel on one surface of a first substrate with the surfaces thereof facing each other and connecting the circuits formed on the first and second substrates. Then, an electrode member electrically connected to the electric circuit of the first substrate is provided on the one surface of the first substrate, and a part or the whole of the one surface of the first substrate is exposed with a part of the electrode member exposed. A semiconductor device sealed with resin. 2. The semiconductor device according to claim 1, wherein a wiring pattern connects between the electric circuit of the first substrate and the electrode member. 3. The semiconductor device according to claim 1, wherein the electric circuit formed on the first substrate comprises a passive element of an active element and a passive element. 4. The semiconductor device according to claim 1, wherein the electric circuit formed on the second substrate comprises an active element or an active element and a passive element. 5. An electric circuit in which one surface of a second substrate is opposed to one surface of a first substrate, the second substrate is mounted in parallel on the first substrate, and the circuits formed on the first and second substrates are coupled to each other. A semiconductor device having a first substrate, an electrode member formed of a conductor and electrically connected to a circuit of the first substrate is provided on the one surface of the first substrate, and the other surface of the second substrate opposite to the one surface. A semiconductor device in which a part or the whole of the one surface of the first substrate is sealed with a resin while exposing a part of the electrode member. 6. The semiconductor device according to claim 5, wherein a heat dissipation layer having a good thermal conductivity is provided on the exposed other surface of the second substrate. 7. The semiconductor device according to claim 6, wherein a via hole is provided in the second substrate. 8. A heat dissipation layer having good heat conductivity is provided on the other surface of the second substrate opposite to the one surface, and a heat conduction member having good heat conductivity is provided on the heat dissipation layer. The semiconductor device according to claim 1, wherein a part or the whole of the one surface of the first substrate is sealed with a resin while a part and a part of the heat conducting member are exposed. 9. The semiconductor device according to claim 8, wherein a via hole connected to the heat dissipation layer is provided on the second substrate. 10. A heat dissipation layer having a good thermal conductivity is provided on the other surface of the first substrate opposite to the one surface.
The semiconductor device according to any one of 1. 11. The semiconductor device according to claim 10, wherein a via hole connected to the heat dissipation layer is provided on the first substrate. 12. The semiconductor device according to claim 1, wherein the first substrate has a multilayer structure. 13. A passive element is formed or mounted on the other surface of the first substrate opposite to the one surface.
2. The semiconductor device according to any one of 2. 14. The semiconductor device according to claim 1, wherein a chip active element is mounted on the other surface of the first substrate opposite to the one surface. 15. A via hole connected to at least one of an element formed and a circuit formed on the other surface of the first substrate opposite to the one surface of the first substrate is provided in the first substrate. The semiconductor device according to claim 10. 16. The electrode member or the heat conducting member is formed by plating a ball with a metal or alloy such as gold, silver, copper, platinum or the like, or a resin as a core, and plating a conductive material on the surface thereof. ~ The semiconductor device according to claim 9. 17. A semiconductor device in which a second substrate is mounted in parallel on one surface of a first substrate with the surfaces thereof facing each other and the circuits formed on the first and second substrates are combined to form an electric circuit. Then, an electrode connected to the second substrate side via a via hole formed in the first substrate is provided on the other surface of the first substrate opposite to the one surface, and covers the second substrate. A semiconductor device in which a part or the whole of the one surface of the first substrate is sealed with a resin. 18. The semiconductor device according to claim 17, wherein an electrode member electrically connected to a circuit of the first substrate is provided on the other surface of the first substrate.