JP2002369400A - Device and method for adjusting charged state of battery pack - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a charged-state adjuster for a battery pack for equalizing the terminal voltages of individual unit cells in a short time by suppressing electric energy losses. SOLUTION: While it is determined by a determination means 2d-13 that the degrees of the variations of the terminal voltages of individual unit cells BS1 -BSn are large, individual unit cells BS1 -BSn are connected to a capacitor CB by a capacitor connecting means 2d-11, and the terminal voltages of the unit cells BS1 -BSn are equalized, in a first charged-state adjusting means. While it is determined that the degrees of the variations are not large to the contrary, the unit cells BS1 -BSn are connected to a discharging resistor RB by a resistor connecting means 2d-12, and the terminal voltages of the unit cells BS1 -BSn are equalized, in a second charged-state adjusting means.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an assembled battery which is constituted by connecting a plurality of unit cells each composed of a secondary battery in series and performs charging and discharging in a closed circuit state in which a load and a charger are connected to both ends. The present invention relates to an apparatus and a method for adjusting a state of charge.

[0002]

2. Description of the Related Art For example, in an electric vehicle that runs using an electric motor or a hybrid electric vehicle that runs using both an engine and an electric motor, a secondary battery such as a nickel-hydrogen battery or a lithium battery is used as a unit cell. An assembled battery in which a plurality of these are connected in series is used as a power source for an electric motor.

[0005] In the above-described assembled battery, the voltage across the unit cell based on the state of charge (SOC) varies during repeated charging and discharging. It is known that there is a problem that some unit cells may be overcharged or overdischarged.

In Japanese Patent Application Laid-Open No. Hei 6-319287, a switch of a discharge circuit is opened and closed by a signal output from a logic circuit in accordance with the magnitude of the voltage between both ends of each unit cell, so that the accumulated charge of the unit cell having a high voltage across both ends is obtained. By discharging
It has been proposed that all the unit cells have the same terminal voltage as the unit cell having the lowest terminal voltage to eliminate the variation in the terminal voltage of each unit cell.

Japanese Patent Application Laid-Open No. Hei 8-182216 proposes connecting each unit cell to a capacitor having a predetermined capacitor voltage. This allows
The charge of the unit cell having a voltage higher than the capacitor voltage is transferred to the capacitor, and conversely, the charge of the capacitor is transferred to the unit cell having a voltage lower than the capacitor voltage. That is, since the accumulated charge is transferred from the higher voltage to the lower voltage via the capacitor, the variation in the voltage across the unit cells can be eliminated.

[0006]

However, in the conventional solution proposed in the above-mentioned Japanese Patent Application Laid-Open No. 6-319287, since a unit cell having a high voltage at both ends is discharged, electric energy is wasted. There is a problem.

In this regard, the conventional solution proposed in Japanese Patent Application Laid-Open No. 8-182216, in which a unit cell having a low voltage at both ends is charged with a charge stored in a capacitor by a unit cell having a high voltage at both ends, is disclosed. This is advantageous because electric energy is not wasted.

However, in the conventional solution proposed in Japanese Patent Application Laid-Open No. 8-182216, the voltage across the unit cells is equalized, and if the variation in the voltage across the unit cells is reduced, the capacitor voltage and the unit voltage are reduced. Since the amount of charge transfer decreases as the voltage difference from the voltage across the cell decreases,
There has been a problem that it takes time to complete the uniformity.

Therefore, the present invention focuses on the above-mentioned problems, and, in a short time, suppresses the loss of electric energy and equalizes the voltage between both ends of each unit cell. And a method thereof.

[0010]

According to the first aspect of the present invention, there is provided a power supply apparatus comprising: a plurality of unit cells B _{S1 to} B _Sn comprising a secondary battery, according to the basic configuration shown in FIG. A battery pack state-of-charge adjusting device configured to adjust the state of charge of a battery pack B that performs charging and discharging in a closed circuit state in which a load and a charger are connected to both ends. A capacitor C provided insulated from the charger
_B and a first state-of-charge adjusting means having capacitor connecting means 2d-11 for connecting each unit cell to the capacitor in the open circuit state of the battery pack and equalizing the voltage between both ends of each unit cell; , in the open circuit state of the discharge resistor R _B and the battery pack for discharging the unit cell, by connecting the unit cells to the discharge resistor, the resistor connecting means for equalizing the voltage across each of the unit cells 2d-
12; a second charge state adjusting means having: 12; and a judging means 2d-13 for judging whether or not the degree of variation in the voltage across the unit cells is large.
While it is determined that the degree of variation is large, equalization is performed by the capacitor connection means, and while it is determined to be no, equalization is performed by the resistance connection means. It exists in the charge state adjustment device.

According to the first aspect of the present invention, while the judging means judges that the degree of variation in the voltage across the unit cells is large, the first charge state adjusting means sets the capacitor connecting means to: Each unit cell is connected to a capacitor to equalize the voltage across each unit cell. vice versa,
While the degree of variation is not large and it is determined to be no,
In the second state-of-charge adjusting means, the resistance connection means connects each unit cell to the discharge resistor to equalize the voltage across each unit cell.

Therefore, while the degree of variation of each unit cell is large, equalization is performed by the capacitor connecting means, so that electric energy is not wasted by the discharge resistor. Also, while the degree of variation of each unit cell is not large, the equalization by the capacitor connecting means takes a long time for equalization because the amount of movement of electric charge is small, but in the present invention, the degree of variation of each unit cell is small. Unless the voltage is not large, the equalization is performed by the resistance connection means, so that the voltages at both ends of each unit cell can be equalized in a short time. Further, since the degree of variation is small, the electric energy consumed by the discharge resistor is small.

According to a second aspect of the present invention, according to the basic configuration diagram of FIG. 1, the charge state adjusting device for an assembled battery according to the first aspect, wherein the capacitor and the discharge resistor are connected to a first connection point. a switch means 2 provided in parallel between c1 and a second connection point c2 for connecting a plus terminal of each unit cell to the first connection point and a minus terminal to the second connection point.
b, a first switch element S _C1 provided in series with the capacitor between the first and second connection points, and a series connection with the discharge resistor between the first and second connection points. And a second switch element S _C2 provided on the first side, and the capacitor connection unit performs on / off control of the switch unit in a state where the first switch element is on, so that each of the unit cells is connected. Connected to the capacitor, the resistance connection means performs on-off control of the switch means in a state where the second switch element is on-controlled,
The present invention resides in an apparatus for adjusting the state of charge of a battery pack, wherein each of the unit cells is connected to the discharge resistor.

According to the second aspect of the present invention, the capacitor and the discharge resistor are connected between the first connection point and the second connection point.
It is provided in parallel. A switch connects the plus terminal of each unit cell to the first connection point and connects the minus terminal to the second connection point. A first switch element is provided between the first and second connection points in series with the capacitor.
A second switch element is provided between the first and second connection points in series with the discharge resistor. In the above configuration,
Each unit cell can be connected to a capacitor by performing on / off control of the switch unit in a state where the capacitor connection unit controls the first switch element. Also,
If the resistance connection means performs on / off control of the switch means in a state where the second switch element is on-controlled, each unit cell can be connected to the discharge resistor.

Therefore, the capacitor connection means and the resistance connection means can also serve as the switch means, and there is no need to separately provide a switch means for connecting each unit cell to a capacitor or a discharge resistor.

According to a third aspect of the present invention, there is provided the charge state adjusting device for an assembled battery according to the first or second aspect according to the basic configuration diagram of FIG. 1, wherein each of the unit cell voltages is detected. Voltage detecting means 2d-14, wherein the determining means determines a degree of variation when a difference between a maximum terminal voltage and a minimum terminal voltage among the terminal voltages detected by the voltage detecting means is a predetermined value or more. Is determined to be large, and while the difference between the maximum terminal voltage and the minimum terminal voltage is smaller than the predetermined value, it is determined not to be present.

According to the third aspect of the invention, the voltage detecting means detects the voltage across each unit cell. The determining means determines that the degree of variation is large while the difference between the maximum terminal voltage of each of the terminal voltages detected by the voltage detecting means and the minimum terminal voltage is a predetermined value or more, and determines that the maximum terminal voltage is If the difference from the minimum terminal voltage is smaller than a predetermined value, it is determined to be no.

Accordingly, while the difference between the maximum terminal voltage and the minimum terminal voltage of each unit cell is equal to or greater than a predetermined value, equalization is performed by the first state-of-charge adjusting means, so that large electric energy is wastefully consumed. Never be. Further, while the difference between the maximum terminal voltage and the minimum terminal voltage of each unit cell is smaller than a predetermined value, equalization is performed by the second state-of-charge adjusting means. Equalization can be achieved.

According to a fourth aspect of the present invention, as shown in the basic configuration diagram of FIG. 1, there is provided the charge state adjusting device for an assembled battery according to the second aspect, wherein the first and second connection points are provided between the first and second connection points. A signal output unit 2c provided to output a voltage signal according to a voltage between both ends of the unit cell connected to the both ends thereof; and performing on / off control of the switch unit to obtain one of the unit cells.
And a voltage detecting means 2d-14 for detecting the voltage between both ends of each of the unit cells, wherein the judging means comprises a maximum of the voltage between both ends detected by the voltage detecting means. The difference between the terminal voltage and the minimum terminal voltage is
The difference between the maximum terminal voltage and the minimum terminal voltage is determined to be large during the predetermined value or more, and the difference is determined to be negative while the difference between the maximum terminal voltage and the minimum terminal voltage is smaller than the predetermined value. It exists in the charge state adjustment device.

According to the fourth aspect of the present invention, the signal output means is provided between the first and second connection points and outputs a voltage signal corresponding to a voltage between both ends of the unit cell connected to both ends thereof. . Voltage detecting means for performing on / off control of the switch means, connecting one of the unit cells to the signal output means,
The voltage between both ends of each unit cell is detected. The determining means determines that the degree of variation is large when the difference between the maximum terminal voltage of the terminal voltages detected by the voltage detecting means and the minimum terminal voltage is a predetermined value or more, and determines that the maximum terminal voltage and the minimum While the difference from the voltage between both ends is smaller than the predetermined value, it is determined to be no.

Therefore, the voltage detecting means for making the judgment by the judging means can detect the voltage between both ends of each unit cell by diverting the switch means for connecting each unit cell to a capacitor or a discharge resistor. It is not necessary to separately provide a switch means.

According to a fifth aspect of the present invention, there is provided an assembled battery which is constituted by connecting a plurality of unit cells each composed of a secondary battery in series, and performs charging and discharging in a closed circuit state in which a load and a charger are connected to both ends. In adjusting the state of charge, when the degree of variation in the voltage across the unit cells is large, the unit cells are connected to a capacitor insulated from the load and the charger in an open circuit state of the battery pack. When the degree of variation in the voltage between both ends of each unit cell is not large, each unit cell is connected to a discharge resistor in an open circuit state of the assembled battery.

According to the fifth aspect of the present invention, while it is determined that the degree of variation in the voltage between both ends of each unit cell is large, each unit cell is connected to the capacitor, and the voltage between both ends of each unit cell is equalized. Therefore, electric energy is not wasted by the discharge resistor. In addition, while it is determined that the degree of variation is not large, in the equalization by the capacitor, the amount of movement of the charge is small, so that it takes time to equalize. However, in the present invention, the degree of variation of each unit cell is not large. During the period, the equalization is performed by the discharge resistance, so that the voltages at both ends of each unit cell can be equalized in a short time. Also, since the degree of variation is small,
The electric energy consumed by the discharge resistor is also small.

[0024]

BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, an embodiment of the present invention will be described.
This will be described with reference to the drawings. FIG. 2 is a circuit diagram showing an embodiment of a battery pack state-of-charge adjusting device (hereinafter referred to as an adjusting device) that implements the battery pack state-of-charge adjusting method of the present invention. The adjustment device of the present embodiment, which is denoted by reference numeral 1 in FIG.
In a hybrid electric vehicle (hereinafter referred to as "vehicle") in which an engine and an electric motor (both not shown) are used together as a driving source for driving, a main battery B (corresponding to an assembled battery in the claims) used as a power source for the electric motor. It is used by connecting to.

The main battery B is constituted by connecting n unit cells B _S1 , B _S2 ,..., B _Sn consisting of secondary batteries in series. Is connected as a load as needed, and an alternator or the like (not shown) is connected as a charger as needed.

The adjusting device 1 according to the present embodiment further includes an equalizing unit 2. The equalizing unit 2 includes a connection point c1
(Corresponding to a first connection point in the claims.)-Equal charging capacitor C _B (corresponding to a capacitor in the claims) provided between a connection point c2 (corresponding to a second connection point in the claims). .)
If, between the connection point c1- connection point c2, and a switch S _C1 provided in the capacitor C _B series for the equalizing charge. Note that the uniform charging capacitor C _B, the the load and the alternator (not shown) are provided in the insulating.

The equalization unit 2 also provided in parallel with the capacitor C _B for equalizing charge discharge resistor R _B and the switch S provided in the discharge resistor R _B in series between the connection point c1- connection point c2 _C2 . Then, the switch S
_C1 (corresponding to the first switch element in the claims) and S _C2
(Corresponding to a second switch element in the claims) constitutes the equalization switching unit 2a.

Further, the equalizing unit 2 includes the unit cells B _S1 -B _S
A switch section 2b (corresponding to a switch means in the claims) for connecting the positive terminal of _Sn to the connection point c1 and the negative terminal to the connection point c2 is provided. Switch part 2b
The positive terminal of the unit cell B _S1, the respective unit cells B _S1 .about.B _Sn
Of the negative terminal of the connection points and the unit cell B _Sn, switch S _R1, S _R2 whose one end is respectively connected, ..., and a cell switch unit 2b-1 consists of S _{Rn + 1.} And
The other end of the switch S _R1 is the connection point c3, the other end of the switch S _R2 is a connection point c4, the other end of the switch S _R3 is the connection point c3, as ... such, these switches S _R1 to S
The other end of _{Rn + 1} is alternately connected to connection points c3 and c4.

The switch 2b has one end connected to a connection point c3.
And the other end is connected to the connection point c1.
_A1 , a switch S _{A2 having} one end connected to the connection point c4 and the other end connected to the connection point c2, a switch S _{B1 having} one end connected to the connection point c3, and a switch S _B1 having the other end connected to the connection point c2, and one end. It has a polarity reversing unit 2b-2 having a switch S _B2 connected to the connection point c4 and the other end connected to the connection point c1.

Therefore, in the switch section 2b, the cell is cut off.
Switch S in spare unit 2b-1_R1And S_R2ON control only
And the switch S in the polarity reversal unit 2b-2._A1Passing
And S _A2If only ON control is performed, the unit cell B_S1Plus end of
And the negative terminal to the connection point c2.
You can continue.

The switch S in the cell switching unit 2b-1
Only the _R2 and _SR3 are turned on, and the polarity reversal unit 2
If only the switches S _B1 and S _B2 in b-2 are on-controlled, the plus terminal of the unit cell B _S2 can be connected to the connection point c1, and the minus terminal can be connected to the connection point c2. Accordingly, if the switches in the switch section 2b are controlled to be turned on and off, the plus terminals of the unit cells B _{S1 to} B _Sn are connected to the connection point c1.
In addition, a negative terminal can be connected to each connection point c2.

Further, by the switch unit 2b, and the positive terminal of the respective unit cells B _S1 .about.B _Sn to the connection point c1, while each connecting the negative terminal to the connection point c2, if ON control switch S _c1, each it can be connected to evenly charging capacitor C _B across the unit cell B _S1 .about.B _Sn. On the other hand, it can be on-controlled switch S _c2, connecting a discharge resistor R _B to both ends of the unit cells B _S1 .about.B _Sn.

Further, the equalizing section 2 has a voltage detecting section 2c (corresponding to a signal output means in the claims) provided between the connection point c1 and the connection point c2. This voltage detector 2c
Outputs a voltage signal corresponding to the voltage between both ends of the unit cells B _{S1 to} B _Sn connected between both ends, that is, between the connection point c1 and the connection point c2. Further, the equalization unit 2 includes an equalization switching unit 2
a and a control terminal of a switch in the switch section 2b have a microcomputer (hereinafter referred to as μCOM) 2d to be connected. The voltage signal output from the voltage detector 2c is further supplied to the μCOM 2d.

The μCOM 2d is a central processing unit (hereinafter referred to as C) for performing various processes according to a processing program.
PU) 2d-1, ROM 2d- which is a read-only memory storing a program for processing performed by the CPU 2d-1 and the like.
2. RAM 2d- which is a readable and writable memory having a work area used in various processing steps in the CPU 2d-1 and a data storage area for storing various data.
3 which are connected by a bus line.

The operation of the adjusting device 1 having the above-described configuration will be described with reference to FIG.
This will be described below with reference to the processing procedure of the CPU 2d-1.
The CPU 2d-1 starts the operation by turning off an ignition switch that does not have a possibility that the vehicle is running, for example.
After initializing various areas formed in the RAM 2d-3, the process proceeds to the first step S1.

In step S1, the CPU 2d-
1 functions as voltage detecting means, and each of the unit cells B _{S1 to} B _Sn
Voltage detection processing for detecting the voltage between both ends. next,
The CPU 2d-1 calculates the maximum terminal voltage V among the terminal voltages of the unit cells B _{S1 to} B _Sn detected in the voltage detection processing.
and _max, the difference between the minimum voltage across V _min is determined whether or not a predetermined voltage V _A is smaller than (Step S2).

At this time, if the maximum voltage V _max -the minimum voltage V _min <the predetermined voltage V _A (Y in step S2), the CPU 2d-1 determines that the voltage across each of the unit cells B _{S1 to} B _Sn is substantially equal. It is determined that it is uniform and it is not necessary to perform the equalization process, and the process ends immediately. On the other hand, if the maximum voltage V _max −the minimum voltage V _min ≧ the predetermined voltage V _A (N in step S2), the CPU 2d-1 causes the voltage across the unit cells B _{S1 to} B _Sn to vary. It is determined that it has occurred, and the process proceeds to the next step S3.

In step S3, the CPU 2d-1
Works as a judgment means, and determines the maximum terminal voltage V among the terminal voltages of the unit cells B _{S1 to} B _Sn detected in the voltage detection processing.
and _max, the difference between the minimum voltage across V _min is determined whether the predetermined voltage (corresponding to the predetermined value in claims) set predetermined voltage V _B to V _A value greater than or less than. At this time, if the maximum voltage V _max −the minimum voltage V _min <the predetermined voltage V _B (Y in step S3), the CPU 2d-1 determines that the variation in the voltage across the unit cells B _{S1 to} B _Sn is small. it is determined that performs equalization processing by the discharge resistance R _B of the step S5.

In the equalization process using the discharge resistor R _B ,
The CPU 2d-1 functions as a resistance connecting means, and discharges both ends of each unit cell B _S1 -B _Sn so that the voltage across all the unit cells B _S1 -B _Sn becomes the same as the minimum end voltage V _min. by connecting the resistor R _B, achieving equalization of the voltage across.

On the other hand, the maximum voltage V_max−minimum
Voltage V_min≧ predetermined voltage V_BIf (in step S3
N), the CPU 2d-1 executes_S1~ B_SnBoth ends of
Judge that the voltage variation is large, and
Capacitor S for uniform charging_BEqualization processing by
Do. Capacitor C for uniform charging_BIn the equalization process
CPU 2d-1 operates as a capacitor connecting means.
Each unit cell B_S1~ B _SnEqually at both ends
Charging capacitor C_BConnected to the capacitor for equal charging
C_BTransfer charge from higher voltage to lower voltage
In this way, the voltages at both ends are equalized.

Next, the detailed operation of the above-described voltage detection processing will be described with reference to the flowchart of FIG. 4 showing the processing procedure of the CPU 2d-1. In the voltage detection process, first, the CPU 2d- ₁ turns on only the switches S _Rj and S _{Rj + 1} corresponding to the cell count value j stored in the RAM 2d-3 (step S100). Next, the CPU 2d-1 determines whether or not the flag F1 stored in the RAM 2d-3 is set to 1 (Step S101).

Incidentally, at the time when the process proceeds to the voltage detection process in response to the ignition switch being turned off, the cell count value j
Since the flag F1 and the flag F1 are initially set to 1, in step S100, the CPU 2d-1 controls the switches S _R1 and S _R2 to be on. Step S10
In 1, the CPU 2d-1 determines that the flag F1 is set to 1 (Y in step S101), and turns on the switches S _A1 and S _A2 in the polarity reversing unit 2b-2 (step S102). Therefore, the minus terminal of the unit cell B _S1 is connected to the connection point c2, and the plus terminal is connected to the connection point c1, and the voltage detector 2c outputs a voltage signal corresponding to the voltage across the unit cell B _S1 .

Next, the CPU 2d-1 sets the flag F1 to 0.
After the cell count value j is incremented and set to 2 (steps S103 and S106), the voltage detection unit 2
captures the voltage signal detected from c, as a voltage across the unit cell B _S1, performs voltage acquisition processing to be stored in the RAM 2d-3 (step S107).

Thereafter, the CPU 2d-1 determines whether or not the cell count value j is larger than the number n of the unit cells B _{S1 to} B _Sn (step S108). As mentioned above,
If the cell count value j is set to 2 (<n), C
PU2d-1 judges that it is not larger than n (N in step S108), and returns to step S100 again.

When the process returns to step S100, the cell count value j is set to 2 in step S106, and the process proceeds to step S1.
03, the flag F1 is set to 0,
The CPU 2d-1 controls the steps S _R2 and S _R3 to be on (step S100) and switches S _B1 and S _B
B2 is turned on (N in step S101 → step S
104). Therefore, the negative terminal is the connection point c2 of the unit cell B _S2, the positive terminal is connected to the connection point c1, the voltage signal corresponding to the voltage across the unit cell B _S2 from the voltage detecting unit 2c outputs.

Next, the CPU 2d-1 sets the flag F1 to 1
In increments cell count, was set to 3 (step S105, step S106), takes in the voltage signal detected by the voltage detection unit 2c, as a voltage across the unit cell B _S2, in RAM 2d-3 The stored voltage is taken in (step S107).

As a result of repeating the above steps S100 to S108, if the cell count value j exceeds n (Y in step S108), the CPU 2d-1 sets all the unit cells B
_It is determined that the voltages at both ends of _{S1 to} B _Sn have been stored in the RAM 2d-3, the cell count value j and the flag F1 are set to 1, and all the switches in the switch section 2b are turned off (step S109). ). By the above voltage detection processing, the CPU 2d-1 makes each unit cell B _S1
.. B _Sn can be sequentially connected to the voltage detector 2c to detect the voltage across the unit cells B _{S1 to} B _Sn .

Next, the above-mentioned capacitor for uniform charging C _B
About the detailed operation of the equalization processing by the CPU shown in FIG.
This will be described below with reference to a flowchart showing the processing procedure of 2d-1. In the equalization process by uniformly charging capacitor C _B, CPU2d-1, first equalization switching section 2
The switch S _{C1 in a} is turned on (step S40).
0). The on-control of the switches S _C1, connection points c1
- the ends of the unit cell B _S1 .about.B _Sn which is connected between the connection point c2, can be connected to the equalizing charge capacitor C _B.

Next, the CPU 2d-1 executes steps S100 to S100 already described in the above-described voltage detection processing.
Operation 109 is performed. Steps S100 to S109
By performing the above operation, the plus terminal of each unit cell B _{S1 to} B _Sn becomes the connection point c1, the minus terminal becomes the connection point c2,
They are connected sequentially. Thus, through the switch S _C1, both ends of the unit cell B _S1 .about.B _Sn sequentially, to be connected to the equalizing charge capacitor C _B.

Further, after step S103 or S105, the elapse of a predetermined time T1 is followed by the next step S1.
06, the operations of steps S401 and S402 are performed, so that both ends of the unit cells B _{S1 to} B _Sn reach the predetermined time T
Every 1, and are sequentially connected to the equalizing charge capacitor C _B. In step S107, the predetermined time T1, after connecting to the capacitor C _B for uniformly charging unit cells B _S1 ~
The voltage across B _Sn can be detected.

[0051] Here, the unit cell B _Sj will be described movement of charges when it is connected to the equalizing charge capacitor C _B. Is higher than the voltage across the voltage across the unit cell B _Sj evenly charging capacitor C _B at this point, it occurs to move in the unit cell B _Sj of the electric charge stored in the charge equalizing capacitor C _B, in the opposite , it is lower than the voltage across the voltage across the unit cell B _Sj evenly charging capacitor C _B, moved to the unit cell B _Sj accumulated in the equalizing charge capacitor C _B charge occurs.

[0052] Then, when the movement of the unit cell B _Sj of the electric charge stored in the charge equalizing capacitor C _B occurs,
To the unit cell B _Sj that the voltage across be charged unit cells B _Sj increases by the capacitor C _B for equalizing charge, the voltage across the equivalent charging capacitor C _B that has released the accumulated charge in the unit cell B _Sj discharge down, the difference between the voltage across the unit cell B _Sj, the voltage across the equivalent charging capacitor C _B is reduced.

[0053] In contrast, when the movement to the unit cell B _Sj on accumulated uniformly charging capacitor C _B charge occurs, for equalizing charge is charged capacitor C _B for uniformly charging the unit cell B _Sj whereas the voltage across B _Sj of the capacitor C _B is increased, the capacitor C for uniformly charging the storage charge
Down across voltage Vn of the unit cell B _Sj that has released the _B is the discharge, the difference between the voltage across the unit cell B _Sj, the voltage across the equivalent charging capacitor C _B is reduced.

Therefore, the unit cells B _{S1 to} B _Sn are kept for a predetermined time T.
Every 1, sequentially, to connect to uniformly charging capacitor C _B, via the equalizing charge capacitor C _B, the movement of the accumulated charge from high to low both-end voltage is performed, the unit cells B _S1 The difference between the voltages across B _Sn is reduced.

As a result, of the voltages across the unit cells B _{S1 to} B _Sn detected in step S107, the maximum terminal voltage V
and _max, if the difference between the minimum voltage across V _min is the smaller than the predetermined voltage V _B (Y in step S403), CPU2d-1
Determines that the variation in the voltage across the unit cells B _{S1 to} B _Sn has become small and turns off the switch S _C1 (step S404), and then returns. On the other hand, the maximum voltage across V _max and the minimum voltage across the difference is a predetermined voltage V _B and V _min
If so (N in step S403), the CPU 2d-
No. 1 returns to step S100 again, assuming that the variation in the voltage across the unit cells B _{S1 to} B _Sn remains large.

The capacitor C for uniform charging described above_BBy average
By the equalization process, the unit cell B_S1~ B_{S n}Voltage V
_maxAnd the minimum voltage V_minIs a predetermined voltage V_BLess than
Now, unit cell B_S1~ B_SnOf the voltage across
Becomes smaller.

Next, detailed operation of the equalization processing by the discharge resistance R _B described above will be described below with reference to a flow chart illustrating a CPU2d-1 of the procedure of FIG. 6.
In the equalization process by the discharge resistor R _B, CPU2d-
1, first, a voltage detection process is performed, and the unit cells B _{S1 to} B _{S1 to} B
The voltage across _Sn is detected (step S1). Then, C
The PU 2d-1 turns on the switch S _C2 (step S500). By the ON control of the switch S _C2 , the unit cells B _S1 -B _S connected between the connection point c 1 and the connection point c 2 are connected.
_Sn both ends of, it can be connected to the discharge resistor R _B.

Next, the CPU 2d-1 executes steps S100 to S100 already described in the above-described voltage detection processing.
Operation 109 is performed. Steps S100 to S109
By performing the above operation, the plus terminal of each unit cell B _{S1 to} B _Sn becomes the connection point c1, the minus terminal becomes the connection point c2,
They are connected sequentially. Thus, through the switch S _C2, both ends of the unit cell B _S1 .about.B _Sn sequentially, to be connected to a discharge resistor R _B.

Further, step S107 and step S1
Between 08, detected in step S107, the voltage across the unit cell B _S1 .about.B _Sn connected to the discharge resistor R _B is, the minimum voltage across V _min of the detected voltage across at step S1 Wait until it becomes the next step S
Going to step 108, step S501 is inserted.

[0060] Thus, both ends of the unit cell B _S1 .about.B _Sn, the accumulated charge is consumed by the discharge resistance R _B, each time the voltage across falls below the minimum voltage V _min, successively connected to the discharge resistor R _B Is done. The equalization process by the above-described discharge resistor R _B, the voltage across the unit cell B _S1 .about.B _Sn, the minimum voltage V across
_This is the same as _min, and there is almost no variation in the voltage between both ends B _{S1 to} B _Sn of each unit cell. Step S109
Thereafter, the CPU 2d-1 controls the switch S _C2 to be turned off (step S502), and then returns.

According to the adjusting device 1 described above, while it is determined that the degree of variation in the voltage between both ends of each of the unit cells B _{S1 to} B _Sn is large, each of the unit cells B _{S1 to} B _Sn is connected to the equalizing capacitor C S. _B sequentially connected to each of the unit cells B _{S1 to} B _Sn
Are equalized. Therefore, there is no the electric energy is wasted by the discharge resistor R _B.

[0062] Also, while the degree of variation is not greater, the equalization by the equalizing charge capacitor C _B, the amount of movement of the charge is reduced, it takes time to equalize, the adjustment of the present invention In the device 1, each unit cell B _S1 .
During the variation degree of B _Sn is not large, the equalization by the discharge resistance R _B is performed. For this reason, it is possible to equalize the voltages across the unit cells B _{S1 to} B _{Sn in} a short time. Further, since the degree of variation is small, only a small the electrical energy consumed by the discharge resistor R _B, a short period of time,
In addition, while suppressing the loss of electric energy, each unit cell B _S1 ~
The voltage across B _Sn can be equalized.

Further, in the adjusting device 1 having the above configuration, the switch unit 2 is turned on while the switch S _C1 is controlled to be on.
By performing on / off control of the switch b, each unit cell B _S1
The .about.B _Sn can be connected to the equalizing charge capacitor C _B. Further, in a state where the ON control switch S _C2, by performing the switch on-off control of the switch portion 2b, it is possible to connect the unit cells B _S1 .about.B _Sn the discharge resistor R _B. Therefore, the discharge resistance R _B and the switch portion 2b for connecting the respective unit cells B _S1 .about.B _Sn evenly charging capacitor C _B
It is not necessary to separately provide the switch unit 2b for connection to the switch, and the cost can be reduced.

Further, in the adjusting device 1 having the above configuration, the on / off control of the switch of the switch section 2b is performed to detect the voltage across the unit cells B _{S1 to} B _Sn .
Therefore, the respective unit cells B _S1 .about.B _Sn by diverting the switch portion 2b for connecting with uniform charging capacitor C _B or discharge resistor R _B, detects the voltage across each unit cell B _S1 .about.B _Sn It is not necessary to separately provide the switch unit 2b, and the cost can be reduced.

[0065]

As described above, according to the first aspect of the present invention, while the degree of variation of each unit cell is large,
Since the equalization is performed by the capacitor connecting means, the electric energy is not wasted by the discharge resistor. Also, while the degree of variation of each unit cell is not large, the equalization by the capacitor connecting means takes a long time for equalization because the amount of movement of electric charge is small, but in the present invention, the degree of variation of each unit cell is small. Unless the voltage is not large, the equalization is performed by the resistance connection means, so that the voltages at both ends of each unit cell can be equalized in a short time. Also,
Since the degree of variation is small, the amount of electric energy consumed by the discharge resistor is also small, so that the voltage between both ends of each unit cell can be equalized in a short time and with the electric energy loss suppressed. A charge state adjusting device can be obtained.

According to the second aspect of the present invention, the capacitor connection means and the resistance connection means can also serve as the switch means, and the switch for separately connecting each unit cell to the capacitor or the discharge resistor is provided separately. Since it is not necessary to provide any means, it is possible to obtain a battery pack state-of-charge adjusting device that reduces costs.

According to the third aspect of the invention, while the difference between the maximum terminal voltage and the minimum terminal voltage of each unit cell is equal to or more than a predetermined value, equalization is performed by the first charge state adjusting means. Therefore, large electric energy is not wasted. In addition, while the difference between the maximum terminal voltage and the minimum terminal voltage of each unit cell is smaller than a predetermined value or less, equalization is performed by the second state-of-charge adjusting means. Therefore, it is possible to obtain a battery pack state-of-charge adjusting device that can equalize the voltage between both ends of each unit cell in a short time and with less loss of electric energy.

According to the fourth aspect of the present invention, the voltage detecting means for making the judgment by the judging means diverts the switching means for connecting each unit cell to a capacitor or a discharge resistor, and switches the voltage of each unit cell. Since the voltage between both ends can be detected, and it is not necessary to separately provide a switch unit, it is possible to obtain a battery pack state-of-charge adjusting apparatus with reduced cost.

According to the fifth aspect of the invention, while it is determined that the degree of variation in the voltage between both ends of each unit cell is large, each unit cell is connected to the capacitor and the voltage between both ends of each unit cell is equalized. Therefore, electric energy is not wasted by the discharge resistor. In addition, while it is determined that the degree of variation is not large, in the equalization by the capacitor, the amount of movement of the charge is small, so that it takes time to equalize. However, in the present invention, the degree of variation of each unit cell is not large. During the period, the equalization is performed by the discharge resistance, so that the voltages at both ends of each unit cell can be equalized in a short time. Also, since the degree of variation is small,
Since the electric energy consumed by the discharge resistor can be small, a method for adjusting the state of charge of a battery pack that can equalize the voltage between both ends of each unit cell in a short time and with a reduced loss of electric energy can be obtained. be able to.

[Brief description of the drawings]

FIG. 1 is a basic configuration diagram of an apparatus for adjusting a state of charge of a battery pack according to the present invention.

FIG. 2 is a circuit diagram showing an embodiment of a battery pack state-of-charge adjusting device that implements the battery pack state-of-charge adjusting method of the present invention.

FIG. 3 is a diagram showing a configuration of a charge state adjusting device for a battery pack of FIG. 2;
It is a flowchart which shows the processing procedure of PU2d-1.

FIG. 4 is a flowchart showing a processing procedure of a CPU 2d-1 in the voltage detection processing of FIG. 3;

5 is a flowchart showing a CPU2d-1 processing procedure in the equalization processing by uniformly charging capacitor C _B of FIG.

6 is a flowchart showing a CPU2d-1 processing procedure in the equalization processing by the discharge resistance R _B of FIG.

[Explanation of symbols]

REFERENCE SIGNS LIST 1 Charged battery conditioner 2c Voltage detector (signal output unit) 2b Switch unit (switch unit) 2d-11 Capacitor connection unit (CPU) 2d-12 Resistance connection unit (CPU) 2d-13 Judgment unit (CPU) 2d-14 voltage detecting means (CPU) B battery pack (main battery) B _S1 .about.B _Sn unit cell C _B capacitor (evenly charging capacitor) c1 first connection point (connection point) c2 second connection point (connection point) R _B discharge resistor S _C1 first switch element (switch) S _C2 second switch element (switch)

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 5G003 AA07 BA03 CA15 CC04 DA04 DA12 FA06 GC05 5H030 AA01 AS08 BB01 FF43 5H115 PA15 PC06 PG04 PI16 PO01 PO10 PO13 PU01 SE06 TI05 TO13 TU05 TU16 TU17

Claims (5)

[Claims] An assembly for adjusting the charge state of a battery pack comprising a plurality of unit cells each comprising a secondary battery connected in series and performing charge and discharge in a closed circuit state in which a load and a charger are connected to both ends. A battery state-of-charge adjusting device, comprising: a capacitor provided insulated from the load and the charger; and an open circuit state of the battery pack, wherein each unit cell is connected to the capacitor, First charge state adjusting means having capacitor connection means for equalizing the voltage across the cell; a discharge resistor for discharging the unit cell; and an open circuit state of the battery pack, wherein each of the unit cells has the discharge resistance. A second state-of-charge adjusting means having resistance connecting means for equalizing the voltage across the unit cells, and determining whether the degree of variation in the voltage across the unit cells is large or not. The equalization by the capacitor connecting means is performed while the degree of variation is determined to be large by the determining means, and the equalization by the resistance connecting means is performed while the determination is negative. A charge state adjusting device for a battery pack, comprising: 2. The charge state adjusting device for an assembled battery according to claim 1, wherein the capacitor and the discharge resistor are provided in parallel between a first connection point and a second connection point, and each of the units Switch means for connecting a plus terminal of the cell to the first connection point and a minus terminal to the second connection point; and a switch provided in series with the capacitor between the first and second connection points. A first switch element; and a second switch element provided in series with the discharge resistor between the first and second connection points, wherein the capacitor connection means includes a first switch element. In the state where the on-state is controlled, the on / off control of the switch means is performed to connect each of the unit cells to the capacitor, and the resistance connection means controls the switch means in the state where the second switch element is on-controlled. No A charge state adjusting device for an assembled battery, wherein the unit cell is connected to the discharge resistor by performing on / off control. 3. The device for adjusting the state of charge of a battery pack according to claim 1, further comprising voltage detecting means for detecting a voltage between both ends of each of the unit cells, and wherein the judging means comprises the voltage detecting means. The difference between the maximum terminal voltage and the minimum terminal voltage among the terminal voltages detected by the method is determined to be large when the difference between the maximum terminal voltage and the minimum terminal voltage is equal to or greater than a predetermined value, and the difference between the maximum terminal voltage and the minimum terminal voltage is determined. But,
An apparatus for adjusting the state of charge of an assembled battery, wherein the apparatus determines that the state of the battery pack is smaller than the predetermined value. 4. The device for adjusting the state of charge of a battery pack according to claim 2, wherein the device is provided between the first and second connection points and responds to a voltage between both ends of the unit cell connected to the both ends. Signal output means for outputting a voltage signal, and voltage detection for performing on / off control of the switch means, connecting one of the unit cells to the signal output means, and detecting a voltage across the unit cells. Means, the determining means determines that the degree of variation is large when the difference between the maximum terminal voltage of the terminal voltages detected by the voltage detecting means and the minimum terminal voltage is a predetermined value or more. The difference between the maximum terminal voltage and the minimum terminal voltage is
An apparatus for adjusting the state of charge of an assembled battery, wherein the apparatus determines that the state is smaller than the predetermined value. 5. A method for adjusting the charge state of a battery pack that is configured by connecting a plurality of unit cells each composed of a secondary battery in series and that performs charging and discharging in a closed circuit state in which a load and a charger are connected to both ends. When the degree of variation in the voltage across the unit cells is large, the unit cells are connected to the load and the capacitor insulated from the charger in an open circuit state of the battery pack, A method of adjusting the state of charge of a battery pack, comprising connecting each of the unit cells to a discharge resistor in an open circuit state of the battery pack when the degree of variation in the voltage across the terminals is not large.