JP2002359559A5

JP2002359559A5 -

Info

Publication number: JP2002359559A5
Application number: JP2002077624A
Authority: JP
Filing date: 2002-03-20
Publication date: 2005-07-21
Anticipated expiration: 2022-03-20

Claims

A method for converting an n-bit digital signal (n is a natural number) into an analog signal ,
M capacitors (m is a natural number smaller than n) connected in parallel are used ,
In the precharge period, the charge of the m capacitors is controlled by the upper n−m bit digital signal among the n bit digital signals.
In the writing period, charging of the charges in the m capacitors is controlled by a lower m-bit digital signal among the n-bit digital signals.
The D / A conversion method , wherein the precharge period and the writing period are alternated, and the voltage of one electrode of the m capacitors is output as an analog signal .

In claim 1,
In the precharge period, the signals input to the m capacitors for charging are connected in series. ^n-mn-m A D / A conversion method generated by a resistance division type D / A circuit having a plurality of resistors.

In claim 1,
In the precharge period, a signal input to the m capacitors connected in parallel to charge the charge is 2 ^n-mn-m Generated by a selector circuit having a number of gradation voltage lines,
2 above ^n-mn-m A D / A conversion method, wherein different voltages are input to each of the gradation voltage lines.

In any one of Claims 1 thru | or 3,
The m capacitors have capacitance values C, 2C, 2 ²² C ... 2 ^m-1m-1 A D / A conversion method represented by C.

A D / A conversion circuit for converting an n-bit digital signal (n is a natural number) into an analog signal,
M capacitors (m is a natural number smaller than n) having a first electrode and a second electrode;
2 ^nm resistors having a first terminal and a second terminal;
2 ^nm first switches,
m second switches;
One third switch ;
An output line for outputting an analog signal;
Have
The first electrodes of the m capacitors are selectively connected to either the first power source or the second power source via the different second switches, respectively .
The second electrodes of the m capacitors are respectively connected to one terminal of the third switch and the output line;
The 2 ^nm resistors are connected in series by connecting the first terminal to the second terminal of another resistor,
Of the 2 ^nm resistors, the first terminal is connected to the third power source, and the first terminal is not connected to the second terminal of the other resistors.
Among the 2 ^nm resistors, the resistor in which the second terminal is not connected to the first terminal of another resistor has the second terminal connected to the fourth power source,
The second terminals of the 2 ^nm resistors are respectively connected to one terminals of the first switches different from each other ,
The 2 ^nm number is the other terminal of the first switch, respectively, said third D / A converter circuit, characterized in that connected to the other terminal of the switch.

A D / A conversion circuit for converting an n-bit digital signal (n is a natural number) into an analog signal,
M capacitors (m is a natural number smaller than n) having a first electrode and a second electrode;
2 ^nm resistors having a first terminal and a second terminal;
2 ^nm first switches,
m second switches;
One third switch ;
An output line for outputting an analog signal;
Have
The first electrodes of the m capacitors are selectively connected to either the first power source or the second power source via the different second switches, respectively .
The second electrodes of the m capacitors are respectively connected to one terminal of the third switch and the output line;
The 2 ^nm resistors are connected in series by connecting the first terminal to the second terminal of another resistor,
Of the 2 ^nm resistors, the first terminal is connected to the third power source, and the first terminal is not connected to the second terminal of the other resistors.
Among the 2 ^nm resistors, the resistor in which the second terminal is not connected to the first terminal of another resistor has the second terminal connected to the fourth power source,
The second terminals of the 2 ^nm resistors are respectively connected to one terminals of the first switches different from each other ,
The other terminals of the 2 ^nm first switches are connected to the other terminals of the third switches , respectively .
In the precharge period, any one of the 2 ^nm first switches is turned on by an upper ^nm bit digital signal among the n bit digital signals, and the m second switches first electrode of the m capacitor is connected to all the first power supply, said third switch is turned on,
In the writing period, the m second switches are controlled by the lower m-bit digital signal among the n-bit digital signals, and the first electrodes of the m capacitors are respectively connected to the first power source or the Connected to one of the second power supplies, the third switch is turned off,
The D / A conversion circuit, wherein a voltage at the second electrode of the m capacitors is output from the output line as an analog signal.

In claim 5 or 6,
2 above ^n-mn-m A D / A conversion circuit characterized in that the resistance values of the individual resistors are the same.

In any one of Claims 5 thru | or 7 ,
The m capacities, respectively, the capacitance value of ^{C, 2C, 2 2 C,} ..., D / A converter circuit, characterized by being represented by 2 ^m-1 C.

In claim 5 or 6 ,
The resistance values of the 2 ^nm resistors are the same,
Each of the m capacitors has a capacitance value of C, 2C, 2 ² C,..., 2 ^m−1 C,
The voltage of the first power supply is V _C , the voltage of the second power supply is V _D , the voltage of the third power supply is V _A , the voltage of the fourth power supply is V _B , and the capacitance of the output line is When C _W , a D / A conversion circuit characterized in that the following expression 1 is satisfied.
[Formula 1]

A D / A conversion circuit for converting an n-bit digital signal (n is a natural number) into an analog signal,
M capacitors (m is a natural number smaller than n) having a first electrode and a second electrode;
2 ^nm gray-scale voltage lines with different voltage values,
2 ^nm first switches,
m second switches;
One third switch ;
An output line for outputting an analog signal;
Have
The serial first electrode of the m capacities, respectively, through different second switch each other, is connected to one of the first and second power supplies,
The 2 ^nm book gradation voltage lines are respectively via different first switch each other, the third D / A converter circuit, wherein the switch of Ru is connected to the other terminal.

A D / A conversion circuit for converting an n-bit digital signal (n is a natural number) into an analog signal,
M capacitors (m is a natural number smaller than n) having a first electrode and a second electrode;
2 ^nm gray-scale voltage lines with different voltage values,
2 ^nm first switches,
m second switches;
One third switch ;
An output line for outputting an analog signal;
Have
The serial first electrode of the m capacities, respectively, through different second switch each other, is connected to one of the first and second power supplies,
The second electrodes of the m capacitors are respectively connected to one terminal of the third switch and the output line;
The 2 ^nm grayscale voltage lines are connected to the other terminal of the third switch via the different first switches, respectively .
In the precharge period, any one of the 2 ^nm first switches is turned on by the upper n−m bits of the n-bit digital signals, and all the first electrodes of the m capacitors are Connected to the first power supply, the third switch is turned on,
In the writing period, the m second switches are controlled by the lower m-bit digital signal among the n-bit digital signals, and the first electrodes of the m capacitors have the first power supply and the first power supply, respectively. The voltage at the second electrode of the m capacitors connected to any one of the two power supplies and having the third switch turned off is output from the output line as an analog signal. A conversion circuit.

In claim 10 or 11 ,
V _A and V _B represent constant voltages,
Voltage of the 2 ^nm book gradation voltage lines are _{_{respectively, V B + (V A -V}} B) / 2 nm, V B +2 (V A -V B) / 2 nm, ···, V B + (2 ^nm −1) (V _A −V _B ) / 2 ^nm , a D / A conversion circuit characterized by being maintained at V _B.

In claim 10 or 11 ,
V _A and V _B represent constant voltages,
Voltage of the 2 ^nm book gradation voltage lines are _{_{respectively, V A + (V B -V}} A) / 2 nm, V A +2 (V B -V A) / 2 nm, ···, V A + (2 ^nm −1) (V _B −V _A ) / 2 ^nm , D / A conversion circuit characterized by being maintained at V _A.

In any one of Claims 10 thru | or 13,
The m capacitors have capacitance values C, 2C, 2 respectively. ²² C ... 2 ^m-1m-1 A D / A conversion circuit represented by C.

In claim 12 or 13 ,
Each of the m capacitors has a capacitance value represented by C, 2C, 2 ² C,..., 2 ^m−1 C,
When the voltage of the first power source is V _C , the voltage of the second power source is V _D , and the capacitance formed by the output line is C _W , the following equation 1 is satisfied: D / A conversion circuit.
[Formula 1]

A semiconductor device comprising the D / A conversion circuit according to claim 5 .

A display device using the D / A conversion circuit according to claim 5.

An electronic device in which the D / A conversion circuit according to claim 5 is used in a display unit or a control circuit.

The electronic device according to claim 18 is any one of a video camera, a digital camera, a goggle type display, a navigation system, a sound reproduction device, a notebook personal computer, a game device, a portable information terminal, and an image reproduction device.