JP2002343833A - Semiconductor mounting apparatus - Google Patents

Semiconductor mounting apparatus

Info

Publication number
JP2002343833A
JP2002343833A JP2001150503A JP2001150503A JP2002343833A JP 2002343833 A JP2002343833 A JP 2002343833A JP 2001150503 A JP2001150503 A JP 2001150503A JP 2001150503 A JP2001150503 A JP 2001150503A JP 2002343833 A JP2002343833 A JP 2002343833A
Authority
JP
Japan
Prior art keywords
semiconductor
thermosetting resin
semiconductor elements
circuit board
printed circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2001150503A
Other languages
Japanese (ja)
Inventor
Yuji Yagi
優治 八木
Takafumi Kashiwagi
隆文 柏木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP2001150503A priority Critical patent/JP2002343833A/en
Publication of JP2002343833A publication Critical patent/JP2002343833A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75Apparatus for connecting with bump connectors or layer connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/7525Means for applying energy, e.g. heating means
    • H01L2224/75252Means for applying energy, e.g. heating means in the upper part of the bonding apparatus, e.g. in the bonding head
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319Arrangement of the layer connectors prior to mounting
    • H01L2224/83192Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • H01L2924/1815Shape
    • H01L2924/1816Exposing the passive side of the semiconductor or solid-state body
    • H01L2924/18161Exposing the passive side of the semiconductor or solid-state body of a flip chip

Landscapes

  • Wire Bonding (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor mounting apparatus which can apply a desired heat and a load at a good time so as to eliminate a problem in which optimum heat and load cannot be applied due to a thickness intersection of a semiconductor when a plurality of semiconductors are press bonded at one time on the same substrate in a semiconductor mounting using a thermosetting resin. SOLUTION: The semiconductor mounting apparatus mounts a plurality of semiconductor elements 1 on a printed board 3 formed of a thermosetting resin 2, and press bonds the plurality of the elements 1 on the board 3 by applying the load and the heat at one time to the plurality of the elements 1 by using tools 5 and 6 from the plurality of the elements 1 side. In this case, a pressurizing tool 5 and a heating tool 6 are independently provided, can separately pressurize and heat and hence can apply the desired load and heat at the good time.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、熱硬化性樹脂を介
して、複数の半導体素子をプリント基板に圧着するため
の半導体実装装置に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor mounting device for pressing a plurality of semiconductor elements onto a printed circuit board via a thermosetting resin.

【0002】[0002]

【従来の技術】これまで、小型携帯機器の急速な進展に
伴って、半導体を用いた機器の普及が進んできた。これ
に伴い、低コストで大量生産に有利な半導体素子の実装
方法が要求されてきた。その要求を実現する実装方法と
して、熱硬化性樹脂を介して、半導体素子をプリント基
板上に圧着する方法が実用化されつつある。
2. Description of the Related Art Up to now, with the rapid progress of small portable devices, devices using semiconductors have been widely used. Accordingly, there has been a demand for a method for mounting a semiconductor element which is advantageous at low cost and for mass production. As a mounting method for realizing the demand, a method of bonding a semiconductor element onto a printed circuit board via a thermosetting resin is being put to practical use.

【0003】この製造プロセスは、図6に示す通り、
(a)配線基板上に熱硬化性樹脂層を形成し、(b)半
導体素子1をプリント基板3のパターンに位置決めして
マウントし、(c)半導体素子1側から、加圧加熱ツー
ル11を用いて、荷重と熱を加える工程からなる。この
方法は、半導体素子とプリント基板の電気的接続と、信
頼性を向上させるための樹脂封止の工程が一度に行える
ため、低コストで大量生産に有利な製造方法といえる。
[0003] As shown in FIG.
(A) A thermosetting resin layer is formed on a wiring board, (b) a semiconductor element 1 is positioned and mounted on a pattern of a printed circuit board 3, and (c) a pressing and heating tool 11 is mounted from the semiconductor element 1 side. And applying a load and heat. This method can be said to be a low-cost and advantageous production method for mass production because the steps of electrical connection between the semiconductor element and the printed circuit board and resin sealing for improving reliability can be performed at once.

【0004】一方、近年の機器の多機能化要求に応えて
いくため、同一基板上に複数の半導体素子を実装する必
要性が出てきている。上記の実装方法では、加圧、加熱
のタイミング、またその量が信頼性を大きく左右する。
同一基板上に複数の半導体素子を、上記の方法で実装す
る場合、厚みの微妙に違う複数の半導体素子に、安定し
て所望の荷重と熱を加えるために、従来は、半導体素子
の1つ1つを別々に実装していた。
On the other hand, in order to meet the recent demand for multifunctional devices, it has become necessary to mount a plurality of semiconductor elements on the same substrate. In the above mounting method, the timing of pressurization and heating, and the amount thereof greatly affect reliability.
Conventionally, when a plurality of semiconductor elements are mounted on the same substrate by the above-described method, in order to stably apply a desired load and heat to a plurality of semiconductor elements having slightly different thicknesses, one semiconductor element is conventionally used. One was implemented separately.

【0005】[0005]

【発明が解決しようとする課題】しかしながら、上記の
方法では、1つの半導体素子に荷重と熱を加える際、誤
って隣接する半導体素子に荷重や熱が掛からないように
するため、各半導体素子の形状に合わせた専用の加圧加
熱ツールを用意したり、できるだけ半導体素子を近接さ
せないように工夫する必要があったが、これにより、コ
ストアップや機器の大型化という問題が発生していた。
However, in the above method, when a load and heat are applied to one semiconductor element, the load and heat are not applied to adjacent semiconductor elements by mistake. It was necessary to prepare a dedicated pressurizing and heating tool according to the shape, and to devise to keep the semiconductor element as close as possible. However, this caused a problem of an increase in cost and an increase in size of the device.

【0006】この対策としては、複数の半導体素子を一
度に圧着する方法があるが、複数の半導体素子を一度に
圧着しようとした場合、薄い方の素子が、加圧される前
に、厚い方の素子に加えられた熱によって、プリント基
板及び雰囲気から加熱され、半導体素子とプリント基板
の接続を得る前に、熱硬化性樹脂が硬化し始める課題
や、厚みやサイズの違う半導体素子間で付加する荷重の
アンバランスが生じるという課題があった。
As a countermeasure for this, there is a method of pressing a plurality of semiconductor elements at once. However, if a plurality of semiconductor elements are pressed at once, the thinner element becomes thicker before being pressed. Heat is applied from the printed circuit board and the atmosphere by the heat applied to the element, and the thermosetting resin starts to cure before the connection between the semiconductor element and the printed circuit board is obtained. There is a problem that imbalance of the load occurs.

【0007】そこで本発明は、複数の半導体素子を圧着
しようとした時に、所望の荷重と熱をタイミングよく加
えることのできる半導体実装装置を提供するものであ
る。
SUMMARY OF THE INVENTION The present invention provides a semiconductor mounting apparatus capable of applying a desired load and heat with good timing when a plurality of semiconductor elements are to be pressed.

【0008】[0008]

【課題を解決するための手段】この課題を解決するため
に本発明の半導体実装装置は、熱硬化性樹脂を形成した
プリント基板上に複数の半導体素子をマウントし、前記
複数の半導体素子側からツールを用いて、前記複数の半
導体素子を一度に荷重と熱を加えることによって、前記
複数の半導体素子と前記プリント基板を圧着する装置で
あって、加圧用ツールと加熱用ツールを独立して設けた
ことを特徴としている。この発明での半導体実装装置を
用いれば、薄い方の素子まで、加圧した後、熱を加える
ことができ、半導体素子とプリント基板の接続を得る前
に、熱硬化性樹脂が硬化し始めることはなくなる。
In order to solve this problem, a semiconductor mounting apparatus according to the present invention mounts a plurality of semiconductor elements on a printed circuit board on which a thermosetting resin is formed. An apparatus for crimping the plurality of semiconductor elements and the printed circuit board by applying a load and heat to the plurality of semiconductor elements at once using a tool, wherein a pressurizing tool and a heating tool are provided independently. It is characterized by that. By using the semiconductor mounting device of the present invention, heat can be applied to the thinner element after pressing, and the thermosetting resin starts to harden before the connection between the semiconductor element and the printed circuit board is obtained. Is gone.

【0009】[0009]

【発明の実施の形態】本発明の請求項1に記載の発明
は、熱硬化性樹脂を形成したプリント基板上に複数の半
導体素子をマウントし、前記複数の半導体素子側からツ
ールを用いて、前記複数の半導体素子を一度に荷重と熱
を加えることによって、前記複数の半導体素子と前記プ
リント基板を圧着する装置であって、加圧用ツールと加
熱用ツールを独立して設けたことを特徴としており、加
圧と加熱を別々に実施でき、所望の荷重と熱をタイミン
グよく掛けることができる。
DESCRIPTION OF THE PREFERRED EMBODIMENTS The invention according to claim 1 of the present invention is to mount a plurality of semiconductor elements on a printed circuit board on which a thermosetting resin is formed, and to use a tool from the plurality of semiconductor elements side. An apparatus for applying pressure and heat to the plurality of semiconductor elements at once to press the plurality of semiconductor elements and the printed circuit board, wherein a pressing tool and a heating tool are provided independently. As a result, pressurization and heating can be performed separately, and a desired load and heat can be applied with good timing.

【0010】本発明の請求項2に記載の発明は、請求項
1記載の半導体実装装置であって、加圧ツールに傾き補
正機構を設けたことを特徴としており、被接着物の反り
や凹凸にも追随して、半導体素子の全面に均等に荷重が
掛けられ、信頼性の高い半導体装置を実現することがで
きる。
According to a second aspect of the present invention, there is provided the semiconductor mounting apparatus according to the first aspect, wherein the pressure tool is provided with a tilt correcting mechanism, and the object to be bonded is warped or uneven. Following this, a uniform load is applied to the entire surface of the semiconductor element, and a highly reliable semiconductor device can be realized.

【0011】本発明の請求項3に記載の発明は、請求項
1記載の半導体実装装置であって、プリント基板を置く
ステージに傾き補正機構を設けたことを特徴としてお
り、被接着物の反りや凹凸にも追随して、半導体素子の
全面に均等に荷重が掛けられ、信頼性の高い半導体装置
を実現することができる。
According to a third aspect of the present invention, there is provided the semiconductor mounting apparatus according to the first aspect, wherein an inclination correcting mechanism is provided on a stage on which the printed circuit board is placed, and warpage of the adherend is provided. A load is evenly applied to the entire surface of the semiconductor element following irregularities and irregularities, so that a highly reliable semiconductor device can be realized.

【0012】本発明の請求項4に記載の発明は、熱硬化
性樹脂を介して、複数の半導体素子をプリント基板に圧
着してなる半導体装置において、前記複数の半導体素子
の厚みをランク分けし、薄いものから順番にマウント及
び圧着を行うことを特徴としており、従来、同一基板上
に厚みが極端に異なる複数の半導体素子を、熱硬化性樹
脂を用いて圧着することは困難であったが、この方法を
用いることによって、容易に実現することができる。
According to a fourth aspect of the present invention, in a semiconductor device in which a plurality of semiconductor elements are pressure-bonded to a printed board via a thermosetting resin, the thicknesses of the plurality of semiconductor elements are classified. It is characterized by performing mounting and crimping in order from the thinnest, and conventionally, it has been difficult to crimp a plurality of semiconductor elements having extremely different thicknesses on the same substrate using a thermosetting resin. This method can be easily realized.

【0013】本発明の請求項5に記載の発明は、内層の
配線パターン以外の全てに銅箔を形成し、熱伝導性を向
上させた多層プリント基板上に、熱硬化性樹脂を介し
て、複数の半導体素子を同時に圧着してなることを特徴
としており、複数の半導体素子を一度に圧着しようとし
た時に、特に問題となる熱硬化性樹脂内に発生する気泡
を減らし、信頼性を向上させることができる。
According to a fifth aspect of the present invention, a copper foil is formed on all of the layers except for the wiring pattern of the inner layer, and a multilayer printed circuit board having improved thermal conductivity is formed on a multilayer printed circuit board via a thermosetting resin. It is characterized in that a plurality of semiconductor elements are pressed at the same time, and when trying to press-bond a plurality of semiconductor elements at once, air bubbles generated in the thermosetting resin, which are particularly problematic, are reduced and reliability is improved. be able to.

【0014】本発明の請求項6に記載の発明は、バンプ
数及びチップサイズの違う複数の半導体素子を、熱硬化
性樹脂を介して、プリント基板上に、一度に圧着してな
る半導体装置において、各半導体素子のバンプに掛かる
荷重が同じになるように、前記各半導体素子に用いる熱
硬化性樹脂の硬さを調整してなることを特徴としてお
り、各バンプに掛かる荷重が最適範囲に収まるようにで
き、信頼性を向上させることができる。
According to a sixth aspect of the present invention, there is provided a semiconductor device in which a plurality of semiconductor elements having different numbers of bumps and chip sizes are pressure-bonded on a printed circuit board at a time via a thermosetting resin. The characteristic is that the hardness of the thermosetting resin used for each semiconductor element is adjusted so that the load applied to the bump of each semiconductor element is the same, and the load applied to each bump falls within the optimum range. As a result, the reliability can be improved.

【0015】以下、本発明の実施の形態について図1〜
5を用いて説明する。
Hereinafter, embodiments of the present invention will be described with reference to FIGS.
5 will be described.

【0016】(実施の形態1)図1は、本実施の形態1
での半導体実装装置を用いた実装プロセスを示す模式図
である。図1において、1は半導体素子、2は熱硬化性
樹脂、3はプリント基板、4はチップマウンタ、5は加
圧ツール、6は加熱ツールを示す。
(Embodiment 1) FIG. 1 shows Embodiment 1 of the present invention.
FIG. 4 is a schematic diagram showing a mounting process using a semiconductor mounting device in FIG. In FIG. 1, 1 is a semiconductor element, 2 is a thermosetting resin, 3 is a printed board, 4 is a chip mounter, 5 is a pressing tool, and 6 is a heating tool.

【0017】図1に示す通り、本実施の形態での半導体
実装装置を用いた実装プロセスでは、(a)熱硬化性樹
脂2を形成したプリント基板3上に、バンプを形成した
複数個の半導体素子1を位置決めしてマウントし、
(b)加圧ツール5を用いて、半導体素子1側から複数
の半導体素子1を一度に加圧し、その後、(c)加熱ツ
ール6により半導体素子1側から加熱し、熱硬化性樹脂
2を硬化させる。加圧用ツール5は、熱伝導性の良い材
料からなり、加熱用ツール6に接触することによって、
半導体素子1に熱を伝えることができる。この装置の場
合、薄い方の素子まで加圧した後、熱を加えることがで
きるため、半導体素子とプリント基板の接続を得る前
に、熱硬化性樹脂が硬化し始めることなく、所望の荷重
と熱をタイミングよく加えることができ、確実に半導体
素子とプリント基板の接続を得ることができる。
As shown in FIG. 1, in the mounting process using the semiconductor mounting apparatus according to the present embodiment, (a) a plurality of semiconductors having bumps formed on a printed board 3 on which a thermosetting resin 2 is formed. Position and mount element 1
(B) The plurality of semiconductor elements 1 are pressed at once from the semiconductor element 1 side by using the pressing tool 5, and then (c) the semiconductor element 1 is heated by the heating tool 6 to remove the thermosetting resin 2. Let it cure. The pressurizing tool 5 is made of a material having good thermal conductivity, and is brought into contact with the heating tool 6 to
Heat can be transmitted to the semiconductor element 1. In the case of this device, heat can be applied after pressing to the thinner element, so that the thermosetting resin does not start to cure before the connection between the semiconductor element and the printed circuit board, and the desired load and Heat can be applied with good timing, and the connection between the semiconductor element and the printed circuit board can be reliably obtained.

【0018】なお、本実施の形態では、熱硬化性樹脂を
1枚の層で示しているが、各半導体素子にほぼ同サイズ
で形成しても同様の効果が得られる。
In the present embodiment, the thermosetting resin is shown as one layer, but the same effect can be obtained by forming the same in each semiconductor element.

【0019】(実施の形態2)図2は、本実施の形態2
での半導体実装装置を示す模式図である。図2におい
て、6aは加熱ツール、7は弾性体を示す。
(Embodiment 2) FIG. 2 shows Embodiment 2 of the present invention.
FIG. 2 is a schematic diagram showing the semiconductor mounting device in FIG. In FIG. 2, 6a denotes a heating tool, and 7 denotes an elastic body.

【0020】図2に示す通り、本実施の形態での半導体
実装装置では、実施の形態1と同様に、加圧用ツール5
と加熱用ツール6aは、独立して設けられているが、加
圧用ツール5は、ゴム等からなる弾性体7によって半導
体実装装置本体に支持され、加熱用ツール6aは、先端
が凸状の球面形状を有し、被接着物の反りや凹凸にも追
随して、半導体素子の全面に均等に荷重が掛けられ、信
頼性の高い半導体装置を実現することができる。また、
加圧用ツール5は、弾性体7によって支持されるため、
正確な荷重を被接着物に与えられなくなる恐れがある
が、加圧用ツール5で予め所望の荷重近くまで加圧を行
い、更に加熱用ツール6aで所望の荷重に達するまで加
圧を行う構成にすれば、より精度の良い半導体実装装置
となる。
As shown in FIG. 2, in the semiconductor mounting apparatus according to the present embodiment, similarly to the first embodiment,
And the heating tool 6a are provided independently, but the pressing tool 5 is supported by the semiconductor mounting device body by an elastic body 7 made of rubber or the like, and the heating tool 6a has a spherical surface with a convex end. The semiconductor device has a shape, and a load is evenly applied to the entire surface of the semiconductor element in accordance with the warpage or unevenness of the object to be bonded, so that a highly reliable semiconductor device can be realized. Also,
Since the pressing tool 5 is supported by the elastic body 7,
There is a possibility that an accurate load may not be given to the adherend. Then, a more accurate semiconductor mounting device can be obtained.

【0021】(実施の形態3)図3は、本実施の形態3
での半導体実装装置を示す模式図である。図3におい
て、7aは弾性体、8は圧着ステージを示す。
(Embodiment 3) FIG. 3 shows Embodiment 3 of the present invention.
FIG. 2 is a schematic diagram showing the semiconductor mounting device in FIG. In FIG. 3, reference numeral 7a denotes an elastic body, and 8 denotes a pressure bonding stage.

【0022】図3に示す通り、本実施の形態での半導体
実装装置では、被接着物を置く圧着ステージ8にゴム等
からなる弾性体7aを設けており、この場合も実装の形
態2と同様、この弾性体7aにより、被接着物の反りや
凹凸にも追随して、半導体素子の全面に均等に荷重が掛
けられ、信頼性の高い半導体装置を実現することができ
る。
As shown in FIG. 3, in the semiconductor mounting apparatus according to the present embodiment, an elastic body 7a made of rubber or the like is provided on a compression stage 8 on which an object to be bonded is placed. With the elastic member 7a, a load is evenly applied to the entire surface of the semiconductor element by following the warpage and the unevenness of the adherend, and a highly reliable semiconductor device can be realized.

【0023】(実施の形態4)図4は、本実施の形態4
での半導体装置の製造方法を示す模式図である。図4に
おいて、1a〜1nは半導体素子を示す。
(Embodiment 4) FIG. 4 shows Embodiment 4 of the present invention.
FIG. 4 is a schematic view showing a method for manufacturing a semiconductor device in FIG. In FIG. 4, 1a to 1n indicate semiconductor elements.

【0024】図4に示す通り、本実施の形態での半導体
実装装置を用いた実装プロセスは、(a)実装する複数
の半導体素子1a〜1nを厚み毎にランク分けし、ま
ず、(b)熱硬化性樹脂2を形成したプリント基板3上
に、最も薄いランクの半導体素子1aを位置決めしてマ
ウントし、(c)加圧ツール5を用いて、半導体素子1
a側から荷重と熱を加え、更に、(d)次に薄いランク
の半導体素子1bを位置決めしてマウントし、(e)加
圧ツール5を用いて、半導体素子1b側から荷重と熱を
加え、このようなプロセスを繰り返して、最後に、
(f)最も厚いランクの半導体素子1nを位置決めして
マウントし、(g)加圧ツール5を用いて、半導体素子
1n側から荷重と熱を加える工程からなる。これまで、
同一基板上に厚みが極端に異なる複数の半導体素子を、
熱硬化性樹脂を用いて圧着しようとした場合に、1つの
半導体素子を圧着する際、誤って隣接する半導体素子に
荷重や熱が掛からないようにするため、各半導体素子の
形状に合わせた専用の加熱加圧ツールを用意したり、で
きるだけ半導体素子を近接させないように工夫する必要
があったが、本実施の形態では、1つの半導体素子を圧
着する際、隣接して存在する半導体素子の方が薄いた
め、荷重や熱を加えることがなく、専用の加熱加圧ツー
ルを用意したり、できるだけ半導体素子を近接させない
ように工夫する必要がなくなる。
As shown in FIG. 4, the mounting process using the semiconductor mounting apparatus according to the present embodiment is as follows. (A) A plurality of semiconductor elements 1a to 1n to be mounted are ranked according to their thickness, and first, (b) The semiconductor element 1a having the thinnest rank is positioned and mounted on the printed circuit board 3 on which the thermosetting resin 2 is formed, and (c) the semiconductor element 1 is
A load and heat are applied from the side a. Further, (d) the semiconductor element 1b having the next thinner rank is positioned and mounted. (e) The load and heat are applied from the side of the semiconductor element 1b using the pressing tool 5. , Repeating this process, and finally,
(F) positioning and mounting the semiconductor element 1n of the thickest rank, and (g) applying a load and heat from the semiconductor element 1n side using the pressing tool 5. Until now,
Multiple semiconductor elements with extremely different thicknesses on the same substrate,
When trying to press-bond one semiconductor element using thermosetting resin, in order to prevent the load and heat from being applied to the adjacent semiconductor elements by mistake, a special Although it was necessary to prepare a heating / pressing tool of the type described above and to devise such a method that the semiconductor elements were not brought close to each other as much as possible, in this embodiment, when one semiconductor element is crimped, Since it is thin, there is no need to apply a load or heat, and it is not necessary to prepare a dedicated heating / pressing tool or devise to keep the semiconductor element as close as possible.

【0025】(実施の形態5)図5は、本実施の形態5
での半導体装置を示す断面図である。図5において、9
は配線パターン、10はベタ銅箔を示す。
(Embodiment 5) FIG. 5 shows Embodiment 5 of the present invention.
FIG. 2 is a cross-sectional view illustrating the semiconductor device in FIG. In FIG. 5, 9
Indicates a wiring pattern, and 10 indicates a solid copper foil.

【0026】本実施の形態の半導体装置は、同一基板上
に複数の半導体素子を、熱硬化性樹脂を介して、一度に
圧着して形成されるが、図5に示す通り、そこで使用さ
れるプリント基板3は多層基板からなり、内層の配線パ
ターン9以外の全てにベタ銅箔10を形成してなる。同
一基板上に複数の半導体素子を、熱硬化性樹脂を介し
て、一度に圧着する場合、厚みの薄い半導体素子にも十
分な荷重を掛けるために、圧着荷重は高くなる傾向にあ
る。一方、圧着荷重が高くなれば、実装信頼性を劣化さ
せる熱硬化性樹脂内に発生する気泡の量が増加傾向にな
るため、これを減らす手段が必要になってくる。気泡の
発生は、加熱時の熱硬化性樹脂の急激な温度上昇によっ
て発生する傾向があり、それを防ぐ手段として、プリン
ト基板の熱伝導性を増加させる方法が考えられる。本実
施の形態のように、内層に、熱伝導性の良い銅箔を形成
することにより、上記のような効果が得られ、信頼性を
向上させることが可能になる。
The semiconductor device of the present embodiment is formed by pressing a plurality of semiconductor elements on the same substrate at once through a thermosetting resin, and is used there as shown in FIG. The printed board 3 is formed of a multilayer board, and is formed by forming a solid copper foil 10 on all of the layers except the wiring pattern 9 in the inner layer. When a plurality of semiconductor elements are pressed at the same time on the same substrate via a thermosetting resin, a sufficient load is applied to a thin semiconductor element, so that the pressure load tends to increase. On the other hand, when the pressure load increases, the amount of air bubbles generated in the thermosetting resin which deteriorates the mounting reliability tends to increase, and a means for reducing this is required. The generation of bubbles tends to occur due to a rapid rise in temperature of the thermosetting resin during heating, and as a means for preventing this, a method of increasing the thermal conductivity of the printed circuit board can be considered. By forming a copper foil having good thermal conductivity in the inner layer as in the present embodiment, the above-described effects can be obtained, and the reliability can be improved.

【0027】(実施の形態6)本実施の形態では、同一
基板上に複数の半導体素子を、熱硬化性樹脂を介して、
一度に圧着してなる半導体装置において、熱硬化性樹脂
の硬さを各半導体素子に応じて、変えて用いる。バンプ
数やチップサイズの違う複数の半導体素子を、同じ硬さ
の熱硬化性樹脂を用いて一度に圧着しようとすると、必
然的に、各半導体素子のバンプに掛かる荷重は異なるの
に対し、バンプに掛けるべき最適な荷重範囲が存在する
が、各半導体素子に合わせて硬さの違う熱硬化性樹脂を
用いることによって、最適な荷重範囲に収まるように
し、信頼性を向上させることができる。
(Embodiment 6) In this embodiment, a plurality of semiconductor elements are formed on the same substrate via a thermosetting resin.
In a semiconductor device which is pressed at once, the hardness of the thermosetting resin is changed according to each semiconductor element. If multiple semiconductor elements with different numbers of bumps and chip sizes are to be pressed at once using thermosetting resin of the same hardness, the load applied to the bumps of each semiconductor element will inevitably differ. Although there is an optimum load range to be applied to the semiconductor device, the use of a thermosetting resin having a different hardness according to each semiconductor element allows the semiconductor device to fall within the optimum load range and improve reliability.

【0028】[0028]

【発明の効果】以上のように本発明での半導体実装装置
は、加圧用ツールと加熱用ツールを独立して設けること
により、同一基板上に複数の半導体素子を、熱硬化性樹
脂を介して、一度に圧着する場合に、薄い方の素子ま
で、加圧した後、熱を加えることができ、半導体素子と
プリント基板の接続を得る前に、熱硬化性樹脂が硬化し
始めることなく、所望の荷重と熱をタイミングよく加え
ることができ、確実に半導体素子とプリント基板の接続
を得ることができる。
As described above, in the semiconductor mounting apparatus according to the present invention, a plurality of semiconductor elements are provided on the same substrate via a thermosetting resin by independently providing a pressing tool and a heating tool. In the case of pressing all at once, heat can be applied after pressing to the thinner element, and before the connection between the semiconductor element and the printed circuit board is obtained, the thermosetting resin does not start to be cured, And the heat can be applied in a timely manner, and the connection between the semiconductor element and the printed circuit board can be reliably obtained.

【図面の簡単な説明】[Brief description of the drawings]

【図1】実施の形態1での半導体実装装置を用いた実装
プロセスを示す模式工程断面図
FIG. 1 is a schematic process cross-sectional view showing a mounting process using a semiconductor mounting device according to a first embodiment.

【図2】実施の形態2での半導体実装装置を示す模式断
面図
FIG. 2 is a schematic sectional view showing a semiconductor mounting device according to a second embodiment.

【図3】実施の形態3での半導体実装装置を示す模式断
面図
FIG. 3 is a schematic sectional view showing a semiconductor mounting device according to a third embodiment;

【図4】実施の形態4での半導体装置の製造方法を示す
模式工程断面図
FIG. 4 is a schematic process cross-sectional view illustrating a method for manufacturing a semiconductor device in Embodiment 4.

【図5】実施の形態5での半導体装置を示す模式断面図FIG. 5 is a schematic cross-sectional view illustrating a semiconductor device in Embodiment 5.

【図6】従来の半導体実装装置を用いた半導体装置の製
造プロセスを示す模式工程断面図
FIG. 6 is a schematic process sectional view showing a manufacturing process of a semiconductor device using a conventional semiconductor mounting device.

【符号の説明】[Explanation of symbols]

1 半導体素子 2 熱硬化性樹脂 3 プリント基板 4 チップマウンタ 5 加圧ツール 6 加熱ツール 7 弾性体 8 圧着ステージ DESCRIPTION OF SYMBOLS 1 Semiconductor element 2 Thermosetting resin 3 Printed circuit board 4 Chip mounter 5 Pressure tool 6 Heating tool 7 Elastic body 8 Compression stage

Claims (6)

【特許請求の範囲】[Claims] 【請求項1】 熱硬化性樹脂を形成したプリント基板上
に複数の半導体素子をマウントし、前記複数の半導体素
子側からツールを用いて、前記複数の半導体素子を一度
に荷重と熱を加えることによって、前記複数の半導体素
子と前記プリント基板を圧着する装置であって、加圧用
ツールと加熱用ツールを独立して設けたことを特徴とす
る半導体実装装置。
1. A method of mounting a plurality of semiconductor elements on a printed circuit board on which a thermosetting resin is formed, and applying a load and heat to the plurality of semiconductor elements at once using a tool from the plurality of semiconductor elements. A pressurizing tool and a heating tool are provided independently of each other, wherein the pressurizing tool and the heating tool are independently provided.
【請求項2】 加圧ツールに傾き補正機構を設けたこと
を特徴とする請求項1記載の半導体実装装置。
2. The semiconductor mounting apparatus according to claim 1, wherein an inclination correcting mechanism is provided on the pressing tool.
【請求項3】 プリント基板を置くステージに傾き補正
機構を設けたことを特徴とする請求項1記載の半導体実
装装置。
3. The semiconductor mounting apparatus according to claim 1, wherein an inclination correcting mechanism is provided on a stage on which the printed circuit board is placed.
【請求項4】 熱硬化性樹脂を介して、複数の半導体素
子をプリント基板に圧着してなる半導体装置において、
前記複数の半導体素子の厚みをランク分けし、薄いもの
から順番にマウント及び圧着を行うことを特徴とする半
導体実装装置。
4. A semiconductor device comprising a plurality of semiconductor elements pressed on a printed circuit board via a thermosetting resin,
A semiconductor mounting device wherein the thicknesses of the plurality of semiconductor elements are ranked, and mounting and crimping are performed in order from a thinner one.
【請求項5】 内層の配線パターン以外の全てに銅箔を
形成し、熱伝導性を向上させた多層プリント基板上に、
熱硬化性樹脂を介して、複数の半導体素子を同時に圧着
してなることを特徴とする半導体実装装置。
5. A multilayer printed circuit board having a copper foil formed on all parts other than the wiring pattern of the inner layer and having improved thermal conductivity,
A semiconductor mounting device, wherein a plurality of semiconductor elements are simultaneously compression-bonded via a thermosetting resin.
【請求項6】 バンプ数及びチップサイズの違う複数の
半導体素子を、熱硬化性樹脂を介して、プリント基板上
に、一度に圧着してなる半導体装置において、各半導体
素子のバンプに掛かる荷重が同じになるように、前記各
半導体素子に用いる熱硬化性樹脂の硬さを調整してなる
ことを特徴とする半導体実装装置。
6. In a semiconductor device in which a plurality of semiconductor elements having different numbers of bumps and chip sizes are pressure-bonded on a printed circuit board at a time via a thermosetting resin, a load applied to the bumps of each semiconductor element is reduced. A semiconductor mounting apparatus characterized in that the hardness of a thermosetting resin used for each of the semiconductor elements is adjusted to be the same.
JP2001150503A 2001-05-21 2001-05-21 Semiconductor mounting apparatus Pending JP2002343833A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2001150503A JP2002343833A (en) 2001-05-21 2001-05-21 Semiconductor mounting apparatus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2001150503A JP2002343833A (en) 2001-05-21 2001-05-21 Semiconductor mounting apparatus

Publications (1)

Publication Number Publication Date
JP2002343833A true JP2002343833A (en) 2002-11-29

Family

ID=18995504

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2001150503A Pending JP2002343833A (en) 2001-05-21 2001-05-21 Semiconductor mounting apparatus

Country Status (1)

Country Link
JP (1) JP2002343833A (en)

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