JP2002341063A - Electronic timepiece - Google Patents

Abstract

PROBLEM TO BE SOLVED: To determine whether adjustment data are normal or abnormal without carrying out a complicated inspection. SOLUTION: A normal range limit memorizing means 3e is formed to compare its contents with the adjustment data, and when it is determined that the data are abnormal, an indication corresponding to it is executed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] The present invention relates to an electronic timepiece.

[0002]

2. Description of the Related Art Conventionally, a storage means capable of writing and reading data such as a hand position is provided. When a voltage drop of a power supply voltage is detected, a pointer position data is written into a non-volatile memory and a clock operation is stopped. A so-called hand position storage timepiece that reads out the pointer position data from the non-volatile memory and restarts the timekeeping operation has been commercialized. Clocks have also been commercialized in which data for adjusting the rate is written to another address of the above-mentioned nonvolatile memory so that the rate data unique to the clock is not lost. Normally, the rate data is created and written based on the rate measured in the inspection stage of the watch. Such write / read control is all performed by microcomputer software.

An embodiment of a conventional example will be described below with reference to the drawings. FIG. 2 is a circuit block diagram of a conventional electronic timepiece. An oscillator 1 uses a crystal oscillator as a reference signal, and outputs an oscillation signal. Reference numeral 2 denotes a frequency dividing circuit that receives an oscillation signal from the oscillator 1 and outputs a frequency divided signal S2.
The rate adjustment is performed by the rate adjustment signal S13 from the storage unit 13 described later. Reference numeral 3 denotes a well-known microcomputer (hereinafter, referred to as a microcomputer).
M3b and RAM 3c. A program for controlling the CPU 3a is written in the ROM 3b.
The CPU 3a executes the RAM 3c according to the program.
A clocking operation using the frequency-divided signal S2 as a reference clock is performed while exchanging data with the hand, and the hand positions of a second hand 11a, hour / minute hands 11c, 11b, and date plate 11d, which will be described later, are calculated according to the clocking content. Performs needle control. It also controls the operation according to the input signal and the output signal. The result of calculating the hand position is stored as hand position data in a hand position storage unit 3d in the RAM 3c.

[0004] Reference numeral 4 denotes a drive pulse S4 having alternately different polarities.
0, S41, and S42.
A drive pulse selected by a selection signal S30 from the microcomputer 3 is output, and the step motors 5, 6, and 7 are driven.
Reference numerals 8, 9, and 10 denote reduction gear trains meshed with the stepping motors 5, 6, and 7, and the second hand 11a supported by a second hand wheel that constitutes a part of the reduction gear train 8, and the reduction gear train. The minute hand 11b and the hour hand 11c supported by the minute wheel and the hour wheel that constitute a part of the train wheel train 9 and the hour and minute, respectively. Is displayed.

Reference numeral 12 denotes a power supply voltage detection circuit which samples a power supply voltage by a timing signal S31 from the microcomputer 3 and compensates for the operations of the microcomputer 3, the step motors 5, 6, 7 and the reduction gear trains 8, 9, 10. When the lowest possible voltage is detected, a voltage drop signal S120 is output. Also, the power supply voltage detection circuit 12 has a power supply voltage return circuit inside,
The solar clock emits light, and the general clock outputs a voltage recovery signal S121 when the power supply voltage recovers due to battery replacement or the like.

Reference numeral 13 denotes a storage unit constituted by a non-volatile memory or the like, which performs data writing and data reading at an address designated by an address signal S32, a data input / output signal S33, and a control signal S34 from the microcomputer 3.
Also, the rate adjusting data from the external writing device 14 described later is output to the frequency dividing circuit 2 as the adjusting signal S13. 14
Is an external writing device, which is used when writing data (for example, rate adjustment data) in advance in the storage means 13, and includes an address signal S140 and a data signal S141 for writing.
And outputs the control signal S142. The microcomputer 3 writes data to an address specified in the storage means 13 by an external write only address signal S35, a data input / output signal S33, and a control signal S34 via the gate circuit 16 based on a signal from the external writing device 14. Gate circuit 16
Is a voltage drop signal S output from the power supply voltage detection circuit 12.
At 120, the state is turned off, and the addressing of the storage means 13 is prohibited.

Reference numeral 15 denotes a switch group which operates in conjunction with the external operation member, and is a crown (not shown) of the external operation member.
A switch SWa that operates in conjunction with the one-stage drawer position,
A switch SWb that operates in conjunction with the crown two-stage pull-out position, a switch SWc that operates when the crown performs a forward rotation operation, and a switch SWd that operates when the crown performs a reverse rotation operation, and the operation signal of each switch is a microcomputer. 3 has been entered. The microcomputer 3 performs a correction operation or the like according to a program written in the ROM 3b in response to a switch input operation signal.

Next, the operation of the electronic timepiece having the above configuration will be described with reference to FIG. The rate adjustment data is written and stored in advance in the storage means 13 in the inspection process or the like according to the following procedure. The external writing device 14 sets the address at which the rate adjustment data is written in the address signal S140, sets the rate adjustment data in the data signal S141, and outputs a write signal as the control signal S142. The gate circuit 16 receives the voltage drop signal S120 from the power supply voltage detection circuit 12, but since a sufficient voltage is supplied from the outside in an inspection process or the like, the voltage drop signal S120 is not output, and the gate circuit 16 is turned on. The state is maintained. The microcomputer 3 is an external writing device 1
4, an address for writing the rate adjustment data is output to the external write only address signal S35 via the gate circuit 16, the rate adjustment data is output to the data input / output signal S33, and the write signal is output to the control signal S34. Then, the rate adjustment data is written and stored in the specified address of the storage means 13.

The rate adjustment data stored in the storage means 13 is output to the rate adjustment signal S13 immediately after the system is reset (not shown) immediately after the system is reset when the battery is turned on or the like. Adjust the rate. The wearer rotates the second hand 11a to the 12 o'clock position and the hour and minute hands 11b and 11c to 12
The hour position and date plate 11d are adjusted to one day to set a reference position.
When the reference position is set and the crown is pushed down to the 0th step (normal position), the microcomputer 3 stores that the reference position setting has been completed and stores the time measurement content at 12:00 am on January 1, 0
At 0:00, the hand position data of the second hand 11a, hour / minute hands 11c, 11b, and date plate 11d in the hand position storage unit 3d are set to the initial values, the timekeeping operation is started, and the second hand is moved by one second. At the same time, the second hand position data in the hand position storage unit 3d is also added.

Next, the operation of adjusting the time and calendar will be described. When the crown two-stage pulling position signal SWb after the reference position setting is completed is input, the microcomputer 3 sets the time correction state, clears the second of the clock content, and stops the clock operation. At the same time, the number of drive pulses from the current hand position data of the second hand 11a to the 0 second position (12 o'clock position) is calculated, and a selection signal S30 corresponding to the number of pulses is output. The second hand 11a is moved to the 0 second position (12 o'clock position) by the drive pulse S40 of the converter drive circuit 4 and stopped. Further, the second hand position data stored in the hand position storage unit 3d is initialized.

The rotation of the crown in this state (the crown is pulled out at the second stage) corrects the hour and minute times. When the crown rotation operation is input, the microcomputer 3 discriminates between the forward rotation operation and the reverse rotation operation and outputs a selection signal S30. The converter drive circuit 4 outputs a drive pulse S41 for normal rotation in the case of a forward rotation operation and a drive pulse S41 for a reverse rotation in the case of a reverse rotation operation according to the selection signal S30. At the same time, the hand position data in the hand position storage unit 3d is updated. The minute hand 11b and the hour hand 11c are operated by the drive pulse S41 via the stepping motor 6 and the reduction wheel train system 9. The hour and minute of the time measurement, the hour and minute in the hand position storage unit 3d, and the hand position data of the day are also updated at the time corresponding to the current time. When the crown is released from the double-pull position at the exact minute of the time signal, the timing operation starts.

When the crown is pulled out of the two-step pulling position and the position of the crown is pulled down, the calendar correction state is set. When the crown rotation operation is inputted, the normal rotation operation and the reverse rotation operation are discriminated, and the selection signal S30 is output. Is output. The converter driving circuit 4 uses the selection signal S30 for forward rotation when the forward rotation is performed,
At the time of the reverse rotation operation, a drive pulse S42 for reverse rotation is output.
At the same time, the date of the time is updated, and the hand position data of the date plate in the hand position storage unit 3d is updated. The date plate 11d has a drive pulse S42.
Thus, the motor operates via the step motor 7 and the reduction gear train 9. Crown 1-step pull position is released and normal position (0 step)
When it becomes, the hand starts to move for one second, and it enters the normal use state.

In a normal use state, the microcomputer 3 outputs the frequency-divided signal S2
Is performed, and the hand positions of the second hand 11a, the hour and minute hands 11c, 11b, and the date plate 11d according to the contents of the time measurement are calculated, and each hand is controlled. The result of calculating the hand position updates the hand position data in the hand position storage unit 3d in the RAM 3c. The microcomputer 3 outputs a timing signal S31 when a one-minute carry occurs, and the power supply voltage detection circuit 12
Sample the power supply voltage. Power supply voltage detection circuit 12
When a voltage drop is detected, a voltage drop signal S120 is output. The microcomputer 3 stops the timekeeping operation by the voltage drop signal S120, and stores the timekeeping contents of the RAM 3c, the second hand position data, the hour / minute hand position data, and the date hand position data in the hand position storage unit 3d in the storage means 13 by repeating the following procedure. Write. 1. The address signal S3 indicates where in the storage means 13 to write.
Specify with 2. 2. The write data is output as the data input / output signal S33. 3. A write signal is output as the control signal S34. On the other hand, since the gate circuit 16 is turned off by the voltage drop signal S120 output from the power supply voltage detection circuit 12, the external write-only address signal S35 designating the address of the storage means 13 writes the data in the storage means 13 in advance. There is no need to select the enclosed area, and much less to rewrite the data. When the writing is completed, the microcomputer 3 enters a stop state and waits for the return of the power supply voltage.

When the power supply voltage is restored, the power supply voltage detection circuit 12 outputs a voltage restoration signal S121. The microcomputer 3 starts the operation with the voltage return signal S121, and reads out the timekeeping content, second hand position data, hour / minute hand position data, and date hand position data which are written and stored in the storage means 13 when the power supply voltage drops, by repeating the following procedure. The contents of the time measurement in the RAM 3c and the hand position storage unit 3d are stored. 1. The location stored in the storage means 13 is designated by the address signal S32. 2. The read signal is output as the control signal S34. 3. The data output to the data input / output signal S33 is read. 4. The data is stored in the timekeeping contents of the RAM 3c and the hand position storage unit 3d.
To fit. When the reading is completed, the microcomputer 3 starts a timing operation.
There is no need to set the reference position because the contents of the time and the inside of the hand position match. However, there is a time lag between when the voltage drops and the microcomputer stops and when the voltage returns, so that time adjustment is necessary.

[0015]

In the prior art, erroneous writing of data other than the needle position storage portion due to a voltage drop is prohibited by hardware. This improvement has a considerable effect on slow power supply voltage drops due to normal use. However, unfortunately, it is not always perfect for a rapid drop in power supply voltage, for example, when a battery is removed for after-sales service. This is because, in such a case, the power supply of the gate circuit 16 itself also decreases, so that the operation of the gate circuit 16 itself cannot be guaranteed.

Further, when writing the adjustment data, there is a possibility that an erroneous writing may be performed due to an abnormality of the apparatus or a defective jig. Furthermore, even in a normal use state, for example,
Data may be rewritten due to malfunction due to static electricity or the like.

However, it is impossible to determine whether the value of the adjustment data is abnormal unless measurement is actually performed. Therefore, when used as a product, it is almost impossible to notice the abnormality. Further, even in a manufacturing line, such adjustment data is not examined after the inspection, and thus cannot be found if rewriting occurs after the inspection process.

An object of the present invention is to solve the above-mentioned problems and to find out abnormalities of data important for product use such as rate adjustment data without using a large amount of labor.

[0019]

The present invention for achieving the above object has the following configuration. An oscillator that uses a crystal oscillator as a reference signal, a frequency divider that inputs a signal from the oscillator and outputs a frequency-divided signal, and a time-counting circuit that receives the frequency-divided signal from the frequency divider and outputs a time-counting signal An electronic timepiece having display means for displaying the timed content of the timekeeping circuit, storage means for storing various data, and control means for performing write / read control on the storage means, wherein the data stored in the storage means A normal range limit storing means for storing the normal range limit of the data, and when the data is out of the limit range stored in the normal range limit storing means, a special display indicating that the data is abnormal is executed by the display means. It is characterized by doing.

Further, a demonstration immediately after the system reset is performed in a manner different from that in a normal case, thereby displaying a data abnormality. The different styles include not performing a demonstration immediately after a system reset.

[0021]

DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below with reference to the drawings. In the case of the same configuration as that of the conventional example, the description is omitted by assigning the same reference numerals as those of the conventional example. FIG. 1 is a circuit block diagram of an electronic timepiece according to the present invention. The difference from FIG. 2 showing the conventional example is that the normal range limit storage means 3 stores the normal range of the adjustment data in the ROM 3b.
e.

When adjusting the rate, data to be adjusted differs depending on the characteristics of the individual crystal units and oscillators. This means that the adjustment data is different for each clock. Therefore, it is impossible to determine whether the data is normal or abnormal by comparison with the fixed value, and it is determined whether the adjustment data is normal or abnormal depending on whether the adjustment data is within a range considered to be normal. That is why the normal range limit storage means 3e is provided.

Next, the actual operation will be described with reference to FIG. FIG. 3 is a flowchart showing the operation control from the system reset to the end of the initial demonstration according to the present embodiment. The initial demonstration after the initial reset is performed to indicate to the user that the initial reset has been performed and the clock has been initialized. The user referred to here has a stronger meaning of the inspector in the factory than the end user. In the following, the term inspector will be used. The form of the initial demonstration is arbitrary, but here, the second hand 11a is made to make one round in the normal rotation direction.

After the writing of the rate adjusting data by the external writing device 14 is completed, the system reset is executed and then released (step S1). After the microcomputer 3 executes various initial settings (step S2), the microcomputer 3 adjusts with the address signal S32. The data input / output signal S33
The adjustment data is read from. Then, the read rate adjustment data is temporarily stored in the RAM 3c (step S3).

Next, the microcomputer 3 compares the adjustment data stored in the RAM 3c with the normal range limit value stored in the normal range limit storage means 3e (step S4).
If the comparison shows that the value is normal, the second hand 11
An initial demonstration of making one round in the normal direction is performed to indicate to the inspector that the adjustment data is normal (step S5).

If, as a result of the comparison, it is determined that the adjustment data is an abnormal value, the microcomputer performs a demonstration in a form different from the normal case. Again, the form is arbitrary,
Here, it is assumed that the second hand 11a makes one round in the reverse rotation direction. Since the form is obviously different from the normal case, the inspector can easily notice the abnormality (step S
6). Thereafter, a normal clock operation is performed (step S
7).

In the above-described example, the second hand 11a makes a round in the reverse direction to show an abnormality in the adjustment data.
As another display method, as shown in FIG. 4, there is a display method in which the initial demonstration of one rotation of the second hand 11a in step S6 in FIG. In this case, since the initial demonstration is not performed only when an abnormality occurs, the control becomes easier than in the case of FIG.

Although the present invention is directed to rate adjustment data and the like, the present invention can also be applied to adjustment data of various sensors, serial numbers, and the like.

[0029]

As described above, according to the present invention, the normal range storage means for storing the limit value of the normal range of the adjustment data is provided, the data is compared with the adjustment data, and when it is determined that the adjustment data is abnormal, the corresponding display is displayed. As a result, it is possible to find an abnormality in the product without performing a complicated inspection, and it is possible to prevent the outflow of defective products to the market at low cost. Further, in the actual use state, the system reset is performed only at the time of an abnormality such as a runaway, so that there is a very low possibility that the end user in the market will perform the system reset. Therefore, the above-mentioned effect can be expected without end-user being confused at the time of normal use by displaying an abnormal data at the time of the initial demonstration after the system reset.

[Brief description of the drawings]

FIG. 1 is a circuit block diagram of an electronic timepiece according to an embodiment of the present invention.

FIG. 2 is a circuit block diagram of a conventional electronic timepiece.

FIG. 3 is a flowchart showing an operation of the electronic timepiece according to one embodiment of the present invention from after an initial reset to the end of an initial demonstration.

FIG. 4 is a flowchart showing an operation of the electronic timepiece according to another embodiment of the present invention from after an initial reset to the end of an initial demonstration.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Oscillator 2 Divider circuit 3a CPU 3b ROM 3c RAM 3d Needle position storage part 3e Normal range limit storage means 12 Power supply voltage detection circuit 13 Storage means

Continued on the front page F term (reference) 2F001 AA00 AA09 AB01 AE03 AG16 AH05 2F002 AA11 AA12 AD06 AD07 AE01 BA06 BA08 BD03 CB02 CB12 ED01 ED02 ED04 EE08 FA14 GA00 GA04 2F082 AA00 BB02 CC01 DD02 DD10 HH03

Claims (4)

[Claims] An oscillator using a quartz oscillator as a reference signal;
A frequency divider that receives a signal from the oscillator and outputs a frequency-divided signal, a time-counting circuit that receives a frequency-divided signal from the frequency divider and outputs a time-counting signal, and a display that displays the time-counting content of the time-counting circuit Means, a storage means for storing various data, and a control means for performing write / read control on the storage means, a normal range limit storage for storing a normal range limit of data stored in the storage means. An electronic timepiece having means for performing a special display indicating that the data is abnormal by the display means when the data is outside the limit range stored in the normal range limit storage means. 2. The electronic timepiece according to claim 1, wherein the data is frequency adjustment data of the frequency dividing circuit. 3. The electronic timepiece according to claim 1, wherein the special display is performed by making a demonstration display at the time of initial reset different from a case where the data is normal. 4. The electronic timepiece according to claim 1, wherein the special display is represented by not performing a demonstration display at the time of initial reset.