JP2002281395A - Imaging system - Google Patents

Abstract

PROBLEM TO BE SOLVED: To efficiently compensate defects without causing increase of waiting time due to read of defect data from a nonvolatile memory. SOLUTION: The read of the defect data is performed from an EEPROM 118 to a RAM 112a not by every application of power but based on recognition of mounting of a battery. In addition, additional write of the defect data newly detected by a defect data detecting part 112c to the EEPROM 118 is performed by every application of power. Consequently, use of control that the read of the defect data from the EEPROM 118 is performed, for example, only once after mounting the battery is enabled and the waiting time is reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image pickup apparatus, and more particularly to an image pickup apparatus having a pixel defect compensation function.

[0002]

2. Description of the Related Art Imaging devices such as video cameras have been widely used. In recent years, electronic still cameras that mainly capture and record still images have also come into widespread use especially as digital cameras, and video movies mainly for recording moving images also have a still image capturing and recording function. Long-time exposure, which is mainly used for shooting still images, increases the exposure time by increasing the charge accumulation time in the image sensor, thereby enabling shooting without using auxiliary lighting such as a strobe even under low illumination. It is known as a technology.

On the other hand, an image pickup device such as a CCD has a dark output due to the presence of a so-called dark current, which is superimposed on an image signal, thereby deteriorating the image quality. If there is a pixel with a large dark output level, it is called a pixel defect,
It is widely practiced to supplement information using output information of neighboring pixels without using output information of the pixel. In the present specification, such a complementing process is referred to as pixel defect compensation. A predetermined (often 1/60 in NTSC) which is often determined on the premise of driving a moving image at the used frame rate
The dark output is evaluated at a standard exposure time of seconds or a predetermined margin based on the predetermined margin (for example, 1/15 second when the margin is 4 times), and a pixel having a large level is regarded as a defective pixel. Apply the pixel defect compensation.

Further, Japanese Patent Application Laid-Open No. 06-038113 discloses a technique for improving that a pixel defect involves temperature dependence and aging, so that it is not sufficient to evaluate a defective pixel just before shipment from a factory. It is known. That is, in this publication, the light receiving surface is shielded from light by closing the iris immediately after the power is turned on, and the dark output of the image sensor is evaluated prior to use of the camera. A technique for detecting defects as pixels and performing defect compensation is described.

[0005]

Generally, defective data is recorded in a nonvolatile memory such as an EEPROM in order to prevent the data from being lost even when the battery is replaced. However, since reading from the nonvolatile memory usually takes a long time, there is a problem in that, for example, if the defective data is read each time the power is turned on, the waiting time increases.

SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and has as its object to enable efficient defect compensation without increasing wait time, and to reduce image quality deterioration due to an increase in pixel defects over time. It is an object of the present invention to provide a high-performance imaging device that does not cause such a problem.

[0007]

In order to solve the above problems, an image pickup apparatus according to the present invention stores an image pickup device, an image pickup optical system for inputting a subject image to the image pickup device, and defect data of the image pickup device. A non-volatile storage unit, an internal memory for holding defect data read from the non-volatile storage unit, a storage unit control unit for controlling reading and writing of data from and to the non-volatile storage unit and the internal memory, Recognizing the first power-on due to the start of power supply from a power supply as an energy supply source to the apparatus main body, based on a predetermined operation in the state after the first power-on, the apparatus Power supply control means for controlling a second power-on for supplying a current to each unit; and, based on defect data of the image sensor, neighboring pixel data for an output of the image sensor. Defect compensation means for performing compensation processing by the storage means control means, wherein the storage means control means reads out the defect data stored in the nonvolatile storage means based on the recognition of the first power-on by the recognition means. The writing into the internal memory is performed, and the defect compensation unit is configured to perform the compensation processing based on defect data on the internal memory.

In this imaging apparatus, the defective data is read from the nonvolatile storage means to the internal memory based on the recognition of the first power-on by the recognition means, rather than every time the second power-on is performed. . Therefore, it is possible to use control such that the defect data is read from the non-volatile storage means only once after the recognition of the first power-on, for example, when the battery is installed, and the waiting time can be reduced.

The reading of the defect data from the nonvolatile memory means to the internal memory can be performed, for example, based on the first power-on after the first power-on.

Further, the apparatus further comprises defect data detecting means for detecting pixel defect data relating to the image sensor by analyzing an output of the image sensor, and at least one of the defect data detected by the defect data detecting means. By writing the data of the section to the nonvolatile storage means, the contents of the nonvolatile storage means can always be kept up to date.

Further, the compensation processing by the defect compensation means is performed based on both the defect data read from the nonvolatile memory to the internal memory and the defect data detected by the defect data detection means. Accordingly, it is possible to correctly perform the compensation process even for a defect detected after reading the defect data from the nonvolatile storage unit to the internal memory.

In addition, the detection of the pixel defect data and the writing of the detected data to the non-volatile storage means include:
It is preferable that the processing is performed in a state where the second power is turned on, or that the processing is performed in response to the second power-on, at least after the power switch is turned on by a user. Thus, it is possible to avoid a problem that the imaging apparatus operates even when the power switch is not turned on.

Further, address data of a defective pixel can be used as the defect data.

Further, as the internal memory, it is preferable to use a volatile memory that is backed up so that its contents are not lost when the first power is turned on.

[0015]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing a configuration of a digital camera according to an embodiment of the present invention.

In FIG. 1, reference numeral 101 denotes an imaging lens system including various lenses; 102, a lens driving mechanism for driving the lens system 101; 103, an exposure control mechanism for controlling the diaphragm and shutter device of the lens system 101; A low-pass and infrared cut filter; 105, a CCD color image sensor for photoelectrically converting a subject image; 106, a CCD driver for driving the image sensor 105;
A pre-processing circuit including a / D converter, etc .; 108, a digital processing circuit for performing various digital arithmetic processing such as gamma conversion; 109, a card interface; 110, a memory card; 111, an LCD image display system; Is shown.

In the figure, reference numeral 112 denotes a system controller (CPU) for comprehensively controlling each unit, 113 denotes an operation switch system including various SWs, and 114 denotes an operation display for displaying an operation state and a mode state. System, 115 is a lens driver for controlling the lens driving mechanism 102, 116 is a strobe as a light emitting means, 117 is an exposure control driver for controlling the exposure control mechanism 103 and the strobe 116, and 118 is various kinds of setting information and the like. A non-volatile memory (EEPROM) 119 is a power supply circuit that supplies operating power to each unit by a built-in battery (battery) or an external power supply input via an AC adapter.

In the camera according to the present embodiment, the system controller 112 performs overall control, and controls the exposure control mechanism 103 and the CCD driver 106 to drive the CCD image pickup device 105 to perform exposure (charge accumulation). And read out the signal, A / D convert the signal through the pre-processing circuit 107 and take it into the digital process circuit 108, perform various signal processing in the digital process circuit 108, and then perform the card interface 1
09 to the memory card 110.

The system controller 112 comprises a microcomputer such as a CISC chip.
A RAM 112a is provided as an internal memory. This R
AM 112a is a volatile memory such as an SRAM,
Even when the power switch of the camera is off, backup is performed as long as the battery or external power is supplied, and the stored contents are retained without being lost.

Further, the system controller 112 has functions relating to defect detection and pixel defect compensation,
Memory control unit 11 for controlling writing / reading of data to / from EEPROM 118 and RAM 112a
2b and a defect data detector 11 for detecting pixel defect data by analyzing a signal from the CCD 105 obtained in a light-shielded state by the digital process circuit 118.
2c, and a defect compensation control unit 112d that performs a pixel defect compensation process on a signal obtained from the CCD 105 at the time of main imaging.

The pixel defect compensation processing is performed by the defect compensation control unit 11.
Based on the command from 2d, R
The process is executed in the digital process circuit 108 based on both the defect data read by the AM 112a and the defect data newly detected by the defect data detection unit 112c. In the initial stage (when the camera is shipped from the factory), only the initial defect data obtained by the inspection in the factory is E
Although stored in the EPROM 118, new defect data is additionally registered in the EEPROM 118 each time a defect is detected by the defect data detection unit 112c.

Hereinafter, camera control by the system controller 112 will be described focusing on processing directly related to detection and compensation of pixel defects according to the present invention.

Prior to photographing, an exposure time required for photographing is set based on a manual setting or a photometric result. Next, the camera waits for a shooting trigger command for the main imaging, and upon receiving the command, performs exposure based on a predetermined exposure control value.
After the image signal is read out from the memory card and subjected to predetermined signal processing, it is recorded on the memory card 110. At this time, pixel defect compensation is performed for the defective pixel specified by the defect data.
Video signal processing up to recording after defect compensation,
It is used per se as necessary according to its necessity. For example, color balance processing, conversion to a luminance-color difference signal by matrix operation or inverse conversion processing, false color removal or reduction processing by band limitation, γ conversion, etc. Representative types of non-linear processing, various information compression processing, and the like.

The defect compensation in the camera according to the present embodiment employs the well-known "complementation of a pixel in which a defect address is registered with a neighboring pixel". Of the pixels, four pixels closest to the defective pixel: In the case of an RGB Bayer array, for example, four G pixels, R,
For (or B), the average value of the four pixel information of four R (or B) pixels located next to each other with one G interposed therebetween instead of directly adjacent in the four directions of up, down, left, and right) is applied instead. Things have been adopted.

The camera performs defect detection when necessary, and additionally updates the defect data based on the result.

Here, the premise of the defect data additional registration processing in the present embodiment will be described.

That is, recent studies by the present inventors have revealed that some of the defects may be referred to as “flashing defects”. This is because, when image pickup (charge accumulation and readout) is repeated under exactly the same image pickup conditions including temperature and exposure (accumulation) time, for example, the same pixel sometimes becomes white defect (excessive dark charge). In other words, the behavior is as if a white defect (excessive dark charge) is blinking, for example, or a normal signal is output once.

Although no clear theory has yet been found for the cause of the blinking defect, the following findings have been obtained at least phenomenologically. That is, this blinking seems to include a certain probabilistic element, has no particular periodicity or dependence on the number of readouts, and blinks during repeated imaging in a relatively short period (short periodicity: as described above). No periodicity has been found in this phenomenon, but it has been found that some metaphorically use the term "period." Up to this point, it is possible that extremely long-period flickering defects were also included in the late defects that were conventionally considered to be destructive (non-returning) phenomena due to the effects of natural radioactivity and incoming cosmic rays. On the other hand, it has been pointed out that many short-period flickering defects occur lately.

In the presence of such various blinking defects, a conventional simple defect registration method (using a defect address registered at a factory) or a simple immediately preceding detection method (for example, when the power is turned on, etc.). Performing the detection and using the newly obtained defective address) is obviously ineffective. Further, even if both are used together, it is not sufficient by itself, and it is essential to additionally register and use a newly detected defect address. The present embodiment is based on such an additional registration system.

Next, referring to FIG.
8 and the defect data read / write processing will be described.

As shown, the EEPROM 118 has two storage areas, a storage area A and a storage area B.
The storage area B stores initial defect data relating to the CCD 105 obtained before shipment from the factory. This storage area B
Is a read-only area to prevent destruction of the initial defect data, and writing to the storage area B is prohibited. The storage area B is assigned a storage size capable of registering defective pixel addresses of, for example, 512 to 1024 pixels as initial defect data.

The storage area A is a storage area for additionally registering the defect data newly acquired by the defect detection processing by the defect data detection unit 112c after shipment from the factory. The storage area A is assigned a storage size capable of registering defective pixel addresses of, for example, 128 pixels. In the initial state after factory shipment, no defect data is stored in the storage area A. That is, the storage area A is a dedicated area used for registering a late defective pixel detected by the defective data detection unit 112c.

The RAM 112a has three storage areas C, D, and E as shown in the figure. The storage area D is an area for storing initial defect data read from the storage area B of the EEPROM 118, and the storage area C is for storing additionally registered defect data read from the storage area A of the EEPROM 118. Area. The storage sizes of the storage areas C and D are the same as the storage areas A and B, respectively.

The process of reading the contents of the storage areas A and B of the EEPROM 118 and writing them to the storage areas C and D of the RAM 112a is performed, for example, when the power switch is first turned on after the battery is inserted. Connection) is performed. As described above, when the battery is inserted, the stored content of the RAM 112a is not lost unless the battery runs out, but once the battery is removed for battery replacement or the like, the stored content of the RAM 112a may be lost. become. For this reason, once the battery is inserted,
118, the contents of the storage areas A and B are copied to the storage areas C and D in the RAM 112a. Thereafter, the reading from the EEPROM 118 is not performed until the next time the battery is inserted and the power switch is turned on. Without doing
Defect compensation is performed using the defect data copied on the RAM 112a. As described above, in this embodiment, when the battery is mounted and the power switch is turned on, the EEPROM 11
8 to control the read operation of the defect data from
The reading from the OM 118 is performed only once after the battery is mounted.

The storage area E on the RAM 112a is used to store addresses of defective pixels detected by the defect detection operation by the defect data detection unit 112c. The storage area E is assigned a storage size capable of registering defective pixel addresses of, for example, 32 pixels.

The defect detection by the defect data detector 112c is performed on the remaining pixels excluding the defective pixels registered as the initial defect data. For this reason, the defect data stored in the storage area E is only the address of the late defect generated after the factory shipment. Defect data detector 1
12c, each time a defect detection operation is performed, new defect data acquired by the defect detection operation is stored in the storage area E.
And the new defect data written in the storage area E is additionally registered in the storage area A of the EEPROM 118. When the additional registration data already exists in the storage area A, only the non-overlapping defective pixel addresses among the defective pixel addresses detected by the defect data detection unit 112c are added to the storage area A.

Defect detection and addition of defect data to the EEPROM 118 executed in response thereto are performed, for example, in 2 steps.
It is preferable to perform it at the time of power-on at a rate of about once every four hours. In this case, if power is turned on after 24 hours have passed since the previous defect detection and data addition, new defect detection and data addition are performed at that point. Even when the power is not turned on, a new defect may be detected and data may be additionally written 24 hours after the last defect detection and data addition in a state where the power is turned on, that is, in a normal operation state. .

The defect compensation processing performed by the defect compensation control unit 112d at the time of actual imaging takes into account not only the defect data in the storage areas C and D read from the EEPROM 118 but also new defect data stored in the storage area E. And executed. As a result, even if reading from the EEPROM 118 is limited to only once after the battery is inserted, defect compensation based on the latest detected defect is always performed. Although defective pixel addresses may overlap in the storage area C and the storage area E, the image quality is not affected even if the defect compensation processing is performed twice on the same pixel. In addition, every time a defect is detected, new defect data written in the storage area E is added to the storage area A of the EEPROM 118 in a state where duplication is eliminated.
Even if the storage content of 12a is lost, it is possible to read out all the defect data including the latest additional registration data from the EEPROM 118.

FIG. 3 shows the structure of defect data stored in each of the storage areas A and B. Storage area A,
In both cases, the defect data registered in the storage area is the number of registrable data: the maximum number of registrable pixels (n) The number of registered defects: the number of pixels actually registered as defective pixels Data Area: X. of each defective pixel It has a structure called Y address. In the data area, the maximum number of pixels that can be registered (n = 128 for area A, n = 512 or 1 for area B)
024) of pixel address registration areas.

Next, referring to the flowchart of FIG.
The procedure of the defect detection operation will be described.

First, the system controller 112 shields the light-receiving surface of the image sensor with the shutter device included in the exposure control mechanism 103, and then performs test imaging in the light-shielded state (step S101). That is, in the dark, the CCD driver 106 performs a charge accumulation operation for the longest exposure time Tmax of the camera (setting is arbitrary: the example value 5 s here) to read out a test imaging signal (dark output signal) and store it in the digital process 108 I do. Digital process 10
8, first, "detection defect compensation processing" is performed under the control of the defect compensation control unit 112d (step S10).
2). The “detection defect compensation process” is performed for the purpose of excluding defective pixels registered as initial defect data from detection targets of the defect detection operation, and is performed based on the initial defect data copied to the storage area D. Then, the interpolation processing is performed by the nearest same color pixel.

It is conceivable to perform "detection defect compensation processing" on the additionally registered defect data copied to the storage area C in order to eliminate duplicate detection. Since the reliability of the data is not always sufficient, it is preferable that the defect compensation processing for detection is performed only on the defective pixel specified by the initial defect data.

Next, by analyzing the image information after the defect compensation based on the initial defect data by the digital process 108, defect detection for selecting a pixel having a large dark output level as a defective pixel is performed (step S1).
03). As described above, the “detection defect compensation process” performs the defective pixel detection process on the pixel information after the compensation process is performed based on the initial defect data.
For a pixel that has already been registered as a defective pixel address, defect detection is performed on the compensated data. Therefore, it is possible to prevent a defect that a pixel registered as a defective pixel is detected again as a defect each time it is detected, and it is possible to detect only unregistered late defects. Become.

In the defect detection in step S103, instead of the level comparison method of checking each output level with respect to all data of effective output pixels and comparing it with a reference detection level, the upper 32 dark output levels are used in descending order. A method of simply selecting a pixel is used. That is,
Regardless of the detection level, the worst 32 pixels having a large dark output level are determined as defective pixels. Since the number of detected pixels is limited to 32, the image quality does not break down due to an excessive increase in the number of detected pixels in which the number of pixels to be complemented is equal to or larger than the number of pixels permitted by the defect compensation processing. Further, even if the CCD 105 is an element having a relatively light defect, at least the worst 32 pixels can be detected, so that there is no problem such as a failure to detect a defective pixel.

In the worst 32 pixel selection operation, a buffer for 32 pixels as shown in FIG. 5 is used. For the first 32 pixels, a pair of the pixel address and the dark output level is unconditionally registered in the buffer.
From the 33rd pixel, each pixel is compared with the minimum dark output level currently stored in the buffer,
It is determined whether or not to register in the buffer. in this way,
The pixel selection operation can be performed by simple arithmetic processing.

It is to be noted that the pixel having the maximum dark output level has the same value of 3
When there are more than two pixels, exceptionally, a process of appropriately selecting a pixel to be registered from each of the pixels having the same maximum value so that the detected pixels are dispersed at four corners of the screen or the like is performed. I just need. In practice, of course, a level determination that a pixel having a dark output level of almost zero is not regarded as a defective pixel may be used together.

Next, the 32 worst defective pixel addresses selected by the pixel selection operation are registered in the storage area E (step S104). Then, the overlap with the defective pixel address read into the storage area C is checked, and only the non-overlapping defective pixel address is additionally written into the storage area A of the EEPROM 118 (step S10).
5).

Next, referring to the flowchart of FIG.
The imaging / recording operation at the time of actual imaging will be described.

First, prior to photographing, an exposure time required for photographing is set based on manual setting or photometric results. When a photographing trigger command for main photographing is received, exposure based on a predetermined exposure control value is performed. Is read out (step S111). After the A / D conversion, the imaging signal is input to the digital process 108, where a defect compensation process is performed (step S112). In this defect compensation processing, the storage areas C, D,
This is performed based on the total sum of the defective pixel addresses stored in each of E. Specifically, the defect compensation based on the defective pixel address in the storage area C, the defect compensation based on the defective pixel address in the storage area D, and the defect compensation based on the defective pixel address in the storage area E may be executed. The algorithm of the defect compensation process itself is an interpolation process using the same nearest-neighbor pixels as in the “defect compensation process for detection”, and is realized by the same arithmetic processing unit as in the case of the “defect compensation process for detection”.

After performing various image processes on the image information after the defect compensation (step S113), the image information is recorded on the memory card 110 (step S114).

Next, referring to the flowchart of FIG.
A flow of a series of processes after battery insertion is detected will be described.

When a new battery is inserted due to battery replacement or the like (or when a power adapter is connected with no battery inserted), the system controller 112 is activated and the initial operation is started ( Step S121). Then, the system controller 112
Becomes a standby mode in which the power switch is turned on. When the power switch is turned on by the user (step S122), the system controller 112 controls the power circuit 119 to start power supply to each part in the camera, and sets the camera to a power-on state (step S1).
23). If this power-on is the first power-on after the battery is inserted (YES in step S124), the system controller 112 reads the defect data in the storage areas A and B from the EEPROM 118 (step S12).
5) Write it to the storage areas B and C of the RAM 112a (step S126).

The system controller 112 has a built-in timer. When the timer detects that 24 hours have passed since the previous defect detection or battery insertion (Y in step S127).
ES), the defect detection operation described with reference to FIG. 4 is started, and detection of a late defective pixel and additional registration in the EEPROM 118 are performed (step S128).

Thereafter, the system controller 112
The mode is a standby mode for a shutter trigger operation, a power switch OFF, and the like. When a shutter trigger operation (photographing trigger command) is performed (YES in step S129), the system controller 112 executes the imaging / recording operation described in the flowchart of FIG. 6 (step S13).
0). If the power switch is turned off (YES in step S131), the system controller 112
Controls the power supply circuit 119 to stop the power supply to each part in the camera and to turn off the camera (step S1).
32) The standby mode is set to wait for the power switch to be turned on.

As described above, in this embodiment, the defective data is read from the EEPROM 118 to the RAM 112a based on the recognition of the battery installation, not at every power-on. Therefore, the EEPROM 118
The reading of defect data from
It is possible to use control such as performing only once,
The waiting time can be reduced.

It should be noted that the present invention is not limited to the above-described embodiment, and that various modifications can be made in the implementation stage without departing from the scope of the invention. For example, in the above embodiment, defective data is read from the EEPROM 118, but the present invention can be applied to a case where defective data is read from another nonvolatile storage device such as a disk storage device provided in a camera. Although the above-described defect detection, registration of defective pixels, and compensation processing have been described for so-called white defects, defect detection, registration of defective pixels, and compensation processing for black defects can be similarly performed. At the time of detecting a black defect, white light input to the imaging surface may be performed by some method instead of the light shielding state. In the above embodiment, the digital still camera has been described as an example. However, the present invention can be similarly applied to a digital movie.

Further, the above embodiments include inventions at various stages, and various inventions can be extracted by appropriately combining a plurality of disclosed constituent elements. For example, even if some components are deleted from all the components shown in the embodiment, the problem described in the column of the problem to be solved by the invention can be solved, and the effects described in the column of the effect of the invention can be solved. Is obtained, a configuration from which this configuration requirement is deleted can be extracted as an invention.

[0058]

As described above, according to the present invention,
It is possible to appropriately and sufficiently detect a pixel to be subjected to defect compensation irrespective of the performance of the imaging element, and to realize a high-performance imaging apparatus in which image quality does not deteriorate due to an increase in pixel defects over time.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of an electronic camera according to an embodiment of the present invention.

FIG. 2 is an exemplary view for explaining a structure of an EEPROM used in the embodiment and a process of reading / writing defective data;

FIG. 3 is an exemplary view for explaining a structure of defect data registered in an EEPROM in the embodiment.

FIG. 4 is an exemplary flowchart for explaining the procedure of a defect detection operation in the embodiment.

FIG. 5 is a diagram for explaining a calculation process of a worst predetermined number selection process performed in the defect detection operation of FIG. 4;

FIG. 6 is an exemplary flowchart for explaining the procedure of an imaging / recording operation in the embodiment.

FIG. 7 is an exemplary flowchart showing a flow of a series of processes after the battery insertion is detected in the embodiment.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 101 ... Lens system 102 ... Lens drive mechanism 103 ... Exposure control mechanism 104 ... Filter system 105 ... CCD color image sensor 106 ... CCD driver 107 ... Preprocess circuit 108 ... Digital process circuit 109 ... Card interface 110 ... Memory card 111 ... LCD image Display system 112: System controller (CPU) 112a: RAM 112b: Memory controller 112c: Defect data detector 112d: Defect compensation controller 118: EEPROM 119: Power supply circuit

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Takayuki Kijima 2-43-2 Hatagaya, Shibuya-ku, Tokyo Inside Olympus Optical Industrial Co., Ltd. (72) Hideaki Yoshida 2-43-2 Hatagaya, Shibuya-ku, Tokyo Olympus Optical Co., Ltd. F term (reference) 5B047 BB04 CB02 CB05 DA06 EA01 EB01 5C024 AX01 BX01 CX23 HX14 HX46 HX59

Claims (8)

[Claims] An image pickup device, an image pickup optical system for inputting a subject image to the image pickup device, a non-volatile storage means for storing defect data of the image pickup device, and defect data read from the non-volatile storage means An internal memory for storing data, a storage control means for controlling reading and writing of data to and from the non-volatile storage means and the internal memory, and a power supply from a power source as an energy supply source to the apparatus body is started. Recognizing means for recognizing a first power-on by a power supply, and a power supply for controlling a second power-on for supplying current to each unit of the apparatus based on a predetermined operation in a state after the first power-on Control means, based on the defect data of the image sensor, comprising: a defect compensating means for performing a compensation process on the output of the image sensor by neighboring pixel data; The storage control unit reads the defect data stored in the nonvolatile storage unit and writes the defect data in the internal memory based on the recognition of the first power-on by the recognition unit. An imaging apparatus characterized in that the compensation processing is performed based on defect data on an internal memory. 2. The method according to claim 1, wherein the reading of the defect data from the nonvolatile storage means to the internal memory is performed based on a first power-on after the first power-on. The imaging device according to claim 1. 3. The apparatus according to claim 1, further comprising: a defect data detecting unit configured to execute a detection of pixel defect data on the image sensor by analyzing an output of the image sensor. 3. The imaging apparatus according to claim 1, wherein at least a part of the defect data is written in the nonvolatile storage unit. 4. The compensation processing by the defect compensation means is performed based on both the defect data read from the nonvolatile memory to the internal memory and the defect data detected by the defect data detection means. The imaging device according to claim 3, wherein: 5. The method according to claim 3, wherein the detection of the pixel defect data and the writing of the detected data to the nonvolatile storage means are performed in a state where the second power is turned on. An imaging device according to claim 1. 6. The imaging apparatus according to claim 3, wherein the detection of the pixel defect data and the writing of the detected data to the nonvolatile storage unit are performed in response to the second power-on. apparatus. 7. The imaging apparatus according to claim 1, wherein the defect data is address data of a defective pixel. 8. The imaging apparatus according to claim 1, wherein the internal memory is a memory that is backed up so that its contents are not lost when the first power is turned on.