JP2002262545A - Semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device comprising a high voltage generating circuit which utilizes a microtransformer having a structure suitable for the generation of a high voltage. SOLUTION: In the semiconductor device comprising the high voltage generating circuit, the high voltage generating circuit is provided with a voltage boosting circuit 1, in which a voltage boosting unit composed of a capacitor C and a rectifying transistor QN0 which is driven by the capacitor C to transfer electrical charge in one direction is connected in series in a plurality of stages between Vcc and an output terminal Vout, a transformer 2 provided with a primary coil and a secondary coil with the secondary side output thereof supplied to the capacitor of the voltage boosting circuit 2 and a pulse generator 3 to supply a pulse to a primary side of the transformer 2.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor device such as a semiconductor memory having a built-in high voltage generating circuit.

[0002]

2. Description of the Related Art NAND and NOR flash memories require a high voltage of 10 to 20 V for writing and erasing operations. Such a high voltage is usually generated by a booster circuit as shown in FIG. Let T be the circumference of the clock for driving the capacitor of this booster circuit, C be the capacitance per stage of the booster unit, Vt be the threshold voltage of the diode-connected charge transfer transistor, N be the number of stages of the booster unit, and Iout be the output current. Then, the output voltage Vout of the booster circuit becomes as shown in Expression 1 (JFDickson, “On
-Chip High Voltage Generation in MOS Integrated Ci
rcuits Using anImproved Voltage Multiplier Techniq
ue ”, IEEE Journal of Solid-State Circuits, Vol.SC
-11, No. 3, pp374-378, June 1976).

[0003]

Vout = (N + 1) (Vcc−Vt) −
(NT / C) Iout

The circuit area of this booster circuit is almost proportional to the total sum NC of the capacity of the booster circuit. In recent years, the power supply voltage Vcc tends to decrease with the miniaturization of semiconductor memories, but the write / erase voltage of the flash memory has not decreased. This means that it is necessary to increase the number of stages of the booster circuit, as is apparent from Equation 1. Therefore, as long as the conventional booster circuit is used, the power supply voltage Vcc
, The circuit area ratio of the booster circuit increases.
In particular, in the generation in which the power supply voltage Vcc is 1.8 V or less, the area of the booster circuit occupies a considerable proportion of the chip area, which is a serious factor for increasing the chip cost.

[0005] In view of such a situation, it is conceivable to use a microtransformer formed on a semiconductor substrate as a configuration technique of a high-voltage generation circuit having a small circuit area and capable of operating even in a low power supply voltage region. 2. Description of the Related Art A high-voltage generation method using a transformer using an induced electromotive force due to a change in a magnetic field has been well known for a long time. As shown in FIG. 11, the transformer has a structure in which a primary coil and a secondary coil having a turns ratio of 1: n are wound around a ferromagnetic material having a high magnetic attraction. The ferromagnetic material is included to eliminate magnetic flux leakage. When a pulse voltage having an amplitude V is input to the primary coil, a pulse having an amplitude of nV is generated in the secondary coil when there is no leakage of magnetic flux (that is, when the coupling factor is 1). However, the current becomes 1 / n. There is no energy loss in the transformer. If a rectifier is provided at the output of the secondary coil, the output voltage can be converted to DC.

If a transformer (microtransformer) in which such a transformer is formed on a semiconductor chip is used, a high voltage generation circuit of a flash memory can be formed in principle. However, in order to create a high-voltage generation circuit that functions effectively, it is necessary to overcome some problems.

[0007]

The first problem relates to the structure and manufacturing process of a microtransformer. Since the material used in the current semiconductor memory has only the same magnetic permeability as air, the use of a ferromagnetic material is indispensable as long as a three-dimensional transformer as shown in FIG. 11 is employed. Technologies for forming ferromagnetic cores on semiconductor chips are evolving (for example, JYPark
et al., “Packaging-Compatible Microtransformers o
na Silicon Substrate ”, IEEE 50th Electronic Compo
nents & Technology Conference, pp206-210, 2000, M.
Mino et al., “Planar Microtransformer with Monolit
hically-Integrated Rectifier Diodes for Micro-Swit
ching Converters ”, IEEE Transactions on Magnetics,
Vol.32, No.2, pp291-296, March 1996).

However, when a three-dimensional transformer is mounted on a semiconductor memory, the increase in cost due to the complexity of the manufacturing process exceeds the cost reduction due to the reduction in the area of the booster circuit, and the total cost may increase. high. In addition, ferromagnetic cores that can be formed on semiconductor chips at this stage generally have a low magnetic attraction (J. Driesen)
et al., “Electric and Magnetic FEM Modeling Strate
gies for Micro-Inductors ", IEEE Transactions on Mag
netics, Vol.35, No.5, pp3577-3579, September 1999).

Further, the effect of the demagnetizing field due to the miniaturization of the ferromagnetic material (Kosuke Shirai et al., “All about Micro Magnetic Devices”, Industrial Research Institute, 1992), eddy current (eddy curr
ent) and other issues. In order to avoid these problems, a microtransformer which does not use a ferromagnetic material, can be formed by an existing semiconductor memory manufacturing process, and has a high coupling constant is required. Plane microtransformers (Plane
r Microtransformer) is a promising candidate.

There are several types of planar microtransformers. One of them has a shape as shown in FIG. The primary coil and the secondary coil are formed by the same metal wiring layer, and the connection to the contact is made by the second metal wiring layer. Because of the structure in which the spiral primary coil and the secondary coil are entangled, a high coupling constant can be realized without using a ferromagnetic material. The coupling constant is 0.82 when the turns ratio is 1: 1 and 0.76 when the turns ratio is 1: 1.5 (
JRLong, “Monolithic Transformers for Silicon RF
IC Design ", IEEE Journal of Solid State Circuits, V
ol.35, No.9, pp1382-1382, September 2000).

A second type of planar microtransformer uses a spiral metal wiring as shown in FIG.
As shown in FIG. 4, the shape is vertically overlapped. The primary coil is made of the first metal wiring layer and the secondary coil is made of the second metal wiring layer, and the connection to the contact is made by a third metal wiring layer (not shown). Therefore, it can be realized with three metal wiring layers. If the distance between the first and second metal wiring layers is sufficiently small, leakage of magnetic flux can be reduced. 1: 1 coil ratio and 1 spacing between metal wiring layers
In the case of about μm, a coupling constant of about 0.9 can be realized.

[0012] These planar microtransformers have the potential to be used for high voltage generation circuits in semiconductor memories. However, from a power supply voltage of about 2V to 20V
To generate a near high voltage, the turns ratio must be 1:10 or more. In the case of a conventional planar microtransformer, the coupling constant tends to decrease as the turns ratio increases. This means that the energy loss in the microtransformer increases and the layout area also increases. Therefore, when used for generating a high voltage in a semiconductor memory, it is necessary to develop a microtransformer that can maintain a high coupling constant even when the turns ratio becomes large.

Another problem with microtransformers is eddy currents generated on semiconductor substrates. The eddy current flowing so as to prevent a change in magnetic flux functions to lower the coupling constant. In order to reduce the eddy current, it is effective to reduce the metal wiring near the planar microtransformer, particularly above and below it, but the semiconductor substrate itself cannot be eliminated. In the literature, eddy current generation is suppressed by increasing the substrate resistance.However, since the substrate resistance of a semiconductor memory is determined based on the characteristics of memory cells and transistors, it is not possible to change the substrate resistance only for a microtransformer. Can not. Therefore, it is necessary to reduce the eddy current generated on the substrate without changing the substrate resistance.

The second problem relates to a circuit system for generating a high voltage. In consideration of application to a semiconductor memory, a circuit that efficiently generates a DC high voltage from an AC high voltage generated by a transformer is required.
Such a circuit is well known in the field of power devices, but it is necessary to select a method suitable for application to a flash memory among several realization methods. In particular, it is necessary to create a high-voltage generation circuit that functions most effectively using elements that can be used in a flash memory.

A method for generating a high voltage for a semiconductor memory using a transformer has already been disclosed in US Pat. No. 5,715,215.
No. 06, US Pat. No. 5,900,764, US Pat.
No. 11451, etc. However, the methods described therein generate a voltage used at most about twice as much as a power supply voltage used in a DRAM.
It is not suitable for generating such high voltages.

An object of the present invention is to provide a structure of a microtransformer suitable for generating a high voltage and a semiconductor device having a built-in high voltage generating circuit using such a microtransformer.

[0017]

According to the present invention, in a semiconductor device having a built-in high-voltage generating circuit, the high-voltage generating circuit includes a capacitor and a rectifier circuit driven by the capacitor to transfer charges in one direction. A step-up circuit in which a step-up unit is connected in series at a plurality of stages between a reference terminal and an output terminal, including a primary coil and a secondary coil, and a transformer whose secondary side output is supplied to a capacitor of the step-up circuit;
A pulse generator for supplying a pulse to the primary side of the transformer.

According to the present invention, it is possible to generate a sufficiently high voltage by reducing the number of stages of the boosting circuit by boosting and applying the driving pulse of the conventional boosting circuit by the transformer. Therefore, the area occupied by the booster circuit in a semiconductor device such as a flash memory can be reduced.

In the present invention, a positive pulse voltage can be supplied to the booster circuit by connecting the diode whose anode is grounded to each of the first and second terminals of the secondary coil of the transformer. Also, the output of the first terminal of the secondary coil of the transformer is supplied to the capacitor of the even-numbered booster unit of the booster circuit, and the output of the second terminal is supplied to the capacitor of the odd-numbered booster unit of the booster circuit. Then, the booster circuit can be driven in two phases.

In the present invention, preferably, a current is caused to flow only in the direction from the secondary coil to the capacitor between the first and second terminals of the secondary coil of the transformer and the capacitor to which the output is supplied. A rectifying element is inserted in. Thus, unnecessary oscillation in the transformer can be prevented. Further, by providing a transistor that discharges electric charge according to a control signal on the downstream side of each rectifier element, it is possible to reliably prevent pulses of different phases that drive the booster circuit from overlapping. In this case, it is preferable to use a diode-connected transistor as the rectifying element, so that useless bipolar operation can be prevented.

According to another aspect of the present invention, in a semiconductor device having a built-in high voltage generating circuit, the high voltage generating circuit supplies a transformer having a primary coil and a secondary coil, and supplies a pulse to a primary side of the transformer. A pulse generator, a diode having a cathode connected to the first and second terminals of the secondary coil of the transformer, and a grounded anode, and first and second terminals of the secondary coil of the transformer. And a diode-connected transistor interposed between the output terminal and the secondary coil so that current flows only in the direction from the secondary coil to the output terminal.

As described above, a high voltage of about 10 V can be generated by combining a transformer and a full-wave rectifier circuit without using a conventional booster circuit. In this case, by configuring the full-wave rectifier circuit with a combination of a diode and a transistor, high high-voltage generation efficiency can be obtained, and unnecessary bipolar operation can be prevented.

In the high voltage generating circuit according to the present invention,
Preferably, the output terminal is provided with a voltage limiter for detecting the level of the output voltage and controlling the activation and deactivation of the pulse generator. Further, the primary coil and the secondary coil of the transformer are preferably stacked on a semiconductor substrate via an insulating film, and are planar coils formed by a spirally-patterned wiring layer. A linear element isolation region is formed which intersects with a vertical line drawn down to the semiconductor substrate through the center of the planar coil. This makes it possible to effectively prevent energy loss due to eddy current when using a planar coil.

The semiconductor device according to the present invention further includes a semiconductor substrate, a planar coil formed on the semiconductor substrate by a spirally-patterned wiring layer, and a center of the planar coil on the semiconductor substrate. The semiconductor device is characterized by having a device isolation region formed in a straight line crossing a vertical line passing through the semiconductor substrate.

The semiconductor device according to the present invention further includes a first coil formed by a spirally patterned first wiring layer on a first insulating film covering the semiconductor substrate; A second coil formed by a second wiring layer coaxially spirally patterned with the first coil on a second insulating film covering the first coil;
The semiconductor substrate has a linearly formed element isolation region that intersects with a perpendicular drawn down to the semiconductor substrate through the center of the first and second coils. A transformer is configured by using a coil and the first coil as a secondary coil.
A third wiring layer patterned coaxially and spirally with the first and second coils on the third insulating film covering the second coil is connected in parallel with the first coil. And a third coil used as a primary coil.

As described above, when a planar coil and a transformer using the same are formed on a semiconductor substrate,
By providing the element isolation region immediately below, a planar coil in which eddy current does not flow can be realized. The element isolation region is preferably formed radially.

[0027]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 shows a configuration of a high voltage generating circuit mounted on a semiconductor device according to an embodiment of the present invention. Specifically, the semiconductor device is an EEPROM,
It is a flash memory or the like. The essence of this high-voltage generating circuit is that a commonly used booster circuit 1 and a microtransformer 2 are combined. The booster circuit 1
A diode-connected NMOS transistor QN0 as a rectifier circuit and a capacitor C having one end connected thereto.
And a power supply Vcc and an output terminal Vo.
It is configured by connecting a plurality of stages in series between ut.

The output pulse of the pulse generator 3 is supplied to the primary coil of the micro transformer 2. The pulse voltages obtained at the terminals N1 and N2 of the secondary coil are supplied to the odd- and even-stage capacitors C of the booster circuit 1. Diodes D1 and D2 whose anodes are grounded are connected to the terminals N1 and N2, respectively. Therefore, positive pulses are alternately obtained at the terminals N1 and N2 by pulse driving, whereby a boosting operation by charge transfer of the boosting circuit 1 is performed.

It is desirable that the microtransformer 2 adopts the shape of the embodiment described later, but other shapes may be used. Further, it is desirable that the value of n of the turns ratio 1: n of the microtransformer 2 is large. However, even if n = 1, a high value can be obtained as the induced electromotive force if the time variation of the inductance and the current is large. Therefore, the value of n may be 1 or more. Since the coupling constant of the microtransformer 2 tends to decrease as the turns ratio increases, it is not efficient to produce a high voltage close to 20 V using only the microtransformer.
Therefore, in this embodiment, the micro transformer 2 preferably has a turn ratio of 1: 1, which has a relatively high coupling constant.
Use about five. As a result, pulses approximately several times the power supply voltage Vcc are generated at the terminals N1 and N2, and the booster circuit 1 is driven using these pulses. By doing so, the number of stages of the booster circuit 1 can be reduced, and as a result, the area of the booster circuit can be reduced.

In the microtransformer 2 of FIG. 1, the pulse amplitude of the primary coil is V1, the turns ratio is 1: n,
Assuming that the coupling constant is km and the voltage between the anode and cathode of the diodes D1 and D2 is Vf, the pulse voltage amplitude obtained in the secondary coil is V2 = nkm (V1−Vf). Although a diode-connected transistor is used as the rectifier circuit in the booster circuit 1 of FIG. 1, any other circuit configuration may be used as long as the circuit has a rectifying function.

The voltage generated by the booster circuit 1 is detected by a voltage militer 4 connected to the output terminal Vout. When it is determined that the output voltage exceeds the desired voltage, the voltage militer 4 sets the flag signal to the first state. As a result, the pulse generator 3 becomes inactive, and the boosting operation stops.
On the other hand, when it is determined that the output voltage is lower than the desired voltage, the voltage militer 4 sets the flag signal to the second state, and in response to this, the pulse generator 3 starts pulse generation. Capacitor Cs connected to output terminal Vout of booster circuit 1
Is for ripple reduction. By controlling the voltage limiter 4 as described above, the output voltage of the booster circuit 1 can be maintained at a desired voltage.

Although the case where a positive high voltage is generated has been described above, this method can also be applied to a negative voltage generating circuit that generates a negative voltage. In this case, the pulse amplified by the microtransformer 2 may be input to a negative voltage generation circuit (Negative Charge Pump).

FIG. 2 shows a configuration of a high voltage generating circuit according to another embodiment. The basic configuration is the same as that of the embodiment of FIG. 1, and the corresponding parts are denoted by the same reference numerals and detailed description thereof will be omitted. In this embodiment, the secondary output terminals N1 and N2 of the microtransformer 2 and the booster circuit 1
N connected to the odd-numbered and even-numbered stage capacitors C
3 and N4 respectively from terminals N1 and N2 to terminal N
3, diode-connected NMOS transistors QN1 and QN2 are inserted as a rectifier circuit for flowing current only to the N4 side.

By providing such a rectifier circuit, it is possible to prevent LC oscillation that may occur in the secondary coil. When LC oscillation occurs, a pulse that enters an even-numbered stage of the booster circuit 1 and a pulse that enters an odd-numbered stage overlap, and a normal boosting operation cannot be performed. Therefore, providing a rectifier circuit is effective.

The terminals N3 and N4 are further connected to NMOS transistors QN3 and QN4 for discharging electric charges. These NMOS transistors QN3, QN4
Is controlled complementarily by the signals S1 and S2. That is, the terminal N4 is grounded while the pulse is supplied to the terminal N3, and the terminal N3 is grounded while the pulse is supplied to the terminal N4.

FIG. 3 shows the terminal voltage waveforms when such control is performed. By forcibly resetting the pulse signals at the terminals N3 and N4 by the control signals S1 and S2, it is possible to prevent the capacitor driving of the booster circuit 1 from overlapping.

FIG. 4 shows a high voltage generating circuit according to still another embodiment. In this embodiment, a high voltage is generated only by the microtransformer 2 and the rectifier circuit 5 provided on the secondary side output thereof without combining a booster circuit. The rectifier circuit 5 is a full-wave bridge rectifier circuit,
The bridge piece between the terminals N1 and N2 and the ground terminal has pn
Using junction diodes D1 and D2, diode-connected NMOS transistors QN1 and QN2 are used for a bridge piece between the terminals N1 and N2 and the output terminal Vout.

The circuit configuration of this embodiment is effective when a microtransformer having a large turns ratio and a large coupling constant is obtained or when an intermediate high voltage of about 10 V is generated. There is a reason that a pn junction diode and an NMOS transistor are selectively used for the bridge piece in the rectifier circuit 5 of FIG. The reason will be described below.

The pn junction diodes D1 and D2 are, for example,
As shown in FIG. 5, an n-type well 12 formed on a p-type silicon substrate 11 is used as a cathode layer.
Is formed as an anode layer. The cathode terminal K is connected to terminals N1 and N2, and the anode terminal A is connected to a ground terminal. In the case of rectification between the ground potential and the terminals N1 and N2 of the microtransformer 2,
Even if such pn junction diodes D1 and D2 are used, p
Since the mold layer 13 is grounded together with the p-type substrate 11, the bipolar operation hardly occurs.

However, if a similar pn junction diode is used between the terminals N1 and N2 and the output terminal Vout,
The anode terminal A is connected to the terminals N1 and N2, and the cathode terminal K is connected to the output terminal Vout. At this time, when a current is supplied from the microtransformer 2 and the voltage of the terminal N1 rapidly rises from about 0 V to about 10 V, the forward current flowing from the anode terminal A into the n-type well 12 becomes equal to the terminals N1 and n. Because of the large potential difference between the mold wells 12, all of them are not absorbed by the contacts of the n-type well 12 (that is, the cathode terminal K), and a part of them flows into the p-type substrate 11. For this reason, the output current (charge to be transferred to the output terminal Vout) decreases, and the efficiency of high voltage generation deteriorates. In addition, a bipolar operation is performed by flowing into the p-type substrate 11, and if an n-type well is nearby, latch-up or the like may be caused.

In consideration of such circumstances, the terminals N1 and N2
Between the NMOS transistor Q and the output terminal Vout.
A rectifier circuit using N1 and QN2 is used. This gives p
The inconvenience of using an n-junction diode can be eliminated. Note that the NMOS transistors QN1 and QN2
It is preferable to use a transistor having a small threshold voltage so as to minimize the forward voltage drop, and to exhibit good cutoff characteristics at the time of reverse bias.

FIG. 6 shows an embodiment in which the embodiment of FIG. 4 is modified. Here, Micro Transformer 2
Is different from that of FIG. 4 in that the turn ratio is 1: 2n and the intermediate node of the secondary coil is grounded together with the anode terminals of the diodes D1 and D2. In the case of the embodiment shown in FIG. 4, the voltage obtained between the secondary coil terminal N1 or N2 and the ground terminal includes the forward voltage Vf of the diodes D1 and D2, and the voltage amplitude is V2 = nkm. (V1-Vf). On the other hand, with the configuration shown in FIG. 6, the Vf component does not enter the output voltage, and the loss can be eliminated. Therefore, it is effective to apply the configuration of the secondary coil as shown in FIG. 6 to the embodiment shown in FIGS.

The microtransformer 2 used in the high-voltage generating circuits described in the embodiments described above must realize a high coupling constant with a large turns ratio. Also, it is necessary to suppress generation of eddy current as much as possible. Hereinafter, a preferred configuration example of a microtransformer that can satisfy such a request will be described. However, the microtransformer described below can be applied to uses other than the above-described high voltage generation circuits.

FIG. 7 is a perspective view showing the structure of the microtransformer. An insulating film 2 is formed on a semiconductor substrate 21.
A secondary coil 23 is formed via 5a, and a primary coil 24 is further coaxially stacked thereon via an insulating film 25b. The primary coil 24 and the secondary coil 23 are flat coils in which a metal wiring layer is patterned in a spiral shape in a reverse direction to each other. Assuming that the number of turns of the primary coil 24 is k,
The secondary coil 23 has k × n turns.

This configuration applies the type of FIG.
A transformer having a turn ratio of 1: n was produced.
In the case of the type shown in FIG. 12, the leakage of the magnetic flux increases as the turns ratio increases. In this type, however, the dependence of the leakage of the magnetic flux on the turns ratio is small.

In order to reduce eddy currents, the semiconductor substrate 21 is formed with a linear element isolation region 22 which passes through the centers of the coils 24 and 23 and intersects with a perpendicular drawn down to the substrate. Specifically, in FIG. 7, two element isolation regions 22 orthogonal to each other are formed. However, only one element isolation region 22 may be formed, or a plurality of radially extending element isolation regions 22 may be formed. As the element isolation region 22, for example, STI (Shall)
A buried insulating film by OW Trench Isolation or an oxide film by LOCOS can be used.

Since the eddy current generated on the semiconductor substrate 21 flows concentrically on the surface of the substrate, the eddy current is blocked by such an element isolation region 22, and as a result, the eddy current itself becomes difficult to flow. . Such reduction of the eddy current by the element isolation region is effective for all the planar microtransformers as shown in FIGS.

FIG. 8 shows a microtransformer according to another embodiment, which has a structure in which one secondary coil 23 is sandwiched between two primary coils 24a and 24b, and an insulating film 2 is formed.
The layers 5a, 25b, and 25c are stacked. The two primary coils 24a and 24b are connected in parallel by short-circuiting between the contacts C1 and C2 and between C3 and C4. When this coil structure is used, since the magnetic flux uniformly passes through the secondary coil 23, the coupling constant can be further increased. This structure can be adopted when there are four or more metal wiring layers.

FIG. 9 shows a plurality of the microtransformers shown in FIG. 7 arranged in parallel. Each primary coil 24 has between contacts C1-C2-C3, C4-C5
-C6, the secondary coil 23 is likewise connected between contacts C7-C8-C9, C10-C11-C12
Are short-circuited to form a single transformer as a whole.

Since the wiring resistance and the parasitic capacitance in the microtransformer cause a delay, it is difficult to obtain a high number of turns with a single microtransformer, so that high-frequency response becomes difficult. If the wiring is made thicker while maintaining the number of turns, the wiring resistance is reduced, but the parasitic capacitance and the layout area are increased. As shown in FIG. 9, when a plurality of microtransformers are unitized and arranged in parallel and connected in parallel, it is advantageous in terms of high-frequency response and layout area.

Although omitted in FIG. 9, an element isolation region is provided in the semiconductor substrate below each microtransformer in the same manner as shown in FIG. 7 to reduce eddy current. Further, a structure in which a plurality of three-layered microtransformers shown in FIG. 8 are arranged in parallel may be employed.

[0052]

As described above, the high voltage generating circuit according to the present invention can generate a high voltage with a small layout area even with a low power supply voltage, and can be realized without changing the existing semiconductor manufacturing process. An eddy current can be reduced by providing an element isolation region in the lower semiconductor substrate of the planar microtransformer. In addition, the primary coil and the secondary coil are vertically overlapped and the turns ratio is 1: n (n ≧
If set to 1), a transformer having a large turns ratio and a large coupling constant can be obtained.

[Brief description of the drawings]

FIG. 1 is a diagram showing a high voltage generating circuit according to an embodiment of the present invention.

FIG. 2 is a diagram showing a high voltage generation circuit according to another embodiment.

FIG. 3 is a diagram showing a transformer output waveform according to the embodiment.

FIG. 4 is a diagram showing a high voltage generation circuit according to another embodiment.

FIG. 5 is a diagram showing a structure of a diode used in the embodiment.

FIG. 6 is a diagram showing a high voltage generation circuit according to another embodiment.

FIG. 7 is a perspective view showing a configuration of a transformer according to the embodiment of the present invention.

FIG. 8 is a perspective view showing another structure of the transformer.

FIG. 9 is a perspective view showing another configuration of the transformer.

FIG. 10 is a diagram illustrating a configuration of a conventional booster circuit.

FIG. 11 is a diagram showing a configuration of a conventional transformer.

FIG. 12 is a diagram showing a configuration of a conventional planar transformer.

FIG. 13 is a diagram showing another configuration of a conventional planar transformer.

FIG. 14 is a diagram showing another configuration of a conventional planar transformer.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Booster circuit, 2 ... Transformer, 3 ... Pulse generator, 4 ... Voltage limiter, 5 ... Rectifier circuit, 21 ... Semiconductor substrate, 22 ... Element isolation region, 23 ... Secondary coil, 24, 2
4a, 24b: primary coil, 25a, 25b: insulating film,
D1, D2 ... pn junction diodes, QN1, QN2, Q
N3, QN4 ... NMOS transistors.

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI theme coat ゛ (Reference) H02M 7/21 H01L 27/04 LF term (Reference) 5B025 AD10 AE00 5E070 AA11 CB13 5F038 AZ04 BG03 BG04 BG05 BG08 CA07 DF01 DF05 DT12 EZ20 5H006 AA00 BB00 CA02 CA07 CB07 CC08 DA04 DC05 HA08 5H730 AA14 AS01 AS04 BB02 BB22 CC25 CC28 DD04 EE07 EE19 FD03 FF01 FF05 FG01

Claims (12)

[Claims] 1. A semiconductor device having a built-in high voltage generation circuit, wherein the high voltage generation circuit includes a booster unit including a capacitor and a rectifier circuit driven by the capacitor to transfer charges in one direction. A booster circuit connected in series between a plurality of stages, a primary coil and a secondary coil, a transformer whose secondary side output is supplied to a capacitor of the booster circuit, and a pulse is supplied to the primary side of the transformer. And a pulse generator. 2. The semiconductor device according to claim 1, wherein a diode whose anode is grounded is connected to each of the first and second terminals of the secondary coil of the transformer. 3. An output of a first terminal of a secondary coil of the transformer is supplied to a capacitor of an even-numbered booster unit of the booster circuit, and an output of a second terminal is supplied to an odd-numbered booster unit of the booster circuit. 2. The semiconductor device according to claim 1, wherein said semiconductor device is supplied to said capacitor. 4. A rectifying element is provided between the first and second terminals of the secondary coil of the transformer and the capacitor to which the output is supplied, so that current flows only from the secondary coil toward the capacitor. 2. The semiconductor device according to claim 1, further comprising a transistor that is inserted and that discharges electric charges according to a control signal downstream of each rectifier. 5. The semiconductor device according to claim 4, wherein said rectifying element is a diode-connected transistor. 6. A semiconductor device having a built-in high voltage generation circuit, wherein the high voltage generation circuit includes a transformer having a primary coil and a secondary coil, and a pulse generator for supplying a pulse to a primary side of the transformer. A diode having a cathode connected to the first and second terminals of the secondary coil of the transformer and a grounded anode, and a first and second terminal and an output terminal of the secondary coil of the transformer. And a diode-connected transistor interposed therebetween so that current flows only in the direction from the secondary coil to the output terminal. 7. A voltage limiter provided at the output terminal for detecting the level of an output voltage and controlling activation and deactivation of the pulse generator.
Or the semiconductor device according to 6. 8. A primary coil and a secondary coil of the transformer are planar coils formed by a spirally patterned wiring layer laminated on a semiconductor substrate via an insulating film; 7. The semiconductor device according to claim 1, wherein a linear element isolation region that intersects with a vertical line passing through the center of said planar coil and lowered to said semiconductor substrate is formed. 9. A semiconductor substrate; a planar coil formed on the semiconductor substrate by a spirally patterned wiring layer; and a semiconductor substrate passing through the center of the planar coil to the semiconductor substrate. A semiconductor device comprising: an element isolation region formed in a straight line that intersects a lowered perpendicular. 10. A first coil formed by a semiconductor substrate, a first wiring layer spirally patterned on a first insulating film covering the semiconductor substrate, and a first coil covering the first coil. A second coil formed on the second insulating film by a second wiring layer patterned spirally coaxially with the first coil; and a second coil formed on the semiconductor substrate. A transformer having a linear isolation element intersecting with a vertical line dropped on the semiconductor substrate through the center, wherein the second coil is a primary coil, and the first coil is a secondary coil. A semiconductor device characterized by being constituted. 11. A first wiring layer which is formed on a third insulating film covering the second coil by a third wiring layer which is coaxially patterned with the first and second coils and is spirally patterned. 11. The semiconductor device according to claim 10, further comprising a third coil connected in parallel with said coil and used as a primary coil. 12. The semiconductor device according to claim 8, wherein said element isolation region is formed radially.