JP2002261241A - Antistatic protection circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enable arbitrary setting of a protecting voltage in both positive and negative directions, while holding cooperation with withstanding voltage of a circuit to be protected. SOLUTION: MOS transistors 28, 29 having parasitic diodes 28a, 29a are connected in series between signal lines 26, 27, in such a manner that their current flow directions are opposite to each other. In the case that positive static electricity infiltrates it and an input voltage Vin is increased exceeding a prescribed threshold voltage, a constant voltage circuit 41 is turned into a current flow state, and the MOS transistor 29 goes to ON state. At this time, a surge current flows via the diode 28a and the MOS transistor 29. In the case that negative static electricity infiltrates it and the input voltage Vin is decreased exceeding the prescribed threshold voltage, a constant-voltage circuit 36 is turned into a current flow state, and the MOS transistor 28 goes to ON state. At this time, a surge current flows via the diode 29a and the MOS transistor 28.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electrostatic protection circuit configured to release invading static electricity through a transistor.

[0002]

2. Description of the Related Art As this kind of electrostatic protection circuit, for example, the following (1) to (3) are known. (1) Utilization of transistor breakdown This electrostatic protection circuit is disclosed in, for example,
This is disclosed as a prior art in Japanese Patent Application Laid-Open Publication No. H10-209,873. That is, as shown in FIG. 8, the drain and source of the MOS transistor 4 are connected between the signal line 2 and the power supply line 3 connected to the protected circuit 1, and the gate and source are short-circuited. Has become. When positive static electricity is applied to the signal line 2, the voltage causes a breakdown between the drain and source of the MOS transistor 4, and a surge current due to the static electricity flows from the signal line 2 to the power supply line 3. When negative static electricity is applied to the signal line 2, the parasitic diode 4 a is turned on by the voltage, and a surge current flows from the power supply line 3 to the signal line 2.

(2) Using a diode This electrostatic protection circuit is disclosed in, for example, Japanese Patent Application Laid-Open No. 10-22461.
And Japanese Patent Application Laid-Open No. 11-17121, and those similar thereto. For example, as shown in FIG.
And between the power supply line 5 and the signal line 2
The drain and source of S transistors 4 and 6 are connected, and the gate and source of each of MOS transistors 4 and 6 are short-circuited. Parasitic diodes 4a and 6a are formed between the drain and source of MOS transistors 4 and 6, respectively. When positive static electricity exceeding the power supply voltage is applied to the signal line 2, the parasitic diode 6 a is turned on by the voltage, and a surge current flows from the signal line 2 to the power supply line 5. Also, signal line 2
Is applied, negative voltage causes the parasitic diode 4a to be turned on, and a surge current flows from the power supply line 3 to the signal line 2.

(3) Utilizing a thyristor configuration This electrostatic protection circuit is disclosed, for example, in Japanese Patent Application Laid-Open No. 10-13498.
No. 8 and Japanese Unexamined Patent Publication No. 11-251574 and similar ones. For example,
As shown in FIG. 10, transistors 7 and 8 are connected between signal line 2 and power supply line 3 so as to form a thyristor,
Zener diodes 9a to 9d are connected as trigger means. When positive static electricity exceeding the Zener voltage is applied to the signal line 2, the transistors 7 and 8 are triggered, and a surge current due to the static electricity flows from the signal line 2 to the power supply line 3. When negative static electricity is applied to the signal line 2, the voltage causes the voltage from the power supply line 3 to the signal line 2 via the resistor 10, the collector-base of the transistor 7 (or the base-collector of the transistor 8) and the resistor 11. Surge current flows through

[0005]

Problems to be Solved by the Invention (1)-
In the static electricity protection circuit of (3), when negative static electricity is applied to the signal line 2, the diode 4a is turned off when the voltage drops to -VF (VF is a forward voltage of the pn junction: about 0.7 V). Or the power supply line 3 via the transistors 7 and 8
An energization path from the to the signal line 2 is formed. This allows
The voltage of the signal line 2 is lower than the protection voltage −
VF is prevented from lowering, and the function is fulfilled only from the viewpoint of protection against static electricity.

Here, if the negative withstand voltage of the protected circuit 1 itself is only about -VF, the above-mentioned electrostatic protection circuit is of course required. However, when the withstand voltage of the protected circuit 1 itself is higher than (−in the negative direction) than −VF, an energization path from the power supply line 3 to the signal line 2 is formed at a voltage as low as −VF (−0.7 V). It may not be desirable to be done.

For example, in the configuration shown in FIG. 11 in which communication is performed between a driver circuit and a receiver circuit that are separately installed in an automobile, the receiver circuit 13 may receive erroneous data. That is, in the normal operation, when the transistor 14 of the driver circuit 12 is turned on / off, the base current is supplied / cut off to the transistor 15 of the receiver circuit 13 via the signal line 2 and the power supply line 3, and the receiver circuit 13 Data is received according to the on / off state of the transistor 15.

However, the potential difference between the driver circuit 12 and the receiver circuit 13 is -VF due to common mode noise or the like.
8, a current path from the power supply line 3 to the signal line 2 is formed in any of the electrostatic protection circuits 16 shown in FIGS. 8 to 10, and the power supply line 3, the electrostatic protection circuit 16, the signal line 2, and the transistor 15 Current flows through the closed circuit.
Since the current caused by the sneak current becomes the base current of the transistor 15, the transistor 15 which should be turned off may be erroneously turned on. Here, the negative protection voltage has been described. However, in the case of the electrostatic protection circuit described in (2) above, the same problem may occur with the positive protection voltage.

An object of the present invention is to provide an electrostatic protection circuit capable of arbitrarily setting both positive and negative protection voltages while coordinating with the withstand voltage of a protected circuit.

[0010]

According to the first aspect of the present invention, an energizing path (hereinafter referred to as a first energizing path) between signal lines via a second one-way energizing circuit and a first transistor is provided. Path, and an energization path (hereinafter, referred to as a second energization path) via the first one-way energization circuit and the second transistor. These two current paths are opposite to each other, and the circuit operation for each current path is symmetric.

Therefore, the first energization path will be described. When a voltage is applied between the signal lines in the direction in which the second one-way energization circuit can be energized, the applied voltage is equal to the second voltage of the first transistor. Of the second main terminal and a control terminal (corresponding to a gate or a base) between the main terminal (corresponding to a drain or a collector) and a first main terminal (corresponding to a source or an emitter). It is applied to a first control voltage supply circuit connected therebetween. At this time, the second power supply path is in a state of being cut off by the first one-way power supply circuit.

When the voltage applied to the first control voltage supply circuit is lower than the first reference voltage, that is, when the voltage between the signal lines is lower than the protection voltage, the first control voltage supply circuit is turned off. State, and the first control voltage discharging circuit
The potential of the control terminal of the transistor becomes equal to the potential of the first main terminal. Therefore, the first transistor is turned off, and the first current path is cut off.

On the other hand, if the voltage applied to the first control voltage supply circuit is higher than the first reference voltage, that is, if the voltage between the signal lines exceeds the protection voltage, the first control voltage The supply circuit is turned on, and a voltage is applied to the control terminal of the first transistor via the first control voltage supply circuit. As a result, the first transistor is turned on, a surge current due to static electricity flows through the first current path, and a voltage increase between signal lines is suppressed.

This electrostatic protection circuit has a symmetrical structure when viewed from the two signal lines, and sets the first and second reference voltages in the first and second control voltage supply circuits to arbitrary voltage values, respectively. Thus, any protection voltage can be set for each of the positive and negative static electricity entering the signal line. Therefore, unlike the electrostatic protection circuit having the conventional configuration, it is possible to set a preferable protection voltage that does not cause a malfunction in the protected circuit while cooperating with the withstand voltage of the protected circuit.

According to the second aspect of the present invention, since the first and second control voltage supply circuits are each constituted by a constant voltage circuit using a zener diode, the first and second control voltage supply circuits are configured in accordance with the set value of the zener voltage. , The first and second reference voltages, and thus the protection voltage, can be set with high accuracy.

According to the third aspect of the present invention, the first and second current supply paths are formed in the same manner as the first aspect. Describing the first energization path, when a voltage in the energizable direction of the second one-way energization circuit is applied between the signal lines, the applied voltage is equal to the second voltage of the first transistor.
Is applied between the main terminal and the first main terminal, and
The voltage is applied to a first control voltage supply circuit connected between the second main terminal and the control terminal. At this time, the second power supply path is in a state of being cut off by the first one-way power supply circuit.

When the rate of change of the voltage applied to the first control voltage supply circuit is equal to or less than the first reference value, that is, when a normal signal voltage is applied between the signal lines, the first control is performed. The voltage supply circuit is turned off, and the potential of the control terminal of the first transistor becomes equal to the potential of the first main terminal by the first control voltage discharging circuit. Therefore, the first transistor is turned off, and the first current path is cut off.

On the other hand, when the rate of change of the voltage applied to the first control voltage supply circuit is higher than the first reference value,
In other words, when static electricity with a steep voltage change not included in the normal signal voltage is applied between the signal lines, the first control voltage supply circuit is turned on, and the first control voltage supply circuit is turned on. , A voltage is applied to the control terminal of the first transistor. As a result, the first transistor is turned on, a surge current due to static electricity flows through the first current path, and a sharp voltage rise between the signal lines is suppressed.

This static electricity protection circuit has a symmetrical structure when viewed from each of the two signal lines. By setting the first and second reference values to arbitrary values, respectively, It is possible to set an arbitrary protection level for the voltage change rate of the static electricity in the negative direction. Therefore, if the voltage change rate is differentiated between the normal signal voltage and the electrostatic voltage while coordinating with the withstand voltage of the protected circuit, a preferable electrostatic protection operation that does not cause a malfunction in the protected circuit can be performed. Becomes Further, since the present electrostatic protection circuit operates in response to a voltage change between signal lines, a reliable protection operation without operation delay can be performed.

According to the means described in claim 4, the first and second control voltage supply circuits have both the configuration described in claim 1 and the configuration described in claim 3, and the first and second control voltage supply circuits have the same configuration.
And, when the voltage applied to the second control voltage supply circuit satisfies the voltage condition described in claim 1 or the voltage condition described in claim 3, the circuit is turned on. Therefore, according to this means, reliable protection without operation delay can be achieved under both conditions of the magnitude and the rate of change of the static electricity voltage.

According to the fifth aspect of the present invention, when the voltage applied to the first control voltage supply circuit rises sharply, a parasitic voltage is applied between the second main terminal of the third transistor and the control terminal. A current flows through an impedance circuit connected between the control terminal and the first main terminal through the existing capacitance component. Accordingly, the third transistor is turned on, and a voltage is applied to the control terminal of the first transistor. As a result, the first transistor is turned on, a surge current due to static electricity flows through the first current path, and a sharp voltage rise between the signal lines is suppressed. The operation of the fourth transistor is similar to this. Since the present means is a circuit using the third and fourth transistors and a capacitance component formed in a parasitic manner therewith, the means is suitable for an IC, and the chip occupation area when the IC is formed is small. I'm done.

According to the means described in claim 6, due to a change in the normal signal voltage applied between the signal lines, the third transistor is parasitically present between the second main terminal and the control terminal. Even when a current flows through the impedance circuit via the capacitance component, the third transistor maintains the off state. The same operation is performed for the fourth transistor. Therefore, the electrostatic protection circuit shifts to the protection operation only when static electricity (generally having a steep voltage change) enters between the signal lines, and the protection operation can be performed reliably and without malfunction.

According to the means described in claim 7, due to a change in the normal signal voltage applied between the signal lines, the signal is parasitically present between the second main terminal of the first transistor and the control terminal. Even if a current flows through the impedance circuit of the first control voltage discharging circuit via the capacitance component,
Keep the off state. The same operation is performed for the second transistor. Therefore, the electrostatic protection circuit shifts to the protection operation only when static electricity enters between the signal lines, and the protection operation can be performed reliably and without malfunction.

According to the means described in claim 8, the impedance circuit is constituted by a resistor, and according to the means described in claim 9, the first and second one-way energizing circuits include the first and second one-way energizing circuits. The circuit configuration is simplified as much as possible because it is constituted by a diode formed parasitic on the transistor or a diode formed as another element.

According to the means described in claim 10, the first
And in the second control voltage discharging circuit, the clamp circuit is connected in parallel with the impedance circuit, so that when the first or second control voltage supply circuit is turned on, the control terminal of the first or second transistor is controlled. It is possible to prevent an excessive voltage from being applied between the first terminal and the first main terminal.

According to the eleventh aspect of the present invention, in the electrostatic protection circuit of the present invention, the first and second transistors can be constituted by either a MOS transistor or a bipolar transistor (including an IGBT). is there.

[0027]

(First Embodiment) A first embodiment of the present invention.
The embodiment will be described with reference to FIG. 1 showing an electrical configuration of an electrostatic protection circuit. In FIG. 1, an electrostatic protection circuit 22 and a protected circuit 23 are formed in an IC 21 used for a control device of a vehicle-mounted device. I
The terminals 24 and 25 of C21 are connected to the protected circuit 23 via signal lines 26 and 27, respectively.
Control signals having a predetermined voltage level are input to the ICs 4 and 25 from outside the IC 21. The signal line 27 is a ground line, and is connected to a negative terminal of the vehicle-mounted battery via a power supply terminal (not shown).

An electrostatic protection circuit 22 having the following configuration is connected between the signal lines 26 and 27. That is, MOS transistors 28 and 29 of the same conductivity type (N-channel type in this case) are connected in series between the signal lines 26 and 27 so that the conduction directions thereof are opposite to each other. That is, the MOS transistors 28 and 29
Are connected at a node n1, and the MOS
The sources of the transistors 28 and 29 are connected to the signal line 2 respectively.
6 and 27. MOS transistor 28,
Parasitic diodes 28a and 29a each having a drain on the cathode side are formed between the drain and the source 29.

Here, the MOS transistors 28 and 29 correspond to the second and first transistors according to the present invention, and the diodes 28a and 29a correspond to the second and first one-way energizing circuits. Further, the source, drain and gate terminals of the MOS transistors 28 and 29 correspond to a first main terminal, a second main terminal and a control terminal, respectively.

A resistor 30 (corresponding to a second control voltage discharge circuit, an impedance circuit) is connected between the gate and the source of the MOS transistor 28,
A resistor 31 (corresponding to a first control voltage discharging circuit, an impedance circuit) is connected between the gate and the source of the first circuit.
Further, a diode 32 having a polarity shown in FIG.
A constant voltage circuit 36 (second
Is connected between the drain and the gate of the MOS transistor 29. A constant voltage circuit 41 (a first control voltage supply circuit) comprising a diode 37, zener diodes 38 and 39, and a resistor 40 having a polarity shown in FIG. (Corresponding to a circuit). Thus, the electrostatic protection circuit 22 has a symmetrical configuration with respect to the signal lines 26 and 27.

Next, the operation of the static electricity protection circuit 22 will be described. The static electricity protection circuit 22 has signal lines 26 and 27
(Hereinafter, referred to as input voltage Vin)
A first conduction path from the signal line 26 to the signal line 27 via the diode 28a and the MOS transistor 29;
And a second energizing path to the signal line 26 via the second line. MOS transistors 28 and 29
Are connected in series such that their current directions are opposite to each other, so that no current path is formed through the MOS transistors 28 and 29 and no current path is formed through the diodes 28a and 29a.

If there is no static electricity in the IC 21 and only a control signal is input between the terminals 24 and 25,
The first and second power supply paths are both in a cut-off state, and the electrostatic protection circuit 22 is in a state of being electrically disconnected from between the signal lines 26 and 27. Therefore, the input voltage Vin, which is a control signal, is directly input to the protected circuit 23 without being affected by the connection of the electrostatic protection circuit 22.

On the other hand, when static electricity enters the IC 21, one of the first and second power supply paths is turned on. The operation of the static electricity protection circuit 22 when positive static electricity enters and the input voltage Vin rises above a predetermined voltage level of the control signal will be specifically described. In the following description, VF means a forward voltage of the diode.

When the input voltage Vin has a positive polarity, the diode 28a is forward-biased and is turned on.
The voltage F) is applied between the drain and source of the MOS transistor 29 and to the constant voltage circuit 41. Assuming that the Zener voltages of the Zener diodes 38 and 39 are both Vz1, the constant voltage circuit 41 conducts when a voltage exceeding a reference voltage Vr1 (corresponding to a first reference voltage) determined by (2 · Vz1 + VF) is applied. In the state, constant voltage operation is performed.

When the input voltage Vin exceeds the reference voltage Vr1 due to the intrusion of static electricity, the constant voltage circuit 41 is turned on, and a voltage drop occurs in the resistor 31. And the resistor 31
Is the threshold voltage V of the MOS transistor 29
When the voltage exceeds TH, the MOS transistor 29 is turned on, and a surge current due to static electricity flows through the first current path. The resistance values of the resistors R31 and R40 are respectively represented by R
Assuming that R is 31, R40, the threshold voltage Vc1 (protection voltage) of the input voltage Vin at which the MOS transistor 29 is turned on is represented by the following equation (1). Vc1 = (R31 + R40) /R31.VTH+2.Vz1+2.VF (1)

The threshold voltage Vc1 is set higher than the voltage level of the control signal and lower than the withstand voltage of the protected circuit 23. In addition, IC2
For example, when the IC 1 is connected to another IC (not shown) used for the control device of the vehicle-mounted device, a potential difference may occur between the ICs due to common mode noise or the like. Therefore, in such a case, the threshold voltage Vc1 is set to be higher than the voltage level of the control signal by the potential difference or more so that the electrostatic protection circuit 22 does not shift to the protection operation due to the potential difference.

The threshold voltage Vc1 (reference voltage Vr)
According to the setting of 1), when only the control signal is input as the input voltage Vin, the constant voltage circuit 41 is cut off, and the voltage across the resistor 31 (that is, the gate-source voltage of the MOS transistor 29) is reduced. Because it is 0, MOS
Transistor 29 remains off. When the input voltage Vin exceeds the threshold voltage Vc1 due to the intrusion of static electricity, the MOS transistor 29 is turned on, and a surge current due to static electricity flows through the first current path. This suppresses an increase in the input voltage Vin due to static electricity. In this case, since the diode 29a and the diode 32 of the constant voltage circuit 36 are both reverse-biased, the diode 29a and the MOS transistor 2
8 is in a cut-off state.

By the way, since the capacitance Cdg exists between the drain and the gate of the MOS transistor 29, when the voltage change rate of the input voltage is large, the resistance 31 is connected through the capacitance Cdg.
Current may flow through the MOS transistor 29 to turn on the MOS transistor 29. This current ic is Cdg.dVdg / dt if (Vin-VF) is replaced with Vdg, and MO
The S transistor 29 is turned on under the condition of ic · R31 ≧ VTH. Accordingly, the resistance value R31 of the resistor 31 is determined so as to satisfy the condition of the following equation (2), where the maximum positive voltage change rate of the control signal is ΔVin / Δt. Cdg · ΔVin / Δt · R31 <VTH (2)

On the other hand, when negative static electricity enters the IC 21 and the input voltage Vin becomes a negative voltage, the second current path is turned on in the same manner as the above-described operation, and the signal lines 27 to 26 are turned on. And a surge current flows in the negative direction, thereby suppressing an increase in the input voltage Vin in the negative direction. In this case, the constant voltage circuit 3
The reference voltage Vr2 (corresponding to the second reference voltage) of No. 6 is determined by-(2 · Vz2 + VF) when the zener voltages of the Zener diodes 33 and 34 are both Vz2. The resistance R
If the resistance values of R30 and R35 are R30 and R35, respectively,
The threshold voltage Vc2 (protection voltage) of the input voltage Vin at which the MOS transistor 28 is turned on is represented by the following equation (3). Vc2 =-((R30 + R35) /R30.VTH+2.Vz2+2.VF) (3)

The threshold voltage Vc2 is set to be lower than the withstand voltage of the protected circuit 23 in absolute value. In the case where the IC 21 is connected to the other ICs described above, the potential is set higher (in absolute value) than the potential difference between the two ICs due to common mode noise or the like.

The resistance value R30 of the resistor 30 is represented by the absolute value of the maximum negative voltage change rate of the control signal ΔVin /
Δt is determined so as to satisfy the condition of the following equation (4). Cdg · ΔVin / Δt · R30 <VTH (4)

As described above, the static electricity protection circuit 22 of the present embodiment has a symmetrical structure when viewed from the two signal lines 26 and 27, and the reference voltage Vr1 of the constant voltage circuits 41 and 36. , Vr2 are set to arbitrary voltage values, respectively, so that an arbitrary protection voltage (threshold voltage Vc
1, Vc2) can be set. Therefore, according to the electrostatic protection circuit 22, it is possible to set a preferable protection voltage for each of the positive and negative voltages so as not to cause a malfunction in the protected circuit 23 while cooperating with the withstand voltage of the protected circuit 23. . Thereby, for example, the signal line 2
Even if a potential difference occurs between 6 and 27 due to common mode noise or the like, the occurrence of the potential difference can prevent the first or second conduction path from being energized.

(Second Embodiment) Next, a second embodiment of the present invention will be described with reference to FIG. 2 showing an electric configuration of an electrostatic protection circuit. In FIG. 2, the IC
Between the signal lines 26 and 27 in the static electricity protection circuit 4
3 are formed. Here, MOS transistor 2
8, 29 and the resistors 30, 31 have the same configuration as the above-described electrostatic protection circuit 22.

Between the drain and the gate of the MOS transistor 28, a diode 44 having the illustrated polarity and a collector and an NPN transistor 45 (corresponding to a fourth transistor) are connected.
The emitter and the emitter are connected in series, and a resistor 46 (corresponding to an impedance circuit) is connected between the base and the emitter of the transistor 45. Transistor 45
Parasitic capacitor 45a
(Shown by broken lines) are formed. These diodes 4
4. The high-speed pulse passage circuit 47 including the transistor 45 and the resistor 46 corresponds to the second control voltage supply circuit according to the present invention.

Similarly, between the drain and the gate of the MOS transistor 29, a diode 48 having the polarity shown in FIG.
A collector and an emitter of the transistor 49 (corresponding to a third transistor) are connected in series, and a resistor 50 (corresponding to an impedance circuit) is connected between the base and the emitter of the transistor 49. A parasitic capacitor 49a is formed between the collector and the base of the transistor 49. The high-speed pulse passage circuit 51 including the diode 48, the transistor 49, and the resistor 50 corresponds to a first control voltage supply circuit according to the present invention.

Next, the operation of the static electricity protection circuit 43 will be described. Positive static electricity enters IC42 and input voltage Vin
Rises sharply in the positive direction, the power supply line 26 causes a diode 28a, a diode 48, a parasitic capacitor 49a,
A current id flows through the resistor 50. The current id increases as the change rate of the input voltage Vin increases, and the current i
When the product of d and the resistance value R50 of the resistor 50 reaches VF, the transistor 49 is turned on. As a result, a voltage is applied to the gate of the MOS transistor 29 via the high-speed pulse passing circuit 51, and when the gate voltage exceeds the threshold voltage VTH, the MOS transistor 29 is turned on. M
When the OS transistor 29 is turned on, a surge current due to static electricity flows through the first energizing path, and an increase in the input voltage Vin due to static electricity is suppressed.

Generally, the voltage due to static electricity has a sharper change characteristic than the voltage of a normal control signal. Therefore, the resistance value R50 is determined so that the transistor 49 is turned on at a reference value (corresponding to the first reference value) larger than the maximum voltage change rate of the control signal and smaller than the voltage change rate due to static electricity. Have been.

On the other hand, the same operation is performed when negative static electricity enters the IC 42 and the input voltage Vin sharply decreases in the negative direction. When the MOS transistor 28 is turned on, the second operation is performed.
A surge current due to static electricity flows through the current-carrying path, thereby suppressing a decrease in the input voltage Vin due to static electricity. In addition, the resistance is set so that the transistor 45 is turned on at a reference value (corresponding to a second reference value) that is larger than the maximum voltage change rate of the control signal and smaller than the voltage change rate due to static electricity in absolute value. The resistance value R46 is determined.

As described above, the static electricity protection circuit 43 of this embodiment has a symmetrical structure when viewed from the two signal lines 26 and 27, and the high-speed pulse passing circuits 51 and 47.
By setting the reference values to arbitrary values, it is possible to set an arbitrary protection level for the voltage change rate of the static electricity in the positive direction or the negative direction that enters between the signal lines 26 and 27. Therefore, according to the static electricity protection circuit 43, it is possible to distinguish between the normal signal voltage and the static electricity voltage with respect to the voltage change rate while cooperating with the withstand voltage of the protected circuit 23. A preferable static electricity protection operation that does not cause a malfunction in the device can be realized. The static electricity protection circuit 43 is connected to the signal lines 26 and 27.
Since the operation is performed in response to a voltage change between the two, a reliable protection operation with no operation delay can be performed.

(Third Embodiment) Next, a third embodiment of the present invention will be described with reference to FIG. 3 showing an electrical configuration of an electrostatic protection circuit. In FIG. 3, the IC
52, between the signal lines 26 and 27, the electrostatic protection circuit 22 (see FIG. 1) and the electrostatic protection circuit 43 (see FIG. 2).
) Is formed. The resistors 30 and 31 have
Zener diodes 54 and 55 (corresponding to a clamp circuit) are connected in parallel with each other.

Here, the resistor 30 and the Zener diode 5
4 and a discharge circuit 57 including the resistor 31 and the Zener diode 55 correspond to the second and first control voltage discharge circuits, respectively. In addition, the constant voltage circuit 3
6 and a high-speed pulse passage circuit 47, and a supply circuit 59 including a constant-voltage circuit 41 and a high-speed pulse passage circuit 51 in parallel are connected to the second and first control voltage supply circuits, respectively. Equivalent to.

According to the electrostatic protection circuit 53, when the absolute value of the input voltage Vin is higher than the threshold voltage Vc1 or Vc2, or the absolute value of the voltage change rate of the input voltage Vin is larger than a predetermined reference value. In this case, the MOS transistor 29 or 28 is turned on, and a surge current due to static electricity flows through the first or second conduction path. Therefore, according to the present embodiment, each effect described in the first and second embodiments can be obtained. Further, since the zener diodes 54 and 55 are added, it is possible to prevent an excessive voltage from being applied between the gate and the source of the MOS transistors 28 and 29, and to reliably protect the MOS transistors 28 and 29 from intrusion of static electricity. can do.

(Fourth Embodiment) Next, a fourth embodiment of the present invention will be described with reference to FIG. 4 showing an electric configuration of an electrostatic protection circuit. 4, the same components as those in FIG. 3 showing the static electricity protection circuit 53 are denoted by the same reference numerals.

Between the signal lines 26 and 27 in the IC 60, MOS transistors 29 and 28 are connected in series so that the directions of current supply are opposite to each other. However, unlike the static electricity protection circuit 53, the sources of the MOS transistors 29 and 28 are connected at the node n1, and the drains of the MOS transistors 29 and 28 are connected to the signal lines 26 and 27, respectively. A discharge circuit 57 is connected between the gate and source of the MOS transistor 29, and a supply circuit 59 is connected between the drain and gate of the MOS transistor 29. A discharge circuit 56 is connected between the gate and source of the MOS transistor 28, and a supply circuit 58 is connected between the drain and gate of the MOS transistor 28.

The signal line 26 is connected to the static electricity protection circuit 61.
A first current path from the signal line 26 to the signal line 27 via the MOS transistor 29 and the diode 28a in accordance with the voltage between the first and second signals (input voltage Vin),
And a second current path from the MOS transistor 28 to the signal line 26 via the MOS transistor 28 and the diode 29a. When positive static electricity enters the IC 60 and the input voltage Vin increases, when the input voltage Vin is higher than the threshold voltage Vc1, or when the voltage change rate of the input voltage Vin is higher than a predetermined reference value In, MO
The S transistor 29 is turned on, and a surge current due to static electricity flows through the first current path. on the other hand,
Even when negative static electricity enters the IC 60 and the input voltage Vin drops, a surge current flows through the second current path under the same voltage condition. As described above, since the static electricity protection circuit 61 performs the same operation as the static electricity protection circuit 53, the present embodiment can provide the same effects as those of the third embodiment.

(Fifth Embodiment) Next, a fifth embodiment in which the electrostatic protection circuit 61 described in the fourth embodiment is applied to an IC having a communication driver circuit will be described with reference to FIG. I do. The IC 62 shown in FIG. 5 is used, for example, in an in-vehicle LAN, and its output terminals 63 and 64 are connected to input terminals of another IC (not shown) having a communication receiver circuit via a communication line. I have.
The power terminals 65 and 66 of the IC 62 are connected to the positive terminal and the negative terminal of a vehicle-mounted battery (not shown), respectively.

A communication driver circuit 67 serving as a protected circuit is formed in the IC 62, and its output node n2,
n3 is connected to the output terminals 63 and 64 via signal lines 68 and 69, respectively. This communication driver circuit 6
7 are power supply lines 70, 7 connected to power supply terminals 65, 66
1 is supplied with power. And, between the signal line 68 and the power supply line 71, the signal line 69 and the power supply line 71.
Are connected to the electrostatic protection circuit 61, respectively.

In the communication driver circuit 67, the power supply line 7
Between 0 and 71, a P-channel MOS transistor 72, a diode 73, and resistors 74, 75, 76, 7
7, a diode 78 and an N-channel MOS transistor 79 are connected in series. Parasitic diodes 72a and 79a are formed between the drain and source of the MOS transistors 72 and 79, respectively. The gate control circuit 80 is a drive control circuit for simultaneously turning on or off the MOS transistors 72 and 79 in accordance with communication data. The reference power supply circuit 81 and an operational amplifier 82 forming a voltage follower are connected to resistors 75 and 76. To maintain the common connection point n4 with a constant voltage Va.

The communication driver circuit 67 outputs a predetermined voltage between the signal lines 68 and 69 (between the output terminals 63 and 64) when the MOS transistors 72 and 79 are turned on. In this case, the voltages of the signal lines 68 and 69 themselves change symmetrically with respect to the voltage Va. Further, the communication driver circuit 67 sets the voltage between the signal lines 68 and 69 (between the output terminals 63 and 64) to 0 by turning off the MOS transistors 72 and 79. In this case, the voltage of the signal lines 68 and 69 themselves becomes the voltage Va.

Since the communication line constituting the in-vehicle LAN is provided in the vehicle, static electricity easily enters the communication line,
The static electricity may enter the IC 62 from the terminals 63 and 64 and be applied to the communication driver circuit 67. However, the signal line 68 and the power line 71
, And between the signal line 69 and the power supply line 71, even if static electricity enters the IC 62, the static electricity is transmitted from the signal lines 68 and 69 to the static electricity protection circuit 61. Escapes to the power line 71 via Further, since the static electricity protection circuit 61 can shift to the protection operation at high speed in response to the voltage change, it is possible to surely protect against intrusion of static electricity having a sharp voltage change.

Further, since the protection voltage of the electrostatic protection circuit 61 can be set arbitrarily, even if a potential difference occurs between the IC 62 and another IC provided with the communication receiver circuit, depending on the potential difference, The setting can be made so that the electrostatic protection circuit 61 does not shift to the protection operation.
As a result, it is possible to minimize the occurrence of communication errors when static electricity does not enter.

(Sixth Embodiment) Next, a sixth embodiment of the present invention will be described with reference to FIG. 6 showing an electrical configuration of an electrostatic protection circuit. In FIG. 6, the IC
The electrostatic protection circuit 84 formed in 83 is configured using P-channel type MOS transistors 85 and 86 (corresponding to first and second transistors), and is thus different from the electrostatic protection circuit described in the first embodiment. It is different from the circuit 22. In the MOS transistors 85 and 86, parasitic diodes 85a and 86a (corresponding to first and second one-way conducting circuits) are formed.

A resistor 87 (corresponding to a first control voltage discharging circuit, an impedance circuit) is connected between the gate and the source of the MOS transistor 85, and a MOS transistor 86
A resistor 88 (corresponding to a second control voltage discharging circuit, an impedance circuit) is connected between the gate and the source of the second transistor.
Further, a diode 89 having a polarity shown in FIG.
0 and 91 and a constant voltage circuit 93 (first
Is connected between the drain and the gate of the MOS transistor 86. A constant voltage circuit 98 (second control voltage supply circuit) including a diode 94, zener diodes 95 and 96, and a resistor 97 having the polarity shown in FIG. (Corresponding to a circuit). Here, the threshold voltage Vc
1 and Vc2 are determined based on the configurations of the constant voltage circuits 93 and 98, respectively.

Positive static electricity enters IC 83 and the input voltage V
When in rises above the threshold voltage Vc1, MO
The S transistor 85 is turned on, and a surge current flows through the MOS transistor 85 and the diode 86a. Further, when negative static electricity enters the IC 83 and the input voltage Vin drops below the threshold voltage Vc2,
The MOS transistor 86 is turned on, and the MOS
A surge current flows through the transistor 86 and the diode 85a. Therefore, according to the present embodiment, the same effect as that of the first embodiment can be obtained.

(Seventh Embodiment) Next, a seventh embodiment of the present invention will be described with reference to FIG. 7, which shows an electrical configuration of an electrostatic protection circuit. In FIG. 7, the IC
The static electricity protection circuit 100 formed at 99 differs from the static electricity protection circuit 43 described in the second embodiment in that it is configured using P-channel MOS transistors 85 and 86.

That is, a diode 101 having a polarity shown in FIG.
The collector and emitter of the NP transistor 102 (corresponding to a third transistor) are connected in series, and a resistor 103 (corresponding to an impedance circuit) is connected between the base and emitter of the transistor 102. Between the collector and base of transistor 102,
A parasitic capacitor 102a (shown by a broken line) is formed. High-speed pulse passing circuit 10 composed of diode 101, transistor 102 and resistor 103
Reference numeral 4 corresponds to a first control voltage supply circuit according to the present invention.

Similarly, a diode 105 having a polarity shown and a PN
P-type transistor 106 (corresponding to the fourth transistor)
Is connected in series between the collector and the emitter of the transistor 106, and a resistor 1 is connected between the base and the emitter of the transistor 106.
07 (corresponding to an impedance circuit).
A parasitic capacitor 106a is formed between the collector and the base of the transistor 106. The high-speed pulse passage circuit 108 including the diode 105, the transistor 106, and the resistor 107 corresponds to a second control voltage supply circuit according to the present invention.

When positive static electricity enters IC 99 and input voltage V
When in rises sharply in the positive direction, the MOS transistor 85 is turned on when the rate of change exceeds a predetermined reference value, and the MOS transistor 85 and the diode 86 are turned on.
and a surge current flows through a. Further, when negative static electricity enters the IC 99 and the input voltage Vin sharply decreases in the negative direction, the MOS transistor is turned on when the rate of change exceeds a predetermined reference value.
The transistor 86 is turned on, and a surge current flows through the MOS transistor 86 and the diode 85a. Therefore, according to the present embodiment, the same effect as that of the second embodiment can be obtained.

(Other Embodiments) The present invention is not limited to the embodiments described above and shown in the drawings. For example, the present invention can be modified or expanded as follows.
In the electrostatic protection circuit using the P-channel MOS transistors 85 and 86, a parallel circuit of a constant voltage circuit 93 and a high-speed pulse passage circuit 104 is used in the same manner as the electrostatic protection circuit 53 shown in the third embodiment. A first control voltage supply circuit may be configured, and a second control voltage supply circuit may be configured by a parallel circuit of the constant voltage circuit 98 and the high-speed pulse passage circuit 108. In addition, similarly to the static electricity protection circuit 61 shown in the fourth embodiment, the MOS transistor 8
The sources of the transistors 5 and 86 may be connected at the node n1, and the drains of the MOS transistors 85 and 86 may be connected to the signal lines 26 and 27, respectively.

In the fourth embodiment in which the sources of the MOS transistors 29 and 28 are connected to each other at the node n1, the supply circuit 58 may be composed of only the constant voltage circuit 36 or only the high-speed pulse passage circuit 47. In accordance with this, the supply circuit 59 may be composed of only the constant voltage circuit 41 or only the high-speed pulse passage circuit 51. The same applies to a configuration in which the sources of P-channel MOS transistors 85 and 86 are connected to each other at node n1.

As the first and second transistors,
Not only MOS transistors but also bipolar transistors and IGBTs may be used. In this case, the first and second one-way energizing circuits may use diodes formed as separate elements from the transistors. According to this configuration, the same operation and effect as those using the MOS transistor can be obtained. In the bipolar transistor, the emitter, collector, and base terminals correspond to a first main terminal, a second main terminal, and a control terminal, respectively.

In the second embodiment, the transistor 4
Instead of 5 and 49, an N-channel MOS transistor may be used. The same applies to other embodiments. In the first embodiment, in order to achieve a protection operation with less operation delay, between the drain and the gate of each of the MOS transistors 28 and 29 (in addition to the parasitic capacitance Cdg).
A capacity component may be added. However, even in this case, it is necessary to satisfy the expressions (2) and (4) so that the MOS transistors 28 and 29 are not turned on in response to a normal control signal voltage change. The same applies to the sixth embodiment.

The first and second one-way energizing circuits are not limited to diodes, and any circuit can be used as long as it can energize in only one direction. Further, the first and second control voltage discharging circuits are not limited to resistors, but may be other impedance circuits. Further, the clamp circuit is not limited to the Zener diode, and may be added in each of the first, second, sixth, and seventh embodiments.

[Brief description of the drawings]

FIG. 1 is an electrical configuration diagram of an electrostatic protection circuit according to a first embodiment of the present invention.

FIG. 2 is a view corresponding to FIG. 1, showing a second embodiment of the present invention;

FIG. 3 is a view corresponding to FIG. 1, showing a third embodiment of the present invention;

FIG. 4 is a view corresponding to FIG. 1, showing a fourth embodiment of the present invention;

FIG. 5 shows a fifth embodiment of the present invention, and is an electric configuration diagram of an IC including a communication driver circuit.

FIG. 6 is a view corresponding to FIG. 1, showing a sixth embodiment of the present invention;

FIG. 7 is a view corresponding to FIG. 1, showing a seventh embodiment of the present invention;

FIG. 8 is a diagram corresponding to FIG. 1 showing a conventional technique (part 1);

FIG. 9 is a diagram corresponding to FIG. 1 showing the prior art (part 2);

FIG. 10 is a diagram corresponding to FIG. 1 showing a prior art (part 3);

FIG. 11 is a diagram showing an electrical configuration of a driver circuit and a receiver circuit.

[Explanation of symbols]

22, 43, 53, 61, 84, and 100 are electrostatic protection circuits, 26 and 27 are signal lines, 28 and 86 are MOS transistors (second transistors), and 28a and 86a are diodes (second one-way conducting circuits). , 29, 85 are MOS transistors (first transistors), 29a, 85a are diodes (first one-way energizing circuit), 30, 88 are resistors (second control voltage discharging circuit, impedance circuit),
31 and 87 are resistors (first control voltage discharge circuit, impedance circuit), 36 and 98 are constant voltage circuits (second control voltage supply circuit), 41 and 93 are constant voltage circuits (first control voltage supply circuit) ), 45 and 106 are transistors (fourth transistors), 46, 50, 103 and 107 are resistors (impedance circuits), 47 and 108 are high-speed pulse passage circuits (second control voltage supply circuits), and 49 and 102 are Transistors (third transistors), 51 and 104 are high-speed pulse passing circuits (first control voltage supply circuits), 54 and 55
Is a Zener diode (clamp circuit), 56 is a discharge circuit (second control voltage discharge circuit), and 57 is a discharge circuit (first control voltage circuit).
Is a supply circuit (second control voltage supply circuit), and 59 is a supply circuit (first control voltage supply circuit).

 ────────────────────────────────────────────────── ─── Continuing on the front page (72) Inventor Hiroyuki Ban 1-1-1 Showa-cho, Kariya-shi, Aichi F-term in DENSO Corporation (reference) 5F038 BH02 BH04 BH05 BH06 BH07 BH13 EZ20 5F048 AA02 AC07 AC10 CC06 CC07 CC10 5F082 AA33 BC03 BC09 BC11 FA16 5J032 AA03 AA12 AC18

Claims (11)

[Claims] 1. A first and a second transistor having the same conductivity type or junction type and connected in series between signal lines so that current-carrying directions are opposite to each other, and current-carrying directions are opposite to each other. A first and a second one-way energizing circuit connected in parallel to the first and second transistors, respectively; a control terminal as a control input terminal pair of the first transistor; A first control voltage discharging circuit composed of an impedance circuit connected between the first transistor and a second main terminal of the first transistor and a control terminal; A first control voltage supply circuit that is energized under a voltage condition higher than a first reference voltage in a direction in which current can flow in the one-way energization circuit; a control terminal that is a control input terminal pair of the second transistor; No. A second control voltage discharging circuit comprising an impedance circuit connected between the second main terminal and the control terminal of the second transistor; and And a second control voltage supply circuit that is energized under a voltage condition higher than a second reference voltage in a direction in which the one-way energization circuit can be energized. 2. The static electricity protection circuit according to claim 1, wherein said first and second control voltage supply circuits comprise a constant voltage circuit using a Zener diode. 3. A first transistor and a second transistor having the same conductivity type or junction type and connected in series between signal lines so that the directions of current flow are opposite to each other. A first and a second one-way energizing circuit connected in parallel to the first and second transistors, respectively; a control terminal as a control input terminal pair of the first transistor; A first control voltage discharge circuit comprising an impedance circuit connected between the first transistor and a second main terminal of the first transistor and a control terminal; A first control voltage supply circuit that is in an energized state under a voltage condition higher than a first reference value in an energizable direction of the two one-way energization circuits; and a control that is a control input terminal pair of the second transistor. Terminal A second control voltage discharging circuit comprising an impedance circuit connected between the first main terminal and a first main terminal; a second control voltage discharging circuit connected between the second main terminal of the second transistor and the control terminal; And a second control voltage supply circuit that is energized under a voltage condition higher than a second reference value in a direction in which the first one-way energization circuit is energizable. Static electricity protection circuit. 4. The first control voltage supply circuit according to claim 2, wherein, in addition to the voltage condition, a voltage change rate between a second main terminal of the first transistor and a control terminal is the second one direction. The second control voltage supply circuit is configured to be in an energized state under a voltage condition higher than a first reference value in the energizable direction of the energizing circuit,
The energization state is established under a voltage condition in which the voltage change rate between the second main terminal and the control terminal of the second transistor is higher than a second reference value in the energizable direction of the first one-way energization circuit. The electrostatic protection circuit according to claim 1, wherein the static electricity protection circuit is configured to be configured as follows. 5. The first control voltage supply circuit includes a third transistor connected between a second main terminal of the first transistor and a control terminal, and the second control voltage supply circuit includes: The circuit includes a fourth transistor connected between a second main terminal and a control terminal of the second transistor, and a control terminal and a control terminal which are a pair of control input terminals of the third and fourth transistors. 5. The electrostatic protection circuit according to claim 3, wherein an impedance circuit is connected between each of the first and second main terminals. 6. The impedance of an impedance circuit connected to the third and fourth transistors is such that the third and fourth transistors maintain an off state by a normal signal voltage applied between the signal lines. 6. The static electricity protection circuit according to claim 5, wherein the value is set to a sufficiently low value. 7. The impedance of the first and second control voltage discharging circuits is sufficient to maintain the first and second transistors in an off state by a normal signal voltage applied between the signal lines, respectively. 7. The static electricity protection circuit according to claim 1, wherein the static electricity protection circuit is set to a very low value. 8. The static electricity protection circuit according to claim 1, wherein said impedance circuit is a resistor. 9. The circuit according to claim 1, wherein the first and second one-way energizing circuits are diodes formed as parasitic elements of the first and second transistors or diodes formed as separate elements. Item 9. An electrostatic protection circuit according to any one of Items 1 to 8. 10. The static electricity protection circuit according to claim 1, wherein a clamp circuit is connected in parallel with the impedance circuit in each of the first and second control voltage discharge circuits. 11. The static electricity protection circuit according to claim 1, wherein said first and second transistors are MOS transistors or bipolar transistors.