JP2002252570A - Apparatus and method for generating diffusion code, transmission apparatus and method, receiving apparatus and method, program and information recording medium - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an apparatus for generating a diffusion code to a cyclic diffusion cyclic shift type diffusion code with a diffusion code for a spectral diffusion communication used as a basic code. SOLUTION: A basic code generator 102 of the apparatus 101 for generating the diffusion code generates the basic code of a length N-chip. A cyclic shifter 103 outputs a plurality of the basic codes cyclically shifted by the number (e) (e: a plurality of any of 0, E, 2E, 3E,...) of integer number times of the number E of the cyclic chips. A cyclic diffusing unit 104 generates a plurality of cyclic diffusion cyclic shift type diffusion codes of a length (F+N+B) diffused forward at the cyclically shifted code by the number F of the forward diffusion chips and diffused rearward thereat by the number B of the rearward diffusion chips for the plurality of the cyclically shifted codes which satisfy all that (1) a head F chip of the cyclic diffusion cyclic shift type diffusion code is equal to a tail of the cyclically shifted code, (2) a tail B chip of the cyclic diffusion cyclic shift type diffusion code is equal to a head of the cyclic shifted code, (3) F>=B, (4) E>B, and (5) e<N-B.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a spread code generation apparatus, a transmission apparatus, a reception apparatus, a spread code generation method and a transmission method for a cyclic extension cyclic shift type spread code using a spread code for spread spectrum communication as a basic code. The present invention relates to a receiving method, a program for realizing these by a computer, and an information recording medium on which the program is recorded.

[0002]

2. Description of the Related Art Hitherto, there have been proposed methods for generating a cyclic extension cyclic shift type spread code using a spread code for spread spectrum communication as a basic code and a communication system using these. For example, the inventor has disclosed such a technique in Japanese Patent Application Laid-Open No. 2000-354021.

In the disclosed technique, the following parameters are set for a basic code of N chips in length: allowable chip number X for synchronization deviation; allowable chip number Y for delayed wave delay amount; In consideration of the number of redundant chips Z, the basic code is cyclically shifted by an integer multiple of E> Y (especially E = Y + 1), and then the cyclically shifted code is shifted forward by X chips and backward by Y + Only the Z chip is extended cyclically.

[0004] In particular, the disclosed technique employs an M-sequence, a Gold code, or the like as a basic code.

[0005]

However, many other variations of the technique for generating a large number of new spreading codes from the basic code are desired.

Further, a code having an autocorrelation characteristic other than the above as a basic code, for example, a document "Comments on" On
the Minimization of Overhead in Channel Impulse Re
sponse Measurement "" (Xinmin Deng and Pingzhi Fa
n, IEEE Transaction on Vehicular Technology, vol.
49, No. 5, September 2000, pp. 2039-2040) is also desired.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and a spread code generator, a transmitter, and a spread code for a cyclic extension cyclic shift type spread code using a spread code for spread spectrum communication as a basic code. It is an object of the present invention to provide a receiving device, a spreading code generating method, a transmitting method, a receiving method, a program for realizing these by a computer, and an information recording medium on which the program is recorded.

[0008]

In order to achieve the above object, the following invention is disclosed in accordance with the principle of the present invention.

A spread code generation apparatus according to a first aspect of the present invention includes a basic code generation unit, a cyclic shift unit, and a cyclic extension unit, and is configured as follows.

That is, the basic code generator generates a basic code having a length of N chips.

On the other hand, the cyclic shift section converts the generated basic code into an integral multiple of the number of cyclic chips E (e is 0, E, 2E, 3).
A plurality of cyclically shifted codes that are cyclically shifted by a plurality of (E,...) Are output.

Further, for each of the plurality of output cyclically shifted codes, the cyclic extension unit extends the cyclically shifted code by a forward extension chip number F forward and a backward extension chip number B backward ( (F + N + B) chips of the cyclic extension cyclic shift type spreading code, and the following conditions (1) The first F chips of the cyclic extension cyclic shift type spreading code correspond to the last F chips of the cyclic shifted code. Equivalent to a tip. (2) The last B chips of the cyclic extension cyclic shift spreading code are equal to the first B chips of the cyclic shifted code. (3) F ≧ B. (4) E> B. Are generated.

However, e <N−B.

A transmitting apparatus according to a second aspect of the present invention includes a serial-to-parallel conversion section, the above-mentioned spread code generating apparatus, a multiplication section, and a code division multiplex transmission section, and is configured as follows. .

That is, the serial-to-parallel converter converts the transmission signal from serial to parallel.

On the other hand, the spread code generating apparatus generates a plurality of cyclic extension cyclic shift type spread codes.

Further, the multiplying unit multiplies each of the plurality of signals resulting from the serial-to-parallel conversion by any of the plurality of generated cyclic extension cyclic shift spreading codes without duplication.

The code division multiplex transmission section performs code division multiplex transmission of a plurality of signals resulting from the multiplication.

Further, in the transmitting apparatus according to the present invention, the multiplying unit includes a plurality of signals resulting from the serial-to-parallel conversion and a pilot signal, each of the plurality of generated cyclic extension cyclic shift spreading codes being generated. Can be multiplied without duplication.

In the present invention, the basic code can be an M-sequence code, a Gold code, or an orthogonal code obtained from a Walsh function (the same applies to the invention of the following apparatus and method). ).

In the present invention, the autocorrelation R (j) between the basic code and the code shifted by j chips is R (j) = N, (j = 0) for a positive integer θ; R (j) =-(N−4θ ² ), (j = N / 2); R (j) = 0, (other than the above). The same applies to the above.)

In particular, depending on the magnitude of N and θ, j = N
/ 2, the absolute value of R (j) becomes large, so that the number of chips e of the cyclic shift is equal to the predetermined number of chips X (0 ≦ X
≦ F), only those that do not satisfy N / 2−B−1 ≦ e ≦ N / 2 + X can be used (the same applies to the invention of the following apparatus and method). ).

Further, only the chip number e of the cyclic shift that satisfies e <N / 2-B-1 with respect to a predetermined chip number X (0 ≦ X ≦ F) where the period shift is allowable. (The same applies to the invention of the following apparatus and method).

In addition, the number of chips e of the cyclic shift should be such that it satisfies N / 2 + X <e with respect to the predetermined number of chips X (0 ≦ X ≦ F). (The same applies to the invention of the following apparatus and method).

A receiving apparatus according to a third aspect of the present invention includes a basic code generating section, a cyclic shift section, a receiving section, a synchronizing section, a demodulating section, and a parallel / serial converting section. The configuration is as follows.

That is, the basic code generation unit calculates the autocorrelation R (j) between the basic code having a length of N chips and a code shifted by j chips, with respect to a positive integer θ. = N, (j = 0); R (j) = − (N−4θ ² ), (j = N / 2); R (j) = 0, (other than the above).

On the other hand, the cyclic shift unit converts the generated basic code into an integral multiple of the number of cyclic chips E (e is 0, E, 2E, 3).
A plurality of cyclically shifted codes that are cyclically shifted by a plurality of (E,...) Are output.

Further, the receiving section cyclically extends the plurality of codes identical to the generated cyclically shifted code by the number of forward extension chips F in the front and the number of backward extension chips B in the rear by the length (F). + N + B) A signal received by code division multiplex transmission using a plurality of cyclic extension cyclic shift type spreading codes of a chip is received.

Then, the synchronization section identifies and synchronizes the head of the code from the peaks appearing at every length of the cyclic extension cyclic shift type spreading code in the correlation value between the generated basic code and the received signal. .

On the other hand, the demodulation section demodulates the synchronized signal using a plurality of cyclically shifted codes.

Further, the parallel-to-serial conversion unit performs parallel-to-serial conversion on the plurality of demodulated signals and outputs a transmission signal.

However, e <N−B.

A spread code generation method according to a fourth aspect of the present invention includes a basic code generation step, a cyclic shift step, and a cyclic extension step, and is configured as follows.

That is, the basic code generation step generates a basic code having a length of N chips.

On the other hand, in the cyclic shift step, the generated basic code is converted into an integral multiple of the number of cyclic chips E (e is 0, E, 2).
E, 3E,...) Are output.

Further, in the cyclic extension step, for each of the plurality of cyclically shifted codes output, the length of the cyclically shifted code extended forward by the number F of forward extended chips and backward by the number B of backward extended chips ( (F + N + B) chips of the cyclic extension cyclic shift type spreading code, and the following conditions (1) The first F chips of the cyclic extension cyclic shift type spreading code correspond to the last F chips of the cyclic shifted code. Equivalent to a tip. (2) The last B chips of the cyclic extension cyclic shift spreading code are equal to the first B chips of the cyclic shifted code. (3) F ≧ B. (4) E> B. Are generated.

However, e <N−B.

A transmitting method according to a fifth aspect of the present invention includes a serial-to-parallel conversion step, a spreading code generation step, a multiplication step, and a code division multiplex transmission step, and is configured as follows.

That is, in the serial-parallel conversion step, the transmission signal is serial-parallel converted.

On the other hand, in the spread code generating step, a plurality of cyclic extension cyclic shift type spread codes are generated by the above spread code generating method.

Further, in the multiplying step, each of the plurality of signals resulting from the serial-to-parallel conversion is multiplied with any of the generated plurality of cyclic extension cyclic shift spreading codes without duplication.

In the code division multiplex transmission step, a plurality of signals resulting from the multiplication are transmitted by code division multiplex transmission.

Further, in the transmission method of the present invention, in the multiplying step, each of the plurality of serial-to-parallel converted signals and the pilot signal may include any one of the plurality of generated cyclic extension cyclic shift type spreading codes. Can be multiplied without duplication.

A receiving method according to a sixth aspect of the present invention includes a basic code generation step, a cyclic shift step, a reception step, a synchronization step, a demodulation step, and a parallel / serial conversion step. The configuration is as follows.

That is, in the basic code generation step, the length N
The autocorrelation R (j) of the chip's basic code, which is shifted by j chips, is R (j) = N, (j = 0); R (j) = -(N−4θ ² ), (j = N / 2); Generate a code with R (j) = 0 (other than the above).

On the other hand, in the cyclic shift step, the generated basic code is set to an integer multiple of the number of cyclic chips E (e is 0, E, 2).
E, 3E,...) Are output.

Further, in the receiving step, the same code as the generated cyclically shifted code is cyclically extended by the number of forward extension chips F in the forward direction and the number of backward extension chips B in the backward direction. + N + B) A signal received by code division multiplex transmission using a plurality of cyclic extension cyclic shift type spreading codes of a chip is received.

Then, in the synchronization step, the head of the code is identified from the peaks appearing at every length of the cyclic extension cyclic shift type spreading code in the correlation value between the generated basic code and the received signal, and synchronization is achieved. .

On the other hand, in the demodulation step, the signal resulting from synchronization is demodulated using a plurality of cyclically shifted codes.

Further, in the parallel / serial conversion step, a plurality of demodulated signals are parallel / serial converted and a transmission signal is output.

However, e <N−B.

The program according to the seventh aspect of the present invention comprises:
General-purpose computer, DSP (Digital Signal Processor), FPGA
(Field Programmable Gate Array), software radio, and other computers (information processing devices)
The computer causes the computer to execute a spreading code generation method, a transmission method, or a reception method.

The program includes a compact disc,
The data can be recorded on an information recording medium such as a floppy disk, hard disk, magneto-optical disk, digital video disk, magnetic tape, or semiconductor memory.

In addition, an information recording medium on which the program of the present invention is recorded can be distributed and sold independently of the computer.

[0055]

DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below. The embodiments described below are for explanation, and do not limit the scope of the present invention. Therefore, those skilled in the art can adopt embodiments in which each of these elements or all elements are replaced with equivalents, but these embodiments are also included in the scope of the present invention.

(First Embodiment) FIG. 1 shows a first embodiment of the present invention.
FIG. 2 is a schematic diagram showing a schematic configuration of a spread code generation device according to the embodiment, and FIG. 2 is a flowchart showing a flow of a spread code generation method executed in the spread code generation device. Hereinafter, description will be made with reference to these drawings.

The spread code generation apparatus 101 includes a basic code generation section 102, a cyclic shift section 103, and a cyclic extension section 104.
And.

First, the basic code generator 102 generates a basic code having a length of N chips (step S201). As the basic code to be generated, an M-sequence, a Gold code, or an orthogonal code obtained from a Walsh function can be adopted.

Next, the cyclic shift unit 103 converts the generated basic code into an integral multiple of the number of cyclic chips E (e is 0,
A plurality of cyclically shifted codes which are cyclically shifted by a plurality of (E, 2E, 3E,...) Are output (step S202). However, e <NB with respect to the number B of backward extension chips.

Finally, for each of the plurality of cyclically shifted codes output, the cyclic extension section 104 extends the cyclically shifted code by a forward extended chip number F forward and a backward extended chip number B backward. (F + N + B) chips, and the following conditions (1) The first F chips of the cyclic extension cyclic shift type spreading code are the end of the cyclically shifted code. Equivalent to F chips. (2) The last B chips of the cyclic extension cyclic shift spreading code are equal to the first B chips of the cyclic shifted code. (3) F ≧ B. (4) E> B. Are generated (step S203).

FIG. 3 is an explanatory diagram showing an example of a cyclic extension cyclic shift type spreading code generated according to the present embodiment. In the example shown in the figure, the following parameters are employed. The basic code is an M-sequence code “001010111” having a length N = 31 = Nc.
0110001111100110100100 ".・ Front extension chip number F = 4. -Number of rear extension chips B = 2. The number of traveling chips E = 3 = B + 1> B.・ E = 0, 3, 6,
9, ..., 27.

Further, the correspondence between these parameters and parameters in the conventional cyclic extension cyclic shift type spreading code is as follows. -Allowable number of chips for synchronization deviation X = 2 = Ngca. -Allowable chip number Y = 2 = Ngcb with respect to delay amount of delay wave. -Number of redundant chips to match system clock Z =
2 = Ngcd.・ F = Ngca + Ngcd ≧ B = Y = Ngcb. E = B + 1 = Y + 1> Y.

As a result, a cyclic extension cyclic shift type spreading code having the following characteristics can be obtained. The number of generated cyclic extension cyclic shift type spreading codes is Code
10 pieces from 1 to Code 10. The code length of the cyclic extension cyclic shift type spreading code is F + N + B
= 37 = Nmc.

Here, here, e =
Although all ten of 0, 3, 6, 9,..., 27 are employed, any one of them may be selectively employed. For example, a mode may be adopted in which only four codes generated from e = 0, 3, 6, and 9 are generated and used for communication. The case where these e are selectively adopted is also included in the scope of the present invention.

FIG. 4 shows a state of a cyclic extension cyclic shift type spreading code generated by a conventional method. The state of the code itself differs greatly between the conventional method and the present method because the number of chips in the forward extension and the backward extension is significantly different. Therefore, it can be said that a new method of generating a plurality of codes from the basic code has been realized.

(Transmitter) FIG. 5 is a schematic diagram showing a schematic configuration of a transmitter according to the embodiment of the present invention. Hereinafter, description will be made with reference to this figure.

The transmitting device 501 receives binary data as a transmission signal, and the scrambler 502 scrambles the binary data. Although various known techniques can be used for the scrambling, it is preferable that the appearance probability of the value at each time point of the signal obtained as a result of the scrambling be as equal as possible according to the characteristics of the binary data.

However, scrambling is not always necessary. In this case, a descrambler is not necessary in the receiving device described later.

One of the scrambling methods uses an M sequence. That is, scrambling is performed by taking an XOR (exclusive OR) of the input signal and a predetermined code of the M sequence. At the time of descrambling, restoration can be performed by taking XOR again with a predetermined code of the same M sequence.

The second method of scrambling is a method using an interleaver. FIG. 6 is a schematic diagram showing an outline of the interleaver. The figure shows a state of the interleaver, and the interleaver has an array of 4 × 4 bits = 16 bits. The interleaver converts the input signal to 1
Cache for 6 bits. 6 right side, a _1, a ₂ in the order of each bit of the input signal is time, ..., in the case where accepted by the interleaver becomes a _16, shows how the storage in the array.

The left side of FIG. 6 shows that each element is
This indicates that the data is output in the order of b ₁ , b ₂ ,..., b ₁₆ . If these correspondences are reversed, descrambling can be easily performed.

Although the interleaver uses a 4 × 4 bit array, the interleaver and its inverse conversion can be performed in a similar manner using other sizes.

The scrambled signal is divided into a plurality of signals by the serial / parallel converter 503, and the QAM modulator 504 performs primary modulation on these signals. As a result, I-channel and Q-channel data necessary for performing quadrature modulation such as QPSK and 16QAM are output.

For example, when QPSK is used, two bits of input data are set as follows:
(I-channel data, Q-channel data). (1,1) → (1,1) (1,0) → (1, −1) (0,1) → (−1,1) (0,0) → (−1, −1) In QPSK, 2-bit data is changed to a complex phase.

[0075] Pilot signal generator 505 generates a pilot signal. This is used for estimating the amplitude and phase distortion of a preceding wave or a delayed wave in a synchronization or radio wave propagation path by a receiver.

On the other hand, the spreading code generation device (spreading code generator) 101 generates L pieces of the above-mentioned plurality of cyclic extension cyclic shift type spreading codes. The L cyclic extension cyclic shift spreading codes may be generated using all of the integral multiple chips, or may be selectively selected from a plurality of integral multiple chips. It may be a generated one.

Multiplier 506 multiplies each of the pilot signal and the signal processed by QAM modulator 504 by a different cyclic extension cyclic shift type spreading code, and supplies the result to code division multiplexing section 507. When the I-channel data is d _I , the Q-channel data is d _Q , the imaginary unit is j, and the spreading code is s (t), for example, the following multiplication method can be adopted.

First, (d _I + j · d _Q ) · s (t) is the result of the multiplication. In this case, the receiving side can restore the original signal by multiplying by s (t) and integrating by the code length.

Second, (d _I + j · d _Q ) · (s (t) + j · s (t))
Is the result of the multiplication. In this case, on the receiving side, the original signal can be restored by multiplying by (s (t) -j · s (t)) / 2 and integrating by the code length.

In this figure, in order to facilitate understanding,
Although the output of the multiplier 506 collectively expresses the I channel and the Q channel with one arrow, the information of the I channel and the Q channel is actually output.

Code division multiplexing section 507 multiplexes the plurality of received signals for each I channel and each Q channel.

An orthogonal modulator (Orthogonal Modulato)
r) 508 is an intermediate frequency when the f _c, a cos 2 [pi] f _c t the data of the I channel, the data of the Q channel sin
The 2 [pi] f _c t, by taking the sum by multiplying each orthogonal modulation. As a result, the signal is modulated into a low-frequency band that can be easily processed.

Further, up-converter 509 up-converts the signal and transmits it from antenna 510.

(Receiving Apparatus) FIG. 7 is a schematic diagram showing a schematic configuration of a receiving apparatus according to an embodiment of the present invention. Less than,
Description will be given with reference to this figure.

The receiving apparatus 601 receives the signal transmitted from the transmitting apparatus 501 via the antenna 602, passes the signal through the band-pass filter 603, and receives the signal from the automatic gain controller and down-converter.
overter) 604.

The automatic gain control down converter 604
Adaptively changing the amplification factor, the received signal is converted into a signal of a certain level that is easy to process, and the signal is down-converted to a frequency band in which quadrature demodulation is easy to perform.

The quadrature demodulator 613 converts the received signal
obtain data I channel by multiplying the cos 2πf _c t. Moreover, to obtain data of Q channel by multiplying the sin 2πf _c t.
Note that these output data may be further digitized by an A / D converter. These data are output to the correlator 607
Given to.

On the other hand, basic code generation section 605 generates the same basic code as that of transmitting apparatus 501 and cyclic shift section 606.
Outputs a plurality of cyclically shifted signals obtained by cyclically shifting this by an integer multiple e of the number of cyclic chips E.

The correlator 607 includes the quadrature demodulator 61
3 is correlated with each of the plurality of cyclically shifted signals.

The pilot channel signal is sent to delay profile estimating section 608. Here, the signals are synchronized, and the intensities and phase differences of the preceding wave and the delayed wave are estimated. For this estimation, a known technique can be used.

The compensating section 609 identifies the synchronization of the signal of each data channel based on the estimated delay profile, and compensates for the strength and the phase difference.

The maximum ratio combining circuit (Rake Receiver / detecto
r) 610 combines the preceding wave and the delayed wave whose intensity and phase are compensated, determines whether the data is 0 or 1, and restores the transmitted data.

The result is parallel-serial converted by a parallel-serial converter 611, and finally, the descrambler 612 transmits the
Is performed by the scrambler 502 to obtain the transmitted binary data.

FIG. 8 shows that the following transmission conditions are obtained.
It shows the signal strength as a result of correlation by the correlator 607.・ Transmit binary data (Transmission Data) "1101". -The basic code is a three-stage M sequence "1110010". The cyclic extension cyclic shift type spreading codes are “010111001011” and “101000110100”. The former is used when binary data 1 is to be transmitted, and the latter is used when binary data 0 is to be transmitted.

In the center of the figure, spread data (Spread dat
The data string of a) is described, and the basic code “111”
0010 ”scanning with Correlated with (S
can) is graphically shown at the bottom of the figure. The peak in the graph is the synchronization point. In this way, synchronization can be achieved by the slide method.

(When a special code is used) M-sequence or Go
The ld code and the like are generally used as spread codes for spread spectrum communication, and various studies have been made on the autocorrelation characteristics. However, there are codes having different autocorrelation characteristics. One of them is a code described in the above document. In the above document, "0101111101101011110001100100" is described as an example of a code. In addition, since the value of the code | symbol in the said literature is notation using -1 and 1, this was renewed as the notation using 0 and 1 of this specification. That is, -1 in the above document is 0,
1 in the above document corresponds to 1 respectively.

This code has a length of N = 28 chips, and the autocorrelation function is as follows. R (0) = 28; R (14) = -12; R (j) = 0, (j ≠ 0 and j ≠ 14)

In this code, unlike the M-sequence, the absolute value of the autocorrelation increases locally just at half the code length N. Therefore, when this code is used as the basic code, the number of cyclic shift chips must be appropriately selected. When the following parameters are adopted for this code, the number of cyclic chips E = 3.・ Front extension chip number F = 4. -Number of rear extension chips B = 2.・ Period shift allowable chip number X = 2. The number e of integral multiple chips that can be adopted is e <NB = 26, and
Since the following condition N / 2-B-1 = 11 ≤ e ≤ N / 2 + X = 16 is not satisfied, e = 0, 3, 6, 9, 18, 21, 24.

[0099] When transmission is performed using this code, it is preferable to use a pilot signal on the basis of correlation characteristics. Also, a large estimated value may be suddenly obtained when estimating the propagation path in the receiving apparatus 601.
It is desirable to identify the temporal head of the cyclic extension cyclic shift type spreading code in advance by the method shown in FIG.

First, the sampling value 9 of the received signal
01 and the code length of the cyclic extension cyclic shift type spreading code
902 shifted by the time corresponding to (F + N + B) chip
Are complexly multiplied to obtain a multiplication result 903.

Next, the multiplication result 903 is divided at a time corresponding to the code length (F + N + B) chips, and the respective sections are overlapped and added to obtain an addition result 904. In the figure, the number of sections is two, but this number can be any number.

Further, the addition result 904 is integrated while sliding the window of width (F + B) in the time direction. In the figure, the integration result 905 is described in association with the start position of the window.

As a result, the signal strength of the part corresponding to the guard (the part extended forward and the part extended backward) is emphasized, and the other data parts are averaged and approach zero, so that peaks can be easily generated. The point at which the peak is returned by a time corresponding to the code length (F + N + B) chips from this peak corresponds to the head of the code.

As described above, by identifying the head of the code first and then correlating only a necessary portion, it is possible to perform appropriate propagation path estimation.

As described above, if the type of the number of integral multiple chips is limited, even a code having a special autocorrelation characteristic as described in the above-mentioned document can be adopted as a basic code. Variations in the types of codes that can be performed can be increased.

In the present embodiment, the transmitting device 5
In No. 01, the primary modulation is performed by the QAM modulator 504 after performing the serial-parallel conversion. The same primary modulation method (QPSK, 16QAM, etc.) may be used, or a different method may be used for each channel.

The transmission characteristics of each combination of the primary modulation method and the assignment to each channel are measured and set in advance in accordance with the propagation path conditions and the characteristics of the data to be transmitted. Adaptive transmission can be performed by selecting a combination that provides optimum transmission characteristics according to the characteristics of the data to be transmitted.

Note that, unlike this embodiment, an embodiment in which primary modulation is performed collectively before serial-parallel conversion can be adopted, and such an embodiment is also included in the scope of the present invention.

(Another embodiment using a special code)
As the codes having the above-described correlation characteristics, only codes satisfying the following conditions may be used. e <N / 2-B-1 = 11

The values of e in this case are 0, 3, 6, and 9.
Therefore, four types of integer multiple shift chip numbers can be obtained. In this case, the codes are orthogonal to each other.

In addition, only those satisfying the following conditions may be used. N / 2 + X = 16 <e

The value of e in this case is 18, 21, 24.
Therefore, three types of integer multiple shift chips can be obtained. In this case, the respective codes are also orthogonal to each other.

When these two types of code groups are used, the type of the number of integer multiple shift chips is halved as compared with the above case. However, in this embodiment, since the codes are orthogonal to each other, the free insertion of a pilot signal is possible. In addition to the high degree, the use of differential coding described later has the advantage that a pilot signal is not necessarily required.

(Another Embodiment of Inserting Pilot Signal)
In the above embodiment, one channel is assigned to the pilot signal by generating the pilot signal and multiplying it by the cyclic extension cyclic shift type spreading code. However, a technique of inserting the pilot signal on the time axis is adopted. This embodiment can also be included in the scope of the present invention.

(Embodiment Using Differential Coding) In the above embodiment, the QAM modulator 504 performs primary modulation and uses quadrature modulation such as QPSK or 16QAM. However, depending on the correlation characteristics between codes, it is possible to omit the pilot channel by using differential coding. This embodiment realizes this.

In the differential coding, the transmitting device changes the phase and the amplitude according to the input signal sequence. On the other hand, the receiving apparatus restores information by knowing the phase difference and the amplitude difference from the immediately preceding symbol.

As such a differential coding method, any of differential coding QPSK (DQPSK), π / 4 shift type differential coding QPSK, differential coding QAM, etc. can be adopted. .

When differential coding is used, the pilot channel can be omitted by considering the amount of phase variation, and the channel can be used for transmitting information data.

FIG. 10 is an explanatory diagram showing the appearance of signals received on the receiving side in the case of differentially coded QPSK.

FIG. 10A shows a correlation value of a certain symbol in a certain parallel channel. There are two peaks, the phase at the large peak is shifted by 0 degrees and the phase at the small peak is shifted by 45 degrees.

FIG. 10B shows the correlation value of the symbol immediately before the symbol shown in FIG. 10A in the parallel channel. This also has two peaks,
The phase at the large peak is shifted by 46 degrees and the phase at the small peak is shifted by 89 degrees.

FIG. 10 (c) shows the result of considering each phase difference. This also has two peaks,
The phase at the large peak is shifted by (46 degrees-0 degrees) = 46 degrees, and the phase at the small peak is shifted by (89 degrees-45 degrees) = 44 degrees.

Finally, FIG. 10D shows how the two peaks are vectorized and synthesized. The phase of the vector is the shift amount in FIG. 10C, and the length of the vector corresponds to the height of the peak. The phase of the sum of the two vectors is approximately 45 degrees, which means that both the I channel and the Q channel have the same sign and the same value. From such a pattern, in QPSK, it can be determined that data (0, 1) has been transmitted from the transmitting side.

[0124]

As described above, according to the present invention,
A spread code generator for a cyclic extension cyclic shift type spread code having a spread code for spread spectrum communication as a basic code,
A transmitting device, a receiving device, a spreading code generating method, a transmitting method, a receiving method, a program for realizing these by a computer, and an information recording medium on which the program is recorded can be provided.

[Brief description of the drawings]

FIG. 1 is a schematic diagram illustrating a schematic configuration of a spread code generation device according to a first embodiment of the present invention.

FIG. 2 is a flowchart illustrating a flow of a spread code generation method executed in the spread code generation device according to the first embodiment of the present invention.

FIG. 3 is an explanatory diagram showing an example of a generated cyclic extension cyclic shift type spreading code according to the first embodiment of the present invention.

FIG. 4 is an explanatory diagram showing a state of a cyclic extension cyclic shift type spreading code generated by a conventional method.

FIG. 5 is a schematic diagram illustrating a schematic configuration of a transmission device according to the first embodiment of the present invention.

FIG. 6 is a schematic diagram showing an outline of an interleaver.

FIG. 7 is a schematic diagram illustrating a schematic configuration of a receiving device according to the first embodiment of the present invention.

FIG. 8 shows a signal strength obtained as a result of correlation by a correlator in the receiving device according to the first embodiment of the present invention.

FIG. 9 is an explanatory diagram showing a method of identifying the head of a code when a cyclic extension cyclic shift type spreading code is used.

FIG. 10 is an explanatory diagram showing a state of a signal received on the receiving side in the case of differentially coded QPSK.

[Explanation of symbols]

 101 Spread code generator 102 Basic code generator 103 Cyclic shift unit 104 Cyclic extension unit 501 Transmitter 502 Scrambler 503 Serial / parallel converter 504 QAM modulator 505 Pilot signal generator 506 Multiplier 507 Code division multiplex unit 508 Quadrature modulator 509 Up Converter 510 Antenna 601 Receiver 602 Antenna 603 Bandpass Filter 604 Automatic Gain Control Down Converter 605 Basic Code Generator 606 Cyclic Shifter 607 Correlator 608 Delay Profile Estimator 609 Compensator 610 Maximum Ratio Combiner 611 Parallel-to-Serial Converter 612 Desk Rambler 613 Quadrature Demodulator

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 5J049 AA23 AA33 CA05 CA08 CB06 5K022 EE02 EE25

Claims (35)

[Claims] 1. A basic code generation unit for generating a basic code having a length of N chips, and the generated basic code is an integer multiple of the number of cyclic chips E (e is 0, E, 2E, 3E,. A plurality of cyclically shifted codes cyclically shifted by only one of the plurality of cyclically shifted codes, and, for each of the plurality of cyclically shifted codes outputted, forward-extending the number of chips with the cyclically shifted code forward.
F, length extended by the number of backward extension chips B backward (F + N + B)
It is a cyclic extension cyclic shift type spreading code of a chip, and the following conditions (1) The first F chips of the cyclic extension cyclic shift type spreading code are equal to the last F chips of the cyclic shifted code. (2) The last B chips of the cyclic extension cyclic shift spreading code are equal to the first B chips of the cyclic shifted code. (3) F ≧ B. (4) E> B. And a cyclic extension unit that generates a plurality of cyclic extension cyclic shift spreading codes that satisfy all of the following conditions, and e <NB. 2. The spread code generation apparatus according to claim 1, wherein said basic code is an M-sequence code. 3. The spread code generation device according to claim 1, wherein the basic code is a Gold code. 4. The spread code generation apparatus according to claim 1, wherein said basic code is an orthogonal code obtained from a Walsh function. 5. An autocorrelation R (j) between the basic code and a code shifted by j chips is R (j) = N, (j = 0); R (j ^2. The spread code generation device according to claim 1, wherein R = (N−4θ ² ), (j = N / 2); R (j) = 0, (other than the above). 6. The cyclic shift unit according to claim 1, wherein the cyclic shift chip number e is N / 2-B-1≤e≤N / L with respect to a predetermined period shift allowable chip number X (0≤X≤F). The spread code generation apparatus according to claim 5, wherein a plurality of codes that do not satisfy 2 + X are output. 7. The cyclic shift section, wherein the cyclic shift chip number e satisfies e <N / 2-B-1 with respect to a predetermined period shift allowable chip number X (0 ≦ X ≦ F). 6. A plurality of data are output.
A spread code generation device according to claim 1. 8. The cyclic shift unit, wherein the cyclic shift chip number e satisfies N / 2 + X <e with respect to a predetermined period shift allowable chip number X (0 ≦ X ≦ F). 6. The output of claim 5,
A spread code generation device according to claim 1. 9. The spread code generation apparatus according to claim 1, wherein a serial-parallel conversion unit for serial-to-parallel conversion of the transmission signal, and a plurality of cyclic extension cyclic shift type spread codes are generated. For each of the multiple signals resulting from the serial-to-parallel conversion,
A multiplying unit that multiplies any of the generated cyclic extension cyclic shift spreading codes without duplication, and a code division multiplexing transmission unit that performs code division multiplex transmission of a plurality of signals resulting from the multiplication. A transmission device comprising: 10. The multiplying unit assigns any one of the plurality of generated cyclic extension cyclic shift type spreading codes to a plurality of signals resulting from the serial-parallel conversion and a pilot signal without duplication. The transmission device according to claim 9, wherein the transmission device performs multiplication. 11. An autocorrelation R (j) between a basic code having a length of N chips and a code shifted by j chips is represented by R (j) = N, (j = 0); R (j) = − (N−4θ ² ), (j = N / 2); R (j) = 0, (other than the above), a basic code generator, A cyclic shift unit that outputs a plurality of cyclically shifted codes obtained by cyclically shifting the basic code by an integer multiple of the number of cyclic chips E (e is any one of 0, E, 2E, 3E,...); The same plurality of codes as the generated cyclically shifted code are respectively extended forward by the number of forward extension chips F, backward by the number of backward extension chips B, and cyclically extended length (F + N + B) chips. A signal that is transmitted by code division multiplexing using a cyclic extension cyclic shift spreading code of the above, and a cyclic extension cyclic sequence among correlation values between the generated basic code and the received signal. And a synchronization unit for identifying and synchronizing the head of the code from the peaks appearing every other length of the spreading code, and demodulating the signal resulting from the synchronization by using the plurality of cyclically shifted codes, respectively. A receiving device, comprising: a demodulation unit; and a parallel-to-serial conversion unit that performs parallel-to-serial conversion on the plurality of demodulated signals and outputs a transmission signal, wherein e <NB. 12. The cyclic shift unit according to claim 1, wherein the number e of chips of the cyclic shift is N / 2-B-1≤e≤N / L with respect to a predetermined number X of periodic permissible chips (0≤X≤F). The receiving apparatus according to claim 11, wherein a plurality of outputs that do not satisfy 2 + X are output. 13. The cyclic shift section, wherein the cyclic shift chip number e satisfies e <N / 2-B-1 with respect to a predetermined period shift allowable chip number X (0 ≦ X ≦ F). 2. A plurality of data are output.
The receiving device according to claim 1. 14. The cyclic shift section, wherein the cyclic shift chip number e satisfies N / 2 + X <e with respect to a predetermined period shift allowable chip number X (0 ≦ X ≦ F). 2. The output of claim 1,
The receiving device according to claim 1. 15. A basic code generating step of generating a basic code having a length of N chips, and the generated basic code is converted to an integer multiple of the number of cyclic chips E (e is 0, E, 2E, 3E,...). A plurality of cyclically shifted codes that are cyclically shifted by only a plurality of cyclically shifted codes; and
F, length extended by the number of backward extension chips B backward (F + N + B)
It is a cyclic extension cyclic shift type spreading code of a chip, and the following conditions (1) The first F chips of the cyclic extension cyclic shift type spreading code are equal to the last F chips of the cyclic shifted code. (2) The last B chips of the cyclic extension cyclic shift spreading code are equal to the first B chips of the cyclic shifted code. (3) F ≧ B. (4) E> B. And a cyclic extension step of generating a plurality of cyclic extension cyclic shift type spreading codes that satisfy all of the following conditions; and e <NB. 16. The spread code generating method according to claim 15, wherein said basic code is an M-sequence code. 17. The spread code generation method according to claim 15, wherein said basic code is a Gold code. 18. The spread code generating method according to claim 15, wherein said basic code is an orthogonal code obtained from a Walsh function. 19. The autocorrelation R (j) between the basic code and the code shifted by j chips is R (j) = N, (j = 0); R (j The spread code generation method according to claim 15, wherein R (j) = 0 and (other than the above) a code that satisfies) =-(N−4θ ² ), (j = N / 2). 20. In the cyclic shift step, the number of chips e of the cyclic shift is set to a predetermined number X of allowable cycle shift chips (0 ≦ X ≦ F).
20. The method according to claim 19, wherein a plurality of codes that do not satisfy N / 2−B−1 ≦ e ≦ N / 2 + X are output. 21. In the cyclic shift step, the cyclic shift chip number e is set to a predetermined cycle shift allowable chip number X (0 ≦ X ≦ F).
2. A method according to claim 1, wherein a plurality of outputs satisfying e <N / 2-B-1 are output.
10. The method for generating a spread code according to item 9. 22. In the cyclic shift step, the number e of cyclic shift chips is equal to a predetermined number of chips X (0 ≦ X ≦ F) that is a permissible period shift.
And outputting a plurality of outputs satisfying N / 2 + X <e.
10. The method for generating a spread code according to item 9. 23. A serial-to-parallel conversion step of serial-to-parallel conversion of a transmission signal, and a spread code for generating a plurality of cyclic extension cyclic shift type spread codes by the spread code generation method according to claim 15. Generating step, for each of the plurality of signals resulting from the serial-parallel conversion,
A multiplying step of multiplying any of the generated cyclic extension cyclic shift spreading codes without duplication, and a code division multiplexing transmission step of performing code division multiplexing transmission of the plurality of signals resulting from the multiplication, A transmission method comprising: 24. In the multiplying step, any one of the generated plurality of cyclic extension cyclic shift spreading codes is assigned to each of the plurality of signals resulting from the serial-parallel conversion and a pilot signal without duplication. The transmission method according to claim 23, wherein the product is multiplied. 25. An autocorrelation R (j) between a basic code having a length of N chips and a code shifted by j chips is represented by R (j) = N, (j = 0); R (j) = − (N−4θ ² ), (j = N / 2); R (j) = 0, a basic code generation step of generating a code other than the above, A cyclic shift step of outputting a plurality of cyclically shifted codes obtained by cyclically shifting the basic code by a number e of integer multiples of the number of cyclic chips E (e is any one of 0, E, 2E, 3E,...) The same plurality of codes as the generated cyclically shifted code are respectively extended forward by the number of forward extension chips F, backward by the number of backward extension chips B, and cyclically extended length (F + N + B) chips. Receiving a signal which is code-division multiplexed and transmitted using a cyclic extension cyclic shift type spreading code, and the cyclic extension of correlation values between the generated basic code and the received signal. A synchronization step of identifying and synchronizing the beginning of the code from a peak appearing every other length of the time-shifted spreading code, and demodulating the signal resulting from the synchronization using the plurality of cyclically shifted codes, respectively. And a parallel-to-serial conversion step of performing parallel-to-serial conversion on the plurality of demodulated signals and outputting a transmission signal, wherein e <NB. 26. In the cyclic shift step, the cyclic shift chip number e is set to a predetermined period shift allowable chip number X (0 ≦ X ≦ F).
26. The receiving method according to claim 25, wherein a plurality of signals that do not satisfy N / 2-B-1 ≦ e ≦ N / 2 + X are output. 27. In the cyclic shift step, the cyclic shift chip number e is set to a predetermined period shift allowable chip number X (0 ≦ X ≦ F).
3. A method according to claim 2, wherein a plurality of outputs satisfying e <N / 2-B-1 are output.
6. The receiving method according to 5. 28. In the cyclic shift step, the number of chips e of the cyclic shift is set to a predetermined number X of allowable cycle shift chips (0 ≦ X ≦ F).
3. A method according to claim 2, wherein a plurality of outputs satisfying N / 2 + X <e are output.
6. The receiving method according to 5. 29. A program for causing a computer to function as the spread code generating apparatus according to claim 1. Description: 30. A program for causing a computer to function as the transmission device according to claim 9 or 10. A program for causing a computer to function as the receiving device according to any one of claims 11 to 14. 32. A program for causing a computer to execute the spread code generation method according to claim 15. Description: 33. A computer according to claim 23 or 24,
A program that causes the transmission method according to claim 1 to be executed. 34. A program for causing a computer to execute the receiving method according to claim 25. 35. A computer-readable information recording medium (compact disk, floppy (registered trademark) disk, hard disk, magneto-optical disk), characterized by recording the program according to any one of claims 29 to 34. , Digital video disk, magnetic tape, or semiconductor memory.)