JP2002246605A - Method of manufacturing thin film transistor for liquid crystal display device - Google Patents
Method of manufacturing thin film transistor for liquid crystal display deviceInfo
- Publication number
- JP2002246605A JP2002246605A JP2001043282A JP2001043282A JP2002246605A JP 2002246605 A JP2002246605 A JP 2002246605A JP 2001043282 A JP2001043282 A JP 2001043282A JP 2001043282 A JP2001043282 A JP 2001043282A JP 2002246605 A JP2002246605 A JP 2002246605A
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- Japan
- Prior art keywords
- film
- type
- liquid crystal
- crystal display
- thin film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- Liquid Crystal (AREA)
- Thin Film Transistor (AREA)
Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明は液晶表示装置に関
し、さらに詳しくは、液晶表示装置においてスイッチン
グ素子として使用される液晶表示用薄膜トランジスタの
製造方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display, and more particularly, to a method for manufacturing a thin film transistor for a liquid crystal display used as a switching element in a liquid crystal display.
【0002】[0002]
【従来の技術】液晶を利用した表示装置は、低電力、軽
量等、従来の表示装置には見られない特徴を有し、中で
も、画素毎にスイッチング素子として薄膜トランジスタ
(以下、TFTと称する)を配置した液晶表示装置は、
クロストークが少なく解像度の高い映像が得られること
から、ノートパソコンやカーナビゲーションのディスプ
レイ等に使用され、さらに近年では、大型ディスプレイ
モニタとして急速に利用されるようになっている。2. Description of the Related Art A display device using a liquid crystal has features such as low power and light weight which cannot be seen in a conventional display device. Among them, a thin film transistor (hereinafter, referred to as a TFT) is used as a switching element for each pixel. The placed liquid crystal display device
Since crosstalk is small and a high-resolution image can be obtained, it is used for a notebook computer, a car navigation display, and the like. In recent years, it has been rapidly used as a large display monitor.
【0003】図2に示されるように、従来のTFTは一
般に、ガラス基板1上にゲート電極2が形成され、この
ゲート電極2を被覆した状態でガラス基板1上にゲート
絶縁膜3が形成されている。また、ゲート電極2の上方
のゲート絶縁膜3の上面には、i型a-Si膜4が形成
されており、i型a-Si膜4の上面中央部にはチャン
ネル保護膜5が形成されている。さらに、チャンネル保
護膜5の端部とi型a-Si膜4の一部とを覆い、か
つ、チャンネル保護膜5で分断された状態でn+型a-S
i膜6a,6bが、金属からなるソース電極7a及びド
レイン電極7bに挟まれる様で形成され、ドレイン電極
7b上には絵素電極8が形成されている。As shown in FIG. 2, in a conventional TFT, a gate electrode 2 is generally formed on a glass substrate 1, and a gate insulating film 3 is formed on the glass substrate 1 while covering the gate electrode 2. ing. An i-type a-Si film 4 is formed on the upper surface of the gate insulating film 3 above the gate electrode 2, and a channel protective film 5 is formed at the center of the upper surface of the i-type a-Si film 4. ing. Further, the n + type a-S is formed while covering the end of the channel protection film 5 and a part of the i-type a-Si film 4 and being divided by the channel protection film 5.
The i films 6a and 6b are formed so as to be sandwiched between a source electrode 7a and a drain electrode 7b made of metal, and a pixel electrode 8 is formed on the drain electrode 7b.
【0004】また、上記構成のTFTにおいて、半導体
層としてのi型a-Si膜4に代えて微結晶Si膜を成
膜する手法も知られている。In the TFT having the above-described structure, a method of forming a microcrystalline Si film instead of the i-type a-Si film 4 as a semiconductor layer is also known.
【0005】[0005]
【発明が解決しようとする課題】しかしながら、微結晶
Si膜は電子の移動度が大きく、TFT特性を向上する
上で有効であるものの、成膜に多大な時間を要するた
め、数百Åの成膜を試みると、スループットを極端に小
さくしてしまうという問題がある。However, although the microcrystalline Si film has a high electron mobility and is effective in improving the TFT characteristics, it takes a lot of time to form the film. When a film is tried, there is a problem that the throughput is extremely reduced.
【0006】本発明は、従来技術の有するこのような問
題点に鑑みてなされたものであり、大型で高精細な液晶
表示装置を製造する上で十分な電子移動度を保ちつつ、
スループットを大きくすることのできる液晶表示用薄膜
トランジスタの製造方法を提供することを目的としてい
る。[0006] The present invention has been made in view of the above-mentioned problems of the prior art, and while maintaining a sufficient electron mobility for manufacturing a large-sized, high-definition liquid crystal display,
It is an object of the present invention to provide a method of manufacturing a thin film transistor for a liquid crystal display capable of increasing throughput.
【0007】[0007]
【課題を解決するための手段】上記目的を達成するため
に、本発明のうちで請求項1に記載の発明は、ガラス基
板上に、第一電極、絶縁膜、i型a-Si膜、n+型a-
Si膜、及び、第二電極を積層した液晶表示用薄膜トラ
ンジスタの製造方法であって、上記絶縁膜、i型a-S
i膜、及び、n+型a-Si膜をプラズマ化学気相堆積法
により連続的に成膜するとともに、上記i型a-Si膜
を第1及び第2のi型a-Si膜で構成し、該第1及び
第2のi型a-Si膜を異なる成膜速度で形成したこと
を特徴とする。Means for Solving the Problems In order to achieve the above object, of the present invention, the invention according to claim 1 includes a first electrode, an insulating film, an i-type a-Si film, n + type a-
A method for manufacturing a thin film transistor for liquid crystal display, comprising a Si film and a second electrode laminated, wherein the insulating film, i-type a-S
An i-film and an n + -type a-Si film are continuously formed by a plasma enhanced chemical vapor deposition method, and the i-type a-Si film is composed of first and second i-type a-Si films. The first and second i-type a-Si films are formed at different deposition rates.
【0008】また、請求項2に記載の発明は、上記第1
のi型a-Si膜を600×10− 10m/min以下
の成膜速度で上記絶縁膜上に形成する一方、上記第2の
i型a-Si膜を1300×10−10m/min以上
の成膜速度で上記第1のi型a-Si膜上に形成したこ
とを特徴とする。[0008] The invention described in claim 2 is the first invention.
The i-type a-Si film 600 × 10 - 10 m / min under the following deposition rate while forming on said insulating film, said second i-type a-Si film of 1300 × 10 -10 m / min It is characterized in that the film is formed on the first i-type a-Si film at the above film forming speed.
【0009】さらに、請求項3に記載の発明は、上記第
1及び第2のi型a-Si膜の総膜厚を2000×10
−10m以上に設定したことを特徴とする。Further, in the invention according to claim 3, the total thickness of the first and second i-type a-Si films is 2000 × 10
It is characterized by being set to -10 m or more.
【0010】また、請求項4に記載の発明は、上記絶縁
膜と上記第1のi型a-Si膜との間に微結晶Si膜を
形成したことを特徴とする。The invention according to claim 4 is characterized in that a microcrystalline Si film is formed between the insulating film and the first i-type a-Si film.
【0011】[0011]
【発明の実施の形態】以下、本発明の実施の形態につい
て、図面を参照しながら説明する。図1は、本発明にか
かる液晶表示用TFT構造を示しており、ガラス基板1
上にゲート電極2が選択的に形成され、このゲート電極
2を被覆した状態でガラス基板1上にゲート絶縁膜3が
形成されている。Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 shows a TFT structure for a liquid crystal display according to the present invention.
A gate electrode 2 is selectively formed thereon, and a gate insulating film 3 is formed on a glass substrate 1 so as to cover the gate electrode 2.
【0012】ゲート電極2の上方のゲート絶縁膜3の上
面には、微結晶Si膜11と第1のi型a-Si膜12
と第2のi型a-Si膜13とがこの順番で順次形成さ
れている。また、第2のi型a-Si膜13の上面に
は、第2のi型a-Si膜13で分断された状態でn+型
a-Si膜6a,6bが形成されており、n+型a-Si
膜6a,6bはそれぞれ金属からなるソース電極7a及
びドレイン電極7bにより被覆されている。なお、ドレ
イン電極7bの上面には絵素電極8が形成されている。On the upper surface of the gate insulating film 3 above the gate electrode 2, a microcrystalline Si film 11 and a first i-type a-Si film 12
And the second i-type a-Si film 13 are sequentially formed in this order. On the upper surface of the second i-type a-Si film 13, n + -type a-Si films 6 a and 6 b are formed while being separated by the second i-type a-Si film 13. + Type a-Si
The films 6a and 6b are covered with a source electrode 7a and a drain electrode 7b made of metal, respectively. The picture element electrode 8 is formed on the upper surface of the drain electrode 7b.
【0013】上記構成の本発明にかかるTFTにおい
て、ゲート絶縁膜3、微結晶Si膜11、第1及び第2
のi型a-Si膜12,13、及び、n+型a-Si膜6
a,6bは、プラズマ化学気相堆積法を用いて連続的に
成膜される。In the TFT according to the present invention having the above structure, the gate insulating film 3, the microcrystalline Si film 11, the first and second
I-type a-Si films 12 and 13 and n + -type a-Si film 6
a and 6b are continuously formed using a plasma enhanced chemical vapor deposition method.
【0014】また、上記構成のTFTにおいては、図2
に示される従来構造のTFTと異なり、チャンネル保護
膜5を形成することなく、i型a-Si膜12,13に
よりチャンネル部を形成している。Further, in the TFT having the above structure, FIG.
Unlike the TFT having the conventional structure shown in FIG. 1, the channel portion is formed by the i-type a-Si films 12 and 13 without forming the channel protective film 5.
【0015】しかしながら、i型a-Si膜を使用して
チャンネル部の形成を可能とするためには、チャンネル
エッチングを行う際にエッチング量を制御しなければな
らず、i型a-Si膜の膜厚によりエッチングマージン
を確保する必要がある。さらに、i型a-Si膜が受け
るエッチングダメージをTFT特性に影響させないため
にも、i型a-Si膜は2000×10−10m(20
00Å)以上の膜厚を要する。However, in order to enable the formation of a channel portion using an i-type a-Si film, the amount of etching must be controlled when performing channel etching. It is necessary to secure an etching margin depending on the film thickness. Further, in order to prevent the etching characteristics of the i-type a-Si film from affecting the TFT characteristics, the i-type a-Si film has a size of 2000 × 10 −10 m (20 μm).
00 °) or more.
【0016】これを可能とする生産条件を種々検討した
結果、スループットを大きくするためには、成膜速度を
上げる必要があり、成膜速度1300×10−10m/
min(1300Å/min)以上でハイレートi型a
-Si膜13を成膜することにより達成することができ
た。As a result of various examinations of the production conditions that make this possible, it is necessary to increase the film forming speed in order to increase the throughput, and the film forming speed is 1300 × 10 −10 m / m
min (1300Å / min) or more and high rate i-type a
This was achieved by forming the -Si film 13.
【0017】さらに、スループットを大きくするととも
に、TFT飽和領域での所定の電子移動度(最低でも
0.3cm2/V・s)を確保するためには、成膜速度
600×10−10m/min(600Å/min)以
下の緻密なローレートi型a-Si膜12を、ハイレー
トi型a-Si膜13の下層に成膜しておくことで同時
に達成することができた。Furthermore, in order to increase the throughput and to secure a predetermined electron mobility (at least 0.3 cm 2 / V · s) in the TFT saturation region, the film forming speed is set to 600 × 10 −10 m / m. This was achieved at the same time by forming a dense low-rate i-type a-Si film 12 having a thickness of not more than min (600 ° / min) below the high-rate i-type a-Si film 13.
【0018】なお、上述した理由により、ローレートi
型a-Si膜12及びハイレートi型a-Si膜13の総
膜厚は、2000×10−10m(2000Å)以上に
設定されている。Note that, for the reasons described above, the low rate i
The total thickness of the type a-Si film 12 and the high-rate i-type a-Si film 13 is set to 2000 × 10 −10 m (2000 ° ) or more.
【0019】また、微結晶Si膜11は、下層のゲート
絶縁膜3との界面の密着性あるいは整合性を保つだけの
目的に成膜したもので、極めて薄く形成されている。The microcrystalline Si film 11 is formed only for the purpose of maintaining the adhesiveness or consistency at the interface with the underlying gate insulating film 3 and is formed extremely thin.
【0020】[0020]
【発明の効果】本発明は、以上説明したように構成され
ているので、以下に記載されるような効果を奏する。本
発明のうちで請求項1に記載の発明によれば、絶縁膜、
i型a-Si膜、及び、n+型a-Si膜をプラズマ化学
気相堆積法により連続的に成膜するとともに、i型a-
Si膜を成膜速度が異なる第1及び第2のi型a-Si
膜で構成したので、大型で高精細な液晶表示装置を製造
する上で十分な電子移動度を保ちつつ、スループットを
大きくすることができる。Since the present invention is configured as described above, it has the following effects. According to the first aspect of the present invention, an insulating film,
An i-type a-Si film and an n + -type a-Si film are continuously formed by a plasma enhanced chemical vapor deposition method, and an i-type a-Si film is formed.
First and second i-type a-Si having different Si film formation rates
Since it is composed of a film, it is possible to increase the throughput while maintaining a sufficient electron mobility for manufacturing a large and high-definition liquid crystal display device.
【0021】また、請求項2に記載の発明によれば、第
1のi型a-Si膜を600×10 −10m/min以
下の成膜速度で緻密な成膜を行うようにしたので、薄膜
トランジスタ飽和領域において0.3cm2/V・s以
上の電子移動度を確保することができる。一方、第2の
i型a-Si膜を1300×10−10m/min以上
の成膜速度で形成するようにしたので、所定のスループ
ットを確保することができるとともに、チャンネルエッ
チングの際のエッチングマージンを確保する上で十分な
膜厚を迅速に形成することができる。According to the second aspect of the present invention,
1 i-type a-Si film is 600 × 10 -10m / min or less
Since a dense film is formed at the lower film formation rate,
0.3cm in transistor saturation region2/ V · s or less
The above electron mobility can be secured. On the other hand, the second
1300 × 10 i-type a-Si film-10m / min or more
Because the film was formed at a film formation rate of
Channel, and channel edge
Sufficient to secure the etching margin during
The film thickness can be formed quickly.
【0022】さらに、請求項3に記載の発明によれば、
第1及び第2のi型a-Si膜の総膜厚を2000×1
0−10m以上に設定したので、i型a-Si膜が受け
るエッチングダメージによりTFT特性が悪影響を受け
ることがない。Further, according to the third aspect of the present invention,
The total thickness of the first and second i-type a-Si films is 2000 × 1
0 -10 Because set above m, TFT characteristics are not adversely affected by the etching damage i-type a-Si film is subjected.
【0023】また、請求項4に記載の発明によれば、絶
縁膜と第1のi型a-Si膜との間に微結晶Si膜を形
成したので、絶縁膜との界面の所定の密着性あるいは整
合性を確保することができる。According to the fourth aspect of the present invention, since the microcrystalline Si film is formed between the insulating film and the first i-type a-Si film, the predetermined adhesion at the interface with the insulating film is achieved. Character or consistency can be ensured.
【図1】 本発明にかかる液晶表示用TFT構造を示す
断面図である。FIG. 1 is a cross-sectional view illustrating a TFT structure for a liquid crystal display according to the present invention.
【図2】 従来の液晶表示用TFT構造を示す断面図で
ある。FIG. 2 is a cross-sectional view illustrating a conventional liquid crystal display TFT structure.
1 ガラス基板 2 ゲート電極 3 ゲート絶縁膜 4 i型a-Si膜 5 チャンネル保護膜 6a,6b n+型a-Si膜 7a ソース電極 7b ドレイン電極 8 絵素電極 11 微結晶Si膜 12 第1のi型a-Si膜 13 第2のi型a-Si膜 DESCRIPTION OF SYMBOLS 1 Glass substrate 2 Gate electrode 3 Gate insulating film 4 i-type a-Si film 5 Channel protective film 6a, 6b n + type a-Si film 7a Source electrode 7b Drain electrode 8 Pixel electrode 11 Microcrystalline Si film 12 First i-type a-Si film 13 Second i-type a-Si film
───────────────────────────────────────────────────── フロントページの続き Fターム(参考) 2H092 JA26 JA28 JA33 KA04 KA05 KA07 MA08 NA25 NA27 5F045 AB03 AB04 AF07 BB08 BB16 CA15 DA52 GB09 GB19 5F110 BB01 CC07 GG02 GG14 GG15 GG19 GG24 GG35 GG45 HK02 HK09 HK16 HK21 HK22 HK35 QQ09 ──────────────────────────────────────────────────続 き Continued on front page F-term (reference) 2H092 JA26 JA28 JA33 KA04 KA05 KA07 MA08 NA25 NA27 5F045 AB03 AB04 AF07 BB08 BB16 CA15 DA52 GB09 GB19 5F110 BB01 CC07 GG02 GG14 GG15 GG19 GG24 GG35 GG45 HK16 HK21 HK16
Claims (4)
型a-Si膜、n+型a-Si膜、及び、第二電極を積層
した液晶表示用薄膜トランジスタの製造方法であって、 上記絶縁膜、i型a-Si膜、及び、n+型a-Si膜を
プラズマ化学気相堆積法により連続的に成膜するととも
に、上記i型a-Si膜を第1及び第2のi型a-Si膜
で構成し、該第1及び第2のi型a-Si膜を異なる成
膜速度で形成したことを特徴とする液晶表示用薄膜トラ
ンジスタの製造方法。A first electrode, an insulating film, and an i.
A method for manufacturing a thin film transistor for liquid crystal display, comprising laminating a type a-Si film, an n + type a-Si film, and a second electrode, wherein the insulating film, the i-type a-Si film, and the n + type a -Si film is continuously formed by plasma enhanced chemical vapor deposition, and the i-type a-Si film is composed of first and second i-type a-Si films. A method for manufacturing a thin film transistor for a liquid crystal display, wherein i-type a-Si films are formed at different film forming rates.
0−10m/min以下の成膜速度で上記絶縁膜上に形
成する一方、上記第2のi型a-Si膜を1300×1
0−10m/min以上の成膜速度で上記第1のi型a
-Si膜上に形成したことを特徴とする請求項1に記載
の液晶表示用薄膜トランジスタの製造方法。2. The method according to claim 1, wherein the first i-type a-Si film is 600 × 1
0 -10 m / min while formed on the insulating film in the following deposition rate, the second i-type a-Si film of 1300 × 1
0 -10 m / above min or more deposition rate first i-type a
2. The method according to claim 1, wherein the thin film transistor is formed on a -Si film.
膜厚を2000×10−10m以上に設定したことを特
徴とする請求項2に記載の液晶表示用薄膜トランジスタ
の製造方法。3. The method according to claim 2, wherein the total thickness of the first and second i-type a-Si films is set to 2000 × 10 −10 m or more. Method.
との間に微結晶Si膜を形成したことを特徴とする請求
項2あるいは3に記載の液晶表示用薄膜トランジスタの
製造方法。4. The method according to claim 2, wherein a microcrystalline Si film is formed between the insulating film and the first i-type a-Si film. .
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