JP2002222764A - Substrate with multilayer film, reflection mask blank for exposure, reflection mask for exposure, method of manufacturing it and method of manufacturing semiconductor - Google Patents

Substrate with multilayer film, reflection mask blank for exposure, reflection mask for exposure, method of manufacturing it and method of manufacturing semiconductor

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Publication number
JP2002222764A
JP2002222764A JP2001351650A JP2001351650A JP2002222764A JP 2002222764 A JP2002222764 A JP 2002222764A JP 2001351650 A JP2001351650 A JP 2001351650A JP 2001351650 A JP2001351650 A JP 2001351650A JP 2002222764 A JP2002222764 A JP 2002222764A
Authority
JP
Japan
Prior art keywords
film
multilayer film
substrate
stress
exposure
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2001351650A
Other languages
Japanese (ja)
Other versions
JP3939132B2 (en
Inventor
Tsutomu Shiyouki
勉 笑喜
Morio Hosoya
守男 細谷
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hoya Corp
Original Assignee
Hoya Corp
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Filing date
Publication date
Application filed by Hoya Corp filed Critical Hoya Corp
Priority to JP2001351650A priority Critical patent/JP3939132B2/en
Publication of JP2002222764A publication Critical patent/JP2002222764A/en
Application granted granted Critical
Publication of JP3939132B2 publication Critical patent/JP3939132B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Optical Elements Other Than Lenses (AREA)
  • Optical Filters (AREA)
  • Preparing Plates And Mask In Photomechanical Process (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a reflection mask for exposure which can make a transfer of a pattern in a lithography with high precision and is applicable also to EUV light with the very high flatness-surface of a multilayer film. SOLUTION: A stress correcting film 15 is formed for correcting a warpage, which is formed by a warpage in a substrate 11 and a stress in a multilayer film 12 and is formed in the surface of the film 12. The very high flatness- surface of the film 12 is obtained by correcting the warpage. A mask blank having this very high flatness-surface of the film 12 is manufactured and moreover, this mask blank is dry-etched, whereby a reflection type mask for exposure applicable also to EUV light is manufactured.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、半導体製造等に使
用される光の制御に用いる、多層膜付き基板、露光用反
射型マスクブランク、露光用反射型マスクおよびその製
造方法、並びに半導体の製造方法に関する。尚、本発明
に記載するEUV(Extreme Ultra Vi
olet)光とは、軟X線領域または真空紫外領域の波
長帯の光を指し、具体的には波長が0.2〜100nm
程度の光のことである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a substrate with a multilayer film, a reflective mask blank for exposure, a reflective mask for exposure, a method for manufacturing the same, and a method for manufacturing semiconductors, which is used for controlling light used in semiconductor manufacturing and the like. About the method. The EUV (Extreme Ultra Vi) described in the present invention is used.
Olet) light refers to light in a wavelength band of a soft X-ray region or a vacuum ultraviolet region, and specifically has a wavelength of 0.2 to 100 nm.
It is about light.

【0002】[0002]

【従来の技術】従来、半導体産業において、Si基板等
に微細なパターンからなる集積回路を形成する上で必要
な微細パターンの転写技術として、可視光や紫外光を用
いたフォトリソグラフィ法が用いられてきた。しかし、
半導体デバイスの微細化が加速している一方で、従来の
光露光の短波長化は露光限界に近づいてきた。パターン
の解像限界は、光露光の場合、露光波長の1/2と言わ
れ、F2レーザー(157nm)を用いても70nm程
度が限界と予想される。そこで70nm以降の露光技術
として、F2レーザーよりさらに短波長のEUV光(1
3nm)を用いた露光技術であるEUVリソグラフィ
(以下、「EUVL」と記す。)が有望視されている。
2. Description of the Related Art Conventionally, in the semiconductor industry, a photolithography method using visible light or ultraviolet light has been used as a technique for transferring a fine pattern necessary for forming an integrated circuit having a fine pattern on a Si substrate or the like. Have been. But,
While miniaturization of semiconductor devices is accelerating, shortening the wavelength of conventional light exposure is approaching the exposure limit. In the case of light exposure, the resolution limit of the pattern is said to be の of the exposure wavelength, and even if an F 2 laser (157 nm) is used, the limit is expected to be about 70 nm. So as 70nm after exposure technique, F 2 laser from a shorter wavelength of EUV light (1
Promising is EUV lithography (hereinafter, referred to as “EUVL”), which is an exposure technique using 3 nm).

【0003】EUVLの像形成原理は、フォトリソグラ
フィと同じであるが、EUV光に対する、あらゆる物質
の吸収は大きく、また屈折率が1に近いため、光露光の
ような屈折光学系は使用できず、すべて反射光学系を用
いる。また、その際用いられるマスクとしては、メンブ
レンを用いた透過型マスクが提案されてきているが、E
UV光に対するメンブレンの吸収が大きいため露光時間
が長くなり、スループットが確保できないという問題が
ある。その為、現状では露光用反射型マスクが一般的に
使用されている。
The principle of EUVL image formation is the same as that of photolithography. However, since EUV light absorbs a large amount of all substances and has a refractive index close to 1, refractive optical systems such as light exposure cannot be used. , All use a reflective optical system. As a mask used at that time, a transmission type mask using a membrane has been proposed.
There is a problem that the exposure time becomes long because the membrane absorbs a large amount of UV light, and the throughput cannot be secured. Therefore, at present, a reflective mask for exposure is generally used.

【0004】例えば、特公平7−27198号、特開平
8−213303号には基板上に多層膜構造を有する反
射層が設けられ、反射層上に軟X線または真空紫外線を
吸収する吸収体がパターン状に設けられている露光用反
射型マスクが開示されている。図3は、このような従来
の露光用反射型マスクブランクおよび露光用反射型マス
クの一例を示す模式図である。図3(A)に示す露光用
反射型マスクブランクは基板21上に多層膜構造を有す
る反射膜22が成膜され、反射膜22上にエッチングス
トッパー層23が成膜され、エッチングストッパー23
上に吸収層24が成膜された構造になっている。この露
光用反射型マスクブランクの吸収層24にパターンを形
成し、多層膜上の不要なエッチングストッパー23を除
去して図3(B)に示す露光用反射型マスクが製造され
る。露光用反射型マスクに入射した軟X線等は、反射膜
22では反射され、吸収体24のパターンが形成された
部分では、反射されずに吸収される。この結果、反射部
分と吸収部分の高いコントラストでパターンを形成する
ことができる。
For example, JP-B-7-27198 and JP-A-8-213303 provide a reflective layer having a multilayer structure on a substrate, and an absorber for absorbing soft X-rays or vacuum ultraviolet rays is provided on the reflective layer. A reflective mask for exposure provided in a pattern is disclosed. FIG. 3 is a schematic diagram showing an example of such a conventional reflective mask for exposure and a reflective mask for exposure. In the reflective mask blank for exposure shown in FIG. 3A, a reflective film 22 having a multilayer structure is formed on a substrate 21, an etching stopper layer 23 is formed on the reflective film 22, and an etching stopper 23 is formed.
It has a structure in which an absorption layer 24 is formed thereon. A pattern is formed on the absorption layer 24 of the exposure reflective mask blank, and the unnecessary etching stopper 23 on the multilayer film is removed to manufacture the exposure reflective mask shown in FIG. Soft X-rays and the like incident on the exposure reflective mask are reflected by the reflection film 22 and absorbed at the portion where the pattern of the absorber 24 is formed without being reflected. As a result, a pattern can be formed with a high contrast between the reflection part and the absorption part.

【0005】[0005]

【発明が解決しようとする課題】しかし、上述したよう
な基板21上に多層膜22を成膜した露光用反射型マス
クにおいては、高反射率を得るために多層膜22の各層
の膜密度を高くする必要がある。すると、必然的に多層
膜22は高い圧縮応力を有することになる。この高い圧
縮応力のため、基板21は図4に示すように凸面に大き
く反って(変形)しまう。この結果、EUV光の反射面
である多層膜22の表面にも反りが生じてしまう。例え
ば、6インチ角、6.35mm厚の石英ガラス基板上の
0.3μm厚の多層膜22に対し、200MPa程度の
圧縮応力がかかった場合、140×140mmのエリア
において500nm程度の反り(変形)が起きてしま
う。
However, in the reflective mask for exposure in which the multilayer film 22 is formed on the substrate 21 as described above, the film density of each layer of the multilayer film 22 must be reduced in order to obtain a high reflectance. Need to be higher. Then, the multilayer film 22 necessarily has a high compressive stress. Due to the high compressive stress, the substrate 21 is largely warped (deformed) to a convex surface as shown in FIG. As a result, the surface of the multilayer film 22, which is the reflection surface of the EUV light, is also warped. For example, when compressive stress of about 200 MPa is applied to a 0.3 μm-thick multilayer film 22 on a 6-inch square, 6.35 mm-thick quartz glass substrate, warpage (deformation) of about 500 nm in an area of 140 × 140 mm. Will happen.

【0006】このように、従来の技術においては、多層
膜22表面の反りが原因となって、ウエハへのパターン
転写時に転写精度の低下(位置ずれ)が起こり、高精度
の転写ができないという問題があった。この問題に対
し、多層膜22の応力低減を図ることが考えられる。し
かしこれは膜の密度を低下させEUV光の反射率低下を
招くため、実用上の観点から好ましくない。さらに加え
て、多層膜22表面の反りには、上述した多層膜22の
有する圧縮応力による基板21の変形のみならず、基板
21が元来有している反りも影響を与えている。従っ
て、単に多層膜22の応力低減を図るのみでは、多層膜
22の表面の反りを効果的に補正することは困難なので
ある。
As described above, in the prior art, the transfer accuracy is degraded (positional displacement) at the time of transferring a pattern to a wafer due to the warpage of the surface of the multilayer film 22, and high-precision transfer cannot be performed. was there. To solve this problem, it is conceivable to reduce the stress of the multilayer film 22. However, this lowers the density of the film and causes a decrease in the reflectivity of EUV light, which is not preferable from a practical viewpoint. Furthermore, the warpage of the surface of the multilayer film 22 is affected not only by the deformation of the substrate 21 due to the compressive stress of the multilayer film 22 described above, but also by the warpage inherent to the substrate 21. Therefore, it is difficult to effectively correct the warpage of the surface of the multilayer film 22 simply by reducing the stress of the multilayer film 22.

【0007】本発明は、上述した背景の下になされたも
のであり、前記多層膜22の有する応力および基板自身
21の反り(変形)によって形成される多層膜表22面
の反り(変形)を補正し、高い平坦度をもった多層膜2
2表面を有する可視光よりEUV光にわたる波長領域に
おいて適用可能な多層膜付き基板、露光用反射型マスク
ブランクおよび露光用反射型マスク等の提供を目的とす
る。
The present invention has been made under the above-mentioned background, and is intended to reduce the warpage (deformation) of the multilayer film surface 22 formed by the stress of the multilayer film 22 and the warpage (deformation) of the substrate 21 itself. Multilayer film 2 with corrected and high flatness
It is an object of the present invention to provide a substrate with a multilayer film, a reflective mask blank for exposure, a reflective mask for exposure, and the like, which have two surfaces and are applicable in a wavelength range from visible light to EUV light.

【0008】[0008]

【課題を解決するための手段】第1の発明は、基板上に
EUV光を反射する多層膜を有し、前記多層膜上に前記
EUV光を吸収する光吸収層を有するEUV露光用反射
型マスクブランクであって、前記多層膜表面の平坦度が
100nm以下であることを特徴とするEUV露光用反
射型マスクブランクである。
According to a first aspect of the present invention, a reflective type for EUV exposure has a multilayer film on a substrate which reflects EUV light, and a light absorbing layer on the multilayer film for absorbing the EUV light. A mask blank, wherein the flatness of the surface of the multilayer film is not more than 100 nm.

【0009】ここで、本発明に記載する平坦度とはTI
R(Total Indicated Readin
g)で表される表面の反り(変形量)を表す値で、次の
ように定義される。すなわち、図5において基板表面3
1を基に最小自乗法で定められる平面を焦平面32と
し、次にこの焦平面32を基準として焦平面32より上
にある基板表面31の最も高い位置Aと、焦平面32よ
り下にある基板表面31のもっとも低い位置Bとの間に
ある高低差の絶対値を平坦度と定義した。故に平坦度は
常に正の数となる。なお、本発明においては140×1
40mmのエリア内の測定値をもって平坦度とする。例
えば、6インチ基板の中心における140×140mm
のエリア内の測定値である。
Here, the flatness described in the present invention is TI
R (Total Indicated Readin)
The value representing the surface warpage (deformation amount) represented by g), and is defined as follows. That is, in FIG.
A plane determined by the least squares method based on 1 is a focal plane 32, and then the highest position A of the substrate surface 31 above the focal plane 32 with respect to the focal plane 32 and below the focal plane 32 The absolute value of the difference in height between the lowest position B on the substrate surface 31 was defined as flatness. Therefore, the flatness is always a positive number. In the present invention, 140 × 1
The measured value within the area of 40 mm is defined as flatness. For example, 140 × 140 mm at the center of a 6-inch substrate
Are the measured values in the area of.

【0010】第2の発明は、基板上にEUV光を反射す
る多層膜を有し、前記多層膜上に前記EUV光を吸収す
る光吸収層を有するEUV露光用反射型マスクブランク
であって、前記基板の反りと、前記多層膜の有する応力
とにより形成される前記多層膜表面の反りとを補正する
ための応力補正膜を有することを特徴とするEUV露光
用反射型マスクブランクである。
According to a second aspect of the present invention, there is provided a reflective mask blank for EUV exposure, comprising a multilayer film on a substrate for reflecting EUV light, and a light absorbing layer on the multilayer film for absorbing the EUV light, A reflective mask blank for EUV exposure, comprising a stress correction film for correcting a warpage of the substrate and a warpage of the surface of the multilayer film formed by a stress of the multilayer film.

【0011】第3の発明は、前記基板と前記多層膜の間
に、引っ張り応力を有する前記応力補正膜を設けたこと
を特徴とする第2の発明に記載のEUV露光用反射型マ
スクブランクである。
According to a third invention, there is provided a reflective mask blank for EUV exposure according to the second invention, wherein the stress correction film having a tensile stress is provided between the substrate and the multilayer film. is there.

【0012】第4の発明は、前記基板の背面に、圧縮応
力を有する前記応力補正膜を設けたことを特徴とする第
2の発明に記載のEUV露光用反射型マスクブランクで
ある。
A fourth invention is the reflective mask blank for EUV exposure according to the second invention, wherein the stress compensation film having a compressive stress is provided on the back surface of the substrate.

【0013】第5の発明は、前記応力補正膜が、Taを
含む材料であることを特徴とする第2ないし第4のいず
れかの発明に記載のEUV露光用反射型マスクブランク
である。
A fifth invention is the reflective mask blank for EUV exposure according to any one of the second to fourth inventions, wherein the stress compensation film is a material containing Ta.

【0014】第6の発明は、前記応力補正膜が、Taを
主成分とし少なくともBを含む材料であることを特徴と
する第5の発明に記載のEUV露光用反射型マスクブラ
ンクである。
A sixth aspect of the present invention is the reflective mask blank for EUV exposure according to the fifth aspect, wherein the stress correction film is made of a material containing Ta as a main component and containing at least B.

【0015】第7の発明は、第1ないし第6のいずれか
の発明に記載のEUV露光用反射型マスクブランクを用
いて製作したことを特徴とするEUV露光用反射型マス
クである。
According to a seventh aspect of the present invention, there is provided a reflective mask for EUV exposure manufactured using the reflective mask blank for EUV exposure according to any one of the first to sixth aspects.

【0016】第8の発明は、第1ないし第6のいずれか
の発明に記載のEUV露光用反射型マスクブランクを用
いて製作したことを特徴とするEUV露光用反射型マス
クの製造方法である。
An eighth invention is a method of manufacturing a reflective mask for EUV exposure, which is manufactured using the reflective mask blank for EUV exposure according to any one of the first to sixth inventions. .

【0017】第9の発明は、第7の発明に記載したEU
V露光用反射型マスクを用いて基板上にパターンを転写
することを特徴とする半導体の製造方法である。
A ninth invention is directed to the EU described in the seventh invention.
A method for manufacturing a semiconductor, comprising transferring a pattern onto a substrate using a reflection mask for V exposure.

【0018】第10の発明は、基板上にEUV光を反射
する多層膜を有する多層膜付き基板であって、前記多層
膜表面の平坦度が100nm以下であることを特徴とす
る多層膜付き基板である。
A tenth aspect of the present invention is a substrate with a multilayer film having a multilayer film reflecting EUV light on the substrate, wherein the flatness of the surface of the multilayer film is 100 nm or less. It is.

【0019】第11の発明は、基板上にEUV光を反射
する多層膜を有する多層膜付き基板であって、前記基板
の反りと前記多層膜の有する応力とにより形成される前
記多層膜表面の反りを補正する、応力補正膜を有するこ
とを特徴とする多層膜付き基板である。なお、この多層
膜付き基板はEUV露光用反射型マスクブランク、EU
V露光用反射型マスクおよびEUV反射ミラー等の製造
等に用いることが出来るものである。
An eleventh invention is directed to a substrate with a multilayer film having a multilayer film reflecting EUV light on the substrate, wherein a surface of the multilayer film formed by warpage of the substrate and stress of the multilayer film is provided. A substrate with a multilayer film, comprising a stress correction film for correcting warpage. The substrate with the multilayer film is a reflective mask blank for EUV exposure, EU
It can be used for the production of a reflection mask for V exposure, an EUV reflection mirror, and the like.

【0020】第12の発明は、第10または第11の発
明に記載した多層膜付き基板を用いて製作したことを特
徴とするEUV反射ミラーである。
According to a twelfth aspect, there is provided an EUV reflecting mirror manufactured using the substrate with a multilayer film according to the tenth or eleventh aspect.

【0021】第13の発明は、基板上に光を反射する多
層膜を有し、前記多層膜上に前記光を吸収する光吸収層
を有する露光用反射型マスクブランクであって、前記多
層膜表面の平坦度が100nm以下であることを特徴と
する露光用反射型マスクブランクである。
According to a thirteenth aspect of the present invention, there is provided an exposure reflective mask blank having a multilayer film for reflecting light on a substrate and having a light absorbing layer for absorbing the light on the multilayer film. A reflective mask blank for exposure, wherein the flatness of the surface is 100 nm or less.

【0022】第14の発明は、基板と、前記基板上に形
成されて光を反射する多層膜と、前記多層膜上に形成さ
れて前記光を吸収する光吸収層と、応力補正膜とを有す
る露光用反射型マスクブランクであって、前記応力補正
膜は、前記応力補正膜が形成されない場合に多層膜表面
に生じる反りを補正するものであることを特徴とする露
光用反射型マスクブランクである。
According to a fourteenth aspect, a substrate, a multilayer film formed on the substrate and reflecting light, a light absorbing layer formed on the multilayer film and absorbing the light, and a stress correction film are provided. An exposure reflective mask blank, comprising: the stress correction film, wherein the stress correction film corrects a warp generated on a multilayer film surface when the stress correction film is not formed. is there.

【0023】第15の発明は、第13または第14の発
明に記載の露光用反射型マスクブランクを用いて製作し
たことを特徴とする露光用反射型マスクである。
According to a fifteenth aspect, there is provided an exposure reflective mask manufactured using the exposure reflective mask blank according to the thirteenth or fourteenth aspect.

【0024】[0024]

【発明の実施の形態】図1、2は本発明の実施の形態
1、2にかかる露光用反射型マスク(以下、EUV光に
も適用可能な露光用反射型マスクは「EUVマスク」、
EUV光にも適用可能な露光用反射型マスクブランクは
「EUVマスクブランク」と記載する。)の製造の概略
を示すフロー図であり、図6は製造されたEUVマスク
を用いて、例えばSiウエハ基板上にパターンの露光転
写を行っている概念図である。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIGS. 1 and 2 show a reflection mask for exposure according to Embodiments 1 and 2 of the present invention (hereinafter, the reflection mask for exposure applicable to EUV light is “EUV mask”,
The reflective mask blank for exposure applicable to EUV light is described as "EUV mask blank". FIG. 6 is a flow chart showing an outline of the production of FIG. 6, and FIG. 6 is a conceptual diagram in which a pattern is exposed and transferred onto, for example, a Si wafer substrate using the produced EUV mask.

【0025】(実施の形態−1)以下、図1、6を参照
しながら本発明の一実施の形態にかかるEUVマスクの
製造、および前記EUVマスクによる半導体基板上への
パターン転写について説明する。EUVマスクの製造、
および前記EUVマスクによる半導体基板上へのパター
ン転写は(1)基板の準備工程、(2)基板上への応力
補正膜の成膜工程、(3)基板上への多層膜の成膜工
程、(4)エッチングストッパーの成膜工程、(5)E
UV吸収層の成膜工程、(6)EBレジスト塗布工程、
(7)EB描画工程、(8)ドライエッチング工程、
(9)EUVマスクによる半導体基板上へのパターン転
写、の各工程からなる。
(Embodiment 1) Hereinafter, the manufacture of an EUV mask according to an embodiment of the present invention and transfer of a pattern onto a semiconductor substrate by the EUV mask will be described with reference to FIGS. Manufacture of EUV masks,
And the pattern transfer onto the semiconductor substrate using the EUV mask includes (1) a substrate preparation step, (2) a stress correction film formation step on the substrate, (3) a multilayer film formation step on the substrate, (4) film forming process of etching stopper, (5) E
UV absorbing layer film forming step, (6) EB resist coating step,
(7) EB drawing step, (8) dry etching step,
(9) pattern transfer onto a semiconductor substrate using an EUV mask.

【0026】(1)基板の準備工程。 基板11としては、低熱膨張係数を有し、平滑性、平坦
度、およびEUVマスクの洗浄等に用いる洗浄液への耐
性に優れたものが好ましく、低熱膨張係数を有するガラ
ス、例えばSiO2−TiO2系ガラス等を用いるが、こ
れに限定されず、β石英固溶体を析出した結晶化ガラス
や石英ガラスやシリコンや金属などの基板を用いること
も出来る。金属基板の例としては、インバー合金(Fe
−Ni系合金)等を用いることができる。基板11は
0.2nmRms以下の平滑な表面と100nm以下の
平坦度を有していることが高反射率および転写精度を得
るために好ましい。
(1) Substrate preparation step. The substrate 11 is preferably a glass having a low coefficient of thermal expansion and having excellent smoothness, flatness, and resistance to a cleaning solution used for cleaning an EUV mask, and a glass having a low coefficient of thermal expansion, for example, SiO 2 —TiO 2. Although a system glass or the like is used, the substrate is not limited to this, and a substrate made of crystallized glass, quartz glass, silicon, metal, or the like on which a β-quartz solid solution is precipitated can also be used. Examples of the metal substrate include an invar alloy (Fe
-Ni alloy) or the like can be used. The substrate 11 preferably has a smooth surface of 0.2 nmRms or less and a flatness of 100 nm or less in order to obtain high reflectance and transfer accuracy.

【0027】尚、本発明において、平滑性を示す単位R
msは、二乗平均平方根粗さのことであり原子間力顕微
鏡(AFM)で測定することができる。具体的な測定
は、例えば10μm角の範囲内で行うが、マスクの有効
エリア内で均一にこの平滑性を有していることが好まし
い。ここでマスクの有効エリアとは、EUV光露光用マ
スクの場合、例えば142mm角程度の範囲を有効エリ
アとして考えればよい。
In the present invention, the unit R showing smoothness is used.
ms is root mean square roughness, which can be measured by an atomic force microscope (AFM). The specific measurement is performed, for example, within a range of 10 μm square, but it is preferable that the mask has the smoothness uniformly within the effective area of the mask. Here, in the case of a mask for EUV light exposure, the effective area of the mask may be, for example, a range of about 142 mm square as the effective area.

【0028】(2)基板上への応力補正膜の成膜工程。 前述した本発明の目的を達成するために本発明者らは、
鋭意研究を重ねた結果、多層膜12の有する応力などに
より形成される基板11の反り(変形)を補正するため
の応力補正膜15を、後述する条件で成膜することによ
り、高応力を有する多層膜12を成膜しても基板11の
反り(変形)を補正し、多層膜表面を平坦に保つことが
できることに想達した。
(2) Step of forming a stress compensation film on the substrate. In order to achieve the object of the present invention described above, the present inventors:
As a result of intensive studies, the stress correction film 15 for correcting the warpage (deformation) of the substrate 11 formed by the stress or the like of the multilayer film 12 has a high stress by forming it under the conditions described later. It has been found that even when the multilayer film 12 is formed, the warpage (deformation) of the substrate 11 can be corrected and the surface of the multilayer film can be kept flat.

【0029】加えて好ましいことには、たとえ基板11
自身の反り(変形)が大きくても、前記応力補正膜15
の有する応力値を適宜に調整することで、基板11自身
の反り(変形)をも含めて、多層膜表面の反りを補正す
ることが可能であることを見出したのである。すなわ
ち、多層膜表面の反り(変形)とは、多層膜12が有す
る応力(通常は圧縮応力)により発生する反り(変形)
と、基板11自体が本来有していた反り(基板製造中に
発生した反りも含む)との合計で形成されるのである。
そうであるなら、基板11の反りと多層膜12の有する
応力によって形成される多層膜表面の反りを補正するよ
うな応力補正膜15を成膜すればよいことに想達したの
である。この応力補正膜は、基板と多層膜の間または基
板の背面(多層膜が成膜されていない側の面)に成膜す
ることができる。
In addition, it is preferred that the substrate 11
Even if its own warpage (deformation) is large, the stress compensation film 15
It has been found that by appropriately adjusting the stress value of the substrate 11, it is possible to correct the warpage of the surface of the multilayer film including the warpage (deformation) of the substrate 11 itself. That is, the warpage (deformation) of the multilayer film surface is the warpage (deformation) generated by the stress (normally, compressive stress) of the multilayer film 12.
And the warpage inherent to the substrate 11 itself (including the warpage generated during the manufacture of the substrate).
If this is the case, the inventor has conceived that a stress correction film 15 that corrects the warpage of the substrate 11 and the warpage of the multilayer film surface formed by the stress of the multilayer film 12 should be formed. The stress compensation film can be formed between the substrate and the multilayer film or on the back surface of the substrate (the surface on which the multilayer film is not formed).

【0030】これにより、多層膜表面の反りを補正し平
坦度を上げることで、例えば、本発明のEUV光マスク
において、ウエハへのパターン転写の際の位置ずれを抑
え、精度を上げることができる。具体的には、多層膜表
面の平坦度を100nmとした場合、転写における位置
ずれは2.2nm程度となり、50nmとした場合には
1.1nm程度に抑えることができ、高精度のパターン
転写が可能となる。
As a result, by correcting the warpage of the surface of the multilayer film and increasing the flatness, for example, in the EUV light mask of the present invention, the positional deviation at the time of transferring the pattern to the wafer can be suppressed, and the accuracy can be improved. . Specifically, when the flatness of the multilayer film surface is set to 100 nm, the displacement in transfer becomes about 2.2 nm, and when it is set to 50 nm, it can be suppressed to about 1.1 nm. It becomes possible.

【0031】多層膜の応力は、多層膜の成膜前後の基板
の反りを計測し、成膜前後の反りの差から算出すること
ができる。ここで圧縮応力はマイナス符号、引っ張り応
力はプラス符号となる。また多層膜の応力はその材料、
成膜条件からある程度予想できるため、実験的に得られ
たデータ等から多層膜の応力を予測し、応力補正膜に与
える応力・膜厚を決定することもできる。また必要に応
じてモニターをおこない、応力補正膜に与える応力・膜
厚を適宜補正してもよい。
The stress of the multilayer film can be calculated by measuring the warpage of the substrate before and after the formation of the multilayer film and calculating the difference between the warpages before and after the film formation. Here, the compressive stress has a minus sign, and the tensile stress has a plus sign. Also, the stress of the multilayer film depends on its material,
Since it can be predicted to some extent from the film formation conditions, the stress of the multilayer film can be predicted from data obtained experimentally and the like, and the stress and film thickness to be applied to the stress correction film can be determined. Further, monitoring may be performed as needed, and the stress and the film thickness applied to the stress correction film may be corrected as appropriate.

【0032】実施の形態−1においては、前記応力補正
膜を基板と多層膜の間に成膜した実施の形態について説
明し、後述する実施の形態−2においては、前記応力補
正膜を基板の背面に成膜した実施の形態について説明す
る。
In the first embodiment, an embodiment in which the stress correction film is formed between the substrate and the multilayer film will be described. In a second embodiment to be described later, the stress correction film is formed on the substrate. An embodiment in which a film is formed on the back surface will be described.

【0033】もし、基板11として反り(変形)のない
基板を用いることができる場合には、多層膜12が有す
る応力を打ち消すような応力および膜厚で、応力補正膜
15を成膜すれば良い。ここで、一般に応力は単位厚さ
当たりの値で表されるので、成膜される膜が有する単位
厚さ当たりの応力×厚さ、が互いにつり合うように応力
補正膜15の材料、成膜条件、厚さを決定すればよい。
実施の形態−1においては、基板11と多層膜12の間
に応力補正膜15を成膜するので、図1に示すように、
多層膜12が有する応力と大きさが同じで向きが反対の
応力補正膜15を成膜すればよい。
If a substrate without warpage (deformation) can be used as the substrate 11, the stress correction film 15 may be formed with a stress and a film thickness that cancel the stress of the multilayer film 12. . Here, since the stress is generally represented by a value per unit thickness, the material of the stress correction film 15 and the film forming conditions are set so that the stress per unit thickness × the thickness of the film to be formed is balanced. The thickness may be determined.
In the first embodiment, since the stress correction film 15 is formed between the substrate 11 and the multilayer film 12, as shown in FIG.
The stress correction film 15 having the same magnitude as the stress of the multilayer film 12 and having the opposite direction may be formed.

【0034】一方、予め、反りを与えた基板11を用い
る場合もある。このとき(イ)基板11の反りの向きと
多層膜12が有する応力の向きが同じである場合と、
(ロ)基板11の反りの向きと多層膜12が有する応力
の向きが逆である場合とがある。
On the other hand, there is a case where the substrate 11 which has been warped in advance is used. At this time, (a) the case where the direction of the warpage of the substrate 11 and the direction of the stress of the multilayer film 12 are the same,
(B) The direction of the warp of the substrate 11 may be opposite to the direction of the stress of the multilayer film 12 in some cases.

【0035】(イ)基板11の反りの向きと多層膜12
が有する応力の向きが同じである場合この場合、基板1
1の反り(変形)と、多層膜12が有する応力との合計
が多層膜表面の反りの原因となる。従って、これらの応
力の合計を打ち消すように応力補正膜15を成膜すれば
よい。
(A) Warp direction of substrate 11 and multilayer film 12
In this case, when the directions of the stresses of the
The total of the warpage (deformation) of 1 and the stress of the multilayer film 12 causes the multilayer film surface to warp. Therefore, the stress correction film 15 may be formed so as to cancel the sum of these stresses.

【0036】(ロ)基板11の反りの向きと多層膜12
が有する応力の向きが逆である場合多層膜12が有する
応力を、予め与えた基板11の反り(変形)で低減・相
殺することが出来る。多層膜12は通常圧縮応力を有す
るので、多層膜12を成膜した基板11は多層膜12が
成膜された側が凸になるような反りが生じる。そこで、
予め多層膜12が成膜される側が凹になる反りを与えた
基板11上に多層膜12を成膜すれば、基板11の反り
と、多層膜12の有する応力による反りとが相殺され、
多層膜表面の反りを減少させることができる。そしてこ
の減少した反りに対し、応力補正膜15を成膜してこの
反りを打ち消せばよい。
(B) The direction of warpage of the substrate 11 and the multilayer film 12
In the case where the directions of the stresses are reversed, the stresses of the multilayer film 12 can be reduced and canceled by the warpage (deformation) of the substrate 11 given in advance. Since the multilayer film 12 usually has a compressive stress, the substrate 11 on which the multilayer film 12 is formed is warped such that the side on which the multilayer film 12 is formed becomes convex. Therefore,
If the multilayer film 12 is formed on the substrate 11 having a warp in which the side on which the multilayer film 12 is formed is concave, the warpage of the substrate 11 and the warpage due to the stress of the multilayer film 12 are offset,
Warpage of the multilayer film surface can be reduced. Then, for the reduced warpage, a stress correction film 15 may be formed to cancel the warpage.

【0037】尚、多層膜12が有する応力を、予め与え
た基板11の反り(変形)で完全に相殺することが出来
るのなら、応力補正膜15を成膜せずに平坦な多層膜表
面を得ることも可能である。前記予め反りを与えた基板
11を調製するには、例えば、基板の初期スライス時
に、所望の面(反り)を有するように加工すること等の
方法がある。
If the stress of the multilayer film 12 can be completely canceled by the warpage (deformation) of the substrate 11 given in advance, the flat multilayer film surface can be formed without forming the stress correction film 15. It is also possible to get. In order to prepare the warped substrate 11, for example, there is a method of processing the substrate 11 so as to have a desired surface (warpage) at the time of initial slicing of the substrate.

【0038】ここで、前記応力補正膜15の成膜方法に
ついて説明する。前記応力補正膜表面は平滑な膜である
ことが必要であることから、アモルファス材料が好まし
い。また、Taを主成分とした材料が好ましい。Taを
主成分としたアモルファス材料が好ましい。前記応力補
正膜表面の平滑性は、0.2nmRms以下であること
が好ましく、さらに好ましくは0.15nmRms以下
である。前記応力補正膜15の成膜例としてTaB膜
(TaとBを含む膜)を用いる場合、DCマグネトロン
スパッタ法を用いて、室温、Arガス雰囲気下で成膜す
ることが好ましい。そして応力補正膜15の有する応力
は、成膜方法や成膜条件(スパッタガス圧、投入パワ
ー、膜厚、等)を適宜制御することによって所望の値に
調整することができる。
Here, a method for forming the stress correction film 15 will be described. Since the surface of the stress compensation film needs to be a smooth film, an amorphous material is preferable. Further, a material containing Ta as a main component is preferable. An amorphous material containing Ta as a main component is preferable. The smoothness of the surface of the stress correction film is preferably 0.2 nmRms or less, more preferably 0.15 nmRms or less. When a TaB film (a film containing Ta and B) is used as a film forming example of the stress correction film 15, it is preferable to form the film using a DC magnetron sputtering method at room temperature in an Ar gas atmosphere. The stress of the stress correction film 15 can be adjusted to a desired value by appropriately controlling the film forming method and the film forming conditions (sputter gas pressure, input power, film thickness, etc.).

【0039】例えば、TaB膜の場合、投入パワー一定
の下でスパッタガス圧を変化させると、低圧側では圧縮
応力を示し、ガス圧を上げると応力は減少し、ついには
0を示す、さらにガス圧を上げると引っ張り応力を示し
その応力はガス圧と伴に増加する、というようにスパッ
タガス圧に応じた応力変化を示す。この効果を用い、応
力補正膜15の有する応力を用いて、多層膜12の有す
る応力や基板11の反りを打ち消し合うことができる。
応力補正膜15の有する応力値と方向はスパッタ条件
(スパッタガス圧、投入パワー、膜厚、等)を制御して
調整すればよい。ここでTaとBを含む膜においては、
Bが10〜30at%であるのが好ましい。また、Ta
とBとNを含む膜においては、Nが5〜30at%であ
りN以外の成分を100at%としたときに、Bが10
〜30at%であるのが好ましい。
For example, in the case of a TaB film, when the sputter gas pressure is changed under a constant input power, a compressive stress is exhibited on the low pressure side, the stress is decreased when the gas pressure is increased, and finally, the pressure becomes zero. When the pressure is increased, a tensile stress is exhibited, and the stress increases with the gas pressure. Thus, the stress varies according to the sputter gas pressure. Using this effect, the stress of the multilayer film 12 and the warpage of the substrate 11 can be canceled by using the stress of the stress correction film 15.
The stress value and direction of the stress correction film 15 may be adjusted by controlling the sputtering conditions (sputter gas pressure, input power, film thickness, etc.). Here, in the film containing Ta and B,
B is preferably 10 to 30 at%. Also, Ta
And a film containing B and N, when N is 5 to 30 at% and the components other than N are 100 at%, B is 10 at%.
It is preferably about 30 at%.

【0040】応力補正膜15の材料として、前記TaB
以外の例として、Siを主成分とした材料を用いること
もできる。具体的にはSi単体またはSiに添加物をド
ープしたものであり、添加剤としてはNやOが挙げられ
る。Siを主成分とした材料は、アモルファス状態であ
ることが好ましく、半導体的な性質を持たせておくこと
が好ましい。なんとなれば、実施の形態−2に後述する
ように、応力補正膜を基板と多層膜の間、または基板の
背面(多層膜が成膜されていない側の面)に成膜する場
合、基板11の裏面に導電性を持つ材料で応力補正膜1
5が設けられていれば、前記EUVマスクブランクおよ
びEUVマスク、等を取り扱う際に、それらの基板11
裏面を静電チャックでチャックしたいとの要請があった
とき、前記チャック性が改善されるからである。
The material of the stress compensation film 15 is TaB
As another example, a material containing Si as a main component can be used. Specifically, it is a simple substance of Si or a substance obtained by doping an additive to Si, and examples of the additive include N and O. The material containing Si as a main component is preferably in an amorphous state, and preferably has semiconductor properties. In the case where the stress correction film is formed between the substrate and the multilayer film or on the back surface of the substrate (the surface on which the multilayer film is not formed), as described later in Embodiment 2, 11 is a stress compensation film 1 made of a conductive material on the back surface.
If the EUV mask 5 is provided, when handling the EUV mask blank and EUV mask, the substrate 11
This is because, when there is a request to chuck the back surface with an electrostatic chuck, the chucking property is improved.

【0041】さらに応力補正膜15の材料として、Cr
を含む材料を用いることもできる。このCrを含む材料
として、例えばCrとNとを含む材料を用いることもで
きる。このCrとNとを含む材料において、Nの割合は
5〜35at%が好ましく、10〜25at%はさらに
好ましい。さらに、CrとNとを含む材料が、Oおよび
/またはCを含んでいることも好ましい。これらCrを
含む材料は、平滑性、耐洗浄性に優れており応力の制御
性も良好である。そして、これらCrを含む材料は、D
Cスパッタリング法等で成膜することができる。以上、
応力補正膜15の例として、TaB膜、Si系膜、Cr
系膜を挙げたが、それに限定されず、応力の制御が容易
な平滑な膜であれば良く、TaGe、TaGeN、Ta
Si、TaSiN、WN等も使用できる。
Further, as a material of the stress compensation film 15, Cr
Can be used. As the material containing Cr, for example, a material containing Cr and N can be used. In the material containing Cr and N, the ratio of N is preferably 5 to 35 at%, and more preferably 10 to 25 at%. Further, it is also preferable that the material containing Cr and N contains O and / or C. These Cr-containing materials are excellent in smoothness and washing resistance, and have good stress controllability. The material containing Cr is D
The film can be formed by a C sputtering method or the like. that's all,
Examples of the stress correction film 15 include a TaB film, a Si-based film, and a Cr film.
Although a system film was mentioned, the film is not limited thereto, and any film may be used as long as it is a smooth film that can easily control stress.
Si, TaSiN, WN, etc. can also be used.

【0042】(3)基板上への多層膜の成膜工程。 多層膜12としては、MoとSiからなる多層膜が多用
されているが、特定の波長域で高い反射率が得られる材
料として、Ru/Si、Mo/Be、Mo化合物/Si
化合物、Si/Nb周期多層膜、Si/Mo/Ru周期
多層膜、Si/Mo/Ru/Mo周期多層膜およびSi
/Ru/Mo/Ru周期多層膜、等でも良い。ただし、
材料によって最適な膜厚は異なる。MoとSiからなる
多層膜の場合、DCマグネトロンスパッタ法により、ま
ずSiターゲットを用いて、Arガス雰囲気下でSi膜
を成膜し、その後、Moターゲットを用いて、Arガス
雰囲気下でMo膜を成膜し、これを1周期として、30
〜60周期、好ましくは40周期積層した後、最後にS
i膜を成膜する。ここで、多層膜12の有する応力の例
としては、0.2μm厚で−500MPaであった。こ
の工程により、多層膜付き基板が得られる。
(3) Step of forming a multilayer film on a substrate. As the multilayer film 12, a multilayer film composed of Mo and Si is frequently used. As materials capable of obtaining a high reflectance in a specific wavelength region, Ru / Si, Mo / Be, and Mo compound / Si are used.
Compound, Si / Nb periodic multilayer, Si / Mo / Ru periodic multilayer, Si / Mo / Ru / Mo periodic multilayer, and Si
A / Ru / Mo / Ru periodic multilayer film may be used. However,
The optimum film thickness depends on the material. In the case of a multilayer film composed of Mo and Si, a DC film is first formed by a DC magnetron sputtering method using an Si target under an Ar gas atmosphere, and then an Mo film is formed using an Mo target under an Ar gas atmosphere. And this is defined as one cycle, and 30
After stacking up to 60 cycles, preferably 40 cycles,
An i film is formed. Here, an example of the stress of the multilayer film 12 was −500 MPa at a thickness of 0.2 μm. By this step, a substrate with a multilayer film is obtained.

【0043】(4)エッチングストッパーの成膜工程。 エッチングストッパー膜13の材料としてはSiO2
多用されるが、吸収層13をエッチングする条件によっ
ては、耐エッチング性の高い材料としてAl23、Cr
N等を用いても良い。SiO2を用いる場合は、RFマ
グネトロンスパッタ法によりSiO2ターゲットを用い
てArガス雰囲気下で、前記多層膜付き基板上へSiO
2膜を成膜するのが好ましい。
(4) Step of forming an etching stopper. SiO 2 is often used as a material for the etching stopper film 13, but depending on the conditions for etching the absorption layer 13, a material having high etching resistance, such as Al 2 O 3 or Cr, may be used.
N or the like may be used. When SiO 2 is used, the SiO 2 target is formed on the substrate with the multilayer film by an RF magnetron sputtering method using an SiO 2 target under an Ar gas atmosphere.
It is preferable to form two films.

【0044】(5)EUV吸収層の成膜工程。 EUV吸収層13の材料としては、Taを主成分とする
材料。Taを主成分とし少なくともBを含む材料。Ta
を主成分とするアモルファス構造の材料。Taを主成分
とし少なくともBを含んだアモルファス構造の材料。
(例えば、Ta4Bで表されるBを25%程度含んだア
モルファス構造の材料)TaとBとNを含む材料(例え
ば、Taを主成分としBを15%、Nを10%程度含ん
だアモルファス構造の材料)Crを主成分としN、O、
Cから選ばれる少なくとも1つの成分を含有する材料。
(例えば、CrN、CrNにO、Cを添加した材料)等
が、好ましいことを見出した。しかし、これに限定され
ず、TaSi、TaSiN、TaGe、TaGeN、W
N、Cr、TiN、等も使用可能である。
(5) Step of forming a EUV absorption layer. The material of the EUV absorption layer 13 is a material containing Ta as a main component. A material containing Ta as a main component and containing at least B. Ta
A material with an amorphous structure whose main component is. A material having an amorphous structure containing Ta as a main component and containing at least B.
(For example, a material having an amorphous structure containing about 25% of B expressed by Ta 4 B) A material containing Ta, B, and N (for example, containing about 15% of B as a main component and about 10% of N) Material with amorphous structure) Cr as main component, N, O,
A material containing at least one component selected from C.
(For example, CrN, a material obtained by adding O and C to CrN) and the like have been found to be preferable. However, it is not limited to this, and TaSi, TaSiN, TaGe, TaGeN, W
N, Cr, TiN, etc. can also be used.

【0045】EUV吸収層13の材料としてTaB化合
物薄膜を用いる例では、DCマグネトロンスパッタ法に
より、まずTa4Bターゲットを用いて、Arガス雰囲
気下でTa4B膜を成膜することが好ましい。この際、
スパッタ条件(ガス圧、DCパワー等)を最適化するこ
とによりEUV吸収層13の応力を50MPa以下とし
ておくことが好ましい。この工程により、EUVマスク
ブランクが得られる。
In the case where a TaB compound thin film is used as the material of the EUV absorption layer 13, it is preferable to form a Ta 4 B film by a DC magnetron sputtering method using a Ta 4 B target in an Ar gas atmosphere. On this occasion,
It is preferable that the stress of the EUV absorption layer 13 be set to 50 MPa or less by optimizing the sputtering conditions (gas pressure, DC power, etc.). Through this step, an EUV mask blank is obtained.

【0046】なお、本発明のEUVマスクブランクおよ
び、後述するEUVマスクは上述したように多層膜基板
の反りを補正する応力補正膜を設けたことを特徴として
いる。ここで、多層膜表面の反りの原因としては、基板
自身が有する反りと基板上に成膜された多層膜の有する
応力により生じる反りが主なものとなるが、他に中間層
として、例えば保護層やエッチングストッパー、等を有
する構造の場合にはこれら中間層などの応力も考慮し
て、最終的に所望の平坦度が得られるように応力補正膜
の応力・膜厚を決定すればよい。
The EUV mask blank of the present invention and an EUV mask described later are characterized in that the stress correction film for correcting the warpage of the multilayer substrate is provided as described above. Here, the warpage of the multilayer film surface is mainly caused by the warpage of the substrate itself and the warpage caused by the stress of the multilayer film formed on the substrate. In the case of a structure having a layer, an etching stopper, and the like, the stress and the film thickness of the stress correction film may be determined so as to finally obtain a desired flatness in consideration of the stress of the intermediate layer and the like.

【0047】(6)EBレジスト塗布工程。 得られたEUVマスクブランクの吸収層にパターンを形
成することによりEUVマスクを製造することができ
る。工程(5)で得られたEUVマスクブランクにEB
レジストを塗布し200℃でベーキングを行う。
(6) EB resist coating step. An EUV mask can be manufactured by forming a pattern on the absorption layer of the obtained EUV mask blank. EB on the EUV mask blank obtained in step (5)
A resist is applied and baking is performed at 200 ° C.

【0048】(7)EB描画工程。 EBレジストを塗布したEUVマスクブランクに30k
eVのEB描画機を用いてレジストパターン作成を実施
した。
(7) EB drawing step. 30k on EUV mask blank coated with EB resist
A resist pattern was created using an eV EB lithography machine.

【0049】(8)ドライエッチング工程。 ICP−RIE装置を用い、このレジストパターンをマ
スクとして、EUV吸収層14を塩素を用いて基板温度
20℃にてドライエッチングし吸収層をパターン形成し
た。その際、下地のSiO2膜は、希フッ酸液を用いて
除去した。さらに吸収層パターン上に残ったレジストを
100℃の熱濃硫酸で除去した。この工程により、EU
Vマスクが得られる。
(8) Dry etching step. Using the resist pattern as a mask, the EUV absorption layer 14 was dry-etched using chlorine at a substrate temperature of 20 ° C. using an ICP-RIE apparatus to form a pattern of the absorption layer. At this time, the underlying SiO 2 film was removed using a diluted hydrofluoric acid solution. Further, the resist remaining on the absorption layer pattern was removed with hot concentrated sulfuric acid at 100 ° C. By this process, EU
A V mask is obtained.

【0050】なお、ここでは吸収層へのパターン形成方
法について、エッチング法を用いる例で説明したが、こ
れに限られるものではなく、例えばリフトオフ法、等も
用いることができる。
Here, the method of forming a pattern on the absorption layer has been described by way of an example using an etching method, but the present invention is not limited to this. For example, a lift-off method can be used.

【0051】(9)EUVマスクによる半導体基板上へ
のパターン転写。 図6に示すように、レーザープラズマX線源41からえ
られたEUV光(軟X線)を前記EUVマスク42に入
射し、ここで反射された光を縮小光学系43を通して例
えばSiウエハ基板44上に転写する。
(9) Transferring a pattern onto a semiconductor substrate using an EUV mask. As shown in FIG. 6, EUV light (soft X-ray) obtained from a laser plasma X-ray source 41 is incident on the EUV mask 42, and the reflected light is passed through a reduction optical system 43 to, for example, a Si wafer substrate 44. Transfer to the top.

【0052】縮小光学系43としてはX線反射ミラーを
用いることができる、縮小光学系によりEUVマスク4
2で反射されたパターンは通常1/4程度に縮小され
る。例えばSiウエハ基板44へのパターンの転写は、
Si基板44上に形成させたレジスト層にパターンを露
光しこれを現像することによって行うことができる。露
光波長として13〜14nmの波長帯を使用する場合に
は、通常光路が真空中になるように転写が行われる。1
3〜14nmの波長帯域における多層膜の材料として、
この波長帯域にピーク波長を有するMo/Si多層膜を
用いることができる。このようにして本実施の形態で得
られたEUVマスクを用いて、例えばSiウエハ基板上
にパターンを形成することにより、例えば集積度の高い
LSI、等の半導体装置を製造することができる。
As the reduction optical system 43, an X-ray reflection mirror can be used.
The pattern reflected by 2 is usually reduced to about 1/4. For example, the transfer of the pattern to the Si wafer substrate 44 is as follows.
It can be performed by exposing a pattern to a resist layer formed on the Si substrate 44 and developing the pattern. When a wavelength band of 13 to 14 nm is used as the exposure wavelength, the transfer is usually performed such that the optical path is in a vacuum. 1
As a material of a multilayer film in a wavelength band of 3 to 14 nm,
A Mo / Si multilayer film having a peak wavelength in this wavelength band can be used. By using the EUV mask obtained in this embodiment to form a pattern on, for example, a Si wafer substrate, a semiconductor device such as a highly integrated LSI can be manufactured.

【0053】(実施の形態−2)次に図2、6を参照し
ながら、本発明の異なる実施の形態にかかるEUVマス
クの製造、および前記EUVマスクによる半導体基板上
へのパターン転写について説明する。EUVマスクの製
造、および前記EUVマスクによる半導体基板上へのパ
ターン転写は(1)基板の準備工程、(2)基板裏面
(多層膜を成膜しない側)への応力補正膜の成膜工程、
(3)基板上への多層膜の成膜工程、(4)エッチング
ストッパーの成膜工程、(5)EUV吸収層の成膜工
程、(6)EBレジスト塗布工程、(7)EB描画工
程、(8)ドライエッチング工程、(9)EUVマスク
による半導体基板上へのパターン転写の各工程からな
る。
(Embodiment 2) Next, with reference to FIGS. 2 and 6, manufacturing of an EUV mask according to another embodiment of the present invention and transfer of a pattern onto a semiconductor substrate by the EUV mask will be described. . The manufacture of an EUV mask and the transfer of a pattern onto a semiconductor substrate using the EUV mask include (1) a substrate preparation step, (2) a stress correction film formation step on the back surface of the substrate (on which a multilayer film is not formed),
(3) a step of forming a multilayer film on a substrate, (4) a step of forming an etching stopper, (5) a step of forming an EUV absorption layer, (6) an EB resist coating step, (7) an EB drawing step, (8) A dry etching step, and (9) a step of transferring a pattern onto a semiconductor substrate using an EUV mask.

【0054】本実施の形態を実施の形態−1と比較する
と、「(2)基板裏面(多層膜を成膜しない側)への応
力補正膜の成膜工程」が異なるのでこの工程を中心に説
明する。
When this embodiment is compared with the first embodiment, “(2) Step of forming a stress correction film on the back surface of the substrate (the side on which no multilayer film is formed)” is different. explain.

【0055】(2)基板裏面への応力補正膜の成膜工
程。 多層膜12は通常圧縮応力を有する。そこで、基板11
裏面に応力補正膜16を成膜する際、基板11として実
質的に反りのないものを用いるのであれば、成膜される
応力補正膜16は多層膜12の有する応力によって生じ
る反りを、打ち消すような応力および膜厚を持つものと
すればよい。特に材料は限定されないが、前述したよう
に導電性のある半導体膜または金属膜であれば、静電チ
ャックを用いる際のハンドリングにも効果的で好まし
い。ここで、一般に膜が基板の反りに与える力は、膜材
料の有する応力と膜厚との積になるため、応力補正膜1
6の材料、成膜法および膜厚は、応力補正膜材料16の
有する応力と、膜厚の積が基板11の反りと多層膜12
の有する応力による反りとの合計を相殺するように決定
すればよい。例えば、応力補正膜16が膜厚0.28μ
mで応力−500MPaの場合、0.14μmの半分に
薄くするなら応力は倍の−1000MPaを有する材料
を選択する。もし実質的に基板11自身に反りがない場
合なら、多層膜12の厚さと応力補正膜16の厚さを同
値とし、多層膜12と同じ大きさの応力を応力補正膜1
6にも与えるように成膜するのが簡便である。
(2) Step of forming a stress correction film on the back surface of the substrate. The multilayer film 12 usually has a compressive stress. Therefore, the substrate 11
When forming the stress correction film 16 on the back surface, if the substrate 11 is not substantially warped, the formed stress correction film 16 may cancel the warpage caused by the stress of the multilayer film 12. What is necessary is just to have a suitable stress and film thickness. Although the material is not particularly limited, as described above, a conductive semiconductor film or a metal film is effective and preferable for handling when an electrostatic chuck is used. Here, the force that the film gives to the warpage of the substrate is generally the product of the stress of the film material and the film thickness.
6, the product of the stress of the stress compensation film material 16 and the film thickness is determined by the warpage of the substrate 11 and the multilayer film 12.
May be determined so as to cancel the sum of the warpage due to the stress of the above. For example, the stress correction film 16 has a thickness of 0.28 μm.
In the case of a stress of -500 MPa at m, if the thickness is reduced to half of 0.14 μm, a material having a stress doubled at −1000 MPa is selected. If the substrate 11 itself has substantially no warp, the thickness of the multilayer film 12 and the thickness of the stress correction film 16 are made equal, and the stress of the same magnitude as the multilayer film 12 is applied to the stress correction film 1.
It is convenient to form a film so as to give the film No. 6 as well.

【0056】基板11の裏面(多層膜を成膜しない側)
上に、応力補正膜16としてTaB膜を成膜する場合、
DCマグネトロンスパッタ法を用いて、室温、Arガス
雰囲気下で成膜するのが好ましい。この際、応力補正膜
16の膜厚は成膜する多層膜12と同じ膜厚とし、応力
は多層膜12の応力と打ち消し合わせるため、多層膜1
2の応力と同程度となるようにスパッタ条件を制御す
る。ここでTaB膜においては、前述したように、スパ
ッタ条件のうちガス圧とDCパワーを制御することで応
力を容易に可変できるので、前記ガス圧とDCパワーの
制御により引っ張り応力から圧縮応力まで任意に制御可
能である。
Back surface of substrate 11 (side on which no multilayer film is formed)
When a TaB film is formed as the stress correction film 16 on the top,
It is preferable to form a film at room temperature under an Ar gas atmosphere using a DC magnetron sputtering method. At this time, the thickness of the stress correction film 16 is the same as that of the multilayer film 12 to be formed, and the stress cancels the stress of the multilayer film 12.
The sputtering conditions are controlled so as to be approximately equal to the stress of No. 2. Here, in the TaB film, as described above, the stress can be easily varied by controlling the gas pressure and the DC power among the sputtering conditions. Can be controlled.

【0057】この実施の形態によっても実施の形態−1
と同様の特性を有する多層膜付き基板、EUVマスクブ
ランク及びEUVマスクを得ることができた。このよう
にして実施の形態−2で得られたEUVマスクを用い
て、例えばSiウエハ基板上にパターンを形成すること
により、例えば集積度の高いLSI、等の半導体装置を
製造することができる。
According to this embodiment, Embodiment-1
Thus, a substrate with a multilayer film, an EUV mask blank and an EUV mask having the same characteristics as those described above were obtained. By forming a pattern on, for example, a Si wafer substrate using the EUV mask obtained in the second embodiment in this way, a semiconductor device such as a highly integrated LSI can be manufactured.

【0058】なお、本実施の形態においては基板11裏
面への応力補正膜16の成膜を多層膜12の成膜工程の
前におこなう例を説明したが、これに限らず多層膜12
の成膜後の各工程間でおこなってもよい。例えば、多層
膜12の成膜後、吸収層14の成膜後、吸収層14への
パターン形成後でも良い。
In the present embodiment, an example in which the stress correction film 16 is formed on the back surface of the substrate 11 before the step of forming the multilayer film 12 has been described.
May be performed between each step after the film formation. For example, after forming the multilayer film 12, after forming the absorbing layer 14, or after forming a pattern on the absorbing layer 14.

【0059】(多層膜付き基板のEUV用反射ミラー、
等への適用)本発明に記載した多層膜付き基板は、EU
Vマスク、EUVマスクブランクおよびEUV用反射ミ
ラー、等への適用が可能である。
(EUV reflection mirror of a substrate with a multilayer film,
Application to the etc.) The substrate with a multilayer film described in the present invention is an EU substrate.
It can be applied to V masks, EUV mask blanks, EUV reflection mirrors, and the like.

【0060】しかし、EUV用反射ミラーにおいては、
光の反射面として曲面を求められる場合が多い。そこ
で、本発明に記載した多層膜付き基板を適用する場合
は、応力補正膜の応力の大きさおよび向きを調整し、反
射面の反りを所望の曲率に合わせるように補正すればよ
い。
However, in the reflection mirror for EUV,
In many cases, a curved surface is required as a light reflection surface. Therefore, when the substrate with a multilayer film described in the present invention is applied, the magnitude and direction of the stress of the stress correction film may be adjusted to correct the warpage of the reflection surface to a desired curvature.

【0061】(実施例1)図1を参照しながら本発明の
第1の実施例を説明する。ガラス基板11として、外径
6インチ角、厚さが6.3mmである低膨張のSiO2
−TiO2系のガラス基板を用いた。また、ガラス基板
11は、機械研磨により、0.2nmRms以下の平滑
な表面と90nmの凹面の平坦度とした。
(Embodiment 1) A first embodiment of the present invention will be described with reference to FIG. As the glass substrate 11, low expansion SiO 2 having an outer diameter of 6 inches square and a thickness of 6.3 mm
-TiO with 2 glass substrate. The glass substrate 11 was mechanically polished to have a smooth surface of 0.2 nmRms or less and a flatness of 90 nm concave.

【0062】ガラス基板11の表面上に、応力補正膜1
5としてTaB膜(但し、Ta:B=75:15(原子
数比))を成膜した。TaB膜は、DCマグネトロンス
パッタ法を用いて、室温、Arガス圧0.6Paで、
0.28μmの厚さに形成した。この結果、応力補正膜
15の有する応力は、多層膜12の有する応力を打ち消
し合うように多層膜12と反対の引っ張り応力を有し、
応力値は同程度の+480MPaであった。
The stress compensation film 1 is formed on the surface of the glass substrate 11.
As No. 5, a TaB film (Ta: B = 75: 15 (atomic ratio)) was formed. The TaB film was formed at room temperature under an Ar gas pressure of 0.6 Pa using a DC magnetron sputtering method.
It was formed to a thickness of 0.28 μm. As a result, the stress of the stress correction film 15 has a tensile stress opposite to that of the multilayer film 12 so as to cancel the stress of the multilayer film 12, and
The stress value was +480 MPa, which was almost the same.

【0063】多層膜12として、MoとSiを積層し
た。DCマグネトロンスパッタ法により、まずSiター
ゲットを用いて、Arガス0.1PaでSi膜を4.2
nm成膜し、その後、Moターゲットを用いて、Arガ
ス圧0.1PaでMo膜を2.8nm成膜し、これを1
周期として、40周期積層した後、最後にSi膜を4n
m成膜した。ここで、多層膜12の有する応力は、−5
00MPaであった。ここで得られた多層膜付き基板の
平坦度は40nmであった。
As the multilayer film 12, Mo and Si were laminated. First, a Si film was formed by a DC magnetron sputtering method using a Si target with an Ar gas of 0.1 Pa.
Then, using a Mo target, a 2.8 nm-thick Mo film was formed at an Ar gas pressure of 0.1 Pa.
After stacking forty cycles, the Si film is finally covered with 4n.
m was formed. Here, the stress of the multilayer film 12 is −5.
It was 00 MPa. The flatness of the substrate with a multilayer film obtained here was 40 nm.

【0064】次に、多層膜12上にSiO2ターゲット
を用いて、スパッタガスとして、Arガスを用いて、S
iO2膜より構成されるエッチングストッパー13をR
Fマグネトロンスパッタ法によって、0.05μmの厚
さに成膜した。ここでエッチングストッパー13の応力
は−50MPaであった。
Next, using an SiO 2 target on the multilayer film 12 and using Ar gas as a sputtering gas,
The etching stopper 13 composed of the iO 2 film is
A film was formed to a thickness of 0.05 μm by F magnetron sputtering. Here, the stress of the etching stopper 13 was -50 MPa.

【0065】最後に、前記SiO2膜より構成されるエ
ッチングストッパー13の上に、EUV吸収層14とし
て、Ta及びBを含む膜(但し、Ta:B=75:15
(原子数比))をDCマグネトロンスパッタ法によっ
て、0.1μmの厚さで成膜した。この際、スパッタ条
件を制御することで前記EUV吸収層14の有する応力
を+50MPaとした。この結果、多層膜表面の平坦度
が50nmという特徴を有するEUVマスクブランクを
得ることができた。
Finally, a film containing Ta and B (Ta: B = 75: 15) is formed as an EUV absorbing layer 14 on the etching stopper 13 composed of the SiO 2 film.
(Atomic ratio) was formed to a thickness of 0.1 μm by DC magnetron sputtering. At this time, the stress of the EUV absorption layer 14 was set to +50 MPa by controlling the sputtering conditions. As a result, an EUV mask blank having a feature that the flatness of the surface of the multilayer film was 50 nm was obtained.

【0066】次に、このEUVマスクブランクを用い
て、デザインルールが0.07μmの16Gbit−D
RAM用のパターンを有するEUVマスクを、次に記載
する方法により作製した。
Next, using this EUV mask blank, a 16 Gbit-D having a design rule of 0.07 μm was used.
An EUV mask having a pattern for RAM was manufactured by the method described below.

【0067】まず、前記EUVマスクブランク上にEB
レジストをコートし、EB描画によりレジストパターン
を形成した。
First, an EB is placed on the EUV mask blank.
The resist was coated, and a resist pattern was formed by EB drawing.

【0068】このレジストパターンをマスクとして、T
aB吸収層14を、塩素を用いてドライエッチングし、
EUVマスクブランク上に吸収パターンを形成した。下
地のSiO2膜より構成されるエッチングストッパー1
3は、希フッ酸で除去し、吸収パターン上に残ったレジ
ストを除去してEUVマスクを作製した。
Using this resist pattern as a mask, T
aB absorption layer 14 is dry-etched using chlorine,
An absorption pattern was formed on the EUV mask blank. Etching stopper 1 composed of underlying SiO 2 film
In No. 3, an EUV mask was manufactured by removing the resist remaining on the absorption pattern by removing with diluted hydrofluoric acid.

【0069】上記で作製した、EUVマスクについて、
干渉計により多層膜表面の平坦度を測定した結果、50
nmの高い平坦度を有していることを確認した。さら
に、EUVLにおいて露光転写を行った結果、十分高精
度なEUV反射特性を有していることを確認した。
For the EUV mask produced above,
As a result of measuring the flatness of the multilayer film surface with an interferometer, 50
It was confirmed to have a high flatness of nm. Furthermore, as a result of performing exposure transfer in EUVL, it was confirmed that the EUVL had sufficiently high precision EUV reflection characteristics.

【0070】(実施例2)図2を参照して本発明の第2
の実施例について説明する。基板11として、実施例1
と同様の平坦度を有するガラス基板を用いた。ガラス基
板11の裏面(多層膜を成膜しない側)上に、応力補正
膜16としてTaB膜を成膜する。TaB膜(但し、T
a:B=75:15(原子数比))は、DCマグネトロ
ンスパッタ法を用いて、室温、Arガス圧0.2Pa
で、0.28μmの厚さに成膜した。この際、応力補正
膜16の膜厚は、成膜する多層膜12と同じ0.28μ
mとし、応力は、多層膜12の有する応力と打ち消し合
うように、同方向で、同じ大きさの−500MPaとし
た。ここで得られた多層膜付き基板の平坦度は90nm
であった。
(Embodiment 2) Referring to FIG.
An example will be described. Example 1 as the substrate 11
A glass substrate having the same flatness as described above was used. A TaB film is formed as a stress correction film 16 on the back surface of the glass substrate 11 (the side on which the multilayer film is not formed). TaB film (however, T
a: B = 75: 15 (atomic ratio), using a DC magnetron sputtering method at room temperature and an Ar gas pressure of 0.2 Pa
Then, a film was formed to a thickness of 0.28 μm. At this time, the thickness of the stress correction film 16 is 0.28 μm, which is the same as that of the multilayer film 12 to be formed.
m, and the stress was −500 MPa in the same direction and the same magnitude so as to cancel out the stress of the multilayer film 12. The flatness of the substrate with a multilayer film obtained here is 90 nm.
Met.

【0071】ガラス基板11の表面上に、実施例1と同
様の多層膜12を成膜し、前記多層膜上に、実施例1と
同様のSiO2膜より構成されるエッチングストッパー
13を成膜した。前記SiO2上に、実施例1と同様の
Ta及びBを含むEUV吸収層14を成膜した。この結
果、多層膜表面の平坦度が100nmという特性を有す
るEUVマスクブランク得ることができた。
On the surface of the glass substrate 11, a multilayer film 12 similar to that of the first embodiment is formed, and on the multilayer film, an etching stopper 13 composed of a SiO 2 film similar to that of the first embodiment is formed. did. The same EUV absorption layer 14 containing Ta and B as in Example 1 was formed on the SiO 2 . As a result, an EUV mask blank having a characteristic that the flatness of the multilayer film surface is 100 nm was obtained.

【0072】このEUVマスクブランクを用いて、実施
例1と同様にEUVマスクを作製した。上記で作製し
た、EUVマスクについて、干渉計により多層膜表面の
平坦度を測定した結果、100nmの高い平坦度を有し
ていることを確認した。さらに、EUVLにおいて露光
転写を行った結果、十分高精度なEUV反射特性を有し
ていることを確認した。
Using this EUV mask blank, an EUV mask was produced in the same manner as in Example 1. As a result of measuring the flatness of the multilayer film surface of the EUV mask manufactured above using an interferometer, it was confirmed that the EUV mask had a high flatness of 100 nm. Furthermore, as a result of performing exposure transfer in EUVL, it was confirmed that the EUVL had sufficiently high precision EUV reflection characteristics.

【0073】(実施例3)図2を参照して本発明の第3
の実施例について説明する。基板11として、実施例1
と同様のガラス基板11を用いた。ただし、このガラス
基板11は機械研磨により0.2nm以下の平滑な表面
と500nmの凸面の平坦度を有している。
(Embodiment 3) Referring to FIG. 2, a third embodiment of the present invention will be described.
An example will be described. Example 1 as the substrate 11
The same glass substrate 11 was used. However, the glass substrate 11 has a smooth surface of 0.2 nm or less and a flatness of 500 nm convex by mechanical polishing.

【0074】ガラス基板11の裏面(多層膜を成膜しな
い側)上に、応力補正膜16としてTaB膜を成膜す
る。TaB膜(但し、Ta:B=75:15(原子数
比))は、DCマグネトロンスパッタ法を用いて、室
温、Arガス圧0.15Paで、0.3μmの厚さに成
膜した。この応力補正膜16の膜厚は、ガラス基板11
の反り(変形)と多層膜12の有する応力の両方を解消
するように−700MPaが得られる値である。
A TaB film is formed as a stress correction film 16 on the back surface of the glass substrate 11 (on the side where no multilayer film is formed). The TaB film (Ta: B = 75: 15 (atomic ratio)) was formed to a thickness of 0.3 μm at room temperature under an Ar gas pressure of 0.15 Pa using a DC magnetron sputtering method. The thickness of the stress compensation film 16 is
−700 MPa is obtained so as to eliminate both the warpage (deformation) and the stress of the multilayer film 12.

【0075】ガラス基板11の表面上に、実施例1と同
様の多層膜12を成膜した。ここで多層膜12の応力は
−500MPaであった。ここで得られた多層膜付き基
板の平坦度は50nmであった。次に、前記多層膜12
上に、実施例1と同様のSiO2膜より構成されるエッ
チングストッパー13を成膜した。最後に、前記SiO
2膜より構成されるエッチングストッパー13上に、実
施例1と同様のTa及びBを含むEUV吸収層14を成
膜した。この結果、多層膜表面の平坦度が60nmとい
う特性を有するEUVマスクブランク得ることができ
た。
On the surface of the glass substrate 11, a multilayer film 12 similar to that of Example 1 was formed. Here, the stress of the multilayer film 12 was -500 MPa. The flatness of the substrate with a multilayer film obtained here was 50 nm. Next, the multilayer film 12
An etching stopper 13 composed of the same SiO 2 film as in Example 1 was formed thereon. Finally, the SiO
On the etching stopper 13 composed of the two films, the same EUV absorption layer 14 containing Ta and B as in Example 1 was formed. As a result, an EUV mask blank having a characteristic that the flatness of the multilayer film surface is 60 nm was obtained.

【0076】このEUVマスクブランクを用いて、実施
例1と同様にEUVマスクを作製した。上記で作製し
た、EUVマスクについて、干渉計により多層膜表面の
平坦度を測定した結果、60nmの高い平坦度を有して
いることを確認した。さらに、EUVLにおいて露光転
写を行った結果、十分高精度なEUV反射特性を有して
いることを確認した。
Using this EUV mask blank, an EUV mask was produced in the same manner as in Example 1. As a result of measuring the flatness of the multilayer film surface of the EUV mask manufactured as described above using an interferometer, it was confirmed that the EUV mask had a high flatness of 60 nm. Furthermore, as a result of performing exposure transfer in EUVL, it was confirmed that the EUVL had sufficiently high precision EUV reflection characteristics.

【0077】以上、実施例1〜3に記載した結果からも
明らかなように、本発明によれば、EUVマスクブラン
ク、多層膜付き基板において、多層膜表面の平坦度を1
00nm以下としたことで、これから製造されたEUV
マスクを用いれば、パターン転写の際に位置ずれの小さ
い、高精度なパターン転写をおこなうことが可能にな
る。また本発明によれば、応力補正膜を成膜したこと
で、多層膜の有する応力および基板自身の反りによって
形成される多層膜表面の反りを補正することができ、可
視光からEUV光にわたる広い波長領域において適用可
能な、高い平坦度をもった多層膜表面を有する多層膜付
き基板、マスクブランク、マスク、および所望の曲率を
有する多層膜ミラーを得ることができる。
As is clear from the results described in Examples 1 to 3, according to the present invention, in the EUV mask blank and the substrate with a multilayer film, the flatness of the multilayer film surface is 1%.
EUV manufactured from this
If a mask is used, it is possible to perform high-precision pattern transfer with small displacement during pattern transfer. Further, according to the present invention, by forming the stress correction film, it is possible to correct the stress of the multilayer film and the warpage of the multilayer film surface formed by the warpage of the substrate itself, and a wide range from visible light to EUV light. A multilayer-coated substrate, a mask blank, a mask, and a multilayer mirror having a desired curvature, which can be applied in the wavelength region and have a multilayer surface with high flatness, can be obtained.

【0078】[0078]

【発明の効果】以上、詳述したように本発明は、基板の
反りと多層膜の有する応力とにより形成される多層膜表
面の反りを補正する応力補正膜を成膜したことで、前記
多層膜の有する応力および基板自身の反りによって形成
される多層膜表面の反りを補正し、高い平坦度をもった
多層膜表面を有する多層膜付き基板、マスクブランクお
よびマスク等を実現したものである。
As described above in detail, according to the present invention, the stress compensation film for compensating the warpage of the surface of the multilayer film formed by the warpage of the substrate and the stress of the multilayer film is formed. The present invention realizes a substrate with a multilayer film, a mask blank, a mask, and the like having a multilayer film surface with high flatness by correcting the stress of the film and the warpage of the multilayer film formed by the warpage of the substrate itself.

【図面の簡単な説明】[Brief description of the drawings]

【図1】実施の形態−1に係る、多層膜付き基板、マス
クブランクおよびマスクの製造フロー
FIG. 1 is a manufacturing flow of a substrate with a multilayer film, a mask blank, and a mask according to Embodiment 1.

【図2】実施の形態−2に係る、多層膜付き基板、マス
クブランクおよびマスクの製造フロー
FIG. 2 is a flowchart of manufacturing a substrate with a multilayer film, a mask blank, and a mask according to the second embodiment.

【図3】従来の実施の形態に係る、マスクブランクおよ
びマスクの概念図(断面図)
FIG. 3 is a conceptual diagram (cross-sectional view) of a mask blank and a mask according to a conventional embodiment.

【図4】従来の実施の形態に係るマスクの概念図(断面
図)
FIG. 4 is a conceptual diagram (cross-sectional view) of a mask according to a conventional embodiment.

【図5】本発明における平坦度の定義を説明するための
概念図
FIG. 5 is a conceptual diagram for explaining the definition of flatness in the present invention.

【図6】本発明に係るマスクを用いて、Si基板上にE
UV光によるパターン転写をおこなっている概念図
FIG. 6 shows an example of using a mask according to the present invention to form an E
Conceptual diagram of pattern transfer by UV light

【符号の説明】[Explanation of symbols]

11 ガラス基板 12 多層膜 13 エッチングストッパー 14 吸収層 15 応力補正膜 16 応力補正膜 21 基板 22 多層膜 23 エッチングストッパー 24 吸収層 31 基板表面 32 焦平面 41 レーザープラズマX線源 42 マスク 43 縮小反射光学系 44 ウエハ DESCRIPTION OF SYMBOLS 11 Glass substrate 12 Multilayer film 13 Etching stopper 14 Absorption layer 15 Stress correction film 16 Stress correction film 21 Substrate 22 Multilayer film 23 Etching stopper 24 Absorption layer 31 Substrate surface 32 Focal plane 41 Laser plasma X-ray source 42 Mask 43 Reduction reflection optical system 44 wafer

フロントページの続き (51)Int.Cl.7 識別記号 FI テーマコート゛(参考) G02B 5/28 G03F 1/16 A G03F 1/16 7/20 503 7/20 503 H01L 21/30 531M Fターム(参考) 2H042 AA15 AA25 DA08 DA12 DA15 DA22 DB02 DE00 2H048 CA05 CA13 CA17 CA24 CA29 FA05 FA09 FA18 FA22 FA24 GA04 GA11 GA24 GA33 GA61 2H095 BA01 BA10 BC24 BC26 2H097 CA15 GB00 LA10 5F046 GB01 GD05 GD10 GD16 Continued on the front page (51) Int.Cl. 7 Identification symbol FI Theme coat II (reference) G02B 5/28 G03F 1/16 A G03F 1/16 7/20 503 7/20 503 H01L 21/30 531M F term (reference) ) 2H042 AA15 AA25 DA08 DA12 DA15 DA22 DB02 DE00 2H048 CA05 CA13 CA17 CA24 CA29 FA05 FA09 FA18 FA22 FA24 GA04 GA11 GA24 GA33 GA61 2H095 BA01 BA10 BC24 BC26 2H097 CA15 GB00 LA10 5F046 GB01 GD05 GD10 GD16

Claims (15)

【特許請求の範囲】[Claims] 【請求項1】 基板上にEUV光を反射する多層膜を有
し、前記多層膜上に前記EUV光を吸収する光吸収層を
有するEUV露光用反射型マスクブランクであって、 前記多層膜表面の平坦度が100nm以下であることを
特徴とするEUV露光用反射型マスクブランク。
1. A reflective mask blank for EUV exposure, comprising a multilayer film for reflecting EUV light on a substrate, and a light absorbing layer for absorbing the EUV light on the multilayer film, wherein the surface of the multilayer film is A reflective mask blank for EUV exposure, wherein the flatness of the mask is 100 nm or less.
【請求項2】 基板上にEUV光を反射する多層膜を有
し、前記多層膜上に前記EUV光を吸収する光吸収層を
有するEUV露光用反射型マスクブランクであって、 前記基板の反りと、前記多層膜の有する応力とにより形
成される前記多層膜表面の反りとを補正するための応力
補正膜を有することを特徴とするEUV露光用反射型マ
スクブランク。
2. A reflective mask blank for EUV exposure, comprising a multilayer film on a substrate for reflecting EUV light, and a light absorbing layer on the multilayer film for absorbing the EUV light, wherein the substrate is warped. A reflective mask blank for EUV exposure, comprising: a stress correction film for correcting warpage of the surface of the multilayer film formed by the stress of the multilayer film.
【請求項3】 前記基板と前記多層膜の間に、引っ張り
応力を有する前記応力補正膜を設けたことを特徴とする
請求項2に記載のEUV露光用反射型マスクブランク。
3. The reflective mask blank for EUV exposure according to claim 2, wherein the stress correction film having a tensile stress is provided between the substrate and the multilayer film.
【請求項4】 前記基板の背面に、圧縮応力を有する前
記応力補正膜を設けたことを特徴とする請求項2に記載
のEUV露光用反射型マスクブランク。
4. The reflective mask blank for EUV exposure according to claim 2, wherein the stress correction film having a compressive stress is provided on a back surface of the substrate.
【請求項5】 前記応力補正膜が、Taを含む材料であ
ることを特徴とする請求項2ないし4のいずれかに記載
のEUV露光用反射型マスクブランク。
5. The reflective mask blank for EUV exposure according to claim 2, wherein the stress correction film is made of a material containing Ta.
【請求項6】 前記応力補正膜が、Taを主成分とし少
なくともBを含む材料であることを特徴とする請求項5
に記載のEUV露光用反射型マスクブランク。
6. The stress compensation film according to claim 5, wherein the stress compensation film is a material containing Ta as a main component and containing at least B.
4. The reflective mask blank for EUV exposure according to 1.
【請求項7】 請求項1ないし6のいずれかに記載のE
UV露光用反射型マスクブランクを用いて製作したこと
を特徴とするEUV露光用反射型マスク。
7. The E according to claim 1, wherein
A reflective mask for EUV exposure, manufactured using a reflective mask blank for UV exposure.
【請求項8】 請求項1ないし6のいずれかに記載のE
UV露光用反射型マスクブランクを用いて製作したこと
を特徴とするEUV露光用反射型マスクの製造方法。
8. The E according to claim 1, wherein
A method for manufacturing a reflective mask for EUV exposure, which is manufactured using a reflective mask blank for UV exposure.
【請求項9】 請求項7に記載したEUV露光用反射型
マスクを用いて基板上にパターンを転写することを特徴
とする半導体の製造方法。
9. A method for manufacturing a semiconductor, comprising: transferring a pattern onto a substrate using the reflective mask for EUV exposure according to claim 7. Description:
【請求項10】 基板上にEUV光を反射する多層膜を
有する多層膜付き基板であって、前記多層膜表面の平坦
度が100nm以下であることを特徴とする多層膜付き
基板。
10. A substrate with a multilayer film having a multilayer film that reflects EUV light on the substrate, wherein the flatness of the surface of the multilayer film is 100 nm or less.
【請求項11】 基板上にEUV光を反射する多層膜を
有する多層膜付き基板であって、前記基板の反りと前記
多層膜の有する応力とにより形成される前記多層膜表面
の反りを補正する、応力補正膜を有することを特徴とす
る多層膜付き基板。
11. A substrate with a multilayer film having a multilayer film reflecting EUV light on the substrate, wherein the warpage of the surface of the multilayer film formed by the warpage of the substrate and the stress of the multilayer film is corrected. A substrate with a multilayer film, comprising a stress compensation film.
【請求項12】 請求項10または11に記載した多層
膜付き基板を用いて製作したことを特徴とするEUV反
射ミラー。
12. An EUV reflection mirror manufactured using the substrate with a multilayer film according to claim 10.
【請求項13】 基板上に光を反射する多層膜を有し、
前記多層膜上に前記光を吸収する光吸収層を有する露光
用反射型マスクブランクであって、 前記多層膜表面の平坦度が100nm以下であることを
特徴とする露光用反射型マスクブランク。
13. A multi-layer film for reflecting light on a substrate,
A reflective mask blank for exposure having a light absorbing layer for absorbing the light on the multilayer film, wherein the flatness of the surface of the multilayer film is 100 nm or less.
【請求項14】 基板と、前記基板上に形成されて光を
反射する多層膜と、前記多層膜上に形成されて前記光を
吸収する光吸収層と、応力補正膜とを有する露光用反射
型マスクブランクであって、 前記応力補正膜は、前記応力補正膜が形成されない場合
に多層膜表面に生じる反りを補正するものであることを
特徴とする露光用反射型マスクブランク。
14. An exposure reflector comprising: a substrate; a multilayer film formed on the substrate to reflect light; a light absorbing layer formed on the multilayer film to absorb the light; and a stress correction film. A reflective mask blank for exposure, wherein the stress correction film corrects a warp generated on a multilayer film surface when the stress correction film is not formed.
【請求項15】 請求項13または14に記載の露光用
反射型マスクブランクを用いて製作したことを特徴とす
る露光用反射型マスク。
15. An exposure reflective mask manufactured using the reflective mask blank for exposure according to claim 13. Description:
JP2001351650A 2000-11-22 2001-11-16 SUBSTRATE WITH MULTILAYER FILM, REFLECTIVE MASK BLANK FOR EXPOSURE, REFLECTIVE MASK FOR EXPOSURE AND ITS MANUFACTURING METHOD, AND SEMICONDUCTOR MANUFACTURING METHOD Expired - Lifetime JP3939132B2 (en)

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JP2006049910A (en) * 2004-08-06 2006-02-16 Schott Ag Method of producing mask blank for photolithographic application and the mask blank
JP2006245259A (en) * 2005-03-03 2006-09-14 Toppan Printing Co Ltd Stencil mask blank, stencil mask and manufacturing method thereof, and pattern exposure method
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JP2008109060A (en) * 2005-11-10 2008-05-08 Asahi Glass Co Ltd Method for depositing reflective multilayer film of reflective mask blank for euv lithography and method for producing reflecting mask blank for euv lithography
JPWO2006049022A1 (en) * 2004-11-04 2008-05-29 旭硝子株式会社 Ion beam sputtering apparatus and method for forming multilayer film of reflective mask blank for EUV lithography
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