JP2002217782A - Rake receiver and its method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a RAKE reception method by which an excellent reception characteristic can be obtained under any communication environment. SOLUTION: A flip-flop 51(1) stores information denoting timing when a maximum correlation power appears, and flip-flop circuits 51(2)-51(15) sequentially store information denoting timing when 2nd-15th largest correlation power appears. The information stored in the flip-flop 51(1) is outputted as timing information corresponding to a 1st valid path. A mask circuit 52 sets a mask range depending on the communication environment. The information stored in the earliest stage of the flip-flop circuits 51(2)-51(15) is acquired as information corresponding to the timing placed at the outside of the mask range. The acquired information is outputted as timing information corresponding to the 2nd valid path.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an apparatus and method for RAKE reception in spread spectrum communication, and more particularly to an apparatus and method for determining an effective path to be used in RAKE combining.

[0002]

2. Description of the Related Art In recent years, mobile communication has been rapidly spread, and various techniques for this purpose have been researched and developed.

[0003] In mobile communications, as is well known to those skilled in the art, the phase and amplitude of a signal vary randomly depending on the speed and carrier frequency of the mobile, and
Fading occurs. Therefore, in mobile communication, it is more difficult to receive wireless signals stably than in communication in which the position of each communication device is fixed.

[0004] A spread spectrum communication system is effective as a method for reducing the influence of the above-described frequency selective fading in mobile communication. In spread spectrum communication, a signal to be transmitted is spread to a wideband signal and then transmitted to a wireless network. Therefore, even if the received electric field strength decreases in a specific frequency band, a signal can be reproduced from another frequency band. It has become. As the spread spectrum communication system, a direct spread system, a frequency hopping system, and the like are known.

[0005] In wireless communication, a receiver not only directly receives a signal wave transmitted from a transmitter, but also receives a reflected wave from a high-rise building or a mountain. Here, the propagation time of these reflected waves depends on the path. Therefore, the receiver usually receives a plurality of delayed waves. Note that such a communication environment is often called a “multipath fading environment”. In a multipath fading environment, assuming that the direct spreading method is employed, each delayed wave acts as an interference wave with respect to a spreading code, thereby deteriorating reception characteristics.

[0006] As a technique for avoiding deterioration of reception characteristics due to multipath fading, RAKE reception is known. RAKE reception is a technique for positively using the above-mentioned delayed waves in order to improve reception characteristics. Specifically, R
In AKE reception, a plurality of delayed waves are respectively despread,
By appropriately adding the results of the plurality of despreading processes, demodulated signals corresponding to the plurality of delayed waves are synthesized. Then, transmission data is reproduced from the synthesized signal.

FIG. 16 is a configuration diagram of an existing RAKE receiving circuit. Here, a three-finger configuration is assumed. The I-channel signal and the Q-channel signal are signals obtained by decomposing a received signal into components orthogonal to each other.

The received signals (I channel signal and Q channel signal) are applied to a path search section and a demodulation / RAKE combining section. In the path search unit, first, the matched filter 501 detects a correlation value indicating the correlation between the received signal and the spread code. The correlation value is detected one after another at intervals shorter than the chip period. Therefore, the correlation value output from the matched filter 501 changes every moment. The peak detection circuit 503 detects the peak of the correlation value (the timing at which the correlation value becomes maximum and its value). The sorting circuit 504 selects three peaks having a large correlation value from a plurality of peaks detected by the peak detecting circuit 503, for example, for each period of the spreading code. Then, the timing generation circuit 505 generates path timing information indicating the timing of the three peaks detected by the sorting circuit 504, and delay amount information indicating the time difference between the timings of the three peaks, and modulates the modulated / RA data.
Provided to the KE synthesis unit. The path search unit includes an integration circuit 502 for averaging the correlation values of periodically appearing peaks in order to improve the detection accuracy of the peak timing of the correlation value.

A despreading circuit 511, a demodulation circuit 512, and a delay circuit 513 are provided for each finger. Despreading circuit 5
11 generates a spread code in accordance with the path timing information provided from the timing generation circuit 505, and despreads the received signal using the spread code. The demodulation circuit 512 demodulates the symbol data of the I channel and the Q channel obtained by the despreading process. The delay circuit 513 delays the output of the demodulation circuit 512 according to the delay amount information provided from the timing generation circuit 505. The adding circuit 514 combines the outputs of the delay circuit 513. Then, transmission data is reproduced from the combined signal.

As described above, in the existing RAKE receiving circuit, a plurality of correlation value peaks are detected, and the signals received via different paths are combined using the timing of the plurality of correlation value peaks. Then, data is reproduced from the synthesized signal. Therefore, even under a multipath fading environment, deterioration of reception characteristics is avoided.

[0011]

The difference in delay time between paths in a multipath environment depends on the communication environment. For example, as shown in FIG. 17A, in a suburban area where a signal wave is reflected by a mountain or the like, the difference between the delay times of the respective paths is considered to be relatively large. In this case, the peak of the correlation value representing the correlation between the received signal and the spreading code is as shown in FIG.
As shown in (a), detection is made for each path (paths 1 to 3).

On the other hand, as shown in FIG. 17B, in an urban area where a signal wave is reflected by a nearby high-rise building or the like, the difference in delay time of each path is considered to be small. In this case, the timings of the correlation value peaks corresponding to the plurality of paths are close to each other. In the example shown in FIG.
The timings of the correlation value peaks corresponding to pass 1 and pass 2 are close to each other. However, if a plurality of correlation value peaks are temporally close to each other, the peak detection circuit 50
No. 3 can detect only one correlation value peak although there are actually a plurality of correlation value peaks (correlation value peaks corresponding to path 1 and path 2). If the correlation value peak cannot be detected correctly, the characteristics (S / N ratio, etc.) of the synthesized signal obtained by synthesizing the signals obtained for each finger are degraded. In the above situation, for example, DLL (Delay Locked)
Even if Loop) is used, it is difficult to accurately supplement each path.

As described above, in the method of performing RAKE combining using the timing at which the correlation value peak occurs, the reception characteristics may not be improved in a communication environment where the difference in delay time between the paths is small.

An object of the present invention is to provide a RAKE receiving method capable of obtaining good receiving characteristics in any communication environment.

[0015]

SUMMARY OF THE INVENTION A RAKE receiving apparatus according to the present invention is an apparatus for despreading and combining signals received via a plurality of paths, and generating correlation power by despreading a received signal. Generating means, a detecting means for detecting a timing at which the maximum correlation power to the Nth largest correlation power appears, a setting means for setting a mask range determined based on a communication environment, a time difference between the detected timing and the There are determining means for determining a plurality of valid paths based on the mask range, and combining means for combining the determined plurality of valid paths.

In a multipath environment, the correlation power caused by a signal received via each path appears in a predetermined time range. For this reason, when combining effective paths that are close to each other, the same noise may overlap, and the reception characteristics may be degraded. Therefore, when the correlation powers corresponding to the respective paths are discretely distributed, signals adjacent to each other should not be combined. On the other hand, when there are a plurality of paths having a small delay time difference from each other, it is necessary to combine signals that are close to each other in order to improve the reception characteristics by combining the paths.

Therefore, in the RAKE receiving apparatus of the present invention, the mask range is determined based on the communication environment, and the interval of the effective path to be used for RAKE combining is limited using the mask range. This makes it possible to appropriately select an effective path that improves reception characteristics in consideration of the communication environment. That is, good reception characteristics can be obtained in any communication environment.

The mask range may be fixedly set according to the predicted communication environment, or may be dynamically changed according to the communication state. When the mask range is dynamically changed, for example, the change is performed based on the profile of the correlation power.

[0019]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a configuration diagram of a wireless communication apparatus using a RAKE receiving method according to an embodiment of the present invention. Here, a system in which data is transmitted by direct spread spectrum spread spectrum communication is assumed.

The encoder 1 encodes transmission data. Here, “code” is not particularly limited, but for example, error correction coding, audio coding, image coding, and the like are assumed. The mapping circuit 2 modulates the output of the encoder 1 and spreads data obtained by the modulation. Here, “modulation” is, for example, QPSK. Note that in QPSK, data is arranged and transmitted at corresponding signal points on the phase plane. At this time, this signal point is represented by an I component and a Q component on a phase plane. “Spreading” is a process of multiplying modulated data (in QPSK, I component data and Q component data) by a spreading code.

The output of the mapping circuit 2 is supplied to a D / A converter 4 after passing through a waveform shaping filter 3. D
The / A converter 4 converts the output (spread I component data and Q component data) of the mapping circuit 2 into an analog signal. The orthogonal modulation circuit 5 synthesizes a set of analog signals orthogonal to each other. The frequency conversion circuit 6 converts an IF band signal output from the quadrature modulation circuit 5 into an RF band signal. Then, the output of the frequency conversion circuit 6 is transmitted to the wireless network using the antenna 11.

On the other hand, a radio signal transmitted from another radio communication device is received by the antenna 11. Then, the signal received by the antenna 11 is provided to the frequency conversion circuit 21. The signal transmitted from the wireless communication device and the signal transmitted from another wireless communication device are appropriately separated by the duplexer 12.

The frequency conversion circuit 21 converts an RF band received signal into an IF band signal. The quadrature detection circuit 22
The output of the frequency conversion circuit 21 is converted into a set of analog signals orthogonal to each other. This set of analog signals corresponds to spread I component data and Q component data. A
The / D converter 23 converts the output of the quadrature detection circuit 22 into digital data, and supplies the conversion result to the path search circuit 24 and the demodulation / RAKE combining circuit 25.

The path search circuit 24 includes an A / D converter 23
, A predetermined number of valid paths to be used in RAKE combining are detected. In this embodiment, three valid paths are detected. The demodulation / RAKE combining circuit 25 despreads the received signal for each effective path detected by the path search circuit 24, and further demodulates the result of the despreading process. Note that the despreading process and the demodulation process correspond to the spreading process and the modulation process performed in the mapping circuit 2, respectively. And
The demodulated signals obtained for the respective effective paths are combined in consideration of the delay time of each path. The configurations and operations of the path search circuit 24 and the demodulation / RAKE combining circuit 25 will be described later in detail.

The decoder 26 reproduces data from the output of the demodulation / RAKE combining circuit 25. The decoder 26
Corresponds to the operation of the encoder 1. In the wireless communication apparatus having the above configuration, the RAKE receiving method of the present embodiment is performed in the path search circuit 24 and the demodulation / RAKE combining circuit 25.

FIG. 2 shows the path search circuit 24 and the demodulation /
3 is a configuration diagram of a RAKE combining circuit 25. FIG. Here, RA
KE shall be 3 fingers. That is, it is assumed that signals of three effective paths are extracted and the signals are combined. Note that the path search circuit 24 and the demodulation / RAKE combining circuit 25 of the present embodiment are based on the existing circuit shown in FIG. However, the path search circuit 24 of the present embodiment includes a sort circuit 31 and a valid path determination circuit 32 instead of the peak detection circuit 503 and the sort circuit 504 provided in the existing circuit.

The received signals (I-channel signal and Q-channel signal) are supplied to a path search circuit 24 and a demodulator / RAKE.
It is provided to the synthesis circuit 25. This received signal is the output of the A / D converter 23 shown in FIG. Note that the A / D converter 23 operates in the 4 × oversampling mode. That is, the A / D converter 23 samples the input analog signal at intervals of a quarter of the chip period, and converts the analog signal into digital data each time and outputs it. Here, the “chip cycle” refers to the time allocated to each chip constituting the spreading code. Further, the sampling period of the A / D converter 23 (that is, a quarter of the chip period) is referred to as “sampling time”.

In the path search circuit 24, first, the correlation between the received signal and the spread code is detected by the matched filter 501. The matched filter 501 includes a predetermined number of shift registers, and sequentially stores digital signals output from the A / D converter 23. Each time a new signal is supplied to the shift register, that is, every sampling time, the signal stored in the shift register is multiplied by the spread code to represent the correlation between the received signal and the spread code. Generate correlation values. As described above, the matched filter 501 outputs the correlation value indicating the correlation between the received signal and the spreading code for each sampling time.

In this embodiment, QP is used as the modulation method.
It is assumed that SK has been adopted. In this case, the matched filter 501 detects a correlation value for each of the I channel signal and the Q channel signal. And
By calculating the sum of squares of the set of correlation values, correlation power (or reception power) is detected.

FIG. 3 is a block diagram of the matched filter 501. Shift registers 41a and 41b store an I channel signal and a Q channel signal, respectively. The multiplication circuits 42a and 42b calculate correlation values by multiplying the signals stored in the shift registers 41a and 41b by the spreading codes, respectively. Then, the power detection circuit 43 includes the multiplication circuits 42a and 42b
The correlation power is obtained by calculating the sum of squares of each correlation value generated by Note that the output of the power detection circuit 43 is provided to the sort circuit 31 as “power information”.

The timing counter 44 counts up by a clock generated every sampling time. Then, the count value of the timing counter 44 is given to the sorting circuit 31 as “timing information”.

As described above, the matched filter 501 is
Power information and timing information are generated for each sampling time. Note that the timing information does not necessarily need to be generated in the matched filter 501, and may be generated in the sort circuit 31.

The sort circuit 31 monitors the power information and the timing information for a certain period. Then, during that period, a predetermined number of timings with a large correlation power are detected. For example, in the example shown in FIG. 4, "6" is obtained as the timing at which the maximum power is obtained, "7" is obtained as the timing at which the second power is obtained, and "5" is obtained as the timing at which the third power is obtained. . The certain period is, for example, a cycle of a spreading code. Further, FIG. 4 schematically shows the correlation power, but the timing information and the power information are stored in a table provided on a memory, for example, as shown in FIG. By searching this table, a predetermined number of timings having a large correlation power are extracted.

Further, the sorting circuit 31 sorts and outputs the detected timing information in the order of the largest correlation power. At this time, power information corresponding to each timing information is output together. Thus, the sort circuit 31
Sorts and outputs timing information and power information in descending order of correlation power.

In this embodiment, considering that RAKE has a three-finger configuration, the sort circuit 31
Assume that set timing information and power information are detected. That is, the three before and after the impulse response
Assuming that power appears until the sampling time,
It is necessary to monitor the correlation power for each path for 7 sampling times. As a result, assuming that the correlation power is monitored for each of the three valid paths for seven sampling times, 21 sets of timing information and power information are detected. However, for the path having the smallest correlation power among the three effective paths, it is considered sufficient to detect only the peak thereof. Therefore, seven sets of timing information and power information are detected for the first and second paths, and one set of timing information and power information is detected for the third path.
Thereby, 15 sets of timing information and power information are detected.

The valid path determination circuit 32 includes a sort circuit 31
Based on the 15 sets of timing information and power information detected by
The valid paths of the book are determined, and valid path information corresponding to those valid paths is output. Here, the valid path information is represented using, for example, the above-described timing information. The configuration and operation of the valid path determination circuit 32 will be described later in detail.

The timing generation circuit 505 modulates path timing information indicating the timing of the three valid paths determined by the valid path determination circuit 32 and delay amount information indicating the difference between the delay amounts of the three valid paths. / RAKE synthesis circuit 25.

The path search circuit 24 includes an integrating circuit 502 for averaging the correlation value or the correlation power in order to improve the timing detection accuracy. The demodulation / RAKE combining circuit 25 can basically use an existing circuit. That is, the despreading circuit 511, the demodulation circuit 512,
The delay circuit 513 is provided for each valid path. The despreading circuit 511 generates a spread code according to the path timing information provided from the timing generation circuit 505, and despreads the received signal using the generated spread code. The demodulation circuit 512 demodulates the symbol data of the I channel and the Q channel obtained by the despreading process. The delay circuit 513 delays the output of the demodulation circuit 512 according to the delay amount information provided from the timing generation circuit 505. The addition circuit 514 includes:
The output of the delay circuit 513 is synthesized. Then, transmission data is reproduced from the combined signal.

One feature of the present invention in the path search circuit 24 and the demodulation / RAKE combining circuit 25 having the above configuration is a method for determining an effective path. Hereinafter, the concept of a method of determining a predetermined number of valid paths in the valid path determination circuit 32 will be described.

In RAKE combining, it is basically desirable to combine signals received via a path having a large correlation power. Therefore, in a RAKE receiving circuit having a three-finger configuration, good reception characteristics should be obtained by detecting three timings at which the correlation power becomes large and despreading and combining the received signals at each of the detected timings. It is.

However, actually, when the effective path is determined based only on the magnitude of the correlation power, the following problem occurs.
For example, in the example shown in FIG. 4, "time 6" is set as the timing at which the second, third largest correlation power is obtained.
"Time 7" and "Time 5" are detected. However, considering the characteristics of the roll-off filter, the correlation power appearing during the period from time 2 to time 10 is considered to be due to the signal at time 6. That is, time 5, time 6,
The correlation power appearing at time 7 is considered to be due to a signal transmitted via a specific path. Therefore, if the signals obtained by despreading the received signals at time 5, time 6, and time 7 are combined,
Since noise generated in a specific path is superimposed, the S / N ratio may be deteriorated by RAKE combining. Note that the roll-off filter is a filter for avoiding intersymbol interference, and is shown in FIG.
It is assumed that the impulse response is designed to be zero when separated by one chip period as shown in FIG. The roll-off filter is provided, for example, between the frequency conversion circuit 21 and the quadrature detection circuit 22.

In order to cope with this problem, the detection of the effective path should not be performed in the vicinity of the timing when the large correlation power appears. For example, in the example shown in FIG. 4, since a large correlation power appears at time 6,
In a predetermined period before and after the time 6, detection of a valid path is not performed. Here, assuming that the above-described roll-off filter is used, the correlation power caused by a signal received through a certain path is almost present at a timing one chip cycle time (ie, four sampling times) away from the signal. Disappears. Therefore, in this case, for example, “3 sampling times” is set as the predetermined period. By introducing this configuration, noise generated in a specific path is not superimposed, so that deterioration of the S / N ratio is avoided.

Incidentally, the delay time (signal propagation time) of each path depends on the communication environment. Then, in an environment where the difference between the delay times of the paths is small, as shown in FIG.
Correlated powers resulting from signals received via paths 1 to 4 overlap each other. In this case, the sort circuit 31
Detects, in order, the timings with the largest combined power drawn by the solid line in FIG. In this example, the largest to fifth largest correlation powers are detected at time 6, time 7, time 8, time 9, and time a. Then, assuming that no valid path is detected within three sampling times from the timing at which the maximum correlation power appears (that is, time 6), time 7, time 8, and time 9 are not determined to be valid path timings. a is determined to be the second valid path timing.

In this case, the effect of avoiding the superposition of specific noises is expected, but the effect of properly combining signals received via mutually adjacent paths cannot be enjoyed. In an environment in which the difference between the delay times of the paths is small, the disadvantage of the latter effect is usually greater than that of the former effect. Therefore, in such a communication environment, an effective path should be detected even near the timing when a large correlation power appears.

In the RAKE receiving method according to the present embodiment, the criterion for detecting an effective path to be used in RAKE receiving is changed in accordance with the communication environment in consideration of the above-described problem. Hereinafter, an embodiment of a method for detecting a valid path will be described. First Embodiment FIG. 8 is a configuration diagram of an effective path determination circuit in the first embodiment. The valid path determination circuit 32 determines three valid paths to be used in RAKE combining by using a preset mask width.

The flip-flop circuits 51 (1) to 51 (15)
Stores 15 sets of timing information selected by the sort circuit 31. Here, timing information indicating the timing at which the correlation power becomes maximum is stored in the flip-flop circuit 51 (1).
Each piece of timing information representing the fifth largest timing is stored in each of the flip-flop circuits 51 (2) to 51 (15).

In mask circuits 52 and 53, a predetermined mask width is set. Here, the mask width is
For example, it is determined based on a communication environment in which the wireless communication device is used. Specifically, in an environment where a path with a small difference in delay time is likely to exist (such as an urban area), a small mask width is set, and in an environment where a path with a large difference in delay time is likely to exist (such as a suburban area). , A large mask width is set. As an example, “2 sampling times” are set in an urban area, and “3 sampling times” are set in a suburban area.

The mask circuit 52 sets a predetermined mask range for the timing information stored in the flip-flop circuit 51 (1), and sets the predetermined mask range.
It is determined whether or not the timing information stored in is stored within the mask range. At this time, if the timing information stored in the flip-flop circuit 51 (2) is within the mask range, the mask circuit 52 outputs a pulse signal. This pulse signal is supplied to the flip-flop circuits 51 (2) and also supplied to the flip-flop circuits 51 (3) to 51 (15) via the OR circuit 55. Then, the timing information stored in the flip-flop circuits 51 (3) to 51 (15) is shifted to the preceding flip-flop circuit by the pulse signal. On the other hand, the flip-flop circuit 51
If the timing information stored in (2) is outside the mask range, the mask circuit 52 does not output a pulse signal.

The operation of the mask circuit 53 is basically the same as that of the mask circuit 52. However, the mask circuit 53 sets a predetermined mask range for the timing information selected by the selection circuit 54, and
It is checked whether the timing information stored in (3) is located within the mask range. Here, the selection circuit 54
Selects the output of the flip-flop circuit 51 (1) or the output of the flip-flop circuit 51 (2) according to selection information (not shown). The output of the mask circuit 53 is output to the OR circuit 5.
5, the flip-flop circuits 51 (3) to 51 (15) are provided, but not to the flip-flop circuit 51 (2).

Next, the operation of the valid path determination circuit 32 having the above configuration will be described. The valid path determination circuit 32 determines three valid paths according to the following procedure. First, the timing at which the correlation power is maximum (maximum timing) is determined as the effective path timing. That is, the timing information stored in the flip-flop circuit 51 (1) is output as "effective timing information 1".

Subsequently, it is determined whether or not the timing at which the second largest correlation power is obtained (second timing) is the effective path timing. In this case, a mask range is set for the maximum timing, and it is determined whether the second timing is located within the mask range. This determination is performed by the mask circuit 52. And the second
If the position timing is outside the mask range,
The second timing is determined as the effective path timing. That is, the timing information stored in the flip-flop circuit 51 (2) is output as "valid timing information 2".

On the other hand, when the second timing is within the mask range, the mask circuit 52 generates a pulse signal. Thereby, the flip-flop circuits 51 (3) to
The timing information stored in 51 (15) is shifted to the preceding flip-flop circuit, and the third-order timing is stored in flip-flop circuit 51 (2). At this time, the timing information indicating the second timing is discarded. Then, it is determined whether or not the third timing is a valid path timing. That is, it is determined whether or not the third timing is within the mask range.

At this time, if the third timing is outside the mask range, the third timing is determined to be a valid path timing and is output as "valid timing information 2". On the other hand, if the third timing is within the mask range, the above processing is repeated until a valid path is detected. As a result, the second valid path is determined.

The method for determining the third valid path is basically the same as the method for determining the second valid path.
However, when determining the third effective path, a mask range is set for each timing of the two previously determined effective paths. That is, when the selection circuit 54 selects the output of the flip-flop circuit 51 (1), 1
A mask range is set for the timing of the valid path, and it is checked whether or not the timing represented by the timing information stored in the flip-flop circuit 51 (3) is within the mask range. When the selection circuit 54 selects the output of the flip-flop circuit 51 (2), a mask range is set for the timing of the second valid path, and the timing stored in the flip-flop circuit 51 (3) is set. It is checked whether the timing represented by the information is located within the mask range. When the timing represented by the timing information stored in the flip-flop circuit 51 (3) is outside the mask ranges of both, the timing is determined to be the timing of the valid path, and the "valid path information 3 ".

FIG. 9 is a configuration diagram of the mask circuit. The adder 61 adds the mask width M to the timing information T1, and the subtractor 62 subtracts the mask width M from the timing information T1. Here, the timing information T1 is an output of the flip-flop circuit 51 (1) in the mask circuit 52, and is an output of the selection circuit 54 in the mask circuit 53. The comparison circuit 63 compares the output of the adder 61 with the timing information T2, and outputs "H" when the output of the adder 61 is larger. On the other hand, the comparison circuit 64
Compares the output of the subtractor 62 with the timing information T2, and outputs "H" when the output of the subtractor 62 is smaller. Here, the timing information T2 is the output of the flip-flop circuit 51 (2) in the mask circuit 52, and the flip-flop circuit 51 (2) in the mask circuit 53.
This is the output of (3). Then, the AND circuit 65 calculates the logical product of the outputs of the comparison circuits 63 and 64.

The above circuit sets a mask range for the timing information T1, and determines whether or not the timing information T2 is located within the mask range. Next, a specific example will be described with reference to FIGS. FIG.
In FIG. 7 and FIG. 7, reference numerals “1” to “15” attached to the graph representing the correlation power indicate the order of the magnitude of the correlation power. That is, "1" represents the maximum timing,
Hereinafter, “2” to “15” are the second timing to the fifteenth
Indicates the position timing.

The example shown in FIG. 4 shows the correlation power in a radio communication device used in a suburban area. It is also assumed that “mask width = 3” is set in the mask circuits 52 and 53.

First, the maximum timing is determined to be the timing of the first valid path. That is, “time 6” is 1
It is determined that the timing is for the th valid path. And
A mask range is set for “time 6”. here,
The mask width is “3”. Therefore, "time 3"
"Time 9" is the mask range.

Next, "time 7" which is the second timing
Is determined to be located in the mask range. Here, “time 7” is located within the mask range.
Similarly, “time 6”, which is the third timing, is also located within the mask range. However, “time k” which is the fourth timing is located outside the mask range. Therefore, “time k” is determined to be the timing of the second valid path. Then, a mask range is set for “time k”. Accordingly, “time h” to “time n” are also included in the mask range.

Thereafter, the third valid path is detected in the same procedure as when the second valid path is detected. in this case,
The fifth and sixth timings are located in the mask range corresponding to the first valid path. Also,
The seventh and eighth timings are located in the mask range corresponding to the second valid path. However, “time u”, which is the ninth timing, is located outside the two mask ranges. Therefore, “time u” is determined to be the timing of the third valid path.

As a result, as effective path information 1 to 3,
"Time 6", "time k", and "time u" are output. The example illustrated in FIG. 7 illustrates the correlation power in a wireless communication device used in an urban area. Further, the mask circuits 52, 5
It is assumed that “mask width = 2” is set in 3.

First, "time 6" which is the maximum timing is determined as the timing of the first valid path. And
A mask range is set for “time 6”. However,
In this example, the mask width is “2”. Therefore,
"Time 4" to "Time 8" are the mask range.

Subsequently, a second valid path is searched. In this example, the second and third timings are located within the mask range. Therefore, “time a”, which is the fourth timing, is determined to be the timing of the second valid path. Then, a mask range is set for “time a”. Accordingly, “time 8” to “time c” also become the mask range.

Thereafter, a third valid path is searched. In this example, the fifth and sixth timings are located in the mask range corresponding to the second valid path. Therefore, “time d”, which is the seventh timing, is determined to be the timing of the third valid path.

As a result, as the valid path information 1 to 3,
"Time 6", "time a", and "time d" are output. As described above, in the first embodiment, the mask range is set according to the predetermined mask width, and the effective path is determined using the mask range. In contrast, in the embodiment described below, the mask range is dynamically determined according to the communication environment (or the communication state). Second Embodiment In the second embodiment, the mask range is determined according to the communication environment (or the communication state). Then, this communication environment is recognized based on the profile of the correlation power. That is, the mask width is dynamically determined based on the profile of the correlation power.

For example, in an environment where the delay time difference between the paths is large, the correlation power corresponding to each path is discretely distributed as shown in FIG. Then, when a roll-off filter or the like is provided, the correlation power becomes sufficiently small when it is about three sampling times from the peak timing. Therefore, when the correlation power at the timing three sampling times away from the peak timing is sufficiently small compared to the peak of the correlation power, the wireless communication apparatus is placed in an environment where the delay time difference between the paths is large. Can be regarded as being. In this case, if signals having timings close to each other are combined, the reception characteristics deteriorate due to the superposition of the same noise, so that it is necessary to widen the mask range.

On the other hand, in an environment where the difference between the delay times of the paths is small, as shown in FIG. 7, the correlation powers corresponding to a plurality of paths overlap, so that the combined correlation power changes slowly. For this reason, the correlation power remains relatively large even if it is about three sampling times from the peak timing. Therefore, when the correlation power at the timing three sampling times away from the peak timing is relatively large compared to the peak of the correlation power, the wireless communication apparatus is placed in an environment in which the delay time difference between the paths is small. Can be considered to be. In this case, if signals at timings close to each other are combined, signals of different paths are combined to improve reception characteristics. Therefore, it is advantageous to narrow the mask range to some extent.

The valid path determination circuit according to the second embodiment utilizes the above-described characteristics. Hereinafter, the configuration and operation of the valid path determination circuit according to the second embodiment will be described. FIG. 10 is a configuration diagram of an effective path determination circuit according to the second embodiment. The valid path determination circuit 32 uses a mask width that dynamically changes according to the communication environment to use in RAKE combining.
Determine the valid path for the book.

In FIG. 10, flip-flops 51,
Mask circuits 52 and 53, selection circuit 54, OR circuit 5
5 is the same as that of the first embodiment shown in FIG. However, mask width information given to mask circuits 52 and 53 is dynamically generated.

The flip-flop circuits 71 (1) to 71 (15)
Stores 15 sets of power information selected by the sorting circuit 31. Here, power information representing the maximum correlation power is stored in the flip-flop circuit 71 (1), and
Power information representing the fifteenth to fifteenth largest correlation powers is stored in flip-flop circuits 71 (2) to 71 (15), respectively. Note that the flip-flop circuits 71 (2) to 71 (1
The information stored in 5) is the flip-flop circuit 51.
(2) When information stored in 51 to (15) is shifted, it is shifted together.

The detection circuit 72 includes a flip-flop 51
The timing that is three sampling times away from the timing represented by the timing information stored in (1) and the timing that is three sampling times away from the timing represented by the timing information stored in the flip-flop 51 (2). To detect. When the corresponding timing is detected, the corresponding timing is notified to the selection circuit 73.

Upon receiving the notification from the detection circuit 72, the selection circuit 73 selects and outputs the power information stored in the flip-flop 71 (1), and selects and outputs the power information corresponding to the notification. I do. For example, when the timing represented by the timing information stored in the flip-flop 51 (1) and the timing represented by the timing information stored in the flip-flop 51 (15) are separated from each other by three sampling times, , "15" is notified from the detection circuit 72 to the selection circuit 73,
The selection circuit 73 selects and outputs the power information stored in the flip-flops 71 (1) and 71 (15). When the selection circuit 73 does not receive the notification from the detection circuit 72, it outputs, for example, the power information stored in the flip-flop 71 (1) and “zero”.

Power comparison circuit 74 calculates a power ratio represented by the power information output from selection circuit 73. Then, the mask width is determined based on this ratio.
Specifically, if this ratio is larger than a predetermined threshold, a larger mask width (for example, “3”) is used, and if this ratio is smaller than that threshold, a smaller mask width (for example, “2”) is used. ) Is used. The selection circuit 7
If “zero” is output from 3, a large mask width (for example, “3”) is used.

The mask width holding circuits 75 and 76 hold the mask width determined by the power comparison circuit 74. The mask width holding circuit 75 holds the mask width determined by the power comparison circuit 74 when the detection circuit 72 searches for the timing corresponding to the timing information stored in the flip-flop 51 (1). On the other hand, the mask width holding circuit 76 holds the mask width determined by the power comparison circuit 74 when the detection circuit 72 searches for the timing corresponding to the timing information stored in the flip-flop 51 (2).

The selection circuit 77 includes a flip-flop 51
When setting the mask range corresponding to the timing information stored in (1), the mask width held in the mask holding circuit 75 is selected, and the timing information stored in the flip-flop 51 (2) is selected. When setting the mask range corresponding to the mask width, the mask width held in the mask holding circuit 76 is selected.

As a result, the mask width determined by the power comparison circuit 74 is given to the mask circuits 52 and 53. The operation after the mask width is given is basically the same as that of the first embodiment.

FIG. 11 is a configuration diagram of the detection circuit 72.
The adder 81 adds "+3" to the timing information T1,
The adder 82 adds "-3" to the timing information T1. Here, the timing information T1 is the timing information stored in the flip-flop 51 (1) or 51 (2). The selector 83 outputs timing information T2 to T15.
Are sequentially selected and output one by one. Here, the timing information T2 to T15 correspond to the flip-flops 51 (2) to 51 (2).
This is the timing information stored in (15). The match detection circuits 84 and 85 are provided with adders 81 and 82, respectively.
The timing information that matches the output of is detected. Note that the match detection circuits 84 and 85 are constituted by, for example, exclusive OR circuits. When a match is detected in at least one of the match detection circuits 84 and 85, the OR circuit 86 outputs a signal indicating that.

From the above circuit, the flip-flop circuit 51
3 from the timing stored in (1) or 51 (2)
It is detected whether or not there is a timing separated by the sampling time.

Next, a specific example of a procedure for determining the mask width will be described with reference to FIGS. In the example shown in FIG. 4, first, “time 6”, which is the maximum timing, is determined to be the timing of the first valid path. In this case, the detection circuit 72 checks whether or not the timing information indicating the timing three sampling times apart from “time 6” is stored in the flip-flop circuits 51 (2) to 51 (15).
In this example, “time 9”, which is the fourteenth timing, and “time 3”, which is the fifteenth timing, are detected.
Then, the selection circuit 73 selects and outputs the power information stored in the flip-flop 71 (1), and selects the power information stored in the flip-flops 71 (14) and 71 (15). Output. Here, it is assumed that the power information stored in flip-flop 71 (14) is selected first.

Subsequently, the power comparison circuit 74 compares the power information selected by the selection circuit 73. That is, the correlation power at time 6 and the correlation power at time 9 are compared. Here, the correlation power at time 9 is sufficiently smaller than the correlation power at time 6. Therefore, the power comparison circuit 74 outputs a large mask width (mask width = 3). The mask width is determined by the mask width holding circuit 7.
5 and further applied to the mask circuit 52.

The operation after the mask width is given to the mask circuit 52 is the same as that of the first embodiment. Therefore, in the example shown in FIG. 4, “time k” is obtained as the timing of the second valid path.

Further, the detection circuit 72 checks whether or not the timing information indicating the timing three sampling times away from "time k" is stored in the flip-flop circuits 51 (2) to 51 (15). In this example, no such timing information is stored. Therefore, the selection circuit 7
No. 3 selects and outputs the power information indicating the correlation power at the time k, and outputs “zero”. In this case, the power comparison circuit 74 has a large mask width (mask width = 3).
Is output. Then, the information indicating the mask width is held by the mask width holding circuit 76, and further given to the mask circuit 53 as necessary.

The operation after the mask width is given to the mask circuit 53 is the same as that of the first embodiment. Therefore, in the example shown in FIG. 4, “time u” is obtained as the timing of the third valid path.

In the example shown in FIG. 7, "time 6", which is the maximum timing, is determined as the timing of the first valid path. Then, the detection circuit 72 searches for timing information indicating a timing three sampling times apart from “time 6”, in the same manner as the procedure described with reference to FIG.
As a result, in this example, “time 9”, which is the fourth timing, is detected. Then, the selection circuit 73 selects and outputs the power information stored in the flip-flop 71 (1), and selects and outputs the power information stored in the flip-flop 71 (4).

Subsequently, the power comparison circuit 74 compares the power information selected by the selection circuit 73. That is, the correlation power at time 6 and the correlation power at time 9 are compared. However, the correlation power at time 9 is not sufficiently smaller than the correlation power at time 6. Therefore, the power comparison circuit 74 outputs a small mask width (mask width = 2). Then, the mask width is held by the mask width holding circuit 75, and further, the mask circuit 52
Given to.

Thereafter, the second effective path is determined by using the mask width. Then, similarly to the procedure described with reference to FIG. 4, the mask width corresponding to the second valid path is determined, and the third valid path is determined using those mask widths. A description of these procedures will be omitted.

As described above, in the second embodiment, the effective path is determined using the mask range dynamically determined according to the communication environment (or the communication state). Third Embodiment In the second embodiment, as described above, the correlation power at the timing of the effective path is compared with the correlation power at a timing three sampling times away from the timing, and the masking is performed based on the comparison result. The width is determined.
Specifically, the mask width is determined based on whether or not the ratio of the powers exceeds a predetermined threshold. At this time, if the received power of a signal received via a certain path is sufficiently large, the power ratio can usually be expected to be 10 times or more, depending on the characteristics of the roll-off filter. .

However, the C / N ratio (Carrier / No.
In a state where the ise Ratio is low, the ratio of the noise to the received power is high, so that the power ratio is small. Therefore, in the third embodiment, the power ratio is automatically corrected according to the signal reception level.

FIG. 12 is a configuration diagram of an effective path determination circuit in the third embodiment. The effective path determination circuit of the third embodiment is realized by adding a multiplication circuit 91 to the circuit of the second embodiment shown in FIG.

Multiplication circuit 91 multiplies one of the correlation powers compared in power comparison circuit 74 by a coefficient corresponding to the reception level. Specifically, for example, when the correlation power corresponding to the effective path is compared with the correlation power at a timing three sampling times away from the timing of the effective path, the correlation power of the effective path is multiplied by a coefficient. You.

Note that the signal reception level is detected by an existing technique. However, since the reception level constantly fluctuates, an average over a certain period may be used.
In the above example, the output of the selection circuit 73 is corrected. However, the threshold used in the power comparison circuit 74 may be dynamically corrected according to the signal reception level. Fourth Embodiment In the fourth embodiment, as in the second and third embodiments,
Although the mask range is dynamically determined according to the communication environment, the method for recognizing the communication environment is different. Hereinafter, a basic concept of a method of recognizing a communication environment in the fourth embodiment will be briefly described.

The radio communication device usually has a roll-off filter having characteristics as shown in FIG. Here, the circuit of this embodiment operates in the quadruple oversampling mode. Therefore, the correlation power of the signal received via one certain path should be substantially zero at a timing four sampling times away from the peak timing, as shown in FIG. In other words, as shown in FIG. 7, when large correlation power is continuously obtained over four sampling times from the peak timing of the correlation power, it can be considered that a plurality of paths are close to each other.

The valid path determination circuit according to the fourth embodiment utilizes the above characteristics. Hereinafter, the configuration and operation of the second embodiment will be described. FIG. 13 is a configuration diagram of an effective path determination circuit according to the fourth embodiment. The effective path determination circuit of the fourth embodiment is different from the circuit shown in FIG.
, 76, the selection circuit 77, and the continuous detection circuit 101. The mask width holding circuit 75,
76 and the selection circuit 77 are the same as those shown in FIG.

The continuous detection circuit 101 checks whether the second to fifteenth timings are continuously present within a range of four sampling times from the timing of the effective path. Note that the timing information corresponding to the second to fifteenth timings includes flip-flops 51 (2) to 51 (5).
1 (15). Then, within the range of 4 sampling times from the timing of the effective path,
If the fifteenth timing exists, it is assumed that paths having a small difference in delay time are adjacent to each other, and a small mask width (mask width = 2) is output. On the other hand, when the second to fifteenth timings do not exist consecutively within the range of four sampling times from the timing of the effective path, it is considered that there is no path having a small delay time difference, and a large mask width is set. (Mask width = 3) is output.

FIG. 14 is a configuration diagram of the continuous detection circuit 101. The adders 111 to 114 add "+1", "+2", "+3", and "+4" to the timing information T1, respectively.
The adders 115 to 118 respectively provide timing information T1
"-1", "-2", "-3", and "-4". Here, the timing information T1 is timing information corresponding to the valid path, and is the flip-flop 51 (1) or 51 (1).
It is stored in (2). The selector 119 sequentially selects and outputs the timing information T2 to T15 one by one. Here, the timing information T2 to T15 are the timing information stored in the flip-flops 51 (2) to 51 (15). The match detection circuits 121 to 128 are, for example, exclusive O
R circuits, each of which has an adder 111-
Timing information that matches the output of 118 is detected. A
The ND circuit 131 outputs “H” when all of the match detection circuits 121 to 124 detect a match,
The ND circuit 132 outputs “H” when all of the match detection circuits 125 to 128 detect a match.
The OR circuit 133 is connected to the AND circuits 131 and 1
The logical sum of the outputs of the 32 is calculated and output.

From the above circuit, it is detected whether the maximum timing to the fifteenth timing exist continuously for four sampling times. Next, a specific example of a procedure for determining a mask width will be described with reference to FIGS.

In the example shown in FIG. 4, first, “time 6”, which is the maximum timing, is determined to be the timing of the first valid path. In this case, the continuation detection circuit 101 sets “time 7” and “time 8” in the flip-flops 51 (2) to 51 (15).
Whether "time 9" and "time a" are all stored,
It is checked whether or not all of “time 5”, “time 4”, “time 3”, and “time 2” are stored. In this example, “time 2” and “time a” are not registered. Therefore, the continuous detection circuit 101 determines that there is no path having a small difference in delay time, and outputs “3” as the mask width.

Thereafter, a second effective path is determined by using the mask width. Further, after a mask width corresponding to the second effective path is determined, a third effective path is determined by using those mask widths. Is determined, but the description is omitted.

In the example shown in FIG. 7, as in the procedure described with reference to FIG. 4, the continuity detection circuit 101 searches for timing information corresponding to "time 6". And
In this example, "time 7,""time8,""time9," and "time a" are all stored. So, in this case,
The continuous detection circuit 101 considers that a path having a small difference in delay time exists, and outputs “2” as the mask width. Fifth Embodiment In the fourth embodiment, when a large correlation power appears continuously over a certain period based on the timing of the effective path, it is determined that a path having a small difference in delay time exists. ing. However, considering the characteristics of the roll-off filter, it is possible to determine whether or not there is a path with a small delay time difference based on the magnitude of the correlation power at a position separated by a certain time from the timing of the effective path. Specifically, when a large correlation power appears at a position separated by a certain time from the timing of the effective path, it is determined that a path having a small difference in delay time exists, and when a large correlation power does not appear, the delay time is determined. Is determined not to exist.
The valid path determination circuit according to the fifth embodiment uses this characteristic.

FIG. 15 is a configuration diagram of an effective path determination circuit according to the fifth embodiment. This valid path determination circuit is a continuous detection circuit 101 according to the fourth embodiment shown in FIG.
, A detection circuit 141 is provided.

The detection circuit 141 checks whether or not the second to fifteenth timings appear at a position four sampling times away from the timing of the effective path.
Here, the timing information corresponding to the second to fifteenth timings is stored in the flip-flops 51 (2) to 51 (15). Then, when the corresponding timing information is detected, it is considered that a path having a small delay time difference exists adjacently, and a small mask width (mask width =
Output 2). On the other hand, when such timing information is not detected, it is considered that a path having a small difference in delay time does not exist, and a large mask width (mask width =
3) is output.

The detection circuit 141 basically has the configuration shown in FIG.
It has the same configuration as the detection circuit 72 shown in FIG. However, in the detection circuit 141, “+4” and “−4” are added to the adders 81 and 82, respectively.

As described above, in the RAKE receiving apparatus of the present embodiment, the mask range is determined according to the communication environment, and a plurality of valid paths are appropriately selected using the mask range. In the above-described embodiment (the first to fifth embodiments), two types of mask ranges are used. However, the present invention is not limited to this, and three or more types of mask ranges are used. The configuration used may be used.

In the above-described embodiment, the effective path is determined by using the timing at which a large correlation power appears. However, the present invention is not limited to this. That is, for example, a correlation value indicating the correlation between the received signal and the spread code may be used. Here, the correlation value is data obtained by multiplying a received signal by a spreading code.

(Supplementary Note 1) A RAKE receiving apparatus for despreading and combining signals received via a plurality of paths, comprising: generating means for generating a correlation power by despreading a received signal; Detecting means for detecting a timing at which the Nth largest correlation power appears, setting means for setting a mask range determined based on the communication environment, and a plurality of effective values based on the time difference between the detected timings and the mask range. RAK having determining means for determining a path and combining means for combining a plurality of determined valid paths
E receiving device.

(Supplementary note 2) In the rake receiving apparatus according to supplementary note 1, the determining means determines the timing of the first effective path based on the timing at which the maximum correlation power appears, and The mask range is set on the basis of the timing, and the second validity is determined based on the timing that is not masked by the mask range and the largest correlation power among the second to Nth largest correlation powers appears. Determine the path.

(Supplementary note 3) The rake receiving apparatus according to supplementary note 1, wherein the setting means is configured to determine the correlation power based on a ratio of two predetermined correlation powers from a maximum correlation power to an Nth largest correlation power. Set the mask range.

(Supplementary note 4) In the RAKE receiving apparatus according to supplementary note 3, the setting means corrects a ratio of correlation power based on a reception level of a received signal, and sets the mask range based on the corrected ratio. Set.

(Supplementary Note 5) In the rake receiving apparatus according to Supplementary Note 1, the setting unit sets the mask range based on whether or not a predetermined number of consecutive timings are detected by the detecting unit.

(Supplementary note 6) The rake receiving apparatus according to supplementary note 1, wherein the setting means sets the mask range based on whether or not the detection means detects timings separated by a predetermined interval from each other. .

(Supplementary note 7) In the rake receiving apparatus according to supplementary note 1, the setting means dynamically changes the mask range based on a profile of the correlation power.

(Supplementary Note 8) A path determination device for determining a plurality of paths to be used in RAKE reception, a generating means for generating a correlation power by despreading a received signal, and a maximum correlation power to an Nth Detecting means for detecting a timing at which a large correlation power appears, setting means for setting a mask range determined based on a communication environment, and a plurality of RAKE combinations based on the time difference between the detected timings and the mask range. Determining means for determining the effective path of the path.

(Supplementary Note 9) This is a RAKE receiving method for despreading and combining signals received via a plurality of paths, and generates correlation power by despreading a received signal, thereby obtaining a maximum correlation power up to the Nth power. Detecting the timing at which the second largest correlation power appears, setting a mask range determined based on the communication environment, determining a plurality of valid paths based on the time difference of the detected timing and the mask range, RAKE receiving method for combining the effective paths of the two.

(Supplementary Note 10) This is a path determination method for determining a plurality of paths to be used in RAKE reception, in which a correlation power is generated by despreading a received signal, and a correlation power from the maximum correlation power to the Nth largest correlation is obtained. A path determination method for detecting a timing at which power appears, setting a mask range determined based on a communication environment, and determining a plurality of valid paths to be combined for RAKE based on the time difference between the detected timings and the mask range. .

[0115]

According to the present invention, the criterion of the effective path to be used in the RAKE combining is determined according to the communication environment, so that the gain obtained in the RAKE combining always becomes good.

[Brief description of the drawings]

FIG. 1 is a configuration diagram of a wireless communication apparatus using a RAKE receiving method according to an embodiment of the present invention.

FIG. 2 is a configuration diagram of a path search circuit and a demodulation / RAKE combining circuit.

FIG. 3 is a block diagram of a matched filter.

FIG. 4 is a diagram illustrating a method for detecting a timing at which the correlation power is large.

FIG. 5 is an example of a table for storing timing information and power information.

FIG. 6 is a diagram illustrating characteristics of a roll-off filter.

FIG. 7 is an example of correlation power when a difference between delay times of paths is small.

FIG. 8 is a configuration diagram of an effective path determination circuit according to the first embodiment.

FIG. 9 is a configuration diagram of a mask circuit.

FIG. 10 is a configuration diagram of an effective path determination circuit according to the second embodiment.

FIG. 11 is a configuration diagram of a detection circuit.

FIG. 12 is a configuration diagram of an effective path determination circuit according to a third embodiment.

FIG. 13 is a configuration diagram of an effective path determination circuit according to a fourth embodiment.

FIG. 14 is a configuration diagram of a continuous detection circuit.

FIG. 15 is a configuration diagram of an effective path determination circuit according to a fifth embodiment.

FIG. 16 is a configuration diagram of an existing RAKE receiving circuit.

FIG. 17 is a diagram illustrating an example of a communication environment.

18 is a diagram illustrating a correlation between a received signal and a spreading code under the communication environment illustrated in FIG.

[Explanation of symbols]

 24 Path Search Circuit 25 Demodulation / RAKE Synthesis Circuit 31 Sort Circuit 32 Valid Path Determination Circuit 52, 53 Mask Circuit 72 Detection Circuit 73 Selection Circuit 74 Power Comparison Circuit 91 Multiplication Circuit 101 Continuous Detection Circuit 141 Detection Circuit

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Hidekazu Sato 2-3-9 Shin-Yokohama, Kohoku-ku, Yokohama-shi, Kanagawa Prefecture Fujitsu Digital Technology Co., Ltd. In-house (72) Inventor Koichi Kuroiwa Ueodanaka, Nakahara-ku, Kawasaki-shi, Kanagawa 4-1-1, Fujitsu Limited (72) Inventor Junichi Sugimoto 2--20-1, Koseidori, Nishi-ku, Nagoya-shi, Aichi Prefecture Meitec Co., Ltd. (72) Inventor Koji Matsuyama 4 Kamikadanaka, Nakahara-ku, Kawasaki City, Kanagawa Prefecture 1-chome No. 1 Fujitsu Limited F-term (reference) 5K022 EE01 EE33 5K059 AA08 DD35 EE02

Claims (5)

[Claims] 1. A rake receiving apparatus for despreading and combining signals received via a plurality of paths, comprising: generating means for generating a correlation power by despreading a received signal; Detecting means for detecting a timing at which the Nth largest correlation power appears; setting means for setting a mask range determined based on a communication environment; and a plurality of effective paths based on a time difference between the detected timings and the mask range. A rake receiving device comprising: a deciding means for deciding; and a combining means for combining a plurality of determined effective paths. 2. The RAKE receiving apparatus according to claim 1, wherein the setting unit sets the mask based on a ratio of two predetermined correlation powers from a maximum correlation power to an Nth largest correlation power. Set the range. 3. The RAKE receiving device according to claim 1, wherein the setting unit sets the mask range based on whether a predetermined number of consecutive timings are detected by the detection unit. 4. The RAKE receiving apparatus according to claim 1, wherein the setting unit sets the mask range based on whether or not the detection units detect timings separated by a predetermined interval. 5. A path determining device for determining a plurality of paths to be used in RAKE reception, comprising: generating means for generating a correlation power by despreading a received signal; Detecting means for detecting a timing at which the correlation power appears; setting means for setting a mask range determined based on the communication environment; A path determination device comprising: a determination unit that determines a path.