JP2002215335A - Memory system - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a device for conducting measurement of performance by the unit of Lu and notify notifying the results of measurement to the external in an array type disc system. SOLUTION: In this array type disc system, a performance measuring means for measuring usage situation of each transfer passage for each LU is provided inside the array type disc system, and a usage situation for each LU in each transfer passage is measured. Result of measurement is then notified to an external host and a control terminal or the like, using an external communication program.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a control method for a storage system of a computer system, and more particularly, to performance measurement of the storage system.

[0002]

2. Description of the Related Art Disk array systems use RAID.
(Redundant Arrays of Inexpensive Disks), a configuration in which a plurality of disk devices are arranged in an array, and a read request (data read request) from the host
And a write request (data write request) is processed at high speed by parallel operation of disks, and the reliability is improved by adding redundant data to data. Disk array systems are classified into five levels according to the type and configuration of redundant data (Paper: "A Case for Redundant Arrays of Inexpensiv"
e Disks (RAID) ", David A. Patterson, Garsh Gibson,
and Randy H. Katz, Computer Science Division Depart
ment of Electrical Engineering and Computer Scienc
es, University of California Berkeley ACM SIGMOD p
pp. 109-116 1988).

The disk array system has a disk group composed of a plurality of disks. In order to realize the above-described disk array, a read / write request from a host is converted into a read / write request to each disk, data is distributed to each disk at the time of writing, and data is read from each disk at the time of reading. It is necessary to perform data distribution and aggregation control for aggregation. Such control is referred to as disk array control.

[0004] A read / write request from a host is generally made in units of a logical unit of a storage device called an LU (Logical Unit).

A conventional example in which the performance of a disk array is measured in LU units is disclosed in, for example, Japanese Patent Application Laid-Open No. 9-274544. In this example, sequential /
The types of access such as random are collected.

[0006]

In a disk array, if the access status for each LU is known, load distribution is performed based on the access status at the time of system reconfiguration or the like, so that an optimal LU configuration and RAID in terms of performance can be obtained. A configuration can be constructed. For example, when access is concentrated on a certain LU due to continuous access, LUs may be rearranged so that access is not concentrated on one LU.

Further, if the access performance for each LU and the load status of each part of the hardware for each LU are known, it can be used for analyzing the performance bottleneck of the entire disk array system.

[0008] A service called a storage pool, which provides a data storage area to a plurality of users and receives a fee in exchange, can be considered. In this storage pool, not only the used capacity but also the hardware resources are determined. It is anticipated that a fee will be charged for the performance of only using. For that purpose, performance measurement for each LU is required.

In a similar storage pool,
Performance measurement for each LU is necessary in order to obtain a guideline for performance control in a performance service that only a specific customer can use a specific performance and for suppressing use of hardware resources. However, in the related art, measurement of transfer performance and load status for each LU and notification to the outside are not found.

A first object of the present invention is to construct an optimal RAID configuration by load distribution from measurement results.
It is an object of the present invention to provide a disk array system and a method capable of measuring the transfer performance and the load status of each U and notifying the outside.

A second object of the present invention is to provide a disk array system and method capable of measuring the transfer performance and load status of each LU and notifying them to the outside for analyzing the performance bottleneck of the disk array system. It is in.

A third object of the present invention is to measure the transfer performance and load status of each LU and to notify the external to enable the user to know how much hardware resources have been used and to charge for performance. A disk array system and method are provided.

A fourth object of the present invention is to provide a disk array system and method which can measure the transfer performance and load status of each LU and notify the external to obtain a guideline for suppressing the use of hardware resources. To provide.

[0014]

SUMMARY OF THE INVENTION In order to satisfy the above demand, the present invention measures the transfer performance and load status of each LU in a disk array system, and notifies the measurement result to the outside of the disk array system. It is provided with.

In order to achieve the first, second, third and fourth objects, the present invention provides an array type disk system having a plurality of disk devices arranged in an array.
At least one or more host input / output means for performing input / output with a host, at least one or more disk input / output means for performing input / output with a plurality of disk devices, a disk cache for temporarily holding data, A cache controller for controlling the disk cache, a host-side internal bus connecting the host I / O unit and the cache controller, a disk-side internal bus connecting the disk I / O unit and the cache controller, and a cache connecting the cache controller and the disk cache A bus and performance measuring means for measuring the use status of each transfer path for each LU are provided. Each transfer path is at least one of the host-side internal bus, disk-side internal bus, and cache bus.
Measure the usage of each.

Further, by providing a host communication program in the disk array system, the use status of the transfer path can be notified to the host.

In order to achieve the first, second, third, and fourth objects, the present invention provides, in addition to the above means, a control terminal communication means for communicating with a control terminal, and a control terminal. By providing the communication program, the transfer status can be notified to the control terminal.

[0018]

Embodiments of the present invention will be described below with reference to the drawings.

(First Embodiment) In a first embodiment of the present invention, the data transfer amount and the bus use amount on each bus in a disk array are measured in LU units according to an instruction from a host.
This is for notifying the host of the measurement result.

(1) System Configuration First, the system configuration of the first embodiment will be described with reference to FIG.

In FIG. 1, a host A 100, a host B
110 and a host C 120 are hosts that issue read / write requests to the disk array 200 and input / output data, 130 is a bus switch, and 200 is a disk array.

The disk array 200 includes host input / output units 210 and 211, a disk cache 230, disk input / output units 250 and 251 and a disk device group 27.
0, 271 and MPU for controlling the entire disk array
280, a bus bridge 285, a memory 290, and a cache controller 300. Each of the disk device groups 270 and 271 includes at least one or more disk devices. In the present embodiment, as an example, the disk device group 270 includes the disk devices 277 to 2
79. Host input / output unit 210, 2
11 may be at least one or more. The number of disk input / output units 250 and 251 may be at least one. The disk device groups 270 and 271 have at least one
At least one.

The host A 100, the host B 110, and the host C 120 are connected to the disk array 2 by the host bus A 140 and the host bus B 141 via the bus switch 130.
00 host input / output units 210 and 211. The host represented by the host A100, the host B110, and the host C120 may be at least one or more.

The host input / output units 210 and 211 for executing the transfer between the host A 100, the host B 110, the host C 120 and the cache controller 300 are connected to the cache controller 300 via the host-side internal bus 220. The host input / output unit 210 is connected to the host bus A14.
It has a bus usage status measuring unit 212 for monitoring data transfer on the data transfer device 0 and measuring the transfer amount. The host input / output unit 211 has the same function as the host input / output unit 210.

The disk input / output units 250 and 251 for executing data transfer between the disk device groups 270 and 271 and the cache controller 300 have disk buses A and
260, the disk device group 2 by the disk bus B 261
70 and 271, and to the cache controller 300 via the disk-side internal bus 240. The disk input / output unit 250 monitors a data transfer on the disk bus 260 and measures a usage status.
Having. The disk input / output unit 251 has the same function as the disk input / output unit 250.

The disk cache 230 is connected to the cache controller 300 via a cache bus 231.

The cache controller 300 controls the internal bus buffer 310 for buffering data transfer between the host input / output units 210 and 211 and the disk cache 230, and controls the transfer between the disk cache 230 and the cache controller 300. Cache control unit 320 and disk input / output units 250 and 251
A disk-side internal bus buffer 330 for buffering data transfer between the disk cache 230 and
LU information described below is added to data transferred from the host input / output units 210 and 211 to the disk cache 230, and LU information added to data transferred from the disk cache 230 to the host input / output units 210 and 211. LU information addition / deletion unit 340 for monitoring data transfer, a bus usage status measurement unit 311 for monitoring data transfer on the host-side internal bus 220, and measuring usage status, and monitoring and transferring data transfer on the cache bus 231. A bus usage status measuring unit 321 for measuring the status;
And a bus use state measuring unit 331 for monitoring data transfer on the server 40 and measuring the use state.

Here, addition / deletion of LU information and LU information performed by the LU information addition / deletion unit 340 on transfer data will be described. The host A100 reads / writes the disk array in LU units that are logical units. The LU is divided into a plurality of disk devices in the disk array and managed.

In this embodiment, the disk array 2
The transfer amount and the like are counted by measuring the signal lines of each bus inside the 00. However, the data itself flowing through each bus in the disk array does not indicate which LU is being transferred. It cannot be specified. Therefore, in the present invention, by adding LU information to data flowing on the bus and measuring data transfer on the bus, the LU corresponding to the data can be specified.

FIG. 2 shows a specific example of adding LU information to data. Logical data blocks 401, 411, 4
Reference numeral 21 denotes a part of the host data when the host A 100 transfers data to the disk array 200, and is data that is consecutive in the order of the logical data block 401, the logical data block 411, and the logical data block 421. LU
Information 402, 412, and 422 are LU values designated by the host A 100 in the transfer, and are added corresponding to the logical data blocks 401, 411, and 421, respectively. LU information is stored in each logical data block 401, 41.
1 and 421, the logical data block 401, LU information 402, logical data block 4
11, LU information 412, logical data block 421, L
Data becomes continuous in the order of the U information 422. A combination of the logical data block 401 and the LU information 402 is referred to as extension data 400, and the same applies to the extension data 410 and 420.

The addition of LU information is performed by the host input / output unit 210.
When the data is transferred from the disk drive 211 to the disk cache 230, the LU information addition / deletion unit 340 performs the transfer. When data is transferred from the disk cache 230 to the host input / output units 210 and 211, the LU information addition / deletion unit 340 deletes LU information. As a result, the data flowing on the host-side internal bus 220 is only a logical data block, and the data flowing on the cache bus 231, the disk-side internal bus 240, the disk bus A260, and the disk bus B261 become extension data.

The LU specifying method on the host buses 140 and 141 and the host-side internal bus 220, the addition of LU information /
The method by which the deletion unit 340 specifies an LU will be described later in the description of the bus usage status measurement unit 500 shown in FIG.

Next, the system configuration of FIG. 1 will be described. MPU 280 is connected to memory 290 and cache controller 300 via bus bridge 285.

The memory 290 includes a disk array control program 291 used by the MPU 280 to execute disk array control, and the MPU 280 stores the host bus 14
0, 141, host-side internal bus 220, cache bus 231, disk-side internal bus 240, disk bus A2
60, a bus usage status measurement program 292 used to execute the measurement of the transfer amount on the disk bus B 261
And a bus usage status measurement result table 293 for storing the results of measurement of the amount of transfer on the bus, and the MPU 280 transmits the bus usage status measurement results to the host A100 and the host B1.
10 or a host communication program 294 used to execute communication performed between the host C 120 and the disk array 200. Details of the bus usage status measurement result table 293 will be described later.

Bus usage status measuring units 212, 252, 31
1, 321 and 331 will be described. The bus usage status measurement units 212, 252, 311, 321 and 331 are configured as shown in FIG.
Can be realized by a structure like the bus use state measuring unit 500 shown in FIG.

The bus usage measuring section 500 measures LU access counters 510 to 512, a total counter 550 for counting the number of clocks of the bus to be measured, and a total register 551 for storing the value counted by the total counter 550. For data transfer on the bus, a bus occupancy value counter 560 for counting the number of clocks occupying the bus, a temporary register 561 for storing the value counted by the bus occupancy value counter 560, and a data transfer for data transfer on the bus to be measured Data transfer amount counter 570 for counting the amount, and data transfer amount counter 570
Temporary register 571 for storing the value counted by
And which LU the data transfer on the bus to be measured relates to, and according to the determination result, the temporary register 5
An LU determination unit 580 for adding the values of 61 and 571 to a register in the corresponding LU access counter;
A count start unit 590 for initializing each register and giving an opportunity to start counting in accordance with an instruction from the MPU 28
A count stop unit 595 that stops counting in response to an instruction from 0.

LU access counters 510, 511, 5
Reference numeral 12 is provided for each LU. LU access counter 5
10 is an LU register 520 for specifying the LU to be measured
A bus occupancy value register 530 for storing a count value of the number of clocks occupying the bus, and a data transfer relating to the LU specified by the LU register 520;
A data transfer amount register 540 for storing a count value of a transfer amount of data transfer relating to the LU designated by 0. The LU access counters 511 and 512 have the same function as the LU access counter 510. The number of LU access counters 510 to 512 may be at least one.

In general, the data transfer amount does not coincide with the bus occupancy value, and there is no proportional relationship. The bus occupancy value indicates the time during which a certain LU occupies the bus regardless of whether data is being transferred. Even when the bus is occupied, the time during which data is not actually transferred changes depending on the response time of the device connected to the bus. Therefore, the occupied value of the bus is a value that cannot be known unless it is actually measured. This value indicates how long the hardware is actually used.

The system configuration of the first embodiment has been described above.

(2) Performance Measurement Next, the LU specifying method of the transferred data and the specified L
The performance measurement method for each U will be described. First, a method in which the LU determination unit 580 specifies an LU in each data transfer will be described.

Cache bus 231, disk-side internal bus 240, disk bus A260, disk bus B26
1, the data flowing on the bus is extended data to which LU information is added as shown in FIG. 2, and since LU information is added to the data itself,
The corresponding LU is monitored by monitoring the data transfer on the bus.
Can be specified.

In data transfer on the host bus A140, read / write from the host A100 to the disk array 200 is performed by LU specification. This is performed by the host A100 issuing a read / write command on the host bus A140.
LU accessed by host A100 during write command
Is specified, the LU corresponding to each data can be specified by monitoring the host bus A140 and checking the LU specification portion of the read / write command. The same applies to the case of the host bus B141.

In the disk array 200, data transfer performed from the host A 100 by LU designation is performed by the MPU 28
0 performs an address conversion specific to the disk array,
The data is distributed and stored in the disk device groups 270 and 271.
The data transfer on the host-side internal bus 220 is after this address conversion, and it is not possible to specify the corresponding LU only by monitoring the data transfer on the host-side internal bus 220. Also, when the LU information addition / deletion unit 340 adds the LU information as shown in FIG. 2, the LU cannot be specified only from the data.

Therefore, in the present embodiment, when data is transferred from the host input / output unit 210 to the disk cache 230, for example, the upper bits of the transfer address and an area that does not affect the address specification of the disk cache 230 are stored in the area. Is stored in advance. The bus usage status measuring unit 311 monitors data transfer on the host-side internal bus 220, reads LU information from the upper bits of this transfer address, and
Perform the identification of. The LU information addition / deletion unit 340 also
The LU is specified by the same means.

In the subsequent data transfer within the disk array 200, if there is no LU number in the data itself, an MPU is required for each data transfer.
U has a large load. Therefore, by adding LU information to the data itself and monitoring only the data, the bus usage status of each LU can be determined.

Next, a description will be given of a method in which the bus use state measuring unit 500 monitors a specific bus, and measures a measurement time, a bus occupation time for each LU within the measurement time, and a data transfer amount for each LU. FIG. 4 shows a general-purpose local bus, PCI.
5 is a timing chart of the simplest continuous data write transfer of the bus. In FIG. 4, CLK is a reference signal for synchronization. All PCs except reset and interrupt
The I signal operates in synchronization with the rising edge of the CLK signal line.

T0 to t6 represent times of rising edges of the CLK signal line. -FRAME is a negative logic line which is driven by the initiator and indicates that a bus cycle is being performed. AD is 32 signal lines in which address and data transfer is performed in a time-division manner. ADDR in FIG. 4 indicates an address transfer, and data 1
Data 4 represents data transfer.

-C / BE are four negative logic signal lines used as a bus command during address transfer and as a byte enable during data transfer. CMD in FIG. 4 represents a bus command, and BE # 1 to BE # 4 are byte commands.
Indicates enable. -IRDY is a negative logic signal line which is driven by the initiator and indicates that the initiator is in a state capable of transferring data. -TRD
Y is a negative logic signal line which is driven by the target and indicates that the target is in a state in which data transfer is possible. DEVSEL is a negative logic signal line that is asserted by the accessed target in response to a bus access.

Using a case where a PCI bus is used as the disk-side internal bus 240 as an example, a measurement operation for the disk-side internal bus 240 will be described with reference to FIG.

It is the bus usage measuring unit 331 that measures the transfer on the disk-side internal bus 240. The bus usage measuring unit 331 measures the total number of clocks from the start of measurement to the end of measurement, the number of clocks occupying the disk-side internal bus 240 for each LU, and the data transfer on the disk-side internal bus 240 for each LU. The number of clocks performed.

First, the MPU 280 sets the number of the LU to be measured in the LU registers 520 to 522.

Next, the MPU 280 operates the counting start unit 5
An instruction to start measurement is given to 90. Count start unit 59
0, upon receiving an instruction from the MPU 280, the bus occupancy value register 53 in the LU access counters 510-512.
0 to 532, data transfer amount registers 540 to 542, total register 551, temporary register 56
1. Initialize the value of the temporary register 571, and give a measurement start instruction to the total counter 550, the bus occupancy value counter 560, and the data transfer amount counter 570. The total counter 550, the bus occupancy value counter 560, and the data transfer amount counter 570 start counting when receiving an instruction from the count start unit 590.

The total counter 550 counts the rising edge of the CLK signal line from the start of measurement to the end of measurement, and stores the total number of clocks in that period in the total register 551.

The bus occupancy value counter 560 counts the rising edge of the CLK signal line while each data transfer occupies the bus, and stores the value in the temporary register 56.
1 is stored. On the PCI bus, data transfer is-
The process starts when the FRAME signal falls, and ends when both the -FRAME signal and the -IRDY signal rise and the bus becomes idle. In FIG. 4, the bus is occupied for five clocks from t1 to t5, and the temporary register 561 stores the value 5 as the counting result.

The data transfer amount counter 570 counts the rising edge of the CLK signal line during the period when data is actually transferred on the bus, and stores the value in the temporary register 571. In the PCI bus, -T
The period during which the RDY signal falls is the period during which data is transferred. In FIG. 4, t2, t3, t
At 4 and t5, the data transfer amount counter counts up, and the value 4 of the counted result is stored in the temporary register 5
71.

For each data transfer, the LU determination unit 580 specifies an LU corresponding to the data transfer. The LU determination unit 580 determines the identified LU and the LU registers 520 to 52
The two values are compared, and if they are equal, the value of the temporary register 561 is added to the corresponding bus exclusive value register, and the value of the temporary register 571 is added to the data transfer amount register. Then, the temporary register 561,
Clear the value of the temporary register 571.

After the measurement time has elapsed, the MPU 280
The count stop unit 595 is instructed to terminate the measurement. Upon receiving an instruction from the MPU 280, the count stop unit 595, the total counter 550, the bus occupancy value counter 5
60, An instruction to finish the measurement is given to the data transfer amount counter 570. When the total counter 550, the bus occupancy value counter 560, and the data transfer amount counter 570 receive an instruction from the count stop unit 595, the count operation ends.

By the above-described series of operations, the bus use state measuring unit 331 performs the data transfer on the disk-side internal bus 240 for each of the total number of clocks of the disk-side internal bus 240 and LU during the period from the start of the measurement to the end of the measurement. The number of exclusive clocks and the number of clocks to which actual data is transferred on the disk-side internal bus 240 are counted. Disk side internal bus 2
Since the clock frequency of 40 and the data bus width are known in advance, an accurate measurement time, a time during which each LU occupies the bus, and a data transfer amount for each LU can be derived from the counted clock number.

The case of the bus use status measuring unit 331 has been described taking the PCI bus as an example. However, even in the case of a bus other than the PCI bus, the host input / output units 210 and 211, the cache controller 300, the disk input / output unit 250, 251
Has an interface that understands the protocol of each bus, so that the same measurement can be performed by counting according to the protocol. That is, the bus usage measuring unit 212 performs data transfer on the host bus A,
The bus usage status measurement unit 311 performs data transfer on the host-side internal bus 220, the bus usage status measurement unit 321 performs data transfer on the cache bus 231, and the bus usage status measurement unit 2.
52 monitors the data transfer on the disk bus A260, and for each total number of LUs and LUs during the period from the start of measurement to the end of measurement on each bus, the number of clocks for which data transfer occupies the bus and the actual number of buses on the bus. Count the number of clocks to which data was transferred.

(3) Exchange between Host and Disk Array In this embodiment, the host gives a measurement instruction to the disk array via the host bus, and obtains a measurement result from the disk array. Therefore, a vendor unique command used for performance measurement between the host and the disk array is defined. Here, the host A 100 is the disk array 200
Will be described as an example of a case where a performance measurement is instructed.

In FIG. 6, a setting command 610, a measurement start command 620, a measurement end command 630, and a result acquisition command 640 are commands issued from the host A 100 to the disk array 200, and the result notification response 650 is This is a data string returned to the host A100 in response to the result acquisition command 640 received by the array 200.

The setting command 610 is a command for setting which bus of which LU is to be measured.
A unique code is assigned to the command code 611. In the LUN (LU Number) 612, one LU number to be measured is set. The bus designation bit string 613 is an 8-bit bit string that sets which bus is to be measured in the LU set in the LUN 612. The bit definitions are, as shown, the host bus A140, the host bus B141, and the host-side internal bus 22 from the left.
0, cache bus 231, disk-side internal bus 24
0, disk bus A 260, and disk bus B 261. If the bit value is "0", do not measure the corresponding bus. If the bit value is "1", measure the corresponding bus. Represents

For example, when measuring the performance of the host-side internal bus 220, cache bus 231, and disk-side internal bus 240 for data transfer relating to LU0, the host A10
0 indicates LU0 in LUN 612 and bus designation bit string 613
"00111000" is specified. Host A100
Issues setting commands 610 by the number of LUs to be measured.

The measurement start command 620 is a command for instructing the disk array 200 to start performance measurement. A unique code is assigned to the command code 621.

The measurement end command 630 is a command for instructing the disk array 200 to end the performance measurement. A unique code is assigned to the command code 631.

The result acquisition command 640 is a command for instructing the disk array 200 to transmit a measurement result. A unique code is assigned to the command code 641. In the LUN 642, the number of the LU for which the measurement result is to be output is specified. The bit definition of the bus designation bit string 643 is the same as that of the bus designation bit string 613. When the bit value is “0”, the measurement result of the corresponding bus is not output, and when the bit value is “1”, the measurement result of the corresponding bus is not changed. Indicates that the measurement result is output. For example, when the measurement result output of the data transfer on the host-side internal bus 220, the cache bus 231 and the disk-side internal bus 240 regarding LU0 is requested from the disk array 200, the host A100 sets L
LU0 is assigned to UN641 and "0" is assigned to bus designation bit string 643.
0111000 ". The host A100 issues the result acquisition commands 640 by the number of LUs for which measurement results are obtained. If a value that does not overlap with any LU value, that is, 0xFF in the present embodiment, is specified as the LUN 642,
It is defined as specifying the total counter value indicating the total number of clocks during the measurement period.

The result notification response 650 is a data string transmitted from the disk array 200 to the host A100. The data string has a bus occupancy value 651 for the host bus A140 and a bus occupancy value 6 for the host bus B141.
52, a bus occupation value 65 in the host-side internal bus 220
3, the bus occupancy value 654 in the cache bus 231;
A bus occupancy value 655 in the disk-side internal bus 240,
Bus occupancy value 656 for disk bus A260, bus occupancy value 657 for disk bus B261, data transfer amount 658 for host bus A140, host bus B
141, the data transfer amount 660 in the host-side internal bus 220, the cache bus 2
31, the data transfer amount 662 in the disk-side internal bus 240, the disk bus A2
60, the data transfer amount 663, the disk bus B26
1 are arranged in the order of the data transfer amount 664. The disk array 200 receives the result acquisition command 64
The measurement result of each bus of the LU designated by 0 is transmitted according to the format. When 0xFF is specified for LUN 642, the total counter value of each bus is output to 651 to 657, and 0 is output to 658 to 664.

Hereinafter, based on the flowchart of FIG.
The flow of performance measurement will be described. The left side of the flowchart shows the operation flow of the host A100, and the right side shows the operation flow of the disk array 200. It is to be noted that the host A performs the function of measuring the performance, and the host B and the host C may be used.

In step 1000, the host A10
0 issues a setting command 610 for measurement preparation to the disk array 200. In step 1100, the disk array 200 receives the setting command 610.

In step 1110, the MPU 280
Checks the value of the LUN 612 and the value of the bus designation bit string 613 of the received setting command 610, and sets the value of the LUN 612 in the LU register in the corresponding bus usage status measuring unit. For example, when the value of the LUN 641 is LU0 and the value of the bus designation bit string 613 is “00111000”, the data transfer on the host-side internal bus 220, the cache bus 231, and the disk-side internal bus 240 is measured for the LU0. Therefore, the MPU 280 stores the LU in the LU register 520 in the bus usage measuring section 311, the LU register 520 in the bus usage measuring section 321, and the LU register 520 in the bus usage measuring section 331, respectively.
Set 0.

The host A 100 repeatedly executes step 1000 until the setting of all the LUs to be measured is completed.

When the setting of all LUs is completed, step 102
0, the host A 100
Issue a measurement start command 620 to the.

In step 1120, the disk array 200 receives the measurement start command 620, and in response to this, in step 1130, the MPU 280 sets the count start unit 590 in the total bus use status measurement unit for which the LU register has been set in step 1110. Is given an instruction to start measurement. As a result, each bus usage state measuring unit starts an operation of monitoring and measuring each bus. Where MPU
The 280 may give a measurement start instruction to the count start unit 590 in the existing bus use status measurement unit regardless of the presence or absence of the LU register setting.

When the measurement time has elapsed and the measurement end time has been reached, the host A 100 issues a measurement end command 630 to the disk array 200 in step 1030.

In step 1140, the disk array 200 receives the measurement end command 630, and in response to this, in step 1150, the MPU 280 sets the count stop unit 595 in the total bus use status measurement unit for which the LU register has been set in step 1110. To the end of the measurement. As a result, each bus usage status measurement unit stops the measurement operation. Here, the MPU 280 may give an instruction to end the measurement to the count stop unit 595 in the existing bus use status measurement unit regardless of the presence or absence of the LU register setting.

After instructing the end of the measurement, the MPU 280 sets the bus occupancy value registers 530 to 53
2. The count value is read from the data transfer amount registers 540 to 542 and the total register,
The values are totaled in the bus use status measurement result table 293 above. FIG. 5 shows the structure of the bus usage status measurement result table 293 when the measurement is performed for 3 LUs LU0, LU1, and LU2. The bus usage status measurement result table 293 is
A matrix in which each bus is arranged in rows and each register is arranged in columns is used to store the counted clock value.

After issuing the measurement end command 630, in step 1040, the host A 100
00, a result acquisition command 640 is issued to request notification of the result.

At step 1160, the disk array 200 receives the result acquisition command 640. In step 1170, the MPU 280 checks the value of the LUN 642 and the bus designation bit string 643 of the received result acquisition command 640, and
The corresponding measurement result value is read out from No. 3 and transmitted to the host A 100 as a result notification response 650.

In step 1050, the host A10
0 receives the result notification response 650.

The host A100 executes steps 1040 and 1 until the required measurement results of all LUs are obtained.
050 is repeatedly executed. When the measurement results of all the LUs including the total count number in the measurement period are obtained, the process ends (step 1070).

For each command, a status indicating the success or failure of the command execution is returned from the disk array 200 to the host A 100, but is omitted in FIG.

According to the present embodiment, the above configuration and operation make it possible to measure the transfer performance and load status of each LU in data transfer on each bus in the disk array 200. Further, in response to a request from the host A100, the disk array 200 can notify the host A100 of the measurement results of the transfer performance and the load status for each LU.

Since the measurement result can be notified to the external host, there is an effect that it can be used for the purpose of constructing an optimal RAID configuration by load distribution from the measurement result.

Also, by analyzing the measurement results,
There is an effect that it can be used for the purpose of analyzing the performance bottleneck of the disk array system.

Further, it is possible to know how much each LU has used the hardware resources from the measurement result, and there is an effect that the LU can be used to enable the performance to be charged in the storage pool.

Further, there is an effect that the measurement result can be used for the purpose of obtaining a guideline for suppressing the use of hardware resources.

The host A100, host B110,
Between the host C120 and the host input / output units 210, 211,
The interface between the disk device groups 270 and 271 and the disk input / output units 250 and 251 may be, for example, a fiber channel, SCSI, or the like, but may be another interface. The host-side internal bus 220 and the disk-side internal bus 240
For example, a 64-bit PCI bus may be used, but a 32-bit PCI bus or another bus may be used.

In this embodiment, the count value of the measurement result is notified to the host A 100. However, the MPU 280 calculates the transfer amount per unit time and the bus usage rate from the measurement result, and notifies the host A 100 of the calculation result. May be.

In this embodiment, the measurement data is totaled after the measurement is completed by the measurement end command 630, and the measurement data is reported to the host A100. It is easy to aggregate the data and issue the result acquisition command 640 without terminating the measurement by the measurement end command 630 so that the measurement data in operation can be acquired.

(Second Embodiment) In a second embodiment of the present invention, the control of the performance measurement performed by the host A100 in the first embodiment is performed by an instruction from a control terminal outside the disk array. Things.

FIG. 8 shows an example of a system configuration according to the second embodiment. Here, only the differences from the first embodiment will be described. 8, a control terminal 700 is a disk array control terminal that issues various control commands to the disk array 200. A control terminal communication device 720 for executing communication between the control terminal 700 and the disk array 200 connects to the bus bridge 285 and
00 is connected by a control line 710. The control line 710 can be realized by a serial or existing network communication line. The memory 290 has a control terminal communication program 295 used by the MPU 280 to execute communication performed between the control terminal 700 and the disk array 200 for measurement of the transfer amount and the like. The above is the system configuration of the second embodiment.

Next, the operation of the second embodiment will be described, focusing on the differences from the first embodiment. In the second embodiment, the control terminal 700 issues a setting command 610, a measurement start command 620, a measurement end command 630, and a result acquisition command 640 to the disk array 200 to control the performance measurement. In addition, the disk array 200 sends a result notification response 6 to the control terminal 700.
Send 50.

According to the above configuration and operation, in the second embodiment, performance measurement for each LU can be performed in accordance with an instruction from the control terminal 700. Therefore, the same effect as in the first embodiment can be obtained.

(Third Embodiment) The third embodiment of the present invention is to collect performance measurement results using a special host called a billing server, and to bill for hardware use performance. . This does not indicate that the host A cannot charge in the first embodiment. The host A may be charged.

FIG. 9 shows an example of a system configuration according to the third embodiment. Here, only the differences from the first embodiment will be described. In FIG. 9, a billing server 900 is a special host for the purpose of monitoring the data transfer amount on the bus inside the disk array 200 and the bus load ratio in LU units. The billing server 900 has a memory 910 therein for totalizing the measurement results.

The billing server 900 includes a bus switch 130
Via the host bus A 140 and the host bus B 141, the host I / O units 210 and 2 of the disk array 200.
11 is connected. The memory 290 has a charging server communication program 296 used by the MPU 280 to execute communication performed between the charging server 900 and the disk array 200 for bus usage measurement. More than,
It is a system configuration of a third embodiment.

Next, the operation of the third embodiment will be described, focusing on the differences from the first embodiment. In the third embodiment, the accounting server 900 issues a setting command 610, a measurement start command 620, a measurement end command 630, and a result acquisition command 640 to the disk array 200 to control the performance measurement. Further, the disk array 200 transmits a result notification response 650 to the accounting server 900. The accounting server 900 calculates a data transfer amount and a bus load factor for each LU from the measurement result, and
The charge amount is calculated for each.

FIG. 10 shows a specific example. Billing server 90
0, the bus use status measurement result table 920 on the memory 910 inside the memory
It has the same structure as the bus usage status measurement result table 293 on 0, and stores the measurement value obtained by the result notification response 650. The accounting server 900 calculates a data transfer amount and a bus load factor for each LU based on the measured values.
The data transfer amount is a transfer amount of data transfer actually performed on the bus, and the bus load factor is a percentage of time during which data transfer exclusively uses the bus. Here, the host side internal bus 220 operates at the operating frequency 33.
Assuming that the PCI bus is composed of a PCI bus having a bus width of 64 MHz and a bus width of 64 bits, the number of clocks exclusively used for the LU0 data transfer by using the host-side internal bus is 200 out of 1000 clocks measured by the host-side internal bus.
Clock, bus load factor 200/1000 × 100
= 20% can be derived. The number of clocks at which the data transfer for LU0 is performed is 175 clocks, and the data transfer amount is 175 × 64 bits (8 bytes) =
1400 bytes can be derived. By the same calculation, L
The data transfer amount and bus load ratio of each bus for each U are summarized in a data transfer amount and bus load ratio table 930. By summarizing in this way, it becomes possible to know the data transfer amount of each part for each LU, and to know which LU puts a load on which part and how much.

In this embodiment, the architecture places the highest load on the cache bus. Therefore, when charging for the hardware usage, it is conceivable to determine the charging amount in proportion to the load ratio of the cache bus. In the data transfer amount and bus load ratio table 930, the bus load ratio of the cache bus is 45.3% for LU0 and LU1 for LU1.
Is 24% and LU2 is 17.3%. Therefore, L
The user who uses U0 is charged the largest amount,
Hereinafter, the amount of money is the order of the user using LU1 and the user using LU2.

With the above configuration and operation, in the third embodiment, performance measurement for each LU can be performed in accordance with an instruction from the accounting server 900. Therefore, the same effect as in the first embodiment can be obtained. In particular, the billing server 900
The calculation of the data transfer amount and the bus load factor for each LU within the LU has the effect of realizing charging for the hardware usage performance.

[0101]

As described above, according to the present invention, the transfer performance and load status of each LU in each bus in the disk array are measured, and the measurement result is notified according to a request from an external host or a control terminal. Because it was configured to
The effect is obtained that the transfer performance and load status of each LU can be monitored from outside the disk array.

The above effects are obtained by tuning the performance of the disk array by load balancing, controlling the performance of the disk array by bottleneck analysis, a system for charging the used hardware resources, and obtaining guidelines for suppressing the use of hardware resources. Can be used for

[Brief description of the drawings]

FIG. 1 is a system configuration diagram according to a first embodiment.

FIG. 2 is an explanatory diagram of a logical data block with LU information.

FIG. 3 is a block diagram of a bus usage status measuring unit.

FIG. 4 is a timing chart of a disk-side internal bus.

FIG. 5 is a configuration diagram of a bus use status measurement result table.

FIG. 6 is an explanatory diagram of a defined vendor unique command.

FIG. 7 is a flowchart for performing performance measurement according to an instruction from a host.

FIG. 8 is a system configuration diagram according to a second embodiment.

FIG. 9 is a system configuration diagram according to a third embodiment.

FIG. 10 is an explanatory diagram of a bus usage status measurement result table, a data transfer, and a bus load ratio table.

[Explanation of symbols]

 Reference Signs List 100 Host A 200 Disk array 210 Host input / output unit 212 Bus usage status measurement unit 220 Host side internal bus 230 Disk cache 231 Cache bus 240 Disk side internal bus 250 Disk input / output unit 252 Bus usage status measurement unit 260 Disk bus 270 Disk device Group 280 MPU 300 Cache controller 311 Bus usage status measurement unit 321 Bus usage status measurement unit 331 Bus usage status measurement unit

 ──────────────────────────────────────────────────続 き Continuing from the front page (72) Inventor Naoto Matsunami 1099 Ozenji Temple, Aso-ku, Kawasaki City, Kanagawa Prefecture Inside System Development Laboratory, Hitachi, Ltd. 5B042 GA15 GA36 HH20 MC23 MC28 5B065 BA01 CA30 CC08 CH01 EK02 EK07

Claims (10)

[Claims] 1. A storage device, at least one internal data transfer path, and a measuring unit for measuring the use status of at least one of the transfer paths for each logical unit of the storage device;
An output unit for notifying the use status of each of the logical units measured by the measurement unit to the outside. 2. The apparatus according to claim 1, wherein said measuring unit measures a data transfer amount per unit time and / or a transfer path occupancy ratio of said at least one transfer path for each of said logical units. Storage system. 3. The measuring unit according to claim 1, wherein the logical unit is configured to determine whether the logical unit is in the at least one logical unit during a measurement period for each logical unit.
2. The storage device system according to claim 1, wherein a total period during which one transfer path is occupied is measured. 4. The storage according to claim 3, wherein said measuring unit measures the total number of clocks in said certain measuring period and the number of clocks in a period occupying said at least one transfer path. Equipment system. 5. The storage according to claim 1, wherein said output means has a host communication program for communicating with a host, and notifies the host of the use status in response to a request from the host. Equipment system. 6. A control terminal communication means for communicating with a control terminal, said output means having a control terminal communication program for communicating with said control terminal, said control means being responsive to a request from said control terminal. 2. The control terminal according to claim 1, wherein the control terminal notifies the control terminal of a use situation through the control terminal communication means.
The storage device system according to claim 1. 7. A logical unit for adding an identifier for identifying a logical unit to data passing through a storage device constituting a plurality of logical units, one or more internal data transfer paths, and data passing through at least one of the transfer paths. An identifier control unit, a measurement unit that measures a use state for each logical unit of the storage device using the identifier for at least one of the transfer paths, and a use state for each of the logical units measured by the measurement unit. A storage device system comprising: an output unit for notifying to the outside. 8. The information processing apparatus according to claim 1, further comprising a cache memory provided between said storage device and a host, wherein said identifier control unit includes information for identifying a logical unit added to an address for reading / writing data from / to said cache memory. 8. The storage device system according to claim 7, wherein the identifier is added to the data based on the following. 9. The system according to claim 7, wherein the identifier control unit deletes the identifier from data to be transferred to a host.
The storage device system according to claim 1. 10. A storage device group having a plurality of storage devices and constituting a plurality of logical units, a cache memory for storing data transferred between the storage device group and a host,
A cache bus that reads and writes data from and to the cache memory; a bus usage status measurement unit that measures the usage status of the cache bus for each logical unit; and an output unit that outputs the usage status to the outside. Storage system.